xref: /qemu/hw/arm/bcm2836.c (revision db873cc5d1a4aaa67eea87768d504b2f89d88738)
1bad56236SAndrew Baumann /*
2bad56236SAndrew Baumann  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3bad56236SAndrew Baumann  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4bad56236SAndrew Baumann  *
5bad56236SAndrew Baumann  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6bad56236SAndrew Baumann  * Written by Andrew Baumann
7bad56236SAndrew Baumann  *
86111a0c0SPhilippe Mathieu-Daudé  * This work is licensed under the terms of the GNU GPL, version 2 or later.
96111a0c0SPhilippe Mathieu-Daudé  * See the COPYING file in the top-level directory.
10bad56236SAndrew Baumann  */
11bad56236SAndrew Baumann 
12c964b660SPeter Maydell #include "qemu/osdep.h"
13da34e65cSMarkus Armbruster #include "qapi/error.h"
140b8fa32fSMarkus Armbruster #include "qemu/module.h"
154771d756SPaolo Bonzini #include "cpu.h"
16bad56236SAndrew Baumann #include "hw/arm/bcm2836.h"
17bad56236SAndrew Baumann #include "hw/arm/raspi_platform.h"
18bad56236SAndrew Baumann #include "hw/sysbus.h"
19bad56236SAndrew Baumann 
200fd74f03SPeter Maydell struct BCM283XInfo {
210fd74f03SPeter Maydell     const char *name;
22210f4784SPeter Maydell     const char *cpu_type;
23d0567e94SPhilippe Mathieu-Daudé     hwaddr peri_base; /* Peripheral base address seen by the CPU */
24d0567e94SPhilippe Mathieu-Daudé     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
251bcb4d16SPeter Maydell     int clusterid;
260fd74f03SPeter Maydell };
270fd74f03SPeter Maydell 
280fd74f03SPeter Maydell static const BCM283XInfo bcm283x_socs[] = {
290fd74f03SPeter Maydell     {
300fd74f03SPeter Maydell         .name = TYPE_BCM2836,
312b0b9321SPeter Maydell         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
32d0567e94SPhilippe Mathieu-Daudé         .peri_base = 0x3f000000,
33d0567e94SPhilippe Mathieu-Daudé         .ctrl_base = 0x40000000,
341bcb4d16SPeter Maydell         .clusterid = 0xf,
350fd74f03SPeter Maydell     },
36210f4784SPeter Maydell #ifdef TARGET_AARCH64
370fd74f03SPeter Maydell     {
380fd74f03SPeter Maydell         .name = TYPE_BCM2837,
39210f4784SPeter Maydell         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
40d0567e94SPhilippe Mathieu-Daudé         .peri_base = 0x3f000000,
41d0567e94SPhilippe Mathieu-Daudé         .ctrl_base = 0x40000000,
421bcb4d16SPeter Maydell         .clusterid = 0x0,
430fd74f03SPeter Maydell     },
44210f4784SPeter Maydell #endif
450fd74f03SPeter Maydell };
460fd74f03SPeter Maydell 
47bad56236SAndrew Baumann static void bcm2836_init(Object *obj)
48bad56236SAndrew Baumann {
49926dcdf0SPeter Maydell     BCM283XState *s = BCM283X(obj);
50210f4784SPeter Maydell     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
51210f4784SPeter Maydell     const BCM283XInfo *info = bc->info;
52210f4784SPeter Maydell     int n;
53210f4784SPeter Maydell 
54210f4784SPeter Maydell     for (n = 0; n < BCM283X_NCPUS; n++) {
555e5e9ed6SPhilippe Mathieu-Daudé         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
569fc7fc4dSMarkus Armbruster                                 info->cpu_type);
57210f4784SPeter Maydell     }
58bad56236SAndrew Baumann 
59*db873cc5SMarkus Armbruster     object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL);
60bad56236SAndrew Baumann 
61*db873cc5SMarkus Armbruster     object_initialize_child(obj, "peripherals", &s->peripherals,
62*db873cc5SMarkus Armbruster                             TYPE_BCM2835_PERIPHERALS);
63f0afa731SStephen Warren     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
64d2623129SMarkus Armbruster                               "board-rev");
655e9c2a8dSGrégory ESTRADE     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
66d2623129SMarkus Armbruster                               "vcram-size");
67bad56236SAndrew Baumann }
68bad56236SAndrew Baumann 
69bad56236SAndrew Baumann static void bcm2836_realize(DeviceState *dev, Error **errp)
70bad56236SAndrew Baumann {
71926dcdf0SPeter Maydell     BCM283XState *s = BCM283X(dev);
721bcb4d16SPeter Maydell     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
731bcb4d16SPeter Maydell     const BCM283XInfo *info = bc->info;
74bad56236SAndrew Baumann     Object *obj;
75bad56236SAndrew Baumann     Error *err = NULL;
76bad56236SAndrew Baumann     int n;
77bad56236SAndrew Baumann 
78bad56236SAndrew Baumann     /* common peripherals from bcm2835 */
79bad56236SAndrew Baumann 
80bad56236SAndrew Baumann     obj = object_property_get_link(OBJECT(dev), "ram", &err);
81bad56236SAndrew Baumann     if (obj == NULL) {
82bad56236SAndrew Baumann         error_setg(errp, "%s: required ram link not found: %s",
83bad56236SAndrew Baumann                    __func__, error_get_pretty(err));
84bad56236SAndrew Baumann         return;
85bad56236SAndrew Baumann     }
86bad56236SAndrew Baumann 
87d2623129SMarkus Armbruster     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj);
88bad56236SAndrew Baumann 
89*db873cc5SMarkus Armbruster     sysbus_realize(SYS_BUS_DEVICE(&s->peripherals), &err);
90bad56236SAndrew Baumann     if (err) {
91bad56236SAndrew Baumann         error_propagate(errp, err);
92bad56236SAndrew Baumann         return;
93bad56236SAndrew Baumann     }
94bad56236SAndrew Baumann 
95a55b53a2SAndrew Baumann     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
96d2623129SMarkus Armbruster                               "sd-bus");
97a55b53a2SAndrew Baumann 
98bad56236SAndrew Baumann     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
99d0567e94SPhilippe Mathieu-Daudé                             info->peri_base, 1);
100bad56236SAndrew Baumann 
101bad56236SAndrew Baumann     /* bcm2836 interrupt controller (and mailboxes, etc.) */
102*db873cc5SMarkus Armbruster     sysbus_realize(SYS_BUS_DEVICE(&s->control), &err);
103bad56236SAndrew Baumann     if (err) {
104bad56236SAndrew Baumann         error_propagate(errp, err);
105bad56236SAndrew Baumann         return;
106bad56236SAndrew Baumann     }
107bad56236SAndrew Baumann 
108d0567e94SPhilippe Mathieu-Daudé     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
109bad56236SAndrew Baumann 
110bad56236SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
111bad56236SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
112bad56236SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
113bad56236SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
114bad56236SAndrew Baumann 
115926dcdf0SPeter Maydell     for (n = 0; n < BCM283X_NCPUS; n++) {
1161bcb4d16SPeter Maydell         /* TODO: this should be converted to a property of ARM_CPU */
1175e5e9ed6SPhilippe Mathieu-Daudé         s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
118bad56236SAndrew Baumann 
119bad56236SAndrew Baumann         /* set periphbase/CBAR value for CPU-local registers */
1205e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_int(OBJECT(&s->cpu[n].core),
121d0567e94SPhilippe Mathieu-Daudé                                 info->peri_base,
122bad56236SAndrew Baumann                                 "reset-cbar", &err);
123bad56236SAndrew Baumann         if (err) {
124bad56236SAndrew Baumann             error_propagate(errp, err);
125bad56236SAndrew Baumann             return;
126bad56236SAndrew Baumann         }
127bad56236SAndrew Baumann 
128bad56236SAndrew Baumann         /* start powered off if not enabled */
1295e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
130bad56236SAndrew Baumann                                  "start-powered-off", &err);
131bad56236SAndrew Baumann         if (err) {
132bad56236SAndrew Baumann             error_propagate(errp, err);
133bad56236SAndrew Baumann             return;
134bad56236SAndrew Baumann         }
135bad56236SAndrew Baumann 
1365e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_bool(OBJECT(&s->cpu[n].core), true,
1375e5e9ed6SPhilippe Mathieu-Daudé                                  "realized", &err);
138bad56236SAndrew Baumann         if (err) {
139bad56236SAndrew Baumann             error_propagate(errp, err);
140bad56236SAndrew Baumann             return;
141bad56236SAndrew Baumann         }
142bad56236SAndrew Baumann 
143bad56236SAndrew Baumann         /* Connect irq/fiq outputs from the interrupt controller. */
144bad56236SAndrew Baumann         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
1455e5e9ed6SPhilippe Mathieu-Daudé                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
146bad56236SAndrew Baumann         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
1475e5e9ed6SPhilippe Mathieu-Daudé                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
148bad56236SAndrew Baumann 
149bad56236SAndrew Baumann         /* Connect timers from the CPU to the interrupt controller */
1505e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
1510dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
1525e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
153bad56236SAndrew Baumann                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
1545e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
1550dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
1565e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
1570dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
158bad56236SAndrew Baumann     }
159bad56236SAndrew Baumann }
160bad56236SAndrew Baumann 
161bad56236SAndrew Baumann static Property bcm2836_props[] = {
162926dcdf0SPeter Maydell     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
163926dcdf0SPeter Maydell                        BCM283X_NCPUS),
164bad56236SAndrew Baumann     DEFINE_PROP_END_OF_LIST()
165bad56236SAndrew Baumann };
166bad56236SAndrew Baumann 
1670fd74f03SPeter Maydell static void bcm283x_class_init(ObjectClass *oc, void *data)
168bad56236SAndrew Baumann {
169bad56236SAndrew Baumann     DeviceClass *dc = DEVICE_CLASS(oc);
1700fd74f03SPeter Maydell     BCM283XClass *bc = BCM283X_CLASS(oc);
171bad56236SAndrew Baumann 
1720fd74f03SPeter Maydell     bc->info = data;
173bad56236SAndrew Baumann     dc->realize = bcm2836_realize;
1744f67d30bSMarc-André Lureau     device_class_set_props(dc, bcm2836_props);
175cccf96c3SThomas Huth     /* Reason: Must be wired up in code (see raspi_init() function) */
176cccf96c3SThomas Huth     dc->user_creatable = false;
177bad56236SAndrew Baumann }
178bad56236SAndrew Baumann 
1790fd74f03SPeter Maydell static const TypeInfo bcm283x_type_info = {
180926dcdf0SPeter Maydell     .name = TYPE_BCM283X,
1813d260cf3SPeter Maydell     .parent = TYPE_DEVICE,
182926dcdf0SPeter Maydell     .instance_size = sizeof(BCM283XState),
183bad56236SAndrew Baumann     .instance_init = bcm2836_init,
1840fd74f03SPeter Maydell     .class_size = sizeof(BCM283XClass),
1850fd74f03SPeter Maydell     .abstract = true,
186bad56236SAndrew Baumann };
187bad56236SAndrew Baumann 
188bad56236SAndrew Baumann static void bcm2836_register_types(void)
189bad56236SAndrew Baumann {
1900fd74f03SPeter Maydell     int i;
1910fd74f03SPeter Maydell 
1920fd74f03SPeter Maydell     type_register_static(&bcm283x_type_info);
1930fd74f03SPeter Maydell     for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
1940fd74f03SPeter Maydell         TypeInfo ti = {
1950fd74f03SPeter Maydell             .name = bcm283x_socs[i].name,
1960fd74f03SPeter Maydell             .parent = TYPE_BCM283X,
1970fd74f03SPeter Maydell             .class_init = bcm283x_class_init,
1980fd74f03SPeter Maydell             .class_data = (void *) &bcm283x_socs[i],
1990fd74f03SPeter Maydell         };
2000fd74f03SPeter Maydell         type_register(&ti);
2010fd74f03SPeter Maydell     }
202bad56236SAndrew Baumann }
203bad56236SAndrew Baumann 
204bad56236SAndrew Baumann type_init(bcm2836_register_types)
205