xref: /qemu/hw/arm/bcm2836.c (revision d2623129a7dec1d3041ad1221dda1ca49c667532)
1bad56236SAndrew Baumann /*
2bad56236SAndrew Baumann  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3bad56236SAndrew Baumann  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4bad56236SAndrew Baumann  *
5bad56236SAndrew Baumann  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6bad56236SAndrew Baumann  * Written by Andrew Baumann
7bad56236SAndrew Baumann  *
86111a0c0SPhilippe Mathieu-Daudé  * This work is licensed under the terms of the GNU GPL, version 2 or later.
96111a0c0SPhilippe Mathieu-Daudé  * See the COPYING file in the top-level directory.
10bad56236SAndrew Baumann  */
11bad56236SAndrew Baumann 
12c964b660SPeter Maydell #include "qemu/osdep.h"
13da34e65cSMarkus Armbruster #include "qapi/error.h"
140b8fa32fSMarkus Armbruster #include "qemu/module.h"
154771d756SPaolo Bonzini #include "cpu.h"
16bad56236SAndrew Baumann #include "hw/arm/bcm2836.h"
17bad56236SAndrew Baumann #include "hw/arm/raspi_platform.h"
18bad56236SAndrew Baumann #include "hw/sysbus.h"
19bad56236SAndrew Baumann 
200fd74f03SPeter Maydell struct BCM283XInfo {
210fd74f03SPeter Maydell     const char *name;
22210f4784SPeter Maydell     const char *cpu_type;
23d0567e94SPhilippe Mathieu-Daudé     hwaddr peri_base; /* Peripheral base address seen by the CPU */
24d0567e94SPhilippe Mathieu-Daudé     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
251bcb4d16SPeter Maydell     int clusterid;
260fd74f03SPeter Maydell };
270fd74f03SPeter Maydell 
280fd74f03SPeter Maydell static const BCM283XInfo bcm283x_socs[] = {
290fd74f03SPeter Maydell     {
300fd74f03SPeter Maydell         .name = TYPE_BCM2836,
312b0b9321SPeter Maydell         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
32d0567e94SPhilippe Mathieu-Daudé         .peri_base = 0x3f000000,
33d0567e94SPhilippe Mathieu-Daudé         .ctrl_base = 0x40000000,
341bcb4d16SPeter Maydell         .clusterid = 0xf,
350fd74f03SPeter Maydell     },
36210f4784SPeter Maydell #ifdef TARGET_AARCH64
370fd74f03SPeter Maydell     {
380fd74f03SPeter Maydell         .name = TYPE_BCM2837,
39210f4784SPeter Maydell         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
40d0567e94SPhilippe Mathieu-Daudé         .peri_base = 0x3f000000,
41d0567e94SPhilippe Mathieu-Daudé         .ctrl_base = 0x40000000,
421bcb4d16SPeter Maydell         .clusterid = 0x0,
430fd74f03SPeter Maydell     },
44210f4784SPeter Maydell #endif
450fd74f03SPeter Maydell };
460fd74f03SPeter Maydell 
47bad56236SAndrew Baumann static void bcm2836_init(Object *obj)
48bad56236SAndrew Baumann {
49926dcdf0SPeter Maydell     BCM283XState *s = BCM283X(obj);
50210f4784SPeter Maydell     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
51210f4784SPeter Maydell     const BCM283XInfo *info = bc->info;
52210f4784SPeter Maydell     int n;
53210f4784SPeter Maydell 
54210f4784SPeter Maydell     for (n = 0; n < BCM283X_NCPUS; n++) {
555e5e9ed6SPhilippe Mathieu-Daudé         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
565e5e9ed6SPhilippe Mathieu-Daudé                                 sizeof(s->cpu[n].core), info->cpu_type,
575e5e9ed6SPhilippe Mathieu-Daudé                                 &error_abort, NULL);
58210f4784SPeter Maydell     }
59bad56236SAndrew Baumann 
6014c520e3SThomas Huth     sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
6114c520e3SThomas Huth                           TYPE_BCM2836_CONTROL);
62bad56236SAndrew Baumann 
6314c520e3SThomas Huth     sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
6414c520e3SThomas Huth                           sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
65f0afa731SStephen Warren     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
66*d2623129SMarkus Armbruster                               "board-rev");
675e9c2a8dSGrégory ESTRADE     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
68*d2623129SMarkus Armbruster                               "vcram-size");
69bad56236SAndrew Baumann }
70bad56236SAndrew Baumann 
71bad56236SAndrew Baumann static void bcm2836_realize(DeviceState *dev, Error **errp)
72bad56236SAndrew Baumann {
73926dcdf0SPeter Maydell     BCM283XState *s = BCM283X(dev);
741bcb4d16SPeter Maydell     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
751bcb4d16SPeter Maydell     const BCM283XInfo *info = bc->info;
76bad56236SAndrew Baumann     Object *obj;
77bad56236SAndrew Baumann     Error *err = NULL;
78bad56236SAndrew Baumann     int n;
79bad56236SAndrew Baumann 
80bad56236SAndrew Baumann     /* common peripherals from bcm2835 */
81bad56236SAndrew Baumann 
82bad56236SAndrew Baumann     obj = object_property_get_link(OBJECT(dev), "ram", &err);
83bad56236SAndrew Baumann     if (obj == NULL) {
84bad56236SAndrew Baumann         error_setg(errp, "%s: required ram link not found: %s",
85bad56236SAndrew Baumann                    __func__, error_get_pretty(err));
86bad56236SAndrew Baumann         return;
87bad56236SAndrew Baumann     }
88bad56236SAndrew Baumann 
89*d2623129SMarkus Armbruster     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj);
90bad56236SAndrew Baumann 
91bad56236SAndrew Baumann     object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err);
92bad56236SAndrew Baumann     if (err) {
93bad56236SAndrew Baumann         error_propagate(errp, err);
94bad56236SAndrew Baumann         return;
95bad56236SAndrew Baumann     }
96bad56236SAndrew Baumann 
97a55b53a2SAndrew Baumann     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
98*d2623129SMarkus Armbruster                               "sd-bus");
99a55b53a2SAndrew Baumann 
100bad56236SAndrew Baumann     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
101d0567e94SPhilippe Mathieu-Daudé                             info->peri_base, 1);
102bad56236SAndrew Baumann 
103bad56236SAndrew Baumann     /* bcm2836 interrupt controller (and mailboxes, etc.) */
104bad56236SAndrew Baumann     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
105bad56236SAndrew Baumann     if (err) {
106bad56236SAndrew Baumann         error_propagate(errp, err);
107bad56236SAndrew Baumann         return;
108bad56236SAndrew Baumann     }
109bad56236SAndrew Baumann 
110d0567e94SPhilippe Mathieu-Daudé     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
111bad56236SAndrew Baumann 
112bad56236SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
113bad56236SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
114bad56236SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
115bad56236SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
116bad56236SAndrew Baumann 
117926dcdf0SPeter Maydell     for (n = 0; n < BCM283X_NCPUS; n++) {
1181bcb4d16SPeter Maydell         /* TODO: this should be converted to a property of ARM_CPU */
1195e5e9ed6SPhilippe Mathieu-Daudé         s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
120bad56236SAndrew Baumann 
121bad56236SAndrew Baumann         /* set periphbase/CBAR value for CPU-local registers */
1225e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_int(OBJECT(&s->cpu[n].core),
123d0567e94SPhilippe Mathieu-Daudé                                 info->peri_base,
124bad56236SAndrew Baumann                                 "reset-cbar", &err);
125bad56236SAndrew Baumann         if (err) {
126bad56236SAndrew Baumann             error_propagate(errp, err);
127bad56236SAndrew Baumann             return;
128bad56236SAndrew Baumann         }
129bad56236SAndrew Baumann 
130bad56236SAndrew Baumann         /* start powered off if not enabled */
1315e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
132bad56236SAndrew Baumann                                  "start-powered-off", &err);
133bad56236SAndrew Baumann         if (err) {
134bad56236SAndrew Baumann             error_propagate(errp, err);
135bad56236SAndrew Baumann             return;
136bad56236SAndrew Baumann         }
137bad56236SAndrew Baumann 
1385e5e9ed6SPhilippe Mathieu-Daudé         object_property_set_bool(OBJECT(&s->cpu[n].core), true,
1395e5e9ed6SPhilippe Mathieu-Daudé                                  "realized", &err);
140bad56236SAndrew Baumann         if (err) {
141bad56236SAndrew Baumann             error_propagate(errp, err);
142bad56236SAndrew Baumann             return;
143bad56236SAndrew Baumann         }
144bad56236SAndrew Baumann 
145bad56236SAndrew Baumann         /* Connect irq/fiq outputs from the interrupt controller. */
146bad56236SAndrew Baumann         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
1475e5e9ed6SPhilippe Mathieu-Daudé                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
148bad56236SAndrew Baumann         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
1495e5e9ed6SPhilippe Mathieu-Daudé                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
150bad56236SAndrew Baumann 
151bad56236SAndrew Baumann         /* Connect timers from the CPU to the interrupt controller */
1525e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
1530dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
1545e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
155bad56236SAndrew Baumann                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
1565e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
1570dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
1585e5e9ed6SPhilippe Mathieu-Daudé         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
1590dc19823SPeter Maydell                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
160bad56236SAndrew Baumann     }
161bad56236SAndrew Baumann }
162bad56236SAndrew Baumann 
163bad56236SAndrew Baumann static Property bcm2836_props[] = {
164926dcdf0SPeter Maydell     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
165926dcdf0SPeter Maydell                        BCM283X_NCPUS),
166bad56236SAndrew Baumann     DEFINE_PROP_END_OF_LIST()
167bad56236SAndrew Baumann };
168bad56236SAndrew Baumann 
1690fd74f03SPeter Maydell static void bcm283x_class_init(ObjectClass *oc, void *data)
170bad56236SAndrew Baumann {
171bad56236SAndrew Baumann     DeviceClass *dc = DEVICE_CLASS(oc);
1720fd74f03SPeter Maydell     BCM283XClass *bc = BCM283X_CLASS(oc);
173bad56236SAndrew Baumann 
1740fd74f03SPeter Maydell     bc->info = data;
175bad56236SAndrew Baumann     dc->realize = bcm2836_realize;
1764f67d30bSMarc-André Lureau     device_class_set_props(dc, bcm2836_props);
177cccf96c3SThomas Huth     /* Reason: Must be wired up in code (see raspi_init() function) */
178cccf96c3SThomas Huth     dc->user_creatable = false;
179bad56236SAndrew Baumann }
180bad56236SAndrew Baumann 
1810fd74f03SPeter Maydell static const TypeInfo bcm283x_type_info = {
182926dcdf0SPeter Maydell     .name = TYPE_BCM283X,
1833d260cf3SPeter Maydell     .parent = TYPE_DEVICE,
184926dcdf0SPeter Maydell     .instance_size = sizeof(BCM283XState),
185bad56236SAndrew Baumann     .instance_init = bcm2836_init,
1860fd74f03SPeter Maydell     .class_size = sizeof(BCM283XClass),
1870fd74f03SPeter Maydell     .abstract = true,
188bad56236SAndrew Baumann };
189bad56236SAndrew Baumann 
190bad56236SAndrew Baumann static void bcm2836_register_types(void)
191bad56236SAndrew Baumann {
1920fd74f03SPeter Maydell     int i;
1930fd74f03SPeter Maydell 
1940fd74f03SPeter Maydell     type_register_static(&bcm283x_type_info);
1950fd74f03SPeter Maydell     for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
1960fd74f03SPeter Maydell         TypeInfo ti = {
1970fd74f03SPeter Maydell             .name = bcm283x_socs[i].name,
1980fd74f03SPeter Maydell             .parent = TYPE_BCM283X,
1990fd74f03SPeter Maydell             .class_init = bcm283x_class_init,
2000fd74f03SPeter Maydell             .class_data = (void *) &bcm283x_socs[i],
2010fd74f03SPeter Maydell         };
2020fd74f03SPeter Maydell         type_register(&ti);
2030fd74f03SPeter Maydell     }
204bad56236SAndrew Baumann }
205bad56236SAndrew Baumann 
206bad56236SAndrew Baumann type_init(bcm2836_register_types)
207