1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu/module.h" 15 #include "hw/arm/bcm2835_peripherals.h" 16 #include "hw/misc/bcm2835_mbox_defs.h" 17 #include "hw/arm/raspi_platform.h" 18 #include "sysemu/sysemu.h" 19 20 /* Peripheral base address on the VC (GPU) system bus */ 21 #define BCM2835_VC_PERI_BASE 0x7e000000 22 23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 24 #define BCM2835_SDHC_CAPAREG 0x52134b4 25 26 /* 27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ, 28 * while channels 11--14 share one IRQ: 29 */ 30 #define SEPARATE_DMA_IRQ_MAX 10 31 #define ORGATED_DMA_IRQ_COUNT 4 32 33 void create_unimp(BCMSocPeripheralBaseState *ps, 34 UnimplementedDeviceState *uds, 35 const char *name, hwaddr ofs, hwaddr size) 36 { 37 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE); 38 qdev_prop_set_string(DEVICE(uds), "name", name); 39 qdev_prop_set_uint64(DEVICE(uds), "size", size); 40 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); 41 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, 42 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); 43 } 44 45 static void bcm2835_peripherals_init(Object *obj) 46 { 47 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 48 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj); 49 50 /* Random Number Generator */ 51 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); 52 53 /* Thermal */ 54 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); 55 56 /* GPIO */ 57 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); 58 59 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", 60 OBJECT(&s_base->sdhci.sdbus)); 61 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", 62 OBJECT(&s_base->sdhost.sdbus)); 63 64 /* Gated DMA interrupts */ 65 object_initialize_child(obj, "orgated-dma-irq", 66 &s_base->orgated_dma_irq, TYPE_OR_IRQ); 67 object_property_set_int(OBJECT(&s_base->orgated_dma_irq), "num-lines", 68 ORGATED_DMA_IRQ_COUNT, &error_abort); 69 } 70 71 static void raspi_peripherals_base_init(Object *obj) 72 { 73 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(obj); 74 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_GET_CLASS(obj); 75 76 /* Memory region for peripheral devices, which we export to our parent */ 77 memory_region_init(&s->peri_mr, obj, "bcm2835-peripherals", bc->peri_size); 78 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 79 80 /* Internal memory region for peripheral bus addresses (not exported) */ 81 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 82 83 /* Internal memory region for request/response communication with 84 * mailbox-addressable peripherals (not exported) 85 */ 86 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 87 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 88 89 /* Interrupt Controller */ 90 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC); 91 92 /* SYS Timer */ 93 object_initialize_child(obj, "systimer", &s->systmr, 94 TYPE_BCM2835_SYSTIMER); 95 96 /* UART0 */ 97 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011); 98 99 /* AUX / UART1 */ 100 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX); 101 102 /* Mailboxes */ 103 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX); 104 105 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 106 OBJECT(&s->mbox_mr)); 107 108 /* Framebuffer */ 109 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB); 110 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size"); 111 112 object_property_add_const_link(OBJECT(&s->fb), "dma-mr", 113 OBJECT(&s->gpu_bus_mr)); 114 115 /* Property channel */ 116 object_initialize_child(obj, "property", &s->property, 117 TYPE_BCM2835_PROPERTY); 118 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 119 "board-rev"); 120 object_property_add_alias(obj, "command-line", OBJECT(&s->property), 121 "command-line"); 122 123 object_property_add_const_link(OBJECT(&s->property), "fb", 124 OBJECT(&s->fb)); 125 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 126 OBJECT(&s->gpu_bus_mr)); 127 128 /* Extended Mass Media Controller */ 129 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI); 130 131 /* SDHOST */ 132 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST); 133 134 /* DMA Channels */ 135 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA); 136 137 object_property_add_const_link(OBJECT(&s->dma), "dma-mr", 138 OBJECT(&s->gpu_bus_mr)); 139 140 /* Mphi */ 141 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI); 142 143 /* DWC2 */ 144 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB); 145 146 /* CPRMAN clock manager */ 147 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN); 148 149 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr", 150 OBJECT(&s->gpu_bus_mr)); 151 152 /* Power Management */ 153 object_initialize_child(obj, "powermgt", &s->powermgt, 154 TYPE_BCM2835_POWERMGT); 155 156 /* SPI */ 157 object_initialize_child(obj, "bcm2835-spi0", &s->spi[0], 158 TYPE_BCM2835_SPI); 159 } 160 161 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 162 { 163 MemoryRegion *mphi_mr; 164 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 165 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev); 166 int n; 167 168 bcm_soc_peripherals_common_realize(dev, errp); 169 170 /* Extended Mass Media Controller */ 171 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0, 172 qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ, 173 INTERRUPT_ARASANSDIO)); 174 175 /* Connect DMA 0-12 to the interrupt controller */ 176 for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) { 177 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n, 178 qdev_get_gpio_in_named(DEVICE(&s_base->ic), 179 BCM2835_IC_GPU_IRQ, 180 INTERRUPT_DMA0 + n)); 181 } 182 183 if (!qdev_realize(DEVICE(&s_base->orgated_dma_irq), NULL, errp)) { 184 return; 185 } 186 for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) { 187 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 188 SEPARATE_DMA_IRQ_MAX + 1 + n, 189 qdev_get_gpio_in(DEVICE(&s_base->orgated_dma_irq), n)); 190 } 191 qdev_connect_gpio_out(DEVICE(&s_base->orgated_dma_irq), 0, 192 qdev_get_gpio_in_named(DEVICE(&s_base->ic), 193 BCM2835_IC_GPU_IRQ, 194 INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1)); 195 196 /* Random Number Generator */ 197 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) { 198 return; 199 } 200 memory_region_add_subregion( 201 &s_base->peri_mr, RNG_OFFSET, 202 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0)); 203 204 /* THERMAL */ 205 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) { 206 return; 207 } 208 memory_region_add_subregion(&s_base->peri_mr, THERMAL_OFFSET, 209 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); 210 211 /* Map MPHI to the peripherals memory map */ 212 mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0); 213 memory_region_add_subregion(&s_base->peri_mr, MPHI_OFFSET, mphi_mr); 214 215 /* GPIO */ 216 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { 217 return; 218 } 219 memory_region_add_subregion( 220 &s_base->peri_mr, GPIO_OFFSET, 221 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); 222 223 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); 224 } 225 226 void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp) 227 { 228 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(dev); 229 Object *obj; 230 MemoryRegion *ram; 231 Error *err = NULL; 232 uint64_t ram_size, vcram_size; 233 int n; 234 235 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort); 236 237 ram = MEMORY_REGION(obj); 238 ram_size = memory_region_size(ram); 239 240 /* Map peripherals and RAM into the GPU address space. */ 241 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 242 "bcm2835-peripherals", &s->peri_mr, 0, 243 memory_region_size(&s->peri_mr)); 244 245 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 246 &s->peri_mr_alias, 1); 247 248 /* RAM is aliased four times (different cache configurations) on the GPU */ 249 for (n = 0; n < 4; n++) { 250 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 251 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 252 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 253 &s->ram_alias[n], 0); 254 } 255 256 /* Interrupt Controller */ 257 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) { 258 return; 259 } 260 261 /* CPRMAN clock manager */ 262 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) { 263 return; 264 } 265 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET, 266 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0)); 267 qdev_connect_clock_in(DEVICE(&s->uart0), "clk", 268 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out")); 269 270 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 271 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 272 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 273 274 /* Sys Timer */ 275 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) { 276 return; 277 } 278 memory_region_add_subregion(&s->peri_mr, ST_OFFSET, 279 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0)); 280 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0, 281 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 282 INTERRUPT_TIMER0)); 283 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1, 284 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 285 INTERRUPT_TIMER1)); 286 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2, 287 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 288 INTERRUPT_TIMER2)); 289 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3, 290 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 291 INTERRUPT_TIMER3)); 292 293 /* UART0 */ 294 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); 295 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) { 296 return; 297 } 298 299 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 300 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); 301 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, 302 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 303 INTERRUPT_UART0)); 304 305 /* AUX / UART1 */ 306 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); 307 308 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) { 309 return; 310 } 311 312 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, 313 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); 314 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, 315 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 316 INTERRUPT_AUX)); 317 318 /* Mailboxes */ 319 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) { 320 return; 321 } 322 323 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 324 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 325 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 326 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 327 INTERRUPT_ARM_MAILBOX)); 328 329 /* Framebuffer */ 330 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err); 331 if (err) { 332 error_propagate(errp, err); 333 return; 334 } 335 336 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", 337 ram_size - vcram_size, errp)) { 338 return; 339 } 340 341 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) { 342 return; 343 } 344 345 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT, 346 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0)); 347 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0, 348 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB)); 349 350 /* Property channel */ 351 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) { 352 return; 353 } 354 355 memory_region_add_subregion(&s->mbox_mr, 356 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 357 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 358 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 359 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 360 361 /* Extended Mass Media Controller 362 * 363 * Compatible with: 364 * - SD Host Controller Specification Version 3.0 Draft 1.0 365 * - SDIO Specification Version 3.0 366 * - MMC Specification Version 4.4 367 * 368 * For the exact details please refer to the Arasan documentation: 369 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf 370 */ 371 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3, 372 &error_abort); 373 object_property_set_uint(OBJECT(&s->sdhci), "capareg", 374 BCM2835_SDHC_CAPAREG, &error_abort); 375 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true, 376 &error_abort); 377 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { 378 return; 379 } 380 381 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, 382 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 383 384 /* SDHOST */ 385 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) { 386 return; 387 } 388 389 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET, 390 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0)); 391 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0, 392 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 393 INTERRUPT_SDIO)); 394 395 /* DMA Channels */ 396 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) { 397 return; 398 } 399 400 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET, 401 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0)); 402 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET, 403 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1)); 404 405 /* Mphi */ 406 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) { 407 return; 408 } 409 410 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0, 411 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 412 INTERRUPT_HOSTPORT)); 413 414 /* DWC2 */ 415 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) { 416 return; 417 } 418 419 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET, 420 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0)); 421 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0, 422 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 423 INTERRUPT_USB)); 424 425 /* Power Management */ 426 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) { 427 return; 428 } 429 430 memory_region_add_subregion(&s->peri_mr, PM_OFFSET, 431 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0)); 432 433 /* SPI */ 434 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[0]), errp)) { 435 return; 436 } 437 438 memory_region_add_subregion(&s->peri_mr, SPI0_OFFSET, 439 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->spi[0]), 0)); 440 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[0]), 0, 441 qdev_get_gpio_in_named(DEVICE(&s->ic), 442 BCM2835_IC_GPU_IRQ, 443 INTERRUPT_SPI)); 444 445 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000); 446 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); 447 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); 448 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); 449 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); 450 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); 451 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); 452 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); 453 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); 454 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); 455 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); 456 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000); 457 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); 458 } 459 460 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 461 { 462 DeviceClass *dc = DEVICE_CLASS(oc); 463 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_CLASS(oc); 464 465 bc->peri_size = 0x1000000; 466 dc->realize = bcm2835_peripherals_realize; 467 } 468 469 static const TypeInfo bcm2835_peripherals_types[] = { 470 { 471 .name = TYPE_BCM2835_PERIPHERALS, 472 .parent = TYPE_BCM_SOC_PERIPHERALS_BASE, 473 .instance_size = sizeof(BCM2835PeripheralState), 474 .instance_init = bcm2835_peripherals_init, 475 .class_init = bcm2835_peripherals_class_init, 476 }, { 477 .name = TYPE_BCM_SOC_PERIPHERALS_BASE, 478 .parent = TYPE_SYS_BUS_DEVICE, 479 .instance_size = sizeof(BCMSocPeripheralBaseState), 480 .instance_init = raspi_peripherals_base_init, 481 .class_size = sizeof(BCMSocPeripheralBaseClass), 482 .abstract = true, 483 } 484 }; 485 486 DEFINE_TYPES(bcm2835_peripherals_types) 487