xref: /qemu/hw/arm/bcm2835_peripherals.c (revision 7c62aeb82a143f4fcb1e6e419175cd120407deac)
1*7c62aeb8SAndrew Baumann /*
2*7c62aeb8SAndrew Baumann  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3*7c62aeb8SAndrew Baumann  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4*7c62aeb8SAndrew Baumann  *
5*7c62aeb8SAndrew Baumann  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6*7c62aeb8SAndrew Baumann  * Written by Andrew Baumann
7*7c62aeb8SAndrew Baumann  *
8*7c62aeb8SAndrew Baumann  * This code is licensed under the GNU GPLv2 and later.
9*7c62aeb8SAndrew Baumann  */
10*7c62aeb8SAndrew Baumann 
11*7c62aeb8SAndrew Baumann #include "hw/arm/bcm2835_peripherals.h"
12*7c62aeb8SAndrew Baumann #include "hw/misc/bcm2835_mbox_defs.h"
13*7c62aeb8SAndrew Baumann #include "hw/arm/raspi_platform.h"
14*7c62aeb8SAndrew Baumann 
15*7c62aeb8SAndrew Baumann /* Peripheral base address on the VC (GPU) system bus */
16*7c62aeb8SAndrew Baumann #define BCM2835_VC_PERI_BASE 0x7e000000
17*7c62aeb8SAndrew Baumann 
18*7c62aeb8SAndrew Baumann /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
19*7c62aeb8SAndrew Baumann #define BCM2835_SDHC_CAPAREG 0x52034b4
20*7c62aeb8SAndrew Baumann 
21*7c62aeb8SAndrew Baumann static void bcm2835_peripherals_init(Object *obj)
22*7c62aeb8SAndrew Baumann {
23*7c62aeb8SAndrew Baumann     BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
24*7c62aeb8SAndrew Baumann 
25*7c62aeb8SAndrew Baumann     /* Memory region for peripheral devices, which we export to our parent */
26*7c62aeb8SAndrew Baumann     memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
27*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL);
28*7c62aeb8SAndrew Baumann     sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
29*7c62aeb8SAndrew Baumann 
30*7c62aeb8SAndrew Baumann     /* Internal memory region for peripheral bus addresses (not exported) */
31*7c62aeb8SAndrew Baumann     memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
32*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL);
33*7c62aeb8SAndrew Baumann 
34*7c62aeb8SAndrew Baumann     /* Internal memory region for request/response communication with
35*7c62aeb8SAndrew Baumann      * mailbox-addressable peripherals (not exported)
36*7c62aeb8SAndrew Baumann      */
37*7c62aeb8SAndrew Baumann     memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
38*7c62aeb8SAndrew Baumann                        MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
39*7c62aeb8SAndrew Baumann 
40*7c62aeb8SAndrew Baumann     /* Interrupt Controller */
41*7c62aeb8SAndrew Baumann     object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
42*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL);
43*7c62aeb8SAndrew Baumann     qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default());
44*7c62aeb8SAndrew Baumann 
45*7c62aeb8SAndrew Baumann     /* UART0 */
46*7c62aeb8SAndrew Baumann     s->uart0 = SYS_BUS_DEVICE(object_new("pl011"));
47*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL);
48*7c62aeb8SAndrew Baumann     qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default());
49*7c62aeb8SAndrew Baumann 
50*7c62aeb8SAndrew Baumann     /* Mailboxes */
51*7c62aeb8SAndrew Baumann     object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX);
52*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL);
53*7c62aeb8SAndrew Baumann     qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default());
54*7c62aeb8SAndrew Baumann 
55*7c62aeb8SAndrew Baumann     object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
56*7c62aeb8SAndrew Baumann                                    OBJECT(&s->mbox_mr), &error_abort);
57*7c62aeb8SAndrew Baumann 
58*7c62aeb8SAndrew Baumann     /* Property channel */
59*7c62aeb8SAndrew Baumann     object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY);
60*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "property", OBJECT(&s->property), NULL);
61*7c62aeb8SAndrew Baumann     qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default());
62*7c62aeb8SAndrew Baumann 
63*7c62aeb8SAndrew Baumann     object_property_add_const_link(OBJECT(&s->property), "dma-mr",
64*7c62aeb8SAndrew Baumann                                    OBJECT(&s->gpu_bus_mr), &error_abort);
65*7c62aeb8SAndrew Baumann 
66*7c62aeb8SAndrew Baumann     /* Extended Mass Media Controller */
67*7c62aeb8SAndrew Baumann     object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI);
68*7c62aeb8SAndrew Baumann     object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL);
69*7c62aeb8SAndrew Baumann     qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default());
70*7c62aeb8SAndrew Baumann }
71*7c62aeb8SAndrew Baumann 
72*7c62aeb8SAndrew Baumann static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
73*7c62aeb8SAndrew Baumann {
74*7c62aeb8SAndrew Baumann     BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
75*7c62aeb8SAndrew Baumann     Object *obj;
76*7c62aeb8SAndrew Baumann     MemoryRegion *ram;
77*7c62aeb8SAndrew Baumann     Error *err = NULL;
78*7c62aeb8SAndrew Baumann     uint32_t ram_size;
79*7c62aeb8SAndrew Baumann     int n;
80*7c62aeb8SAndrew Baumann 
81*7c62aeb8SAndrew Baumann     obj = object_property_get_link(OBJECT(dev), "ram", &err);
82*7c62aeb8SAndrew Baumann     if (obj == NULL) {
83*7c62aeb8SAndrew Baumann         error_setg(errp, "%s: required ram link not found: %s",
84*7c62aeb8SAndrew Baumann                    __func__, error_get_pretty(err));
85*7c62aeb8SAndrew Baumann         return;
86*7c62aeb8SAndrew Baumann     }
87*7c62aeb8SAndrew Baumann 
88*7c62aeb8SAndrew Baumann     ram = MEMORY_REGION(obj);
89*7c62aeb8SAndrew Baumann     ram_size = memory_region_size(ram);
90*7c62aeb8SAndrew Baumann 
91*7c62aeb8SAndrew Baumann     /* Map peripherals and RAM into the GPU address space. */
92*7c62aeb8SAndrew Baumann     memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
93*7c62aeb8SAndrew Baumann                              "bcm2835-peripherals", &s->peri_mr, 0,
94*7c62aeb8SAndrew Baumann                              memory_region_size(&s->peri_mr));
95*7c62aeb8SAndrew Baumann 
96*7c62aeb8SAndrew Baumann     memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
97*7c62aeb8SAndrew Baumann                                         &s->peri_mr_alias, 1);
98*7c62aeb8SAndrew Baumann 
99*7c62aeb8SAndrew Baumann     /* RAM is aliased four times (different cache configurations) on the GPU */
100*7c62aeb8SAndrew Baumann     for (n = 0; n < 4; n++) {
101*7c62aeb8SAndrew Baumann         memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
102*7c62aeb8SAndrew Baumann                                  "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
103*7c62aeb8SAndrew Baumann         memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
104*7c62aeb8SAndrew Baumann                                             &s->ram_alias[n], 0);
105*7c62aeb8SAndrew Baumann     }
106*7c62aeb8SAndrew Baumann 
107*7c62aeb8SAndrew Baumann     /* Interrupt Controller */
108*7c62aeb8SAndrew Baumann     object_property_set_bool(OBJECT(&s->ic), true, "realized", &err);
109*7c62aeb8SAndrew Baumann     if (err) {
110*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
111*7c62aeb8SAndrew Baumann         return;
112*7c62aeb8SAndrew Baumann     }
113*7c62aeb8SAndrew Baumann 
114*7c62aeb8SAndrew Baumann     memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
115*7c62aeb8SAndrew Baumann                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
116*7c62aeb8SAndrew Baumann     sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
117*7c62aeb8SAndrew Baumann 
118*7c62aeb8SAndrew Baumann     /* UART0 */
119*7c62aeb8SAndrew Baumann     object_property_set_bool(OBJECT(s->uart0), true, "realized", &err);
120*7c62aeb8SAndrew Baumann     if (err) {
121*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
122*7c62aeb8SAndrew Baumann         return;
123*7c62aeb8SAndrew Baumann     }
124*7c62aeb8SAndrew Baumann 
125*7c62aeb8SAndrew Baumann     memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
126*7c62aeb8SAndrew Baumann                                 sysbus_mmio_get_region(s->uart0, 0));
127*7c62aeb8SAndrew Baumann     sysbus_connect_irq(s->uart0, 0,
128*7c62aeb8SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
129*7c62aeb8SAndrew Baumann                                INTERRUPT_UART));
130*7c62aeb8SAndrew Baumann 
131*7c62aeb8SAndrew Baumann     /* Mailboxes */
132*7c62aeb8SAndrew Baumann     object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err);
133*7c62aeb8SAndrew Baumann     if (err) {
134*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
135*7c62aeb8SAndrew Baumann         return;
136*7c62aeb8SAndrew Baumann     }
137*7c62aeb8SAndrew Baumann 
138*7c62aeb8SAndrew Baumann     memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
139*7c62aeb8SAndrew Baumann                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
140*7c62aeb8SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
141*7c62aeb8SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
142*7c62aeb8SAndrew Baumann                                INTERRUPT_ARM_MAILBOX));
143*7c62aeb8SAndrew Baumann 
144*7c62aeb8SAndrew Baumann     /* Property channel */
145*7c62aeb8SAndrew Baumann     object_property_set_int(OBJECT(&s->property), ram_size, "ram-size", &err);
146*7c62aeb8SAndrew Baumann     if (err) {
147*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
148*7c62aeb8SAndrew Baumann         return;
149*7c62aeb8SAndrew Baumann     }
150*7c62aeb8SAndrew Baumann 
151*7c62aeb8SAndrew Baumann     object_property_set_bool(OBJECT(&s->property), true, "realized", &err);
152*7c62aeb8SAndrew Baumann     if (err) {
153*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
154*7c62aeb8SAndrew Baumann         return;
155*7c62aeb8SAndrew Baumann     }
156*7c62aeb8SAndrew Baumann 
157*7c62aeb8SAndrew Baumann     memory_region_add_subregion(&s->mbox_mr,
158*7c62aeb8SAndrew Baumann                 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
159*7c62aeb8SAndrew Baumann                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
160*7c62aeb8SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
161*7c62aeb8SAndrew Baumann                       qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
162*7c62aeb8SAndrew Baumann 
163*7c62aeb8SAndrew Baumann     /* Extended Mass Media Controller */
164*7c62aeb8SAndrew Baumann     object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg",
165*7c62aeb8SAndrew Baumann                             &err);
166*7c62aeb8SAndrew Baumann     if (err) {
167*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
168*7c62aeb8SAndrew Baumann         return;
169*7c62aeb8SAndrew Baumann     }
170*7c62aeb8SAndrew Baumann 
171*7c62aeb8SAndrew Baumann     object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err);
172*7c62aeb8SAndrew Baumann     if (err) {
173*7c62aeb8SAndrew Baumann         error_propagate(errp, err);
174*7c62aeb8SAndrew Baumann         return;
175*7c62aeb8SAndrew Baumann     }
176*7c62aeb8SAndrew Baumann 
177*7c62aeb8SAndrew Baumann     memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
178*7c62aeb8SAndrew Baumann                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
179*7c62aeb8SAndrew Baumann     sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
180*7c62aeb8SAndrew Baumann         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
181*7c62aeb8SAndrew Baumann                                INTERRUPT_ARASANSDIO));
182*7c62aeb8SAndrew Baumann }
183*7c62aeb8SAndrew Baumann 
184*7c62aeb8SAndrew Baumann static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
185*7c62aeb8SAndrew Baumann {
186*7c62aeb8SAndrew Baumann     DeviceClass *dc = DEVICE_CLASS(oc);
187*7c62aeb8SAndrew Baumann 
188*7c62aeb8SAndrew Baumann     dc->realize = bcm2835_peripherals_realize;
189*7c62aeb8SAndrew Baumann }
190*7c62aeb8SAndrew Baumann 
191*7c62aeb8SAndrew Baumann static const TypeInfo bcm2835_peripherals_type_info = {
192*7c62aeb8SAndrew Baumann     .name = TYPE_BCM2835_PERIPHERALS,
193*7c62aeb8SAndrew Baumann     .parent = TYPE_SYS_BUS_DEVICE,
194*7c62aeb8SAndrew Baumann     .instance_size = sizeof(BCM2835PeripheralState),
195*7c62aeb8SAndrew Baumann     .instance_init = bcm2835_peripherals_init,
196*7c62aeb8SAndrew Baumann     .class_init = bcm2835_peripherals_class_init,
197*7c62aeb8SAndrew Baumann };
198*7c62aeb8SAndrew Baumann 
199*7c62aeb8SAndrew Baumann static void bcm2835_peripherals_register_types(void)
200*7c62aeb8SAndrew Baumann {
201*7c62aeb8SAndrew Baumann     type_register_static(&bcm2835_peripherals_type_info);
202*7c62aeb8SAndrew Baumann }
203*7c62aeb8SAndrew Baumann 
204*7c62aeb8SAndrew Baumann type_init(bcm2835_peripherals_register_types)
205