1*8d9006aeSqianfan Zhao /* 2*8d9006aeSqianfan Zhao * Bananapi M2U emulation 3*8d9006aeSqianfan Zhao * 4*8d9006aeSqianfan Zhao * Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com> 5*8d9006aeSqianfan Zhao * 6*8d9006aeSqianfan Zhao * This program is free software: you can redistribute it and/or modify 7*8d9006aeSqianfan Zhao * it under the terms of the GNU General Public License as published by 8*8d9006aeSqianfan Zhao * the Free Software Foundation, either version 2 of the License, or 9*8d9006aeSqianfan Zhao * (at your option) any later version. 10*8d9006aeSqianfan Zhao * 11*8d9006aeSqianfan Zhao * This program is distributed in the hope that it will be useful, 12*8d9006aeSqianfan Zhao * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*8d9006aeSqianfan Zhao * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*8d9006aeSqianfan Zhao * GNU General Public License for more details. 15*8d9006aeSqianfan Zhao * 16*8d9006aeSqianfan Zhao * You should have received a copy of the GNU General Public License 17*8d9006aeSqianfan Zhao * along with this program. If not, see <http://www.gnu.org/licenses/>. 18*8d9006aeSqianfan Zhao */ 19*8d9006aeSqianfan Zhao 20*8d9006aeSqianfan Zhao #include "qemu/osdep.h" 21*8d9006aeSqianfan Zhao #include "qemu/units.h" 22*8d9006aeSqianfan Zhao #include "exec/address-spaces.h" 23*8d9006aeSqianfan Zhao #include "qapi/error.h" 24*8d9006aeSqianfan Zhao #include "qemu/error-report.h" 25*8d9006aeSqianfan Zhao #include "hw/boards.h" 26*8d9006aeSqianfan Zhao #include "hw/qdev-properties.h" 27*8d9006aeSqianfan Zhao #include "hw/arm/allwinner-r40.h" 28*8d9006aeSqianfan Zhao 29*8d9006aeSqianfan Zhao static struct arm_boot_info bpim2u_binfo; 30*8d9006aeSqianfan Zhao 31*8d9006aeSqianfan Zhao /* 32*8d9006aeSqianfan Zhao * R40 can boot from mmc0 and mmc2, and bpim2u has two mmc interface, one is 33*8d9006aeSqianfan Zhao * connected to sdcard and another mount an emmc media. 34*8d9006aeSqianfan Zhao * Attach the mmc driver and try loading bootloader. 35*8d9006aeSqianfan Zhao */ 36*8d9006aeSqianfan Zhao static void mmc_attach_drive(AwR40State *s, AwSdHostState *mmc, int unit, 37*8d9006aeSqianfan Zhao bool load_bootroom, bool *bootroom_loaded) 38*8d9006aeSqianfan Zhao { 39*8d9006aeSqianfan Zhao DriveInfo *di = drive_get(IF_SD, 0, unit); 40*8d9006aeSqianfan Zhao BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 41*8d9006aeSqianfan Zhao BusState *bus; 42*8d9006aeSqianfan Zhao DeviceState *carddev; 43*8d9006aeSqianfan Zhao 44*8d9006aeSqianfan Zhao bus = qdev_get_child_bus(DEVICE(mmc), "sd-bus"); 45*8d9006aeSqianfan Zhao if (bus == NULL) { 46*8d9006aeSqianfan Zhao error_report("No SD bus found in SOC object"); 47*8d9006aeSqianfan Zhao exit(1); 48*8d9006aeSqianfan Zhao } 49*8d9006aeSqianfan Zhao 50*8d9006aeSqianfan Zhao carddev = qdev_new(TYPE_SD_CARD); 51*8d9006aeSqianfan Zhao qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); 52*8d9006aeSqianfan Zhao qdev_realize_and_unref(carddev, bus, &error_fatal); 53*8d9006aeSqianfan Zhao 54*8d9006aeSqianfan Zhao if (load_bootroom && blk && blk_is_available(blk)) { 55*8d9006aeSqianfan Zhao /* Use Boot ROM to copy data from SD card to SRAM */ 56*8d9006aeSqianfan Zhao *bootroom_loaded = allwinner_r40_bootrom_setup(s, blk, unit); 57*8d9006aeSqianfan Zhao } 58*8d9006aeSqianfan Zhao } 59*8d9006aeSqianfan Zhao 60*8d9006aeSqianfan Zhao static void bpim2u_init(MachineState *machine) 61*8d9006aeSqianfan Zhao { 62*8d9006aeSqianfan Zhao bool bootroom_loaded = false; 63*8d9006aeSqianfan Zhao AwR40State *r40; 64*8d9006aeSqianfan Zhao 65*8d9006aeSqianfan Zhao /* BIOS is not supported by this board */ 66*8d9006aeSqianfan Zhao if (machine->firmware) { 67*8d9006aeSqianfan Zhao error_report("BIOS not supported for this machine"); 68*8d9006aeSqianfan Zhao exit(1); 69*8d9006aeSqianfan Zhao } 70*8d9006aeSqianfan Zhao 71*8d9006aeSqianfan Zhao /* Only allow Cortex-A7 for this board */ 72*8d9006aeSqianfan Zhao if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { 73*8d9006aeSqianfan Zhao error_report("This board can only be used with cortex-a7 CPU"); 74*8d9006aeSqianfan Zhao exit(1); 75*8d9006aeSqianfan Zhao } 76*8d9006aeSqianfan Zhao 77*8d9006aeSqianfan Zhao r40 = AW_R40(object_new(TYPE_AW_R40)); 78*8d9006aeSqianfan Zhao object_property_add_child(OBJECT(machine), "soc", OBJECT(r40)); 79*8d9006aeSqianfan Zhao object_unref(OBJECT(r40)); 80*8d9006aeSqianfan Zhao 81*8d9006aeSqianfan Zhao /* Setup timer properties */ 82*8d9006aeSqianfan Zhao object_property_set_int(OBJECT(r40), "clk0-freq", 32768, &error_abort); 83*8d9006aeSqianfan Zhao object_property_set_int(OBJECT(r40), "clk1-freq", 24 * 1000 * 1000, 84*8d9006aeSqianfan Zhao &error_abort); 85*8d9006aeSqianfan Zhao 86*8d9006aeSqianfan Zhao /* Mark R40 object realized */ 87*8d9006aeSqianfan Zhao qdev_realize(DEVICE(r40), NULL, &error_abort); 88*8d9006aeSqianfan Zhao 89*8d9006aeSqianfan Zhao /* 90*8d9006aeSqianfan Zhao * Plug in SD card and try load bootrom, R40 has 4 mmc controllers but can 91*8d9006aeSqianfan Zhao * only booting from mmc0 and mmc2. 92*8d9006aeSqianfan Zhao */ 93*8d9006aeSqianfan Zhao for (int i = 0; i < AW_R40_NUM_MMCS; i++) { 94*8d9006aeSqianfan Zhao switch (i) { 95*8d9006aeSqianfan Zhao case 0: 96*8d9006aeSqianfan Zhao case 2: 97*8d9006aeSqianfan Zhao mmc_attach_drive(r40, &r40->mmc[i], i, 98*8d9006aeSqianfan Zhao !machine->kernel_filename && !bootroom_loaded, 99*8d9006aeSqianfan Zhao &bootroom_loaded); 100*8d9006aeSqianfan Zhao break; 101*8d9006aeSqianfan Zhao default: 102*8d9006aeSqianfan Zhao mmc_attach_drive(r40, &r40->mmc[i], i, false, NULL); 103*8d9006aeSqianfan Zhao break; 104*8d9006aeSqianfan Zhao } 105*8d9006aeSqianfan Zhao } 106*8d9006aeSqianfan Zhao 107*8d9006aeSqianfan Zhao /* SDRAM */ 108*8d9006aeSqianfan Zhao memory_region_add_subregion(get_system_memory(), 109*8d9006aeSqianfan Zhao r40->memmap[AW_R40_DEV_SDRAM], machine->ram); 110*8d9006aeSqianfan Zhao 111*8d9006aeSqianfan Zhao bpim2u_binfo.loader_start = r40->memmap[AW_R40_DEV_SDRAM]; 112*8d9006aeSqianfan Zhao bpim2u_binfo.ram_size = machine->ram_size; 113*8d9006aeSqianfan Zhao bpim2u_binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC; 114*8d9006aeSqianfan Zhao arm_load_kernel(ARM_CPU(first_cpu), machine, &bpim2u_binfo); 115*8d9006aeSqianfan Zhao } 116*8d9006aeSqianfan Zhao 117*8d9006aeSqianfan Zhao static void bpim2u_machine_init(MachineClass *mc) 118*8d9006aeSqianfan Zhao { 119*8d9006aeSqianfan Zhao mc->desc = "Bananapi M2U (Cortex-A7)"; 120*8d9006aeSqianfan Zhao mc->init = bpim2u_init; 121*8d9006aeSqianfan Zhao mc->min_cpus = AW_R40_NUM_CPUS; 122*8d9006aeSqianfan Zhao mc->max_cpus = AW_R40_NUM_CPUS; 123*8d9006aeSqianfan Zhao mc->default_cpus = AW_R40_NUM_CPUS; 124*8d9006aeSqianfan Zhao mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); 125*8d9006aeSqianfan Zhao mc->default_ram_size = 1 * GiB; 126*8d9006aeSqianfan Zhao mc->default_ram_id = "bpim2u.ram"; 127*8d9006aeSqianfan Zhao } 128*8d9006aeSqianfan Zhao 129*8d9006aeSqianfan Zhao DEFINE_MACHINE("bpim2u", bpim2u_machine_init) 130