1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "exec/address-spaces.h" 20 #include "qapi/error.h" 21 #include "qemu/module.h" 22 #include "cpu.h" 23 #include "hw/sysbus.h" 24 #include "hw/arm/allwinner-a10.h" 25 #include "hw/misc/unimp.h" 26 #include "sysemu/sysemu.h" 27 #include "hw/boards.h" 28 #include "hw/usb/hcd-ohci.h" 29 30 #define AW_A10_MMC0_BASE 0x01c0f000 31 #define AW_A10_PIC_REG_BASE 0x01c20400 32 #define AW_A10_PIT_REG_BASE 0x01c20c00 33 #define AW_A10_UART0_REG_BASE 0x01c28000 34 #define AW_A10_EMAC_BASE 0x01c0b000 35 #define AW_A10_EHCI_BASE 0x01c14000 36 #define AW_A10_OHCI_BASE 0x01c14400 37 #define AW_A10_SATA_BASE 0x01c18000 38 39 static void aw_a10_init(Object *obj) 40 { 41 AwA10State *s = AW_A10(obj); 42 43 object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), 44 ARM_CPU_TYPE_NAME("cortex-a8"), 45 &error_abort, NULL); 46 47 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), 48 TYPE_AW_A10_PIC); 49 50 sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer), 51 TYPE_AW_A10_PIT); 52 53 sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), TYPE_AW_EMAC); 54 55 sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata), 56 TYPE_ALLWINNER_AHCI); 57 58 if (machine_usb(current_machine)) { 59 int i; 60 61 for (i = 0; i < AW_A10_NUM_USB; i++) { 62 sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), 63 sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); 64 sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]), 65 sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI); 66 } 67 } 68 69 sysbus_init_child_obj(obj, "mmc0", &s->mmc0, sizeof(s->mmc0), 70 TYPE_AW_SDHOST_SUN4I); 71 } 72 73 static void aw_a10_realize(DeviceState *dev, Error **errp) 74 { 75 AwA10State *s = AW_A10(dev); 76 SysBusDevice *sysbusdev; 77 Error *err = NULL; 78 79 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 80 if (err != NULL) { 81 error_propagate(errp, err); 82 return; 83 } 84 85 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); 86 if (err != NULL) { 87 error_propagate(errp, err); 88 return; 89 } 90 sysbusdev = SYS_BUS_DEVICE(&s->intc); 91 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 92 sysbus_connect_irq(sysbusdev, 0, 93 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); 94 sysbus_connect_irq(sysbusdev, 1, 95 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); 96 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); 97 98 object_property_set_bool(OBJECT(&s->timer), true, "realized", &err); 99 if (err != NULL) { 100 error_propagate(errp, err); 101 return; 102 } 103 sysbusdev = SYS_BUS_DEVICE(&s->timer); 104 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 105 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22)); 106 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23)); 107 sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24)); 108 sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25)); 109 sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67)); 110 sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68)); 111 112 memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB, 113 &error_fatal); 114 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); 115 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); 116 117 /* FIXME use qdev NIC properties instead of nd_table[] */ 118 if (nd_table[0].used) { 119 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 120 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 121 } 122 object_property_set_bool(OBJECT(&s->emac), true, "realized", &err); 123 if (err != NULL) { 124 error_propagate(errp, err); 125 return; 126 } 127 sysbusdev = SYS_BUS_DEVICE(&s->emac); 128 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 129 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55)); 130 131 object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); 132 if (err) { 133 error_propagate(errp, err); 134 return; 135 } 136 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 137 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56)); 138 139 /* FIXME use a qdev chardev prop instead of serial_hd() */ 140 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, 141 qdev_get_gpio_in(dev, 1), 142 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); 143 144 if (machine_usb(current_machine)) { 145 int i; 146 147 for (i = 0; i < AW_A10_NUM_USB; i++) { 148 char bus[16]; 149 150 sprintf(bus, "usb-bus.%d", i); 151 152 object_property_set_bool(OBJECT(&s->ehci[i]), true, 153 "companion-enable", &error_fatal); 154 object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", 155 &error_fatal); 156 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, 157 AW_A10_EHCI_BASE + i * 0x8000); 158 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, 159 qdev_get_gpio_in(dev, 39 + i)); 160 161 object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", 162 &error_fatal); 163 object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized", 164 &error_fatal); 165 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, 166 AW_A10_OHCI_BASE + i * 0x8000); 167 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, 168 qdev_get_gpio_in(dev, 64 + i)); 169 } 170 } 171 172 /* SD/MMC */ 173 qdev_init_nofail(DEVICE(&s->mmc0)); 174 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); 175 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); 176 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), 177 "sd-bus", &error_abort); 178 } 179 180 static void aw_a10_class_init(ObjectClass *oc, void *data) 181 { 182 DeviceClass *dc = DEVICE_CLASS(oc); 183 184 dc->realize = aw_a10_realize; 185 /* Reason: Uses serial_hds and nd_table in realize function */ 186 dc->user_creatable = false; 187 } 188 189 static const TypeInfo aw_a10_type_info = { 190 .name = TYPE_AW_A10, 191 .parent = TYPE_DEVICE, 192 .instance_size = sizeof(AwA10State), 193 .instance_init = aw_a10_init, 194 .class_init = aw_a10_class_init, 195 }; 196 197 static void aw_a10_register_types(void) 198 { 199 type_register_static(&aw_a10_type_info); 200 } 201 202 type_init(aw_a10_register_types) 203