1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "exec/address-spaces.h" 20 #include "qapi/error.h" 21 #include "qemu/module.h" 22 #include "hw/sysbus.h" 23 #include "hw/arm/allwinner-a10.h" 24 #include "hw/misc/unimp.h" 25 #include "sysemu/sysemu.h" 26 #include "hw/boards.h" 27 #include "hw/usb/hcd-ohci.h" 28 29 #define AW_A10_MMC0_BASE 0x01c0f000 30 #define AW_A10_PIC_REG_BASE 0x01c20400 31 #define AW_A10_PIT_REG_BASE 0x01c20c00 32 #define AW_A10_UART0_REG_BASE 0x01c28000 33 #define AW_A10_EMAC_BASE 0x01c0b000 34 #define AW_A10_EHCI_BASE 0x01c14000 35 #define AW_A10_OHCI_BASE 0x01c14400 36 #define AW_A10_SATA_BASE 0x01c18000 37 #define AW_A10_RTC_BASE 0x01c20d00 38 39 static void aw_a10_init(Object *obj) 40 { 41 AwA10State *s = AW_A10(obj); 42 43 object_initialize_child(obj, "cpu", &s->cpu, 44 ARM_CPU_TYPE_NAME("cortex-a8")); 45 46 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); 47 48 object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT); 49 50 object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC); 51 52 object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI); 53 54 if (machine_usb(current_machine)) { 55 int i; 56 57 for (i = 0; i < AW_A10_NUM_USB; i++) { 58 object_initialize_child(obj, "ehci[*]", &s->ehci[i], 59 TYPE_PLATFORM_EHCI); 60 object_initialize_child(obj, "ohci[*]", &s->ohci[i], 61 TYPE_SYSBUS_OHCI); 62 } 63 } 64 65 object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); 66 67 object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); 68 } 69 70 static void aw_a10_realize(DeviceState *dev, Error **errp) 71 { 72 AwA10State *s = AW_A10(dev); 73 SysBusDevice *sysbusdev; 74 75 if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) { 76 return; 77 } 78 79 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) { 80 return; 81 } 82 sysbusdev = SYS_BUS_DEVICE(&s->intc); 83 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 84 sysbus_connect_irq(sysbusdev, 0, 85 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ)); 86 sysbus_connect_irq(sysbusdev, 1, 87 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); 88 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); 89 90 if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) { 91 return; 92 } 93 sysbusdev = SYS_BUS_DEVICE(&s->timer); 94 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 95 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22)); 96 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23)); 97 sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24)); 98 sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25)); 99 sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67)); 100 sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68)); 101 102 memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB, 103 &error_fatal); 104 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); 105 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); 106 107 /* FIXME use qdev NIC properties instead of nd_table[] */ 108 if (nd_table[0].used) { 109 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 110 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 111 } 112 if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), errp)) { 113 return; 114 } 115 sysbusdev = SYS_BUS_DEVICE(&s->emac); 116 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 117 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55)); 118 119 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sata), errp)) { 120 return; 121 } 122 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 123 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56)); 124 125 /* FIXME use a qdev chardev prop instead of serial_hd() */ 126 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, 127 qdev_get_gpio_in(dev, 1), 128 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); 129 130 if (machine_usb(current_machine)) { 131 int i; 132 133 for (i = 0; i < AW_A10_NUM_USB; i++) { 134 char bus[16]; 135 136 sprintf(bus, "usb-bus.%d", i); 137 138 object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable", 139 true, &error_fatal); 140 sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); 141 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, 142 AW_A10_EHCI_BASE + i * 0x8000); 143 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, 144 qdev_get_gpio_in(dev, 39 + i)); 145 146 object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus, 147 &error_fatal); 148 sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); 149 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, 150 AW_A10_OHCI_BASE + i * 0x8000); 151 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, 152 qdev_get_gpio_in(dev, 64 + i)); 153 } 154 } 155 156 /* SD/MMC */ 157 object_property_set_link(OBJECT(&s->mmc0), "dma-memory", 158 OBJECT(get_system_memory()), &error_fatal); 159 sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); 160 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); 161 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); 162 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), 163 "sd-bus"); 164 165 /* RTC */ 166 sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); 167 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10); 168 } 169 170 static void aw_a10_class_init(ObjectClass *oc, void *data) 171 { 172 DeviceClass *dc = DEVICE_CLASS(oc); 173 174 dc->realize = aw_a10_realize; 175 /* Reason: Uses serial_hds and nd_table in realize function */ 176 dc->user_creatable = false; 177 } 178 179 static const TypeInfo aw_a10_type_info = { 180 .name = TYPE_AW_A10, 181 .parent = TYPE_DEVICE, 182 .instance_size = sizeof(AwA10State), 183 .instance_init = aw_a10_init, 184 .class_init = aw_a10_class_init, 185 }; 186 187 static void aw_a10_register_types(void) 188 { 189 type_register_static(&aw_a10_type_info); 190 } 191 192 type_init(aw_a10_register_types) 193