1 /* 2 * QEMU<->ACPI BIOS PCI hotplug interface 3 * 4 * QEMU supports PCI hotplug via ACPI. This module 5 * implements the interface between QEMU and the ACPI BIOS. 6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt 7 * 8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com) 9 * Copyright (c) 2006 Fabrice Bellard 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2.1 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 27 #include "qemu/osdep.h" 28 #include "hw/acpi/pcihp.h" 29 30 #include "hw/pci-host/i440fx.h" 31 #include "hw/pci/pci.h" 32 #include "hw/pci/pci_bridge.h" 33 #include "hw/pci/pci_host.h" 34 #include "hw/i386/acpi-build.h" 35 #include "hw/acpi/acpi.h" 36 #include "hw/pci/pci_bus.h" 37 #include "migration/vmstate.h" 38 #include "qapi/error.h" 39 #include "qom/qom-qobject.h" 40 #include "trace.h" 41 42 #define ACPI_PCIHP_SIZE 0x0018 43 #define PCI_UP_BASE 0x0000 44 #define PCI_DOWN_BASE 0x0004 45 #define PCI_EJ_BASE 0x0008 46 #define PCI_RMV_BASE 0x000c 47 #define PCI_SEL_BASE 0x0010 48 #define PCI_AIDX_BASE 0x0014 49 50 typedef struct AcpiPciHpFind { 51 int bsel; 52 PCIBus *bus; 53 } AcpiPciHpFind; 54 55 static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data) 56 { 57 return a - b; 58 } 59 60 static GSequence *pci_acpi_index_list(void) 61 { 62 static GSequence *used_acpi_index_list; 63 64 if (!used_acpi_index_list) { 65 used_acpi_index_list = g_sequence_new(NULL); 66 } 67 return used_acpi_index_list; 68 } 69 70 static int acpi_pcihp_get_bsel(PCIBus *bus) 71 { 72 Error *local_err = NULL; 73 uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, 74 &local_err); 75 76 if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 77 if (local_err) { 78 error_free(local_err); 79 } 80 return -1; 81 } else { 82 return bsel; 83 } 84 } 85 86 /* Assign BSEL property to all buses. In the future, this can be changed 87 * to only assign to buses that support hotplug. 88 */ 89 static void *acpi_set_bsel(PCIBus *bus, void *opaque) 90 { 91 unsigned *bsel_alloc = opaque; 92 unsigned *bus_bsel; 93 94 if (qbus_is_hotpluggable(BUS(bus))) { 95 bus_bsel = g_malloc(sizeof *bus_bsel); 96 97 *bus_bsel = (*bsel_alloc)++; 98 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, 99 bus_bsel, OBJ_PROP_FLAG_READ); 100 } 101 102 return bsel_alloc; 103 } 104 105 static void acpi_set_pci_info(void) 106 { 107 static bool bsel_is_set; 108 Object *host = acpi_get_i386_pci_host(); 109 PCIBus *bus; 110 unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT; 111 112 if (bsel_is_set) { 113 return; 114 } 115 bsel_is_set = true; 116 117 if (!host) { 118 return; 119 } 120 121 bus = PCI_HOST_BRIDGE(host)->bus; 122 if (bus) { 123 /* Scan all PCI buses. Set property to enable acpi based hotplug. */ 124 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc); 125 } 126 } 127 128 static void acpi_pcihp_disable_root_bus(void) 129 { 130 static bool root_hp_disabled; 131 Object *host = acpi_get_i386_pci_host(); 132 PCIBus *bus; 133 134 if (root_hp_disabled) { 135 return; 136 } 137 138 bus = PCI_HOST_BRIDGE(host)->bus; 139 if (bus) { 140 /* setting the hotplug handler to NULL makes the bus non-hotpluggable */ 141 qbus_set_hotplug_handler(BUS(bus), NULL); 142 } 143 root_hp_disabled = true; 144 return; 145 } 146 147 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque) 148 { 149 AcpiPciHpFind *find = opaque; 150 if (find->bsel == acpi_pcihp_get_bsel(bus)) { 151 find->bus = bus; 152 } 153 } 154 155 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel) 156 { 157 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL }; 158 159 if (bsel < 0) { 160 return NULL; 161 } 162 163 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find); 164 165 /* Make bsel 0 eject root bus if bsel property is not set, 166 * for compatibility with non acpi setups. 167 * TODO: really needed? 168 */ 169 if (!bsel && !find.bus) { 170 find.bus = s->root; 171 } 172 173 /* 174 * Check if find.bus is actually hotpluggable. If bsel is set to 175 * NULL for example on the root bus in order to make it 176 * non-hotpluggable, find.bus will match the root bus when bsel 177 * is 0. See acpi_pcihp_test_hotplug_bus() above. Since the 178 * bus is not hotpluggable however, we should not select the bus. 179 * Instead, we should set find.bus to NULL in that case. In the check 180 * below, we generalize this case for all buses, not just the root bus. 181 * The callers of this function check for a null return value and 182 * handle them appropriately. 183 */ 184 if (find.bus && !qbus_is_hotpluggable(BUS(find.bus))) { 185 find.bus = NULL; 186 } 187 return find.bus; 188 } 189 190 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev) 191 { 192 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); 193 DeviceClass *dc = DEVICE_GET_CLASS(dev); 194 /* 195 * ACPI doesn't allow hotplug of bridge devices. Don't allow 196 * hot-unplug of bridge devices unless they were added by hotplug 197 * (and so, not described by acpi). 198 */ 199 return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable; 200 } 201 202 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots) 203 { 204 HotplugHandler *hotplug_ctrl; 205 BusChild *kid, *next; 206 int slot = ctz32(slots); 207 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); 208 209 trace_acpi_pci_eject_slot(bsel, slot); 210 211 if (!bus || slot > 31) { 212 return; 213 } 214 215 /* Mark request as complete */ 216 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot); 217 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot); 218 219 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { 220 DeviceState *qdev = kid->child; 221 PCIDevice *dev = PCI_DEVICE(qdev); 222 if (PCI_SLOT(dev->devfn) == slot) { 223 if (!acpi_pcihp_pc_no_hotplug(s, dev)) { 224 hotplug_ctrl = qdev_get_hotplug_handler(qdev); 225 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort); 226 object_unparent(OBJECT(qdev)); 227 } 228 } 229 } 230 } 231 232 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel) 233 { 234 BusChild *kid, *next; 235 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); 236 237 /* Execute any pending removes during reset */ 238 while (s->acpi_pcihp_pci_status[bsel].down) { 239 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down); 240 } 241 242 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0; 243 244 if (!bus) { 245 return; 246 } 247 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { 248 DeviceState *qdev = kid->child; 249 PCIDevice *pdev = PCI_DEVICE(qdev); 250 int slot = PCI_SLOT(pdev->devfn); 251 252 if (acpi_pcihp_pc_no_hotplug(s, pdev)) { 253 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot); 254 } 255 } 256 } 257 258 static void acpi_pcihp_update(AcpiPciHpState *s) 259 { 260 int i; 261 262 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) { 263 acpi_pcihp_update_hotplug_bus(s, i); 264 } 265 } 266 267 void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off) 268 { 269 if (acpihp_root_off) { 270 acpi_pcihp_disable_root_bus(); 271 } 272 acpi_set_pci_info(); 273 acpi_pcihp_update(s); 274 } 275 276 #define ONBOARD_INDEX_MAX (16 * 1024 - 1) 277 278 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, 279 DeviceState *dev, Error **errp) 280 { 281 PCIDevice *pdev = PCI_DEVICE(dev); 282 283 /* Only hotplugged devices need the hotplug capability. */ 284 if (dev->hotplugged && 285 acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) { 286 error_setg(errp, "Unsupported bus. Bus doesn't have property '" 287 ACPI_PCIHP_PROP_BSEL "' set"); 288 return; 289 } 290 291 /* 292 * capped by systemd (see: udev-builtin-net_id.c) 293 * as it's the only known user honor it to avoid users 294 * misconfigure QEMU and then wonder why acpi-index doesn't work 295 */ 296 if (pdev->acpi_index > ONBOARD_INDEX_MAX) { 297 error_setg(errp, "acpi-index should be less or equal to %u", 298 ONBOARD_INDEX_MAX); 299 return; 300 } 301 302 /* 303 * make sure that acpi-index is unique across all present PCI devices 304 */ 305 if (pdev->acpi_index) { 306 GSequence *used_indexes = pci_acpi_index_list(); 307 308 if (g_sequence_lookup(used_indexes, GINT_TO_POINTER(pdev->acpi_index), 309 g_cmp_uint32, NULL)) { 310 error_setg(errp, "a PCI device with acpi-index = %" PRIu32 311 " already exist", pdev->acpi_index); 312 return; 313 } 314 g_sequence_insert_sorted(used_indexes, 315 GINT_TO_POINTER(pdev->acpi_index), 316 g_cmp_uint32, NULL); 317 } 318 } 319 320 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, 321 DeviceState *dev, Error **errp) 322 { 323 PCIDevice *pdev = PCI_DEVICE(dev); 324 int slot = PCI_SLOT(pdev->devfn); 325 int bsel; 326 327 /* Don't send event when device is enabled during qemu machine creation: 328 * it is present on boot, no hotplug event is necessary. We do send an 329 * event when the device is disabled later. */ 330 if (!dev->hotplugged) { 331 /* 332 * Overwrite the default hotplug handler with the ACPI PCI one 333 * for cold plugged bridges only. 334 */ 335 if (!s->legacy_piix && 336 object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 337 PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); 338 339 qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev)); 340 /* We don't have to overwrite any other hotplug handler yet */ 341 assert(QLIST_EMPTY(&sec->child)); 342 } 343 344 return; 345 } 346 347 bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev)); 348 g_assert(bsel >= 0); 349 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot); 350 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS); 351 } 352 353 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, 354 DeviceState *dev, Error **errp) 355 { 356 PCIDevice *pdev = PCI_DEVICE(dev); 357 358 trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn), 359 acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev)))); 360 361 /* 362 * clean up acpi-index so it could reused by another device 363 */ 364 if (pdev->acpi_index) { 365 GSequence *used_indexes = pci_acpi_index_list(); 366 367 g_sequence_remove(g_sequence_lookup(used_indexes, 368 GINT_TO_POINTER(pdev->acpi_index), 369 g_cmp_uint32, NULL)); 370 } 371 372 qdev_unrealize(dev); 373 } 374 375 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, 376 AcpiPciHpState *s, DeviceState *dev, 377 Error **errp) 378 { 379 PCIDevice *pdev = PCI_DEVICE(dev); 380 int slot = PCI_SLOT(pdev->devfn); 381 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev)); 382 383 trace_acpi_pci_unplug_request(bsel, slot); 384 385 if (bsel < 0) { 386 error_setg(errp, "Unsupported bus. Bus doesn't have property '" 387 ACPI_PCIHP_PROP_BSEL "' set"); 388 return; 389 } 390 391 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot); 392 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS); 393 } 394 395 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size) 396 { 397 AcpiPciHpState *s = opaque; 398 uint32_t val = 0; 399 int bsel = s->hotplug_select; 400 401 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 402 return 0; 403 } 404 405 switch (addr) { 406 case PCI_UP_BASE: 407 val = s->acpi_pcihp_pci_status[bsel].up; 408 if (!s->legacy_piix) { 409 s->acpi_pcihp_pci_status[bsel].up = 0; 410 } 411 trace_acpi_pci_up_read(val); 412 break; 413 case PCI_DOWN_BASE: 414 val = s->acpi_pcihp_pci_status[bsel].down; 415 trace_acpi_pci_down_read(val); 416 break; 417 case PCI_EJ_BASE: 418 trace_acpi_pci_features_read(val); 419 break; 420 case PCI_RMV_BASE: 421 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; 422 trace_acpi_pci_rmv_read(val); 423 break; 424 case PCI_SEL_BASE: 425 val = s->hotplug_select; 426 trace_acpi_pci_sel_read(val); 427 break; 428 case PCI_AIDX_BASE: 429 val = s->acpi_index; 430 s->acpi_index = 0; 431 trace_acpi_pci_acpi_index_read(val); 432 break; 433 default: 434 break; 435 } 436 437 return val; 438 } 439 440 static void pci_write(void *opaque, hwaddr addr, uint64_t data, 441 unsigned int size) 442 { 443 int slot; 444 PCIBus *bus; 445 BusChild *kid, *next; 446 AcpiPciHpState *s = opaque; 447 448 s->acpi_index = 0; 449 switch (addr) { 450 case PCI_AIDX_BASE: 451 /* 452 * fetch acpi-index for specified slot so that follow up read from 453 * PCI_AIDX_BASE can return it to guest 454 */ 455 slot = ctz32(data); 456 457 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 458 break; 459 } 460 461 bus = acpi_pcihp_find_hotplug_bus(s, s->hotplug_select); 462 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { 463 Object *o = OBJECT(kid->child); 464 PCIDevice *dev = PCI_DEVICE(o); 465 if (PCI_SLOT(dev->devfn) == slot) { 466 s->acpi_index = object_property_get_uint(o, "acpi-index", NULL); 467 break; 468 } 469 } 470 trace_acpi_pci_acpi_index_write(s->hotplug_select, slot, s->acpi_index); 471 break; 472 case PCI_EJ_BASE: 473 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { 474 break; 475 } 476 acpi_pcihp_eject_slot(s, s->hotplug_select, data); 477 trace_acpi_pci_ej_write(addr, data); 478 break; 479 case PCI_SEL_BASE: 480 s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data; 481 trace_acpi_pci_sel_write(addr, data); 482 default: 483 break; 484 } 485 } 486 487 static const MemoryRegionOps acpi_pcihp_io_ops = { 488 .read = pci_read, 489 .write = pci_write, 490 .endianness = DEVICE_LITTLE_ENDIAN, 491 .valid = { 492 .min_access_size = 4, 493 .max_access_size = 4, 494 }, 495 }; 496 497 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus, 498 MemoryRegion *address_space_io, bool bridges_enabled, 499 uint16_t io_base) 500 { 501 s->io_len = ACPI_PCIHP_SIZE; 502 s->io_base = io_base; 503 504 s->root = root_bus; 505 s->legacy_piix = !bridges_enabled; 506 507 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s, 508 "acpi-pci-hotplug", s->io_len); 509 memory_region_add_subregion(address_space_io, s->io_base, &s->io); 510 511 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base, 512 OBJ_PROP_FLAG_READ); 513 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len, 514 OBJ_PROP_FLAG_READ); 515 } 516 517 bool vmstate_acpi_pcihp_use_acpi_index(void *opaque, int version_id) 518 { 519 AcpiPciHpState *s = opaque; 520 return s->acpi_index; 521 } 522 523 const VMStateDescription vmstate_acpi_pcihp_pci_status = { 524 .name = "acpi_pcihp_pci_status", 525 .version_id = 1, 526 .minimum_version_id = 1, 527 .fields = (VMStateField[]) { 528 VMSTATE_UINT32(up, AcpiPciHpPciStatus), 529 VMSTATE_UINT32(down, AcpiPciHpPciStatus), 530 VMSTATE_END_OF_LIST() 531 } 532 }; 533