1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License version 2.1 as published by the Free Software Foundation. 9 * 10 * This library is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * Lesser General Public License for more details. 14 * 15 * You should have received a copy of the GNU Lesser General Public 16 * License along with this library; if not, see <http://www.gnu.org/licenses/> 17 * 18 * Contributions after 2012-01-13 are licensed under the terms of the 19 * GNU GPL, version 2 or (at your option) any later version. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/irq.h" 24 #include "hw/acpi/acpi.h" 25 #include "hw/nvram/fw_cfg.h" 26 #include "qemu/config-file.h" 27 #include "qapi/error.h" 28 #include "qapi/opts-visitor.h" 29 #include "qapi/qapi-events-run-state.h" 30 #include "qapi/qapi-visit-acpi.h" 31 #include "qemu/error-report.h" 32 #include "qemu/module.h" 33 #include "qemu/option.h" 34 #include "system/runstate.h" 35 #include "trace.h" 36 37 struct acpi_table_header { 38 uint16_t _length; /* our length, not actual part of the hdr */ 39 /* allows easier parsing for fw_cfg clients */ 40 char sig[4] 41 QEMU_NONSTRING; /* ACPI signature (4 ASCII characters) */ 42 uint32_t length; /* Length of table, in bytes, including header */ 43 uint8_t revision; /* ACPI Specification minor version # */ 44 uint8_t checksum; /* To make sum of entire table == 0 */ 45 char oem_id[6] 46 QEMU_NONSTRING; /* OEM identification */ 47 char oem_table_id[8] 48 QEMU_NONSTRING; /* OEM table identification */ 49 uint32_t oem_revision; /* OEM revision number */ 50 char asl_compiler_id[4] 51 QEMU_NONSTRING; /* ASL compiler vendor ID */ 52 uint32_t asl_compiler_revision; /* ASL compiler revision number */ 53 } QEMU_PACKED; 54 55 #define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header) 56 #define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */ 57 58 static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] = 59 "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */ 60 "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */ 61 "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */ 62 ; 63 64 char unsigned *acpi_tables; 65 size_t acpi_tables_len; 66 67 static QemuOptsList qemu_acpi_opts = { 68 .name = "acpi", 69 .implied_opt_name = "data", 70 .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head), 71 .desc = { { 0 } } /* validated with OptsVisitor */ 72 }; 73 74 static void acpi_register_config(void) 75 { 76 qemu_add_opts(&qemu_acpi_opts); 77 } 78 79 opts_init(acpi_register_config); 80 81 bool acpi_builtin(void) 82 { 83 return true; 84 } 85 86 static int acpi_checksum(const uint8_t *data, int len) 87 { 88 int sum, i; 89 sum = 0; 90 for (i = 0; i < len; i++) { 91 sum += data[i]; 92 } 93 return (-sum) & 0xff; 94 } 95 96 97 /* Install a copy of the ACPI table specified in @blob. 98 * 99 * If @has_header is set, @blob starts with the System Description Table Header 100 * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field 101 * is optionally overwritten from @hdrs. 102 * 103 * It is valid to call this function with 104 * (@blob == NULL && bloblen == 0 && !has_header). 105 * 106 * @hdrs->file and @hdrs->data are ignored. 107 * 108 * SIZE_MAX is considered "infinity" in this function. 109 * 110 * The number of tables that can be installed is not limited, but the 16-bit 111 * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX. 112 */ 113 static void acpi_table_install(const char unsigned *blob, size_t bloblen, 114 bool has_header, 115 const struct AcpiTableOptions *hdrs, 116 Error **errp) 117 { 118 size_t body_start; 119 const char unsigned *hdr_src; 120 size_t body_size, acpi_payload_size; 121 struct acpi_table_header *ext_hdr; 122 unsigned changed_fields; 123 124 /* Calculate where the ACPI table body starts within the blob, plus where 125 * to copy the ACPI table header from. 126 */ 127 if (has_header) { 128 /* _length | ACPI header in blob | blob body 129 * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^ 130 * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size 131 * == body_start 132 * 133 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 134 * acpi_payload_size == bloblen 135 */ 136 body_start = sizeof dfl_hdr; 137 138 if (bloblen < body_start) { 139 error_setg(errp, "ACPI table claiming to have header is too " 140 "short, available: %zu, expected: %zu", bloblen, 141 body_start); 142 return; 143 } 144 hdr_src = blob; 145 } else { 146 /* _length | ACPI header in template | blob body 147 * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^ 148 * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size 149 * == bloblen 150 * 151 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 152 * acpi_payload_size 153 */ 154 body_start = 0; 155 hdr_src = dfl_hdr; 156 } 157 body_size = bloblen - body_start; 158 acpi_payload_size = sizeof dfl_hdr + body_size; 159 160 if (acpi_payload_size > UINT16_MAX) { 161 error_setg(errp, "ACPI table too big, requested: %zu, max: %u", 162 acpi_payload_size, (unsigned)UINT16_MAX); 163 return; 164 } 165 166 /* We won't fail from here on. Initialize / extend the globals. */ 167 if (acpi_tables == NULL) { 168 acpi_tables_len = sizeof(uint16_t); 169 acpi_tables = g_malloc0(acpi_tables_len); 170 } 171 172 acpi_tables = g_realloc(acpi_tables, acpi_tables_len + 173 ACPI_TABLE_PFX_SIZE + 174 sizeof dfl_hdr + body_size); 175 176 ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len); 177 acpi_tables_len += ACPI_TABLE_PFX_SIZE; 178 179 memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr); 180 acpi_tables_len += sizeof dfl_hdr; 181 182 if (blob != NULL) { 183 memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size); 184 acpi_tables_len += body_size; 185 } 186 187 /* increase number of tables */ 188 stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u); 189 190 /* Update the header fields. The strings need not be NUL-terminated. */ 191 changed_fields = 0; 192 ext_hdr->_length = cpu_to_le16(acpi_payload_size); 193 194 if (hdrs->sig) { 195 strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig); 196 ++changed_fields; 197 } 198 199 if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) { 200 warn_report("ACPI table has wrong length, header says " 201 "%" PRIu32 ", actual size %zu bytes", 202 le32_to_cpu(ext_hdr->length), acpi_payload_size); 203 } 204 ext_hdr->length = cpu_to_le32(acpi_payload_size); 205 206 if (hdrs->has_rev) { 207 ext_hdr->revision = hdrs->rev; 208 ++changed_fields; 209 } 210 211 ext_hdr->checksum = 0; 212 213 if (hdrs->oem_id) { 214 strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id); 215 ++changed_fields; 216 } 217 if (hdrs->oem_table_id) { 218 strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id, 219 sizeof ext_hdr->oem_table_id); 220 ++changed_fields; 221 } 222 if (hdrs->has_oem_rev) { 223 ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev); 224 ++changed_fields; 225 } 226 if (hdrs->asl_compiler_id) { 227 strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id, 228 sizeof ext_hdr->asl_compiler_id); 229 ++changed_fields; 230 } 231 if (hdrs->has_asl_compiler_rev) { 232 ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev); 233 ++changed_fields; 234 } 235 236 if (!has_header && changed_fields == 0) { 237 warn_report("ACPI table: no headers are specified"); 238 } 239 240 /* recalculate checksum */ 241 ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr + 242 ACPI_TABLE_PFX_SIZE, acpi_payload_size); 243 } 244 245 void acpi_table_add(const QemuOpts *opts, Error **errp) 246 { 247 AcpiTableOptions *hdrs = NULL; 248 char **pathnames = NULL; 249 char **cur; 250 size_t bloblen = 0; 251 char unsigned *blob = NULL; 252 253 { 254 Visitor *v; 255 256 v = opts_visitor_new(opts); 257 visit_type_AcpiTableOptions(v, NULL, &hdrs, errp); 258 visit_free(v); 259 } 260 261 if (!hdrs) { 262 goto out; 263 } 264 if (!hdrs->file == !hdrs->data) { 265 error_setg(errp, "'-acpitable' requires one of 'data' or 'file'"); 266 goto out; 267 } 268 269 pathnames = g_strsplit(hdrs->file ?: hdrs->data, ":", 0); 270 if (pathnames == NULL || pathnames[0] == NULL) { 271 error_setg(errp, "'-acpitable' requires at least one pathname"); 272 goto out; 273 } 274 275 /* now read in the data files, reallocating buffer as needed */ 276 for (cur = pathnames; *cur; ++cur) { 277 int fd = open(*cur, O_RDONLY | O_BINARY); 278 279 if (fd < 0) { 280 error_setg(errp, "can't open file %s: %s", *cur, strerror(errno)); 281 goto out; 282 } 283 284 for (;;) { 285 char unsigned data[8192]; 286 ssize_t r; 287 288 r = read(fd, data, sizeof data); 289 if (r == 0) { 290 break; 291 } else if (r > 0) { 292 blob = g_realloc(blob, bloblen + r); 293 memcpy(blob + bloblen, data, r); 294 bloblen += r; 295 } else if (errno != EINTR) { 296 error_setg(errp, "can't read file %s: %s", *cur, 297 strerror(errno)); 298 close(fd); 299 goto out; 300 } 301 } 302 303 close(fd); 304 } 305 306 acpi_table_install(blob, bloblen, !!hdrs->file, hdrs, errp); 307 308 out: 309 g_free(blob); 310 g_strfreev(pathnames); 311 qapi_free_AcpiTableOptions(hdrs); 312 } 313 314 unsigned acpi_table_len(void *current) 315 { 316 struct acpi_table_header *hdr = current - sizeof(hdr->_length); 317 return hdr->_length; 318 } 319 320 static 321 void *acpi_table_hdr(void *h) 322 { 323 struct acpi_table_header *hdr = h; 324 return &hdr->sig; 325 } 326 327 uint8_t *acpi_table_first(void) 328 { 329 if (!acpi_tables) { 330 return NULL; 331 } 332 return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE); 333 } 334 335 uint8_t *acpi_table_next(uint8_t *current) 336 { 337 uint8_t *next = current + acpi_table_len(current); 338 339 if (next - acpi_tables >= acpi_tables_len) { 340 return NULL; 341 } else { 342 return acpi_table_hdr(next); 343 } 344 } 345 346 int acpi_get_slic_oem(AcpiSlicOem *oem) 347 { 348 uint8_t *u; 349 350 for (u = acpi_table_first(); u; u = acpi_table_next(u)) { 351 struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length)); 352 353 if (memcmp(hdr->sig, "SLIC", 4) == 0) { 354 oem->id = g_strndup(hdr->oem_id, 6); 355 oem->table_id = g_strndup(hdr->oem_table_id, 8); 356 return 0; 357 } 358 } 359 return -1; 360 } 361 362 static void acpi_notify_wakeup(Notifier *notifier, void *data) 363 { 364 ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup); 365 WakeupReason *reason = data; 366 367 switch (*reason) { 368 case QEMU_WAKEUP_REASON_RTC: 369 ar->pm1.evt.sts |= 370 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS); 371 break; 372 case QEMU_WAKEUP_REASON_PMTIMER: 373 ar->pm1.evt.sts |= 374 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS); 375 break; 376 case QEMU_WAKEUP_REASON_OTHER: 377 /* ACPI_BITMASK_WAKE_STATUS should be set on resume. 378 Pretend that resume was caused by power button */ 379 ar->pm1.evt.sts |= 380 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS); 381 break; 382 default: 383 break; 384 } 385 } 386 387 /* ACPI PM1a EVT */ 388 uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar) 389 { 390 /* Compare ns-clock, not PM timer ticks, because 391 acpi_pm_tmr_update function uses ns for setting the timer. */ 392 int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 393 if (d >= muldiv64(ar->tmr.overflow_time, 394 NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) { 395 ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS; 396 } 397 return ar->pm1.evt.sts; 398 } 399 400 static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) 401 { 402 uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar); 403 if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) { 404 /* if TMRSTS is reset, then compute the new overflow time */ 405 acpi_pm_tmr_calc_overflow_time(ar); 406 } 407 ar->pm1.evt.sts &= ~val; 408 } 409 410 static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val) 411 { 412 ar->pm1.evt.en = val; 413 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 414 val & ACPI_BITMASK_RT_CLOCK_ENABLE); 415 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 416 val & ACPI_BITMASK_TIMER_ENABLE); 417 } 418 419 void acpi_pm1_evt_power_down(ACPIREGS *ar) 420 { 421 if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) { 422 ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS; 423 ar->tmr.update_sci(ar); 424 } 425 } 426 427 void acpi_pm1_evt_reset(ACPIREGS *ar) 428 { 429 ar->pm1.evt.sts = 0; 430 ar->pm1.evt.en = 0; 431 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0); 432 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0); 433 } 434 435 static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width) 436 { 437 ACPIREGS *ar = opaque; 438 switch (addr) { 439 case 0: 440 return acpi_pm1_evt_get_sts(ar); 441 case 2: 442 return ar->pm1.evt.en; 443 default: 444 return 0; 445 } 446 } 447 448 static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val, 449 unsigned width) 450 { 451 ACPIREGS *ar = opaque; 452 switch (addr) { 453 case 0: 454 acpi_pm1_evt_write_sts(ar, val); 455 ar->pm1.evt.update_sci(ar); 456 break; 457 case 2: 458 acpi_pm1_evt_write_en(ar, val); 459 ar->pm1.evt.update_sci(ar); 460 break; 461 } 462 } 463 464 static const MemoryRegionOps acpi_pm_evt_ops = { 465 .read = acpi_pm_evt_read, 466 .write = acpi_pm_evt_write, 467 .impl.min_access_size = 2, 468 .valid.min_access_size = 1, 469 .valid.max_access_size = 2, 470 .endianness = DEVICE_LITTLE_ENDIAN, 471 }; 472 473 void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, 474 MemoryRegion *parent) 475 { 476 ar->pm1.evt.update_sci = update_sci; 477 memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent), 478 &acpi_pm_evt_ops, ar, "acpi-evt", 4); 479 memory_region_add_subregion(parent, 0, &ar->pm1.evt.io); 480 } 481 482 /* ACPI PM_TMR */ 483 void acpi_pm_tmr_update(ACPIREGS *ar, bool enable) 484 { 485 int64_t expire_time; 486 487 /* schedule a timer interruption if needed */ 488 if (enable) { 489 expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND, 490 PM_TIMER_FREQUENCY); 491 timer_mod(ar->tmr.timer, expire_time); 492 } else { 493 timer_del(ar->tmr.timer); 494 } 495 } 496 497 static inline int64_t acpi_pm_tmr_get_clock(void) 498 { 499 return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY, 500 NANOSECONDS_PER_SECOND); 501 } 502 503 void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar) 504 { 505 int64_t d = acpi_pm_tmr_get_clock(); 506 ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; 507 } 508 509 static uint32_t acpi_pm_tmr_get(ACPIREGS *ar) 510 { 511 uint32_t d = acpi_pm_tmr_get_clock(); 512 return d & 0xffffff; 513 } 514 515 static void acpi_pm_tmr_timer(void *opaque) 516 { 517 ACPIREGS *ar = opaque; 518 519 qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER, NULL); 520 ar->tmr.update_sci(ar); 521 } 522 523 static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width) 524 { 525 return acpi_pm_tmr_get(opaque); 526 } 527 528 static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val, 529 unsigned width) 530 { 531 /* nothing */ 532 } 533 534 static const MemoryRegionOps acpi_pm_tmr_ops = { 535 .read = acpi_pm_tmr_read, 536 .write = acpi_pm_tmr_write, 537 .impl.min_access_size = 4, 538 .valid.min_access_size = 1, 539 .valid.max_access_size = 4, 540 .endianness = DEVICE_LITTLE_ENDIAN, 541 }; 542 543 void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, 544 MemoryRegion *parent) 545 { 546 ar->tmr.update_sci = update_sci; 547 ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); 548 memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), 549 &acpi_pm_tmr_ops, ar, "acpi-tmr", 4); 550 memory_region_add_subregion(parent, 8, &ar->tmr.io); 551 } 552 553 void acpi_pm_tmr_reset(ACPIREGS *ar) 554 { 555 ar->tmr.overflow_time = 0; 556 timer_del(ar->tmr.timer); 557 } 558 559 /* ACPI PM1aCNT */ 560 void acpi_pm1_cnt_update(ACPIREGS *ar, 561 bool sci_enable, bool sci_disable) 562 { 563 /* ACPI specs 3.0, 4.7.2.5 */ 564 if (ar->pm1.cnt.acpi_only) { 565 return; 566 } 567 568 if (sci_enable) { 569 ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; 570 } else if (sci_disable) { 571 ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE; 572 } 573 } 574 575 static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width) 576 { 577 ACPIREGS *ar = opaque; 578 return ar->pm1.cnt.cnt >> addr * 8; 579 } 580 581 static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val, 582 unsigned width) 583 { 584 ACPIREGS *ar = opaque; 585 586 if (addr == 1) { 587 val = val << 8 | (ar->pm1.cnt.cnt & 0xff); 588 } 589 ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE); 590 591 if (val & ACPI_BITMASK_SLEEP_ENABLE) { 592 /* change suspend type */ 593 uint16_t sus_typ = (val >> 10) & 7; 594 switch (sus_typ) { 595 case 0: /* soft power off */ 596 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 597 break; 598 case 1: 599 qemu_system_suspend_request(); 600 break; 601 default: 602 if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */ 603 qapi_event_send_suspend_disk(); 604 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 605 } 606 break; 607 } 608 } 609 } 610 611 static const MemoryRegionOps acpi_pm_cnt_ops = { 612 .read = acpi_pm_cnt_read, 613 .write = acpi_pm_cnt_write, 614 .impl.min_access_size = 2, 615 .valid.min_access_size = 1, 616 .valid.max_access_size = 2, 617 .endianness = DEVICE_LITTLE_ENDIAN, 618 }; 619 620 void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, 621 bool disable_s3, bool disable_s4, uint8_t s4_val, 622 bool acpi_only) 623 { 624 FWCfgState *fw_cfg; 625 626 ar->pm1.cnt.s4_val = s4_val; 627 ar->pm1.cnt.acpi_only = acpi_only; 628 ar->wakeup.notify = acpi_notify_wakeup; 629 qemu_register_wakeup_notifier(&ar->wakeup); 630 631 /* 632 * Register wake-up support in QMP query-current-machine API 633 */ 634 qemu_register_wakeup_support(); 635 636 memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent), 637 &acpi_pm_cnt_ops, ar, "acpi-cnt", 2); 638 memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io); 639 640 fw_cfg = fw_cfg_find(); 641 if (fw_cfg) { 642 uint8_t suspend[6] = {128, 0, 0, 129, 128, 128}; 643 suspend[3] = 1 | ((!disable_s3) << 7); 644 suspend[4] = s4_val | ((!disable_s4) << 7); 645 646 fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6); 647 } 648 } 649 650 void acpi_pm1_cnt_reset(ACPIREGS *ar) 651 { 652 ar->pm1.cnt.cnt = 0; 653 if (ar->pm1.cnt.acpi_only) { 654 ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; 655 } 656 } 657 658 /* ACPI GPE */ 659 void acpi_gpe_init(ACPIREGS *ar, uint8_t len) 660 { 661 ar->gpe.len = len; 662 /* Only first len / 2 bytes are ever used, 663 * but the caller in ich9.c migrates full len bytes. 664 * TODO: fix ich9.c and drop the extra allocation. 665 */ 666 ar->gpe.sts = g_malloc0(len); 667 ar->gpe.en = g_malloc0(len); 668 } 669 670 void acpi_gpe_reset(ACPIREGS *ar) 671 { 672 memset(ar->gpe.sts, 0, ar->gpe.len / 2); 673 memset(ar->gpe.en, 0, ar->gpe.len / 2); 674 } 675 676 static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr) 677 { 678 uint8_t *cur = NULL; 679 680 if (addr < ar->gpe.len / 2) { 681 cur = ar->gpe.sts + addr; 682 } else if (addr < ar->gpe.len) { 683 cur = ar->gpe.en + addr - ar->gpe.len / 2; 684 } else { 685 abort(); 686 } 687 688 return cur; 689 } 690 691 void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val) 692 { 693 uint8_t *cur; 694 695 cur = acpi_gpe_ioport_get_ptr(ar, addr); 696 if (addr < ar->gpe.len / 2) { 697 trace_acpi_gpe_sts_ioport_writeb(addr, val); 698 /* GPE_STS */ 699 *cur = (*cur) & ~val; 700 } else if (addr < ar->gpe.len) { 701 trace_acpi_gpe_en_ioport_writeb(addr - (ar->gpe.len / 2), val); 702 /* GPE_EN */ 703 *cur = val; 704 } else { 705 abort(); 706 } 707 } 708 709 uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr) 710 { 711 uint8_t *cur; 712 uint32_t val; 713 714 cur = acpi_gpe_ioport_get_ptr(ar, addr); 715 val = 0; 716 if (cur != NULL) { 717 val = *cur; 718 } 719 720 if (addr < ar->gpe.len / 2) { 721 trace_acpi_gpe_sts_ioport_readb(addr, val); 722 } else { 723 trace_acpi_gpe_en_ioport_readb(addr - (ar->gpe.len / 2), val); 724 } 725 726 return val; 727 } 728 729 void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq, 730 AcpiEventStatusBits status) 731 { 732 ar->gpe.sts[0] |= status; 733 acpi_update_sci(ar, irq); 734 } 735 736 void acpi_update_sci(ACPIREGS *regs, qemu_irq irq) 737 { 738 int sci_level, pm1a_sts; 739 740 pm1a_sts = acpi_pm1_evt_get_sts(regs); 741 742 sci_level = ((pm1a_sts & 743 regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) || 744 ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0); 745 746 qemu_set_irq(irq, sci_level); 747 748 /* schedule a timer interruption if needed */ 749 acpi_pm_tmr_update(regs, 750 (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 751 !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS)); 752 } 753