xref: /qemu/gdb-xml/riscv-64bit-cpu.xml (revision c670970dc069ebaf941a786f0608fca701dcf7d0)
1*c670970dSJim Wilson<?xml version="1.0"?>
2*c670970dSJim Wilson<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
3*c670970dSJim Wilson
4*c670970dSJim Wilson     Copying and distribution of this file, with or without modification,
5*c670970dSJim Wilson     are permitted in any medium without royalty provided the copyright
6*c670970dSJim Wilson     notice and this notice are preserved.  -->
7*c670970dSJim Wilson
8*c670970dSJim Wilson<!-- Register numbers are hard-coded in order to maintain backward
9*c670970dSJim Wilson     compatibility with older versions of tools that didn't use xml
10*c670970dSJim Wilson     register descriptions.  -->
11*c670970dSJim Wilson
12*c670970dSJim Wilson<!DOCTYPE feature SYSTEM "gdb-target.dtd">
13*c670970dSJim Wilson<feature name="org.gnu.gdb.riscv.cpu">
14*c670970dSJim Wilson  <reg name="zero" bitsize="64" type="int" regnum="0"/>
15*c670970dSJim Wilson  <reg name="ra" bitsize="64" type="code_ptr"/>
16*c670970dSJim Wilson  <reg name="sp" bitsize="64" type="data_ptr"/>
17*c670970dSJim Wilson  <reg name="gp" bitsize="64" type="data_ptr"/>
18*c670970dSJim Wilson  <reg name="tp" bitsize="64" type="data_ptr"/>
19*c670970dSJim Wilson  <reg name="t0" bitsize="64" type="int"/>
20*c670970dSJim Wilson  <reg name="t1" bitsize="64" type="int"/>
21*c670970dSJim Wilson  <reg name="t2" bitsize="64" type="int"/>
22*c670970dSJim Wilson  <reg name="fp" bitsize="64" type="data_ptr"/>
23*c670970dSJim Wilson  <reg name="s1" bitsize="64" type="int"/>
24*c670970dSJim Wilson  <reg name="a0" bitsize="64" type="int"/>
25*c670970dSJim Wilson  <reg name="a1" bitsize="64" type="int"/>
26*c670970dSJim Wilson  <reg name="a2" bitsize="64" type="int"/>
27*c670970dSJim Wilson  <reg name="a3" bitsize="64" type="int"/>
28*c670970dSJim Wilson  <reg name="a4" bitsize="64" type="int"/>
29*c670970dSJim Wilson  <reg name="a5" bitsize="64" type="int"/>
30*c670970dSJim Wilson  <reg name="a6" bitsize="64" type="int"/>
31*c670970dSJim Wilson  <reg name="a7" bitsize="64" type="int"/>
32*c670970dSJim Wilson  <reg name="s2" bitsize="64" type="int"/>
33*c670970dSJim Wilson  <reg name="s3" bitsize="64" type="int"/>
34*c670970dSJim Wilson  <reg name="s4" bitsize="64" type="int"/>
35*c670970dSJim Wilson  <reg name="s5" bitsize="64" type="int"/>
36*c670970dSJim Wilson  <reg name="s6" bitsize="64" type="int"/>
37*c670970dSJim Wilson  <reg name="s7" bitsize="64" type="int"/>
38*c670970dSJim Wilson  <reg name="s8" bitsize="64" type="int"/>
39*c670970dSJim Wilson  <reg name="s9" bitsize="64" type="int"/>
40*c670970dSJim Wilson  <reg name="s10" bitsize="64" type="int"/>
41*c670970dSJim Wilson  <reg name="s11" bitsize="64" type="int"/>
42*c670970dSJim Wilson  <reg name="t3" bitsize="64" type="int"/>
43*c670970dSJim Wilson  <reg name="t4" bitsize="64" type="int"/>
44*c670970dSJim Wilson  <reg name="t5" bitsize="64" type="int"/>
45*c670970dSJim Wilson  <reg name="t6" bitsize="64" type="int"/>
46*c670970dSJim Wilson  <reg name="pc" bitsize="64" type="code_ptr"/>
47*c670970dSJim Wilson</feature>
48