xref: /qemu/gdb-xml/aarch64-core.xml (revision 9761ad5f65d23f080b5a3479e52196fbce2e1506)
1<?xml version="1.0"?>
2<!-- Copyright (C) 2009-2025 Free Software Foundation, Inc.
3     Contributed by ARM Ltd.
4
5     Copying and distribution of this file, with or without modification,
6     are permitted in any medium without royalty provided the copyright
7     notice and this notice are preserved.  -->
8
9<!DOCTYPE feature SYSTEM "gdb-target.dtd">
10<feature name="org.gnu.gdb.aarch64.core">
11  <reg name="x0" bitsize="64"/>
12  <reg name="x1" bitsize="64"/>
13  <reg name="x2" bitsize="64"/>
14  <reg name="x3" bitsize="64"/>
15  <reg name="x4" bitsize="64"/>
16  <reg name="x5" bitsize="64"/>
17  <reg name="x6" bitsize="64"/>
18  <reg name="x7" bitsize="64"/>
19  <reg name="x8" bitsize="64"/>
20  <reg name="x9" bitsize="64"/>
21  <reg name="x10" bitsize="64"/>
22  <reg name="x11" bitsize="64"/>
23  <reg name="x12" bitsize="64"/>
24  <reg name="x13" bitsize="64"/>
25  <reg name="x14" bitsize="64"/>
26  <reg name="x15" bitsize="64"/>
27  <reg name="x16" bitsize="64"/>
28  <reg name="x17" bitsize="64"/>
29  <reg name="x18" bitsize="64"/>
30  <reg name="x19" bitsize="64"/>
31  <reg name="x20" bitsize="64"/>
32  <reg name="x21" bitsize="64"/>
33  <reg name="x22" bitsize="64"/>
34  <reg name="x23" bitsize="64"/>
35  <reg name="x24" bitsize="64"/>
36  <reg name="x25" bitsize="64"/>
37  <reg name="x26" bitsize="64"/>
38  <reg name="x27" bitsize="64"/>
39  <reg name="x28" bitsize="64"/>
40  <reg name="x29" bitsize="64"/>
41  <reg name="x30" bitsize="64"/>
42  <reg name="sp" bitsize="64" type="data_ptr"/>
43
44  <reg name="pc" bitsize="64" type="code_ptr"/>
45
46  <flags id="cpsr_flags" size="4">
47    <!-- Stack Pointer.  -->
48    <field name="SP" start="0" end="0"/>
49
50    <!-- Exception Level.  -->
51    <field name="EL" start="2" end="3"/>
52    <!-- Execution state.  -->
53    <field name="nRW" start="4" end="4"/>
54
55    <!-- FIQ interrupt mask.  -->
56    <field name="F" start="6" end="6"/>
57    <!-- IRQ interrupt mask.  -->
58    <field name="I" start="7" end="7"/>
59    <!-- SError interrupt mask.  -->
60    <field name="A" start="8" end="8"/>
61    <!-- Debug exception mask.  -->
62    <field name="D" start="9" end="9"/>
63
64    <!-- ARMv8.5-A: Branch Target Identification BTYPE.  -->
65    <field name="BTYPE" start="10" end="11"/>
66
67    <!-- ARMv8.0-A: Speculative Store Bypass.  -->
68    <field name="SSBS" start="12" end="12"/>
69
70    <!-- Illegal Execution state.  -->
71    <field name="IL" start="20" end="20"/>
72    <!-- Software Step.  -->
73    <field name="SS" start="21" end="21"/>
74    <!-- ARMv8.1-A: Privileged Access Never.  -->
75    <field name="PAN" start="22" end="22"/>
76    <!-- ARMv8.2-A: User Access Override.  -->
77    <field name="UAO" start="23" end="23"/>
78    <!-- ARMv8.4-A: Data Independent Timing.  -->
79    <field name="DIT" start="24" end="24"/>
80    <!-- ARMv8.5-A: Tag Check Override.  -->
81    <field name="TCO" start="25" end="25"/>
82
83    <!-- Overflow Condition flag.  -->
84    <field name="V" start="28" end="28"/>
85    <!-- Carry Condition flag.  -->
86    <field name="C" start="29" end="29"/>
87    <!-- Zero Condition flag.  -->
88    <field name="Z" start="30" end="30"/>
89    <!-- Negative Condition flag.  -->
90    <field name="N" start="31" end="31"/>
91  </flags>
92  <reg name="cpsr" bitsize="32" type="cpsr_flags"/>
93
94</feature>
95