1Microblaze-V generic board (``amd-microblaze-v-generic``) 2========================================================= 3The AMD MicroBlaze™ V processor is a soft-core RISC-V processor IP for AMD 4adaptive SoCs and FPGAs. The MicroBlaze™ V processor is based on the 32-bit (or 564-bit) RISC-V instruction set architecture (ISA) and contains interfaces 6compatible with the classic MicroBlaze™ V processor (i.e it is a drop in 7replacement for the classic MicroBlaze™ processor in existing RTL designs). 8More information can be found in below document. 9 10https://docs.amd.com/r/en-US/ug1629-microblaze-v-user-guide/MicroBlaze-V-Architecture 11 12The MicroBlaze™ V generic board in QEMU has following supported devices: 13 14 - timer 15 - uartlite 16 - uart16550 17 - emaclite 18 - timer2 19 - axi emac 20 - axi dma 21 22The MicroBlaze™ V core in QEMU has the following configuration: 23 24 - RV32I base integer instruction set 25 - "Zicsr" Control and Status register instructions 26 - "Zifencei" instruction-fetch 27 - Extensions: m, a, f, c 28 29Running 30""""""" 31Below is an example command line for launching mainline U-boot 32(xilinx_mbv32_defconfig) on the Microblaze-V generic board. 33 34.. code-block:: bash 35 36 $ qemu-system-riscv32 -M amd-microblaze-v-generic \ 37 -display none \ 38 -device loader,addr=0x80000000,file=u-boot-spl.bin,cpu-num=0 \ 39 -device loader,addr=0x80200000,file=u-boot.img \ 40 -serial mon:stdio \ 41 -device loader,addr=0x83000000,file=system.dtb \ 42 -m 2g 43