1 .. _Arm Emulation: 2 3 A-profile CPU architecture support 4 ================================== 5 6 QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7, 7 Armv8 and Armv9 versions of the A-profile architecture. It also has support for 8 the following architecture extensions: 9 10 - FEAT_AA32BF16 (AArch32 BFloat16 instructions) 11 - FEAT_AA32EL0 (Support for AArch32 at EL0) 12 - FEAT_AA32EL1 (Support for AArch32 at EL1) 13 - FEAT_AA32EL2 (Support for AArch32 at EL2) 14 - FEAT_AA32EL3 (Support for AArch32 at EL3) 15 - FEAT_AA32HPD (AArch32 hierarchical permission disables) 16 - FEAT_AA32I8MM (AArch32 Int8 matrix multiplication instructions) 17 - FEAT_AA64EL0 (Support for AArch64 at EL0) 18 - FEAT_AA64EL1 (Support for AArch64 at EL1) 19 - FEAT_AA64EL2 (Support for AArch64 at EL2) 20 - FEAT_AA64EL3 (Support for AArch64 at EL3) 21 - FEAT_AdvSIMD (Advanced SIMD Extension) 22 - FEAT_AES (AESD and AESE instructions) 23 - FEAT_AFP (Alternate floating-point behavior) 24 - FEAT_Armv9_Crypto (Armv9 Cryptographic Extension) 25 - FEAT_ASID16 (16 bit ASID) 26 - FEAT_BBM at level 2 (Translation table break-before-make levels) 27 - FEAT_BF16 (AArch64 BFloat16 instructions) 28 - FEAT_BTI (Branch Target Identification) 29 - FEAT_CCIDX (Extended cache index) 30 - FEAT_CMOW (Control for cache maintenance permission) 31 - FEAT_CRC32 (CRC32 instructions) 32 - FEAT_Crypto (Cryptographic Extension) 33 - FEAT_CSV2 (Cache speculation variant 2) 34 - FEAT_CSV2_1p1 (Cache speculation variant 2, version 1.1) 35 - FEAT_CSV2_1p2 (Cache speculation variant 2, version 1.2) 36 - FEAT_CSV2_2 (Cache speculation variant 2, version 2) 37 - FEAT_CSV2_3 (Cache speculation variant 2, version 3) 38 - FEAT_CSV3 (Cache speculation variant 3) 39 - FEAT_DGH (Data gathering hint) 40 - FEAT_DIT (Data Independent Timing instructions) 41 - FEAT_DoubleLock (Double Lock) 42 - FEAT_DPB (DC CVAP instruction) 43 - FEAT_DPB2 (DC CVADP instruction) 44 - FEAT_Debugv8p1 (Debug with VHE) 45 - FEAT_Debugv8p2 (Debug changes for v8.2) 46 - FEAT_Debugv8p4 (Debug changes for v8.4) 47 - FEAT_Debugv8p8 (Debug changes for v8.8) 48 - FEAT_DotProd (Advanced SIMD dot product instructions) 49 - FEAT_DoubleFault (Double Fault Extension) 50 - FEAT_E0PD (Preventing EL0 access to halves of address maps) 51 - FEAT_EBF16 (AArch64 Extended BFloat16 instructions) 52 - FEAT_ECV (Enhanced Counter Virtualization) 53 - FEAT_EL0 (Support for execution at EL0) 54 - FEAT_EL1 (Support for execution at EL1) 55 - FEAT_EL2 (Support for execution at EL2) 56 - FEAT_EL3 (Support for execution at EL3) 57 - FEAT_EPAC (Enhanced pointer authentication) 58 - FEAT_ETS2 (Enhanced Translation Synchronization) 59 - FEAT_EVT (Enhanced Virtualization Traps) 60 - FEAT_F32MM (Single-precision Matrix Multiplication) 61 - FEAT_F64MM (Double-precision Matrix Multiplication) 62 - FEAT_FCMA (Floating-point complex number instructions) 63 - FEAT_FGT (Fine-Grained Traps) 64 - FEAT_FHM (Floating-point half-precision multiplication instructions) 65 - FEAT_FP (Floating Point extensions) 66 - FEAT_FP16 (Half-precision floating-point data processing) 67 - FEAT_FPAC (Faulting on AUT* instructions) 68 - FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions) 69 - FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions) 70 - FEAT_FRINTTS (Floating-point to integer instructions) 71 - FEAT_FlagM (Flag manipulation instructions v2) 72 - FEAT_FlagM2 (Enhancements to flag manipulation instructions) 73 - FEAT_GTG (Guest translation granule size) 74 - FEAT_HAFDBS (Hardware management of the access flag and dirty bit state) 75 - FEAT_HBC (Hinted conditional branches) 76 - FEAT_HCX (Support for the HCRX_EL2 register) 77 - FEAT_HPDS (Hierarchical permission disables) 78 - FEAT_HPDS2 (Translation table page-based hardware attributes) 79 - FEAT_HPMN0 (Setting of MDCR_EL2.HPMN to zero) 80 - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions) 81 - FEAT_IDST (ID space trap handling) 82 - FEAT_IESB (Implicit error synchronization event) 83 - FEAT_JSCVT (JavaScript conversion instructions) 84 - FEAT_LOR (Limited ordering regions) 85 - FEAT_LPA (Large Physical Address space) 86 - FEAT_LPA2 (Large Physical and virtual Address space v2) 87 - FEAT_LRCPC (Load-acquire RCpc instructions) 88 - FEAT_LRCPC2 (Load-acquire RCpc instructions v2) 89 - FEAT_LSE (Large System Extensions) 90 - FEAT_LSE2 (Large System Extensions v2) 91 - FEAT_LVA (Large Virtual Address space) 92 - FEAT_MixedEnd (Mixed-endian support) 93 - FEAT_MixedEndEL0 (Mixed-endian support at EL0) 94 - FEAT_MOPS (Standardization of memory operations) 95 - FEAT_MTE (Memory Tagging Extension) 96 - FEAT_MTE2 (Memory Tagging Extension) 97 - FEAT_MTE3 (MTE Asymmetric Fault Handling) 98 - FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults) 99 - FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault) 100 - FEAT_NMI (Non-maskable Interrupt) 101 - FEAT_NV (Nested Virtualization) 102 - FEAT_NV2 (Enhanced nested virtualization support) 103 - FEAT_PACIMP (Pointer authentication - IMPLEMENTATION DEFINED algorithm) 104 - FEAT_PACQARMA3 (Pointer authentication - QARMA3 algorithm) 105 - FEAT_PACQARMA5 (Pointer authentication - QARMA5 algorithm) 106 - FEAT_PAN (Privileged access never) 107 - FEAT_PAN2 (AT S1E1R and AT S1E1W instruction variants affected by PSTATE.PAN) 108 - FEAT_PAN3 (Support for SCTLR_ELx.EPAN) 109 - FEAT_PAuth (Pointer authentication) 110 - FEAT_PAuth2 (Enhancements to pointer authentication) 111 - FEAT_PMULL (PMULL, PMULL2 instructions) 112 - FEAT_PMUv3 (PMU extension version 3) 113 - FEAT_PMUv3p1 (PMU Extensions v3.1) 114 - FEAT_PMUv3p4 (PMU Extensions v3.4) 115 - FEAT_PMUv3p5 (PMU Extensions v3.5) 116 - FEAT_RAS (Reliability, availability, and serviceability) 117 - FEAT_RASv1p1 (RAS Extension v1.1) 118 - FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions) 119 - FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental) 120 - FEAT_RNG (Random number generator) 121 - FEAT_RPRES (Increased precision of FRECPE and FRSQRTE) 122 - FEAT_S2FWB (Stage 2 forced Write-Back) 123 - FEAT_SB (Speculation Barrier) 124 - FEAT_SEL2 (Secure EL2) 125 - FEAT_SHA1 (SHA1 instructions) 126 - FEAT_SHA256 (SHA256 instructions) 127 - FEAT_SHA3 (Advanced SIMD SHA3 instructions) 128 - FEAT_SHA512 (Advanced SIMD SHA512 instructions) 129 - FEAT_SM3 (Advanced SIMD SM3 instructions) 130 - FEAT_SM4 (Advanced SIMD SM4 instructions) 131 - FEAT_SME (Scalable Matrix Extension) 132 - FEAT_SME_FA64 (Full A64 instruction set in Streaming SVE mode) 133 - FEAT_SME_F64F64 (Double-precision floating-point outer product instructions) 134 - FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions) 135 - FEAT_SVE (Scalable Vector Extension) 136 - FEAT_SVE_AES (Scalable Vector AES instructions) 137 - FEAT_SVE_BitPerm (Scalable Vector Bit Permutes instructions) 138 - FEAT_SVE_PMULL128 (Scalable Vector PMULL instructions) 139 - FEAT_SVE_SHA3 (Scalable Vector SHA3 instructions) 140 - FEAT_SVE_SM4 (Scalable Vector SM4 instructions) 141 - FEAT_SVE2 (Scalable Vector Extension version 2) 142 - FEAT_SPECRES (Speculation restriction instructions) 143 - FEAT_SSBS (Speculative Store Bypass Safe) 144 - FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2) 145 - FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1) 146 - FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1) 147 - FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1) 148 - FEAT_TIDCP1 (EL0 use of IMPLEMENTATION DEFINED functionality) 149 - FEAT_TLBIOS (TLB invalidate instructions in Outer Shareable domain) 150 - FEAT_TLBIRANGE (TLB invalidate range instructions) 151 - FEAT_TTCNP (Translation table Common not private translations) 152 - FEAT_TTL (Translation Table Level) 153 - FEAT_TTST (Small translation tables) 154 - FEAT_UAO (Unprivileged Access Override control) 155 - FEAT_VHE (Virtualization Host Extensions) 156 - FEAT_VMID16 (16-bit VMID) 157 - FEAT_WFxT (WFE and WFI instructions with timeout) 158 - FEAT_XNX (Translation table stage 2 Unprivileged Execute-never) 159 - FEAT_XS (XS attribute) 160 161 For information on the specifics of these extensions, please refer 162 to the `Arm Architecture Reference Manual for A-profile architecture 163 <https://developer.arm.com/documentation/ddi0487/latest>`_. 164 165 When a specific named CPU is being emulated, only those features which 166 are present in hardware for that CPU are emulated. (If a feature is 167 not in the list above then it is not supported, even if the real 168 hardware should have it.) The ``max`` CPU enables all features. 169 170 R-profile CPU architecture support 171 ================================== 172 173 QEMU's TCG emulation support for R-profile CPUs is currently limited. 174 We emulate only the Cortex-R5 and Cortex-R5F CPUs. 175 176 M-profile CPU architecture support 177 ================================== 178 179 QEMU's TCG emulation includes support for Armv6-M, Armv7-M, Armv8-M, and 180 Armv8.1-M versions of the M-profile architucture. It also has support 181 for the following architecture extensions: 182 183 - FP (Floating-point Extension) 184 - FPCXT (FPCXT access instructions) 185 - HP (Half-precision floating-point instructions) 186 - LOB (Low Overhead loops and Branch future) 187 - M (Main Extension) 188 - MPU (Memory Protection Unit Extension) 189 - PXN (Privileged Execute Never) 190 - RAS (Reliability, Serviceability and Availability): "minimum RAS Extension" only 191 - S (Security Extension) 192 - ST (System Timer Extension) 193 194 For information on the specifics of these extensions, please refer 195 to the `Armv8-M Arm Architecture Reference Manual 196 <https://developer.arm.com/documentation/ddi0553/latest>`_. 197 198 When a specific named CPU is being emulated, only those features which 199 are present in hardware for that CPU are emulated. (If a feature is 200 not in the list above then it is not supported, even if the real 201 hardware should have it.) There is no equivalent of the ``max`` CPU for 202 M-profile. 203