1ea103259SMichael Clark /* 2ea103259SMichael Clark * QEMU RISC-V Disassembler 3ea103259SMichael Clark * 4ea103259SMichael Clark * Copyright (c) 2016-2017 Michael Clark <michaeljclark@mac.com> 5ea103259SMichael Clark * Copyright (c) 2017-2018 SiFive, Inc. 6ea103259SMichael Clark * 7ea103259SMichael Clark * This program is free software; you can redistribute it and/or modify it 8ea103259SMichael Clark * under the terms and conditions of the GNU General Public License, 9ea103259SMichael Clark * version 2 or later, as published by the Free Software Foundation. 10ea103259SMichael Clark * 11ea103259SMichael Clark * This program is distributed in the hope it will be useful, but WITHOUT 12ea103259SMichael Clark * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13ea103259SMichael Clark * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14ea103259SMichael Clark * more details. 15ea103259SMichael Clark * 16ea103259SMichael Clark * You should have received a copy of the GNU General Public License along with 17ea103259SMichael Clark * this program. If not, see <http://www.gnu.org/licenses/>. 18ea103259SMichael Clark */ 19ea103259SMichael Clark 20ea103259SMichael Clark #include "qemu/osdep.h" 213979fca4SMarkus Armbruster #include "disas/dis-asm.h" 22454c2201SWeiwei Li #include "target/riscv/cpu_cfg.h" 235d326db2SChristoph Müllner #include "disas/riscv.h" 24ea103259SMichael Clark 25*f6f72338SChristoph Müllner /* Vendor extensions */ 26*f6f72338SChristoph Müllner #include "disas/riscv-xventana.h" 27*f6f72338SChristoph Müllner 28ea103259SMichael Clark typedef enum { 2901b1361fSChristoph Müllner /* 0 is reserved for rv_op_illegal. */ 30ea103259SMichael Clark rv_op_lui = 1, 31ea103259SMichael Clark rv_op_auipc = 2, 32ea103259SMichael Clark rv_op_jal = 3, 33ea103259SMichael Clark rv_op_jalr = 4, 34ea103259SMichael Clark rv_op_beq = 5, 35ea103259SMichael Clark rv_op_bne = 6, 36ea103259SMichael Clark rv_op_blt = 7, 37ea103259SMichael Clark rv_op_bge = 8, 38ea103259SMichael Clark rv_op_bltu = 9, 39ea103259SMichael Clark rv_op_bgeu = 10, 40ea103259SMichael Clark rv_op_lb = 11, 41ea103259SMichael Clark rv_op_lh = 12, 42ea103259SMichael Clark rv_op_lw = 13, 43ea103259SMichael Clark rv_op_lbu = 14, 44ea103259SMichael Clark rv_op_lhu = 15, 45ea103259SMichael Clark rv_op_sb = 16, 46ea103259SMichael Clark rv_op_sh = 17, 47ea103259SMichael Clark rv_op_sw = 18, 48ea103259SMichael Clark rv_op_addi = 19, 49ea103259SMichael Clark rv_op_slti = 20, 50ea103259SMichael Clark rv_op_sltiu = 21, 51ea103259SMichael Clark rv_op_xori = 22, 52ea103259SMichael Clark rv_op_ori = 23, 53ea103259SMichael Clark rv_op_andi = 24, 54ea103259SMichael Clark rv_op_slli = 25, 55ea103259SMichael Clark rv_op_srli = 26, 56ea103259SMichael Clark rv_op_srai = 27, 57ea103259SMichael Clark rv_op_add = 28, 58ea103259SMichael Clark rv_op_sub = 29, 59ea103259SMichael Clark rv_op_sll = 30, 60ea103259SMichael Clark rv_op_slt = 31, 61ea103259SMichael Clark rv_op_sltu = 32, 62ea103259SMichael Clark rv_op_xor = 33, 63ea103259SMichael Clark rv_op_srl = 34, 64ea103259SMichael Clark rv_op_sra = 35, 65ea103259SMichael Clark rv_op_or = 36, 66ea103259SMichael Clark rv_op_and = 37, 67ea103259SMichael Clark rv_op_fence = 38, 68ea103259SMichael Clark rv_op_fence_i = 39, 69ea103259SMichael Clark rv_op_lwu = 40, 70ea103259SMichael Clark rv_op_ld = 41, 71ea103259SMichael Clark rv_op_sd = 42, 72ea103259SMichael Clark rv_op_addiw = 43, 73ea103259SMichael Clark rv_op_slliw = 44, 74ea103259SMichael Clark rv_op_srliw = 45, 75ea103259SMichael Clark rv_op_sraiw = 46, 76ea103259SMichael Clark rv_op_addw = 47, 77ea103259SMichael Clark rv_op_subw = 48, 78ea103259SMichael Clark rv_op_sllw = 49, 79ea103259SMichael Clark rv_op_srlw = 50, 80ea103259SMichael Clark rv_op_sraw = 51, 81ea103259SMichael Clark rv_op_ldu = 52, 82ea103259SMichael Clark rv_op_lq = 53, 83ea103259SMichael Clark rv_op_sq = 54, 84ea103259SMichael Clark rv_op_addid = 55, 85ea103259SMichael Clark rv_op_sllid = 56, 86ea103259SMichael Clark rv_op_srlid = 57, 87ea103259SMichael Clark rv_op_sraid = 58, 88ea103259SMichael Clark rv_op_addd = 59, 89ea103259SMichael Clark rv_op_subd = 60, 90ea103259SMichael Clark rv_op_slld = 61, 91ea103259SMichael Clark rv_op_srld = 62, 92ea103259SMichael Clark rv_op_srad = 63, 93ea103259SMichael Clark rv_op_mul = 64, 94ea103259SMichael Clark rv_op_mulh = 65, 95ea103259SMichael Clark rv_op_mulhsu = 66, 96ea103259SMichael Clark rv_op_mulhu = 67, 97ea103259SMichael Clark rv_op_div = 68, 98ea103259SMichael Clark rv_op_divu = 69, 99ea103259SMichael Clark rv_op_rem = 70, 100ea103259SMichael Clark rv_op_remu = 71, 101ea103259SMichael Clark rv_op_mulw = 72, 102ea103259SMichael Clark rv_op_divw = 73, 103ea103259SMichael Clark rv_op_divuw = 74, 104ea103259SMichael Clark rv_op_remw = 75, 105ea103259SMichael Clark rv_op_remuw = 76, 106ea103259SMichael Clark rv_op_muld = 77, 107ea103259SMichael Clark rv_op_divd = 78, 108ea103259SMichael Clark rv_op_divud = 79, 109ea103259SMichael Clark rv_op_remd = 80, 110ea103259SMichael Clark rv_op_remud = 81, 111ea103259SMichael Clark rv_op_lr_w = 82, 112ea103259SMichael Clark rv_op_sc_w = 83, 113ea103259SMichael Clark rv_op_amoswap_w = 84, 114ea103259SMichael Clark rv_op_amoadd_w = 85, 115ea103259SMichael Clark rv_op_amoxor_w = 86, 116ea103259SMichael Clark rv_op_amoor_w = 87, 117ea103259SMichael Clark rv_op_amoand_w = 88, 118ea103259SMichael Clark rv_op_amomin_w = 89, 119ea103259SMichael Clark rv_op_amomax_w = 90, 120ea103259SMichael Clark rv_op_amominu_w = 91, 121ea103259SMichael Clark rv_op_amomaxu_w = 92, 122ea103259SMichael Clark rv_op_lr_d = 93, 123ea103259SMichael Clark rv_op_sc_d = 94, 124ea103259SMichael Clark rv_op_amoswap_d = 95, 125ea103259SMichael Clark rv_op_amoadd_d = 96, 126ea103259SMichael Clark rv_op_amoxor_d = 97, 127ea103259SMichael Clark rv_op_amoor_d = 98, 128ea103259SMichael Clark rv_op_amoand_d = 99, 129ea103259SMichael Clark rv_op_amomin_d = 100, 130ea103259SMichael Clark rv_op_amomax_d = 101, 131ea103259SMichael Clark rv_op_amominu_d = 102, 132ea103259SMichael Clark rv_op_amomaxu_d = 103, 133ea103259SMichael Clark rv_op_lr_q = 104, 134ea103259SMichael Clark rv_op_sc_q = 105, 135ea103259SMichael Clark rv_op_amoswap_q = 106, 136ea103259SMichael Clark rv_op_amoadd_q = 107, 137ea103259SMichael Clark rv_op_amoxor_q = 108, 138ea103259SMichael Clark rv_op_amoor_q = 109, 139ea103259SMichael Clark rv_op_amoand_q = 110, 140ea103259SMichael Clark rv_op_amomin_q = 111, 141ea103259SMichael Clark rv_op_amomax_q = 112, 142ea103259SMichael Clark rv_op_amominu_q = 113, 143ea103259SMichael Clark rv_op_amomaxu_q = 114, 144ea103259SMichael Clark rv_op_ecall = 115, 145ea103259SMichael Clark rv_op_ebreak = 116, 146ea103259SMichael Clark rv_op_uret = 117, 147ea103259SMichael Clark rv_op_sret = 118, 148ea103259SMichael Clark rv_op_hret = 119, 149ea103259SMichael Clark rv_op_mret = 120, 150ea103259SMichael Clark rv_op_dret = 121, 151ea103259SMichael Clark rv_op_sfence_vm = 122, 152ea103259SMichael Clark rv_op_sfence_vma = 123, 153ea103259SMichael Clark rv_op_wfi = 124, 154ea103259SMichael Clark rv_op_csrrw = 125, 155ea103259SMichael Clark rv_op_csrrs = 126, 156ea103259SMichael Clark rv_op_csrrc = 127, 157ea103259SMichael Clark rv_op_csrrwi = 128, 158ea103259SMichael Clark rv_op_csrrsi = 129, 159ea103259SMichael Clark rv_op_csrrci = 130, 160ea103259SMichael Clark rv_op_flw = 131, 161ea103259SMichael Clark rv_op_fsw = 132, 162ea103259SMichael Clark rv_op_fmadd_s = 133, 163ea103259SMichael Clark rv_op_fmsub_s = 134, 164ea103259SMichael Clark rv_op_fnmsub_s = 135, 165ea103259SMichael Clark rv_op_fnmadd_s = 136, 166ea103259SMichael Clark rv_op_fadd_s = 137, 167ea103259SMichael Clark rv_op_fsub_s = 138, 168ea103259SMichael Clark rv_op_fmul_s = 139, 169ea103259SMichael Clark rv_op_fdiv_s = 140, 170ea103259SMichael Clark rv_op_fsgnj_s = 141, 171ea103259SMichael Clark rv_op_fsgnjn_s = 142, 172ea103259SMichael Clark rv_op_fsgnjx_s = 143, 173ea103259SMichael Clark rv_op_fmin_s = 144, 174ea103259SMichael Clark rv_op_fmax_s = 145, 175ea103259SMichael Clark rv_op_fsqrt_s = 146, 176ea103259SMichael Clark rv_op_fle_s = 147, 177ea103259SMichael Clark rv_op_flt_s = 148, 178ea103259SMichael Clark rv_op_feq_s = 149, 179ea103259SMichael Clark rv_op_fcvt_w_s = 150, 180ea103259SMichael Clark rv_op_fcvt_wu_s = 151, 181ea103259SMichael Clark rv_op_fcvt_s_w = 152, 182ea103259SMichael Clark rv_op_fcvt_s_wu = 153, 183ea103259SMichael Clark rv_op_fmv_x_s = 154, 184ea103259SMichael Clark rv_op_fclass_s = 155, 185ea103259SMichael Clark rv_op_fmv_s_x = 156, 186ea103259SMichael Clark rv_op_fcvt_l_s = 157, 187ea103259SMichael Clark rv_op_fcvt_lu_s = 158, 188ea103259SMichael Clark rv_op_fcvt_s_l = 159, 189ea103259SMichael Clark rv_op_fcvt_s_lu = 160, 190ea103259SMichael Clark rv_op_fld = 161, 191ea103259SMichael Clark rv_op_fsd = 162, 192ea103259SMichael Clark rv_op_fmadd_d = 163, 193ea103259SMichael Clark rv_op_fmsub_d = 164, 194ea103259SMichael Clark rv_op_fnmsub_d = 165, 195ea103259SMichael Clark rv_op_fnmadd_d = 166, 196ea103259SMichael Clark rv_op_fadd_d = 167, 197ea103259SMichael Clark rv_op_fsub_d = 168, 198ea103259SMichael Clark rv_op_fmul_d = 169, 199ea103259SMichael Clark rv_op_fdiv_d = 170, 200ea103259SMichael Clark rv_op_fsgnj_d = 171, 201ea103259SMichael Clark rv_op_fsgnjn_d = 172, 202ea103259SMichael Clark rv_op_fsgnjx_d = 173, 203ea103259SMichael Clark rv_op_fmin_d = 174, 204ea103259SMichael Clark rv_op_fmax_d = 175, 205ea103259SMichael Clark rv_op_fcvt_s_d = 176, 206ea103259SMichael Clark rv_op_fcvt_d_s = 177, 207ea103259SMichael Clark rv_op_fsqrt_d = 178, 208ea103259SMichael Clark rv_op_fle_d = 179, 209ea103259SMichael Clark rv_op_flt_d = 180, 210ea103259SMichael Clark rv_op_feq_d = 181, 211ea103259SMichael Clark rv_op_fcvt_w_d = 182, 212ea103259SMichael Clark rv_op_fcvt_wu_d = 183, 213ea103259SMichael Clark rv_op_fcvt_d_w = 184, 214ea103259SMichael Clark rv_op_fcvt_d_wu = 185, 215ea103259SMichael Clark rv_op_fclass_d = 186, 216ea103259SMichael Clark rv_op_fcvt_l_d = 187, 217ea103259SMichael Clark rv_op_fcvt_lu_d = 188, 218ea103259SMichael Clark rv_op_fmv_x_d = 189, 219ea103259SMichael Clark rv_op_fcvt_d_l = 190, 220ea103259SMichael Clark rv_op_fcvt_d_lu = 191, 221ea103259SMichael Clark rv_op_fmv_d_x = 192, 222ea103259SMichael Clark rv_op_flq = 193, 223ea103259SMichael Clark rv_op_fsq = 194, 224ea103259SMichael Clark rv_op_fmadd_q = 195, 225ea103259SMichael Clark rv_op_fmsub_q = 196, 226ea103259SMichael Clark rv_op_fnmsub_q = 197, 227ea103259SMichael Clark rv_op_fnmadd_q = 198, 228ea103259SMichael Clark rv_op_fadd_q = 199, 229ea103259SMichael Clark rv_op_fsub_q = 200, 230ea103259SMichael Clark rv_op_fmul_q = 201, 231ea103259SMichael Clark rv_op_fdiv_q = 202, 232ea103259SMichael Clark rv_op_fsgnj_q = 203, 233ea103259SMichael Clark rv_op_fsgnjn_q = 204, 234ea103259SMichael Clark rv_op_fsgnjx_q = 205, 235ea103259SMichael Clark rv_op_fmin_q = 206, 236ea103259SMichael Clark rv_op_fmax_q = 207, 237ea103259SMichael Clark rv_op_fcvt_s_q = 208, 238ea103259SMichael Clark rv_op_fcvt_q_s = 209, 239ea103259SMichael Clark rv_op_fcvt_d_q = 210, 240ea103259SMichael Clark rv_op_fcvt_q_d = 211, 241ea103259SMichael Clark rv_op_fsqrt_q = 212, 242ea103259SMichael Clark rv_op_fle_q = 213, 243ea103259SMichael Clark rv_op_flt_q = 214, 244ea103259SMichael Clark rv_op_feq_q = 215, 245ea103259SMichael Clark rv_op_fcvt_w_q = 216, 246ea103259SMichael Clark rv_op_fcvt_wu_q = 217, 247ea103259SMichael Clark rv_op_fcvt_q_w = 218, 248ea103259SMichael Clark rv_op_fcvt_q_wu = 219, 249ea103259SMichael Clark rv_op_fclass_q = 220, 250ea103259SMichael Clark rv_op_fcvt_l_q = 221, 251ea103259SMichael Clark rv_op_fcvt_lu_q = 222, 252ea103259SMichael Clark rv_op_fcvt_q_l = 223, 253ea103259SMichael Clark rv_op_fcvt_q_lu = 224, 254ea103259SMichael Clark rv_op_fmv_x_q = 225, 255ea103259SMichael Clark rv_op_fmv_q_x = 226, 256ea103259SMichael Clark rv_op_c_addi4spn = 227, 257ea103259SMichael Clark rv_op_c_fld = 228, 258ea103259SMichael Clark rv_op_c_lw = 229, 259ea103259SMichael Clark rv_op_c_flw = 230, 260ea103259SMichael Clark rv_op_c_fsd = 231, 261ea103259SMichael Clark rv_op_c_sw = 232, 262ea103259SMichael Clark rv_op_c_fsw = 233, 263ea103259SMichael Clark rv_op_c_nop = 234, 264ea103259SMichael Clark rv_op_c_addi = 235, 265ea103259SMichael Clark rv_op_c_jal = 236, 266ea103259SMichael Clark rv_op_c_li = 237, 267ea103259SMichael Clark rv_op_c_addi16sp = 238, 268ea103259SMichael Clark rv_op_c_lui = 239, 269ea103259SMichael Clark rv_op_c_srli = 240, 270ea103259SMichael Clark rv_op_c_srai = 241, 271ea103259SMichael Clark rv_op_c_andi = 242, 272ea103259SMichael Clark rv_op_c_sub = 243, 273ea103259SMichael Clark rv_op_c_xor = 244, 274ea103259SMichael Clark rv_op_c_or = 245, 275ea103259SMichael Clark rv_op_c_and = 246, 276ea103259SMichael Clark rv_op_c_subw = 247, 277ea103259SMichael Clark rv_op_c_addw = 248, 278ea103259SMichael Clark rv_op_c_j = 249, 279ea103259SMichael Clark rv_op_c_beqz = 250, 280ea103259SMichael Clark rv_op_c_bnez = 251, 281ea103259SMichael Clark rv_op_c_slli = 252, 282ea103259SMichael Clark rv_op_c_fldsp = 253, 283ea103259SMichael Clark rv_op_c_lwsp = 254, 284ea103259SMichael Clark rv_op_c_flwsp = 255, 285ea103259SMichael Clark rv_op_c_jr = 256, 286ea103259SMichael Clark rv_op_c_mv = 257, 287ea103259SMichael Clark rv_op_c_ebreak = 258, 288ea103259SMichael Clark rv_op_c_jalr = 259, 289ea103259SMichael Clark rv_op_c_add = 260, 290ea103259SMichael Clark rv_op_c_fsdsp = 261, 291ea103259SMichael Clark rv_op_c_swsp = 262, 292ea103259SMichael Clark rv_op_c_fswsp = 263, 293ea103259SMichael Clark rv_op_c_ld = 264, 294ea103259SMichael Clark rv_op_c_sd = 265, 295ea103259SMichael Clark rv_op_c_addiw = 266, 296ea103259SMichael Clark rv_op_c_ldsp = 267, 297ea103259SMichael Clark rv_op_c_sdsp = 268, 298ea103259SMichael Clark rv_op_c_lq = 269, 299ea103259SMichael Clark rv_op_c_sq = 270, 300ea103259SMichael Clark rv_op_c_lqsp = 271, 301ea103259SMichael Clark rv_op_c_sqsp = 272, 302ea103259SMichael Clark rv_op_nop = 273, 303ea103259SMichael Clark rv_op_mv = 274, 304ea103259SMichael Clark rv_op_not = 275, 305ea103259SMichael Clark rv_op_neg = 276, 306ea103259SMichael Clark rv_op_negw = 277, 307ea103259SMichael Clark rv_op_sext_w = 278, 308ea103259SMichael Clark rv_op_seqz = 279, 309ea103259SMichael Clark rv_op_snez = 280, 310ea103259SMichael Clark rv_op_sltz = 281, 311ea103259SMichael Clark rv_op_sgtz = 282, 312ea103259SMichael Clark rv_op_fmv_s = 283, 313ea103259SMichael Clark rv_op_fabs_s = 284, 314ea103259SMichael Clark rv_op_fneg_s = 285, 315ea103259SMichael Clark rv_op_fmv_d = 286, 316ea103259SMichael Clark rv_op_fabs_d = 287, 317ea103259SMichael Clark rv_op_fneg_d = 288, 318ea103259SMichael Clark rv_op_fmv_q = 289, 319ea103259SMichael Clark rv_op_fabs_q = 290, 320ea103259SMichael Clark rv_op_fneg_q = 291, 321ea103259SMichael Clark rv_op_beqz = 292, 322ea103259SMichael Clark rv_op_bnez = 293, 323ea103259SMichael Clark rv_op_blez = 294, 324ea103259SMichael Clark rv_op_bgez = 295, 325ea103259SMichael Clark rv_op_bltz = 296, 326ea103259SMichael Clark rv_op_bgtz = 297, 327ea103259SMichael Clark rv_op_ble = 298, 328ea103259SMichael Clark rv_op_bleu = 299, 329ea103259SMichael Clark rv_op_bgt = 300, 330ea103259SMichael Clark rv_op_bgtu = 301, 331ea103259SMichael Clark rv_op_j = 302, 332ea103259SMichael Clark rv_op_ret = 303, 333ea103259SMichael Clark rv_op_jr = 304, 334ea103259SMichael Clark rv_op_rdcycle = 305, 335ea103259SMichael Clark rv_op_rdtime = 306, 336ea103259SMichael Clark rv_op_rdinstret = 307, 337ea103259SMichael Clark rv_op_rdcycleh = 308, 338ea103259SMichael Clark rv_op_rdtimeh = 309, 339ea103259SMichael Clark rv_op_rdinstreth = 310, 340ea103259SMichael Clark rv_op_frcsr = 311, 341ea103259SMichael Clark rv_op_frrm = 312, 342ea103259SMichael Clark rv_op_frflags = 313, 343ea103259SMichael Clark rv_op_fscsr = 314, 344ea103259SMichael Clark rv_op_fsrm = 315, 345ea103259SMichael Clark rv_op_fsflags = 316, 346ea103259SMichael Clark rv_op_fsrmi = 317, 347ea103259SMichael Clark rv_op_fsflagsi = 318, 34802c1b569SPhilipp Tomsich rv_op_bseti = 319, 34902c1b569SPhilipp Tomsich rv_op_bclri = 320, 35002c1b569SPhilipp Tomsich rv_op_binvi = 321, 35102c1b569SPhilipp Tomsich rv_op_bexti = 322, 35202c1b569SPhilipp Tomsich rv_op_rori = 323, 35302c1b569SPhilipp Tomsich rv_op_clz = 324, 35402c1b569SPhilipp Tomsich rv_op_ctz = 325, 35502c1b569SPhilipp Tomsich rv_op_cpop = 326, 35602c1b569SPhilipp Tomsich rv_op_sext_h = 327, 35702c1b569SPhilipp Tomsich rv_op_sext_b = 328, 35802c1b569SPhilipp Tomsich rv_op_xnor = 329, 35902c1b569SPhilipp Tomsich rv_op_orn = 330, 36002c1b569SPhilipp Tomsich rv_op_andn = 331, 36102c1b569SPhilipp Tomsich rv_op_rol = 332, 36202c1b569SPhilipp Tomsich rv_op_ror = 333, 36302c1b569SPhilipp Tomsich rv_op_sh1add = 334, 36402c1b569SPhilipp Tomsich rv_op_sh2add = 335, 36502c1b569SPhilipp Tomsich rv_op_sh3add = 336, 36602c1b569SPhilipp Tomsich rv_op_sh1add_uw = 337, 36702c1b569SPhilipp Tomsich rv_op_sh2add_uw = 338, 36802c1b569SPhilipp Tomsich rv_op_sh3add_uw = 339, 36902c1b569SPhilipp Tomsich rv_op_clmul = 340, 37002c1b569SPhilipp Tomsich rv_op_clmulr = 341, 37102c1b569SPhilipp Tomsich rv_op_clmulh = 342, 37202c1b569SPhilipp Tomsich rv_op_min = 343, 37302c1b569SPhilipp Tomsich rv_op_minu = 344, 37402c1b569SPhilipp Tomsich rv_op_max = 345, 37502c1b569SPhilipp Tomsich rv_op_maxu = 346, 37602c1b569SPhilipp Tomsich rv_op_clzw = 347, 37702c1b569SPhilipp Tomsich rv_op_ctzw = 348, 37802c1b569SPhilipp Tomsich rv_op_cpopw = 349, 37902c1b569SPhilipp Tomsich rv_op_slli_uw = 350, 38002c1b569SPhilipp Tomsich rv_op_add_uw = 351, 38102c1b569SPhilipp Tomsich rv_op_rolw = 352, 38202c1b569SPhilipp Tomsich rv_op_rorw = 353, 38302c1b569SPhilipp Tomsich rv_op_rev8 = 354, 38402c1b569SPhilipp Tomsich rv_op_zext_h = 355, 38502c1b569SPhilipp Tomsich rv_op_roriw = 356, 38602c1b569SPhilipp Tomsich rv_op_orc_b = 357, 38702c1b569SPhilipp Tomsich rv_op_bset = 358, 38802c1b569SPhilipp Tomsich rv_op_bclr = 359, 38902c1b569SPhilipp Tomsich rv_op_binv = 360, 39002c1b569SPhilipp Tomsich rv_op_bext = 361, 3915748c886SWeiwei Li rv_op_aes32esmi = 362, 3925748c886SWeiwei Li rv_op_aes32esi = 363, 3935748c886SWeiwei Li rv_op_aes32dsmi = 364, 3945748c886SWeiwei Li rv_op_aes32dsi = 365, 3955748c886SWeiwei Li rv_op_aes64ks1i = 366, 3965748c886SWeiwei Li rv_op_aes64ks2 = 367, 3975748c886SWeiwei Li rv_op_aes64im = 368, 3985748c886SWeiwei Li rv_op_aes64esm = 369, 3995748c886SWeiwei Li rv_op_aes64es = 370, 4005748c886SWeiwei Li rv_op_aes64dsm = 371, 4015748c886SWeiwei Li rv_op_aes64ds = 372, 4025748c886SWeiwei Li rv_op_sha256sig0 = 373, 4035748c886SWeiwei Li rv_op_sha256sig1 = 374, 4045748c886SWeiwei Li rv_op_sha256sum0 = 375, 4055748c886SWeiwei Li rv_op_sha256sum1 = 376, 4065748c886SWeiwei Li rv_op_sha512sig0 = 377, 4075748c886SWeiwei Li rv_op_sha512sig1 = 378, 4085748c886SWeiwei Li rv_op_sha512sum0 = 379, 4095748c886SWeiwei Li rv_op_sha512sum1 = 380, 4105748c886SWeiwei Li rv_op_sha512sum0r = 381, 4115748c886SWeiwei Li rv_op_sha512sum1r = 382, 4125748c886SWeiwei Li rv_op_sha512sig0l = 383, 4135748c886SWeiwei Li rv_op_sha512sig0h = 384, 4145748c886SWeiwei Li rv_op_sha512sig1l = 385, 4155748c886SWeiwei Li rv_op_sha512sig1h = 386, 4165748c886SWeiwei Li rv_op_sm3p0 = 387, 4175748c886SWeiwei Li rv_op_sm3p1 = 388, 4185748c886SWeiwei Li rv_op_sm4ed = 389, 4195748c886SWeiwei Li rv_op_sm4ks = 390, 4205748c886SWeiwei Li rv_op_brev8 = 391, 4215748c886SWeiwei Li rv_op_pack = 392, 4225748c886SWeiwei Li rv_op_packh = 393, 4235748c886SWeiwei Li rv_op_packw = 394, 4245748c886SWeiwei Li rv_op_unzip = 395, 4255748c886SWeiwei Li rv_op_zip = 396, 4265748c886SWeiwei Li rv_op_xperm4 = 397, 4275748c886SWeiwei Li rv_op_xperm8 = 398, 42807f4964dSYang Liu rv_op_vle8_v = 399, 42907f4964dSYang Liu rv_op_vle16_v = 400, 43007f4964dSYang Liu rv_op_vle32_v = 401, 43107f4964dSYang Liu rv_op_vle64_v = 402, 43207f4964dSYang Liu rv_op_vse8_v = 403, 43307f4964dSYang Liu rv_op_vse16_v = 404, 43407f4964dSYang Liu rv_op_vse32_v = 405, 43507f4964dSYang Liu rv_op_vse64_v = 406, 43607f4964dSYang Liu rv_op_vlm_v = 407, 43707f4964dSYang Liu rv_op_vsm_v = 408, 43807f4964dSYang Liu rv_op_vlse8_v = 409, 43907f4964dSYang Liu rv_op_vlse16_v = 410, 44007f4964dSYang Liu rv_op_vlse32_v = 411, 44107f4964dSYang Liu rv_op_vlse64_v = 412, 44207f4964dSYang Liu rv_op_vsse8_v = 413, 44307f4964dSYang Liu rv_op_vsse16_v = 414, 44407f4964dSYang Liu rv_op_vsse32_v = 415, 44507f4964dSYang Liu rv_op_vsse64_v = 416, 44607f4964dSYang Liu rv_op_vluxei8_v = 417, 44707f4964dSYang Liu rv_op_vluxei16_v = 418, 44807f4964dSYang Liu rv_op_vluxei32_v = 419, 44907f4964dSYang Liu rv_op_vluxei64_v = 420, 45007f4964dSYang Liu rv_op_vloxei8_v = 421, 45107f4964dSYang Liu rv_op_vloxei16_v = 422, 45207f4964dSYang Liu rv_op_vloxei32_v = 423, 45307f4964dSYang Liu rv_op_vloxei64_v = 424, 45407f4964dSYang Liu rv_op_vsuxei8_v = 425, 45507f4964dSYang Liu rv_op_vsuxei16_v = 426, 45607f4964dSYang Liu rv_op_vsuxei32_v = 427, 45707f4964dSYang Liu rv_op_vsuxei64_v = 428, 45807f4964dSYang Liu rv_op_vsoxei8_v = 429, 45907f4964dSYang Liu rv_op_vsoxei16_v = 430, 46007f4964dSYang Liu rv_op_vsoxei32_v = 431, 46107f4964dSYang Liu rv_op_vsoxei64_v = 432, 46207f4964dSYang Liu rv_op_vle8ff_v = 433, 46307f4964dSYang Liu rv_op_vle16ff_v = 434, 46407f4964dSYang Liu rv_op_vle32ff_v = 435, 46507f4964dSYang Liu rv_op_vle64ff_v = 436, 46607f4964dSYang Liu rv_op_vl1re8_v = 437, 46707f4964dSYang Liu rv_op_vl1re16_v = 438, 46807f4964dSYang Liu rv_op_vl1re32_v = 439, 46907f4964dSYang Liu rv_op_vl1re64_v = 440, 47007f4964dSYang Liu rv_op_vl2re8_v = 441, 47107f4964dSYang Liu rv_op_vl2re16_v = 442, 47207f4964dSYang Liu rv_op_vl2re32_v = 443, 47307f4964dSYang Liu rv_op_vl2re64_v = 444, 47407f4964dSYang Liu rv_op_vl4re8_v = 445, 47507f4964dSYang Liu rv_op_vl4re16_v = 446, 47607f4964dSYang Liu rv_op_vl4re32_v = 447, 47707f4964dSYang Liu rv_op_vl4re64_v = 448, 47807f4964dSYang Liu rv_op_vl8re8_v = 449, 47907f4964dSYang Liu rv_op_vl8re16_v = 450, 48007f4964dSYang Liu rv_op_vl8re32_v = 451, 48107f4964dSYang Liu rv_op_vl8re64_v = 452, 48207f4964dSYang Liu rv_op_vs1r_v = 453, 48307f4964dSYang Liu rv_op_vs2r_v = 454, 48407f4964dSYang Liu rv_op_vs4r_v = 455, 48507f4964dSYang Liu rv_op_vs8r_v = 456, 48607f4964dSYang Liu rv_op_vadd_vv = 457, 48707f4964dSYang Liu rv_op_vadd_vx = 458, 48807f4964dSYang Liu rv_op_vadd_vi = 459, 48907f4964dSYang Liu rv_op_vsub_vv = 460, 49007f4964dSYang Liu rv_op_vsub_vx = 461, 49107f4964dSYang Liu rv_op_vrsub_vx = 462, 49207f4964dSYang Liu rv_op_vrsub_vi = 463, 49307f4964dSYang Liu rv_op_vwaddu_vv = 464, 49407f4964dSYang Liu rv_op_vwaddu_vx = 465, 49507f4964dSYang Liu rv_op_vwadd_vv = 466, 49607f4964dSYang Liu rv_op_vwadd_vx = 467, 49707f4964dSYang Liu rv_op_vwsubu_vv = 468, 49807f4964dSYang Liu rv_op_vwsubu_vx = 469, 49907f4964dSYang Liu rv_op_vwsub_vv = 470, 50007f4964dSYang Liu rv_op_vwsub_vx = 471, 50107f4964dSYang Liu rv_op_vwaddu_wv = 472, 50207f4964dSYang Liu rv_op_vwaddu_wx = 473, 50307f4964dSYang Liu rv_op_vwadd_wv = 474, 50407f4964dSYang Liu rv_op_vwadd_wx = 475, 50507f4964dSYang Liu rv_op_vwsubu_wv = 476, 50607f4964dSYang Liu rv_op_vwsubu_wx = 477, 50707f4964dSYang Liu rv_op_vwsub_wv = 478, 50807f4964dSYang Liu rv_op_vwsub_wx = 479, 50907f4964dSYang Liu rv_op_vadc_vvm = 480, 51007f4964dSYang Liu rv_op_vadc_vxm = 481, 51107f4964dSYang Liu rv_op_vadc_vim = 482, 51207f4964dSYang Liu rv_op_vmadc_vvm = 483, 51307f4964dSYang Liu rv_op_vmadc_vxm = 484, 51407f4964dSYang Liu rv_op_vmadc_vim = 485, 51507f4964dSYang Liu rv_op_vsbc_vvm = 486, 51607f4964dSYang Liu rv_op_vsbc_vxm = 487, 51707f4964dSYang Liu rv_op_vmsbc_vvm = 488, 51807f4964dSYang Liu rv_op_vmsbc_vxm = 489, 51907f4964dSYang Liu rv_op_vand_vv = 490, 52007f4964dSYang Liu rv_op_vand_vx = 491, 52107f4964dSYang Liu rv_op_vand_vi = 492, 52207f4964dSYang Liu rv_op_vor_vv = 493, 52307f4964dSYang Liu rv_op_vor_vx = 494, 52407f4964dSYang Liu rv_op_vor_vi = 495, 52507f4964dSYang Liu rv_op_vxor_vv = 496, 52607f4964dSYang Liu rv_op_vxor_vx = 497, 52707f4964dSYang Liu rv_op_vxor_vi = 498, 52807f4964dSYang Liu rv_op_vsll_vv = 499, 52907f4964dSYang Liu rv_op_vsll_vx = 500, 53007f4964dSYang Liu rv_op_vsll_vi = 501, 53107f4964dSYang Liu rv_op_vsrl_vv = 502, 53207f4964dSYang Liu rv_op_vsrl_vx = 503, 53307f4964dSYang Liu rv_op_vsrl_vi = 504, 53407f4964dSYang Liu rv_op_vsra_vv = 505, 53507f4964dSYang Liu rv_op_vsra_vx = 506, 53607f4964dSYang Liu rv_op_vsra_vi = 507, 53707f4964dSYang Liu rv_op_vnsrl_wv = 508, 53807f4964dSYang Liu rv_op_vnsrl_wx = 509, 53907f4964dSYang Liu rv_op_vnsrl_wi = 510, 54007f4964dSYang Liu rv_op_vnsra_wv = 511, 54107f4964dSYang Liu rv_op_vnsra_wx = 512, 54207f4964dSYang Liu rv_op_vnsra_wi = 513, 54307f4964dSYang Liu rv_op_vmseq_vv = 514, 54407f4964dSYang Liu rv_op_vmseq_vx = 515, 54507f4964dSYang Liu rv_op_vmseq_vi = 516, 54607f4964dSYang Liu rv_op_vmsne_vv = 517, 54707f4964dSYang Liu rv_op_vmsne_vx = 518, 54807f4964dSYang Liu rv_op_vmsne_vi = 519, 54907f4964dSYang Liu rv_op_vmsltu_vv = 520, 55007f4964dSYang Liu rv_op_vmsltu_vx = 521, 55107f4964dSYang Liu rv_op_vmslt_vv = 522, 55207f4964dSYang Liu rv_op_vmslt_vx = 523, 55307f4964dSYang Liu rv_op_vmsleu_vv = 524, 55407f4964dSYang Liu rv_op_vmsleu_vx = 525, 55507f4964dSYang Liu rv_op_vmsleu_vi = 526, 55607f4964dSYang Liu rv_op_vmsle_vv = 527, 55707f4964dSYang Liu rv_op_vmsle_vx = 528, 55807f4964dSYang Liu rv_op_vmsle_vi = 529, 55907f4964dSYang Liu rv_op_vmsgtu_vx = 530, 56007f4964dSYang Liu rv_op_vmsgtu_vi = 531, 56107f4964dSYang Liu rv_op_vmsgt_vx = 532, 56207f4964dSYang Liu rv_op_vmsgt_vi = 533, 56307f4964dSYang Liu rv_op_vminu_vv = 534, 56407f4964dSYang Liu rv_op_vminu_vx = 535, 56507f4964dSYang Liu rv_op_vmin_vv = 536, 56607f4964dSYang Liu rv_op_vmin_vx = 537, 56707f4964dSYang Liu rv_op_vmaxu_vv = 538, 56807f4964dSYang Liu rv_op_vmaxu_vx = 539, 56907f4964dSYang Liu rv_op_vmax_vv = 540, 57007f4964dSYang Liu rv_op_vmax_vx = 541, 57107f4964dSYang Liu rv_op_vmul_vv = 542, 57207f4964dSYang Liu rv_op_vmul_vx = 543, 57307f4964dSYang Liu rv_op_vmulh_vv = 544, 57407f4964dSYang Liu rv_op_vmulh_vx = 545, 57507f4964dSYang Liu rv_op_vmulhu_vv = 546, 57607f4964dSYang Liu rv_op_vmulhu_vx = 547, 57707f4964dSYang Liu rv_op_vmulhsu_vv = 548, 57807f4964dSYang Liu rv_op_vmulhsu_vx = 549, 57907f4964dSYang Liu rv_op_vdivu_vv = 550, 58007f4964dSYang Liu rv_op_vdivu_vx = 551, 58107f4964dSYang Liu rv_op_vdiv_vv = 552, 58207f4964dSYang Liu rv_op_vdiv_vx = 553, 58307f4964dSYang Liu rv_op_vremu_vv = 554, 58407f4964dSYang Liu rv_op_vremu_vx = 555, 58507f4964dSYang Liu rv_op_vrem_vv = 556, 58607f4964dSYang Liu rv_op_vrem_vx = 557, 58707f4964dSYang Liu rv_op_vwmulu_vv = 558, 58807f4964dSYang Liu rv_op_vwmulu_vx = 559, 58907f4964dSYang Liu rv_op_vwmulsu_vv = 560, 59007f4964dSYang Liu rv_op_vwmulsu_vx = 561, 59107f4964dSYang Liu rv_op_vwmul_vv = 562, 59207f4964dSYang Liu rv_op_vwmul_vx = 563, 59307f4964dSYang Liu rv_op_vmacc_vv = 564, 59407f4964dSYang Liu rv_op_vmacc_vx = 565, 59507f4964dSYang Liu rv_op_vnmsac_vv = 566, 59607f4964dSYang Liu rv_op_vnmsac_vx = 567, 59707f4964dSYang Liu rv_op_vmadd_vv = 568, 59807f4964dSYang Liu rv_op_vmadd_vx = 569, 59907f4964dSYang Liu rv_op_vnmsub_vv = 570, 60007f4964dSYang Liu rv_op_vnmsub_vx = 571, 60107f4964dSYang Liu rv_op_vwmaccu_vv = 572, 60207f4964dSYang Liu rv_op_vwmaccu_vx = 573, 60307f4964dSYang Liu rv_op_vwmacc_vv = 574, 60407f4964dSYang Liu rv_op_vwmacc_vx = 575, 60507f4964dSYang Liu rv_op_vwmaccsu_vv = 576, 60607f4964dSYang Liu rv_op_vwmaccsu_vx = 577, 60707f4964dSYang Liu rv_op_vwmaccus_vx = 578, 60807f4964dSYang Liu rv_op_vmv_v_v = 579, 60907f4964dSYang Liu rv_op_vmv_v_x = 580, 61007f4964dSYang Liu rv_op_vmv_v_i = 581, 61107f4964dSYang Liu rv_op_vmerge_vvm = 582, 61207f4964dSYang Liu rv_op_vmerge_vxm = 583, 61307f4964dSYang Liu rv_op_vmerge_vim = 584, 61407f4964dSYang Liu rv_op_vsaddu_vv = 585, 61507f4964dSYang Liu rv_op_vsaddu_vx = 586, 61607f4964dSYang Liu rv_op_vsaddu_vi = 587, 61707f4964dSYang Liu rv_op_vsadd_vv = 588, 61807f4964dSYang Liu rv_op_vsadd_vx = 589, 61907f4964dSYang Liu rv_op_vsadd_vi = 590, 62007f4964dSYang Liu rv_op_vssubu_vv = 591, 62107f4964dSYang Liu rv_op_vssubu_vx = 592, 62207f4964dSYang Liu rv_op_vssub_vv = 593, 62307f4964dSYang Liu rv_op_vssub_vx = 594, 62407f4964dSYang Liu rv_op_vaadd_vv = 595, 62507f4964dSYang Liu rv_op_vaadd_vx = 596, 62607f4964dSYang Liu rv_op_vaaddu_vv = 597, 62707f4964dSYang Liu rv_op_vaaddu_vx = 598, 62807f4964dSYang Liu rv_op_vasub_vv = 599, 62907f4964dSYang Liu rv_op_vasub_vx = 600, 63007f4964dSYang Liu rv_op_vasubu_vv = 601, 63107f4964dSYang Liu rv_op_vasubu_vx = 602, 63207f4964dSYang Liu rv_op_vsmul_vv = 603, 63307f4964dSYang Liu rv_op_vsmul_vx = 604, 63407f4964dSYang Liu rv_op_vssrl_vv = 605, 63507f4964dSYang Liu rv_op_vssrl_vx = 606, 63607f4964dSYang Liu rv_op_vssrl_vi = 607, 63707f4964dSYang Liu rv_op_vssra_vv = 608, 63807f4964dSYang Liu rv_op_vssra_vx = 609, 63907f4964dSYang Liu rv_op_vssra_vi = 610, 64007f4964dSYang Liu rv_op_vnclipu_wv = 611, 64107f4964dSYang Liu rv_op_vnclipu_wx = 612, 64207f4964dSYang Liu rv_op_vnclipu_wi = 613, 64307f4964dSYang Liu rv_op_vnclip_wv = 614, 64407f4964dSYang Liu rv_op_vnclip_wx = 615, 64507f4964dSYang Liu rv_op_vnclip_wi = 616, 64607f4964dSYang Liu rv_op_vfadd_vv = 617, 64707f4964dSYang Liu rv_op_vfadd_vf = 618, 64807f4964dSYang Liu rv_op_vfsub_vv = 619, 64907f4964dSYang Liu rv_op_vfsub_vf = 620, 65007f4964dSYang Liu rv_op_vfrsub_vf = 621, 65107f4964dSYang Liu rv_op_vfwadd_vv = 622, 65207f4964dSYang Liu rv_op_vfwadd_vf = 623, 65307f4964dSYang Liu rv_op_vfwadd_wv = 624, 65407f4964dSYang Liu rv_op_vfwadd_wf = 625, 65507f4964dSYang Liu rv_op_vfwsub_vv = 626, 65607f4964dSYang Liu rv_op_vfwsub_vf = 627, 65707f4964dSYang Liu rv_op_vfwsub_wv = 628, 65807f4964dSYang Liu rv_op_vfwsub_wf = 629, 65907f4964dSYang Liu rv_op_vfmul_vv = 630, 66007f4964dSYang Liu rv_op_vfmul_vf = 631, 66107f4964dSYang Liu rv_op_vfdiv_vv = 632, 66207f4964dSYang Liu rv_op_vfdiv_vf = 633, 66307f4964dSYang Liu rv_op_vfrdiv_vf = 634, 66407f4964dSYang Liu rv_op_vfwmul_vv = 635, 66507f4964dSYang Liu rv_op_vfwmul_vf = 636, 66607f4964dSYang Liu rv_op_vfmacc_vv = 637, 66707f4964dSYang Liu rv_op_vfmacc_vf = 638, 66807f4964dSYang Liu rv_op_vfnmacc_vv = 639, 66907f4964dSYang Liu rv_op_vfnmacc_vf = 640, 67007f4964dSYang Liu rv_op_vfmsac_vv = 641, 67107f4964dSYang Liu rv_op_vfmsac_vf = 642, 67207f4964dSYang Liu rv_op_vfnmsac_vv = 643, 67307f4964dSYang Liu rv_op_vfnmsac_vf = 644, 67407f4964dSYang Liu rv_op_vfmadd_vv = 645, 67507f4964dSYang Liu rv_op_vfmadd_vf = 646, 67607f4964dSYang Liu rv_op_vfnmadd_vv = 647, 67707f4964dSYang Liu rv_op_vfnmadd_vf = 648, 67807f4964dSYang Liu rv_op_vfmsub_vv = 649, 67907f4964dSYang Liu rv_op_vfmsub_vf = 650, 68007f4964dSYang Liu rv_op_vfnmsub_vv = 651, 68107f4964dSYang Liu rv_op_vfnmsub_vf = 652, 68207f4964dSYang Liu rv_op_vfwmacc_vv = 653, 68307f4964dSYang Liu rv_op_vfwmacc_vf = 654, 68407f4964dSYang Liu rv_op_vfwnmacc_vv = 655, 68507f4964dSYang Liu rv_op_vfwnmacc_vf = 656, 68607f4964dSYang Liu rv_op_vfwmsac_vv = 657, 68707f4964dSYang Liu rv_op_vfwmsac_vf = 658, 68807f4964dSYang Liu rv_op_vfwnmsac_vv = 659, 68907f4964dSYang Liu rv_op_vfwnmsac_vf = 660, 69007f4964dSYang Liu rv_op_vfsqrt_v = 661, 69107f4964dSYang Liu rv_op_vfrsqrt7_v = 662, 69207f4964dSYang Liu rv_op_vfrec7_v = 663, 69307f4964dSYang Liu rv_op_vfmin_vv = 664, 69407f4964dSYang Liu rv_op_vfmin_vf = 665, 69507f4964dSYang Liu rv_op_vfmax_vv = 666, 69607f4964dSYang Liu rv_op_vfmax_vf = 667, 69707f4964dSYang Liu rv_op_vfsgnj_vv = 668, 69807f4964dSYang Liu rv_op_vfsgnj_vf = 669, 69907f4964dSYang Liu rv_op_vfsgnjn_vv = 670, 70007f4964dSYang Liu rv_op_vfsgnjn_vf = 671, 70107f4964dSYang Liu rv_op_vfsgnjx_vv = 672, 70207f4964dSYang Liu rv_op_vfsgnjx_vf = 673, 70307f4964dSYang Liu rv_op_vfslide1up_vf = 674, 70407f4964dSYang Liu rv_op_vfslide1down_vf = 675, 70507f4964dSYang Liu rv_op_vmfeq_vv = 676, 70607f4964dSYang Liu rv_op_vmfeq_vf = 677, 70707f4964dSYang Liu rv_op_vmfne_vv = 678, 70807f4964dSYang Liu rv_op_vmfne_vf = 679, 70907f4964dSYang Liu rv_op_vmflt_vv = 680, 71007f4964dSYang Liu rv_op_vmflt_vf = 681, 71107f4964dSYang Liu rv_op_vmfle_vv = 682, 71207f4964dSYang Liu rv_op_vmfle_vf = 683, 71307f4964dSYang Liu rv_op_vmfgt_vf = 684, 71407f4964dSYang Liu rv_op_vmfge_vf = 685, 71507f4964dSYang Liu rv_op_vfclass_v = 686, 71607f4964dSYang Liu rv_op_vfmerge_vfm = 687, 71707f4964dSYang Liu rv_op_vfmv_v_f = 688, 71807f4964dSYang Liu rv_op_vfcvt_xu_f_v = 689, 71907f4964dSYang Liu rv_op_vfcvt_x_f_v = 690, 72007f4964dSYang Liu rv_op_vfcvt_f_xu_v = 691, 72107f4964dSYang Liu rv_op_vfcvt_f_x_v = 692, 72207f4964dSYang Liu rv_op_vfcvt_rtz_xu_f_v = 693, 72307f4964dSYang Liu rv_op_vfcvt_rtz_x_f_v = 694, 72407f4964dSYang Liu rv_op_vfwcvt_xu_f_v = 695, 72507f4964dSYang Liu rv_op_vfwcvt_x_f_v = 696, 72607f4964dSYang Liu rv_op_vfwcvt_f_xu_v = 697, 72707f4964dSYang Liu rv_op_vfwcvt_f_x_v = 698, 72807f4964dSYang Liu rv_op_vfwcvt_f_f_v = 699, 72907f4964dSYang Liu rv_op_vfwcvt_rtz_xu_f_v = 700, 73007f4964dSYang Liu rv_op_vfwcvt_rtz_x_f_v = 701, 73107f4964dSYang Liu rv_op_vfncvt_xu_f_w = 702, 73207f4964dSYang Liu rv_op_vfncvt_x_f_w = 703, 73307f4964dSYang Liu rv_op_vfncvt_f_xu_w = 704, 73407f4964dSYang Liu rv_op_vfncvt_f_x_w = 705, 73507f4964dSYang Liu rv_op_vfncvt_f_f_w = 706, 73607f4964dSYang Liu rv_op_vfncvt_rod_f_f_w = 707, 73707f4964dSYang Liu rv_op_vfncvt_rtz_xu_f_w = 708, 73807f4964dSYang Liu rv_op_vfncvt_rtz_x_f_w = 709, 73907f4964dSYang Liu rv_op_vredsum_vs = 710, 74007f4964dSYang Liu rv_op_vredand_vs = 711, 74107f4964dSYang Liu rv_op_vredor_vs = 712, 74207f4964dSYang Liu rv_op_vredxor_vs = 713, 74307f4964dSYang Liu rv_op_vredminu_vs = 714, 74407f4964dSYang Liu rv_op_vredmin_vs = 715, 74507f4964dSYang Liu rv_op_vredmaxu_vs = 716, 74607f4964dSYang Liu rv_op_vredmax_vs = 717, 74707f4964dSYang Liu rv_op_vwredsumu_vs = 718, 74807f4964dSYang Liu rv_op_vwredsum_vs = 719, 74907f4964dSYang Liu rv_op_vfredusum_vs = 720, 75007f4964dSYang Liu rv_op_vfredosum_vs = 721, 75107f4964dSYang Liu rv_op_vfredmin_vs = 722, 75207f4964dSYang Liu rv_op_vfredmax_vs = 723, 75307f4964dSYang Liu rv_op_vfwredusum_vs = 724, 75407f4964dSYang Liu rv_op_vfwredosum_vs = 725, 75507f4964dSYang Liu rv_op_vmand_mm = 726, 75607f4964dSYang Liu rv_op_vmnand_mm = 727, 75707f4964dSYang Liu rv_op_vmandn_mm = 728, 75807f4964dSYang Liu rv_op_vmxor_mm = 729, 75907f4964dSYang Liu rv_op_vmor_mm = 730, 76007f4964dSYang Liu rv_op_vmnor_mm = 731, 76107f4964dSYang Liu rv_op_vmorn_mm = 732, 76207f4964dSYang Liu rv_op_vmxnor_mm = 733, 76307f4964dSYang Liu rv_op_vcpop_m = 734, 76407f4964dSYang Liu rv_op_vfirst_m = 735, 76507f4964dSYang Liu rv_op_vmsbf_m = 736, 76607f4964dSYang Liu rv_op_vmsif_m = 737, 76707f4964dSYang Liu rv_op_vmsof_m = 738, 76807f4964dSYang Liu rv_op_viota_m = 739, 76907f4964dSYang Liu rv_op_vid_v = 740, 77007f4964dSYang Liu rv_op_vmv_x_s = 741, 77107f4964dSYang Liu rv_op_vmv_s_x = 742, 77207f4964dSYang Liu rv_op_vfmv_f_s = 743, 77307f4964dSYang Liu rv_op_vfmv_s_f = 744, 77407f4964dSYang Liu rv_op_vslideup_vx = 745, 77507f4964dSYang Liu rv_op_vslideup_vi = 746, 77607f4964dSYang Liu rv_op_vslide1up_vx = 747, 77707f4964dSYang Liu rv_op_vslidedown_vx = 748, 77807f4964dSYang Liu rv_op_vslidedown_vi = 749, 77907f4964dSYang Liu rv_op_vslide1down_vx = 750, 78007f4964dSYang Liu rv_op_vrgather_vv = 751, 78107f4964dSYang Liu rv_op_vrgatherei16_vv = 752, 78207f4964dSYang Liu rv_op_vrgather_vx = 753, 78307f4964dSYang Liu rv_op_vrgather_vi = 754, 78407f4964dSYang Liu rv_op_vcompress_vm = 755, 78507f4964dSYang Liu rv_op_vmv1r_v = 756, 78607f4964dSYang Liu rv_op_vmv2r_v = 757, 78707f4964dSYang Liu rv_op_vmv4r_v = 758, 78807f4964dSYang Liu rv_op_vmv8r_v = 759, 78907f4964dSYang Liu rv_op_vzext_vf2 = 760, 79007f4964dSYang Liu rv_op_vzext_vf4 = 761, 79107f4964dSYang Liu rv_op_vzext_vf8 = 762, 79207f4964dSYang Liu rv_op_vsext_vf2 = 763, 79307f4964dSYang Liu rv_op_vsext_vf4 = 764, 79407f4964dSYang Liu rv_op_vsext_vf8 = 765, 79507f4964dSYang Liu rv_op_vsetvli = 766, 79607f4964dSYang Liu rv_op_vsetivli = 767, 79707f4964dSYang Liu rv_op_vsetvl = 768, 7982c71d02eSWeiwei Li rv_op_c_zext_b = 769, 7992c71d02eSWeiwei Li rv_op_c_sext_b = 770, 8002c71d02eSWeiwei Li rv_op_c_zext_h = 771, 8012c71d02eSWeiwei Li rv_op_c_sext_h = 772, 8022c71d02eSWeiwei Li rv_op_c_zext_w = 773, 8032c71d02eSWeiwei Li rv_op_c_not = 774, 8042c71d02eSWeiwei Li rv_op_c_mul = 775, 8052c71d02eSWeiwei Li rv_op_c_lbu = 776, 8062c71d02eSWeiwei Li rv_op_c_lhu = 777, 8072c71d02eSWeiwei Li rv_op_c_lh = 778, 8082c71d02eSWeiwei Li rv_op_c_sb = 779, 8092c71d02eSWeiwei Li rv_op_c_sh = 780, 8102c71d02eSWeiwei Li rv_op_cm_push = 781, 8112c71d02eSWeiwei Li rv_op_cm_pop = 782, 8122c71d02eSWeiwei Li rv_op_cm_popret = 783, 8132c71d02eSWeiwei Li rv_op_cm_popretz = 784, 8142c71d02eSWeiwei Li rv_op_cm_mva01s = 785, 8152c71d02eSWeiwei Li rv_op_cm_mvsa01 = 786, 8162c71d02eSWeiwei Li rv_op_cm_jt = 787, 8172c71d02eSWeiwei Li rv_op_cm_jalt = 788, 818d397be9aSRichard Henderson rv_op_czero_eqz = 789, 819d397be9aSRichard Henderson rv_op_czero_nez = 790, 820ea103259SMichael Clark } rv_op; 821ea103259SMichael Clark 822ea103259SMichael Clark /* register names */ 823ea103259SMichael Clark 824ea103259SMichael Clark static const char rv_ireg_name_sym[32][5] = { 825ea103259SMichael Clark "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", 826ea103259SMichael Clark "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", 827ea103259SMichael Clark "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", 828ea103259SMichael Clark "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6", 829ea103259SMichael Clark }; 830ea103259SMichael Clark 831ea103259SMichael Clark static const char rv_freg_name_sym[32][5] = { 832ea103259SMichael Clark "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", 833ea103259SMichael Clark "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", 834ea103259SMichael Clark "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", 835ea103259SMichael Clark "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11", 836ea103259SMichael Clark }; 837ea103259SMichael Clark 83807f4964dSYang Liu static const char rv_vreg_name_sym[32][4] = { 83907f4964dSYang Liu "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 84007f4964dSYang Liu "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 84107f4964dSYang Liu "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 84207f4964dSYang Liu "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31" 84307f4964dSYang Liu }; 84407f4964dSYang Liu 845ea103259SMichael Clark /* pseudo-instruction constraints */ 846ea103259SMichael Clark 847ea103259SMichael Clark static const rvc_constraint rvcc_jal[] = { rvc_rd_eq_ra, rvc_end }; 84898624d13SWeiwei Li static const rvc_constraint rvcc_jalr[] = { rvc_rd_eq_ra, rvc_imm_eq_zero, 84998624d13SWeiwei Li rvc_end }; 85098624d13SWeiwei Li static const rvc_constraint rvcc_nop[] = { rvc_rd_eq_x0, rvc_rs1_eq_x0, 85198624d13SWeiwei Li rvc_imm_eq_zero, rvc_end }; 852ea103259SMichael Clark static const rvc_constraint rvcc_mv[] = { rvc_imm_eq_zero, rvc_end }; 853ea103259SMichael Clark static const rvc_constraint rvcc_not[] = { rvc_imm_eq_n1, rvc_end }; 854ea103259SMichael Clark static const rvc_constraint rvcc_neg[] = { rvc_rs1_eq_x0, rvc_end }; 855ea103259SMichael Clark static const rvc_constraint rvcc_negw[] = { rvc_rs1_eq_x0, rvc_end }; 85633b4f859SMichael Clark static const rvc_constraint rvcc_sext_w[] = { rvc_imm_eq_zero, rvc_end }; 857ea103259SMichael Clark static const rvc_constraint rvcc_seqz[] = { rvc_imm_eq_p1, rvc_end }; 858ea103259SMichael Clark static const rvc_constraint rvcc_snez[] = { rvc_rs1_eq_x0, rvc_end }; 859ea103259SMichael Clark static const rvc_constraint rvcc_sltz[] = { rvc_rs2_eq_x0, rvc_end }; 860ea103259SMichael Clark static const rvc_constraint rvcc_sgtz[] = { rvc_rs1_eq_x0, rvc_end }; 861ea103259SMichael Clark static const rvc_constraint rvcc_fmv_s[] = { rvc_rs2_eq_rs1, rvc_end }; 862ea103259SMichael Clark static const rvc_constraint rvcc_fabs_s[] = { rvc_rs2_eq_rs1, rvc_end }; 863ea103259SMichael Clark static const rvc_constraint rvcc_fneg_s[] = { rvc_rs2_eq_rs1, rvc_end }; 864ea103259SMichael Clark static const rvc_constraint rvcc_fmv_d[] = { rvc_rs2_eq_rs1, rvc_end }; 865ea103259SMichael Clark static const rvc_constraint rvcc_fabs_d[] = { rvc_rs2_eq_rs1, rvc_end }; 866ea103259SMichael Clark static const rvc_constraint rvcc_fneg_d[] = { rvc_rs2_eq_rs1, rvc_end }; 867ea103259SMichael Clark static const rvc_constraint rvcc_fmv_q[] = { rvc_rs2_eq_rs1, rvc_end }; 868ea103259SMichael Clark static const rvc_constraint rvcc_fabs_q[] = { rvc_rs2_eq_rs1, rvc_end }; 869ea103259SMichael Clark static const rvc_constraint rvcc_fneg_q[] = { rvc_rs2_eq_rs1, rvc_end }; 870ea103259SMichael Clark static const rvc_constraint rvcc_beqz[] = { rvc_rs2_eq_x0, rvc_end }; 871ea103259SMichael Clark static const rvc_constraint rvcc_bnez[] = { rvc_rs2_eq_x0, rvc_end }; 872ea103259SMichael Clark static const rvc_constraint rvcc_blez[] = { rvc_rs1_eq_x0, rvc_end }; 873ea103259SMichael Clark static const rvc_constraint rvcc_bgez[] = { rvc_rs2_eq_x0, rvc_end }; 874ea103259SMichael Clark static const rvc_constraint rvcc_bltz[] = { rvc_rs2_eq_x0, rvc_end }; 875ea103259SMichael Clark static const rvc_constraint rvcc_bgtz[] = { rvc_rs1_eq_x0, rvc_end }; 876ea103259SMichael Clark static const rvc_constraint rvcc_ble[] = { rvc_end }; 877ea103259SMichael Clark static const rvc_constraint rvcc_bleu[] = { rvc_end }; 878ea103259SMichael Clark static const rvc_constraint rvcc_bgt[] = { rvc_end }; 879ea103259SMichael Clark static const rvc_constraint rvcc_bgtu[] = { rvc_end }; 880ea103259SMichael Clark static const rvc_constraint rvcc_j[] = { rvc_rd_eq_x0, rvc_end }; 88198624d13SWeiwei Li static const rvc_constraint rvcc_ret[] = { rvc_rd_eq_x0, rvc_rs1_eq_ra, 88298624d13SWeiwei Li rvc_end }; 88398624d13SWeiwei Li static const rvc_constraint rvcc_jr[] = { rvc_rd_eq_x0, rvc_imm_eq_zero, 88498624d13SWeiwei Li rvc_end }; 88598624d13SWeiwei Li static const rvc_constraint rvcc_rdcycle[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc00, 88698624d13SWeiwei Li rvc_end }; 88798624d13SWeiwei Li static const rvc_constraint rvcc_rdtime[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc01, 88898624d13SWeiwei Li rvc_end }; 88998624d13SWeiwei Li static const rvc_constraint rvcc_rdinstret[] = { rvc_rs1_eq_x0, 89098624d13SWeiwei Li rvc_csr_eq_0xc02, rvc_end }; 89198624d13SWeiwei Li static const rvc_constraint rvcc_rdcycleh[] = { rvc_rs1_eq_x0, 89298624d13SWeiwei Li rvc_csr_eq_0xc80, rvc_end }; 89398624d13SWeiwei Li static const rvc_constraint rvcc_rdtimeh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc81, 89498624d13SWeiwei Li rvc_end }; 8952e3df911SWladimir J. van der Laan static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0, 8962e3df911SWladimir J. van der Laan rvc_csr_eq_0xc82, rvc_end }; 89798624d13SWeiwei Li static const rvc_constraint rvcc_frcsr[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x003, 89898624d13SWeiwei Li rvc_end }; 89998624d13SWeiwei Li static const rvc_constraint rvcc_frrm[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x002, 90098624d13SWeiwei Li rvc_end }; 90198624d13SWeiwei Li static const rvc_constraint rvcc_frflags[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x001, 90298624d13SWeiwei Li rvc_end }; 903ea103259SMichael Clark static const rvc_constraint rvcc_fscsr[] = { rvc_csr_eq_0x003, rvc_end }; 904ea103259SMichael Clark static const rvc_constraint rvcc_fsrm[] = { rvc_csr_eq_0x002, rvc_end }; 905ea103259SMichael Clark static const rvc_constraint rvcc_fsflags[] = { rvc_csr_eq_0x001, rvc_end }; 906ea103259SMichael Clark static const rvc_constraint rvcc_fsrmi[] = { rvc_csr_eq_0x002, rvc_end }; 907ea103259SMichael Clark static const rvc_constraint rvcc_fsflagsi[] = { rvc_csr_eq_0x001, rvc_end }; 908ea103259SMichael Clark 909ea103259SMichael Clark /* pseudo-instruction metadata */ 910ea103259SMichael Clark 911ea103259SMichael Clark static const rv_comp_data rvcp_jal[] = { 912ea103259SMichael Clark { rv_op_j, rvcc_j }, 913ea103259SMichael Clark { rv_op_jal, rvcc_jal }, 914ea103259SMichael Clark { rv_op_illegal, NULL } 915ea103259SMichael Clark }; 916ea103259SMichael Clark 917ea103259SMichael Clark static const rv_comp_data rvcp_jalr[] = { 918ea103259SMichael Clark { rv_op_ret, rvcc_ret }, 919ea103259SMichael Clark { rv_op_jr, rvcc_jr }, 920ea103259SMichael Clark { rv_op_jalr, rvcc_jalr }, 921ea103259SMichael Clark { rv_op_illegal, NULL } 922ea103259SMichael Clark }; 923ea103259SMichael Clark 924ea103259SMichael Clark static const rv_comp_data rvcp_beq[] = { 925ea103259SMichael Clark { rv_op_beqz, rvcc_beqz }, 926ea103259SMichael Clark { rv_op_illegal, NULL } 927ea103259SMichael Clark }; 928ea103259SMichael Clark 929ea103259SMichael Clark static const rv_comp_data rvcp_bne[] = { 930ea103259SMichael Clark { rv_op_bnez, rvcc_bnez }, 931ea103259SMichael Clark { rv_op_illegal, NULL } 932ea103259SMichael Clark }; 933ea103259SMichael Clark 934ea103259SMichael Clark static const rv_comp_data rvcp_blt[] = { 935ea103259SMichael Clark { rv_op_bltz, rvcc_bltz }, 936ea103259SMichael Clark { rv_op_bgtz, rvcc_bgtz }, 937ea103259SMichael Clark { rv_op_bgt, rvcc_bgt }, 938ea103259SMichael Clark { rv_op_illegal, NULL } 939ea103259SMichael Clark }; 940ea103259SMichael Clark 941ea103259SMichael Clark static const rv_comp_data rvcp_bge[] = { 942ea103259SMichael Clark { rv_op_blez, rvcc_blez }, 943ea103259SMichael Clark { rv_op_bgez, rvcc_bgez }, 944ea103259SMichael Clark { rv_op_ble, rvcc_ble }, 945ea103259SMichael Clark { rv_op_illegal, NULL } 946ea103259SMichael Clark }; 947ea103259SMichael Clark 948ea103259SMichael Clark static const rv_comp_data rvcp_bltu[] = { 949ea103259SMichael Clark { rv_op_bgtu, rvcc_bgtu }, 950ea103259SMichael Clark { rv_op_illegal, NULL } 951ea103259SMichael Clark }; 952ea103259SMichael Clark 953ea103259SMichael Clark static const rv_comp_data rvcp_bgeu[] = { 954ea103259SMichael Clark { rv_op_bleu, rvcc_bleu }, 955ea103259SMichael Clark { rv_op_illegal, NULL } 956ea103259SMichael Clark }; 957ea103259SMichael Clark 958ea103259SMichael Clark static const rv_comp_data rvcp_addi[] = { 959ea103259SMichael Clark { rv_op_nop, rvcc_nop }, 960ea103259SMichael Clark { rv_op_mv, rvcc_mv }, 961ea103259SMichael Clark { rv_op_illegal, NULL } 962ea103259SMichael Clark }; 963ea103259SMichael Clark 964ea103259SMichael Clark static const rv_comp_data rvcp_sltiu[] = { 965ea103259SMichael Clark { rv_op_seqz, rvcc_seqz }, 966ea103259SMichael Clark { rv_op_illegal, NULL } 967ea103259SMichael Clark }; 968ea103259SMichael Clark 969ea103259SMichael Clark static const rv_comp_data rvcp_xori[] = { 970ea103259SMichael Clark { rv_op_not, rvcc_not }, 971ea103259SMichael Clark { rv_op_illegal, NULL } 972ea103259SMichael Clark }; 973ea103259SMichael Clark 974ea103259SMichael Clark static const rv_comp_data rvcp_sub[] = { 975ea103259SMichael Clark { rv_op_neg, rvcc_neg }, 976ea103259SMichael Clark { rv_op_illegal, NULL } 977ea103259SMichael Clark }; 978ea103259SMichael Clark 979ea103259SMichael Clark static const rv_comp_data rvcp_slt[] = { 980ea103259SMichael Clark { rv_op_sltz, rvcc_sltz }, 981ea103259SMichael Clark { rv_op_sgtz, rvcc_sgtz }, 982ea103259SMichael Clark { rv_op_illegal, NULL } 983ea103259SMichael Clark }; 984ea103259SMichael Clark 985ea103259SMichael Clark static const rv_comp_data rvcp_sltu[] = { 986ea103259SMichael Clark { rv_op_snez, rvcc_snez }, 987ea103259SMichael Clark { rv_op_illegal, NULL } 988ea103259SMichael Clark }; 989ea103259SMichael Clark 990ea103259SMichael Clark static const rv_comp_data rvcp_addiw[] = { 991ea103259SMichael Clark { rv_op_sext_w, rvcc_sext_w }, 992ea103259SMichael Clark { rv_op_illegal, NULL } 993ea103259SMichael Clark }; 994ea103259SMichael Clark 995ea103259SMichael Clark static const rv_comp_data rvcp_subw[] = { 996ea103259SMichael Clark { rv_op_negw, rvcc_negw }, 997ea103259SMichael Clark { rv_op_illegal, NULL } 998ea103259SMichael Clark }; 999ea103259SMichael Clark 1000ea103259SMichael Clark static const rv_comp_data rvcp_csrrw[] = { 1001ea103259SMichael Clark { rv_op_fscsr, rvcc_fscsr }, 1002ea103259SMichael Clark { rv_op_fsrm, rvcc_fsrm }, 1003ea103259SMichael Clark { rv_op_fsflags, rvcc_fsflags }, 1004ea103259SMichael Clark { rv_op_illegal, NULL } 1005ea103259SMichael Clark }; 1006ea103259SMichael Clark 10075748c886SWeiwei Li 1008ea103259SMichael Clark static const rv_comp_data rvcp_csrrs[] = { 1009ea103259SMichael Clark { rv_op_rdcycle, rvcc_rdcycle }, 1010ea103259SMichael Clark { rv_op_rdtime, rvcc_rdtime }, 1011ea103259SMichael Clark { rv_op_rdinstret, rvcc_rdinstret }, 1012ea103259SMichael Clark { rv_op_rdcycleh, rvcc_rdcycleh }, 1013ea103259SMichael Clark { rv_op_rdtimeh, rvcc_rdtimeh }, 1014ea103259SMichael Clark { rv_op_rdinstreth, rvcc_rdinstreth }, 1015ea103259SMichael Clark { rv_op_frcsr, rvcc_frcsr }, 1016ea103259SMichael Clark { rv_op_frrm, rvcc_frrm }, 1017ea103259SMichael Clark { rv_op_frflags, rvcc_frflags }, 1018ea103259SMichael Clark { rv_op_illegal, NULL } 1019ea103259SMichael Clark }; 1020ea103259SMichael Clark 1021ea103259SMichael Clark static const rv_comp_data rvcp_csrrwi[] = { 1022ea103259SMichael Clark { rv_op_fsrmi, rvcc_fsrmi }, 1023ea103259SMichael Clark { rv_op_fsflagsi, rvcc_fsflagsi }, 1024ea103259SMichael Clark { rv_op_illegal, NULL } 1025ea103259SMichael Clark }; 1026ea103259SMichael Clark 1027ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_s[] = { 1028ea103259SMichael Clark { rv_op_fmv_s, rvcc_fmv_s }, 1029ea103259SMichael Clark { rv_op_illegal, NULL } 1030ea103259SMichael Clark }; 1031ea103259SMichael Clark 1032ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_s[] = { 1033ea103259SMichael Clark { rv_op_fneg_s, rvcc_fneg_s }, 1034ea103259SMichael Clark { rv_op_illegal, NULL } 1035ea103259SMichael Clark }; 1036ea103259SMichael Clark 1037ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_s[] = { 1038ea103259SMichael Clark { rv_op_fabs_s, rvcc_fabs_s }, 1039ea103259SMichael Clark { rv_op_illegal, NULL } 1040ea103259SMichael Clark }; 1041ea103259SMichael Clark 1042ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_d[] = { 1043ea103259SMichael Clark { rv_op_fmv_d, rvcc_fmv_d }, 1044ea103259SMichael Clark { rv_op_illegal, NULL } 1045ea103259SMichael Clark }; 1046ea103259SMichael Clark 1047ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_d[] = { 1048ea103259SMichael Clark { rv_op_fneg_d, rvcc_fneg_d }, 1049ea103259SMichael Clark { rv_op_illegal, NULL } 1050ea103259SMichael Clark }; 1051ea103259SMichael Clark 1052ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_d[] = { 1053ea103259SMichael Clark { rv_op_fabs_d, rvcc_fabs_d }, 1054ea103259SMichael Clark { rv_op_illegal, NULL } 1055ea103259SMichael Clark }; 1056ea103259SMichael Clark 1057ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_q[] = { 1058ea103259SMichael Clark { rv_op_fmv_q, rvcc_fmv_q }, 1059ea103259SMichael Clark { rv_op_illegal, NULL } 1060ea103259SMichael Clark }; 1061ea103259SMichael Clark 1062ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_q[] = { 1063ea103259SMichael Clark { rv_op_fneg_q, rvcc_fneg_q }, 1064ea103259SMichael Clark { rv_op_illegal, NULL } 1065ea103259SMichael Clark }; 1066ea103259SMichael Clark 1067ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_q[] = { 1068ea103259SMichael Clark { rv_op_fabs_q, rvcc_fabs_q }, 1069ea103259SMichael Clark { rv_op_illegal, NULL } 1070ea103259SMichael Clark }; 1071ea103259SMichael Clark 1072ea103259SMichael Clark /* instruction metadata */ 1073ea103259SMichael Clark 1074fd7c64f6SChristoph Müllner const rv_opcode_data rvi_opcode_data[] = { 1075ea103259SMichael Clark { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, 1076ea103259SMichael Clark { "lui", rv_codec_u, rv_fmt_rd_imm, NULL, 0, 0, 0 }, 1077ea103259SMichael Clark { "auipc", rv_codec_u, rv_fmt_rd_offset, NULL, 0, 0, 0 }, 1078ea103259SMichael Clark { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal, 0, 0, 0 }, 1079ea103259SMichael Clark { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr, 0, 0, 0 }, 1080ea103259SMichael Clark { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq, 0, 0, 0 }, 1081ea103259SMichael Clark { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne, 0, 0, 0 }, 1082ea103259SMichael Clark { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt, 0, 0, 0 }, 1083ea103259SMichael Clark { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge, 0, 0, 0 }, 1084ea103259SMichael Clark { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu, 0, 0, 0 }, 1085ea103259SMichael Clark { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu, 0, 0, 0 }, 1086ea103259SMichael Clark { "lb", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1087ea103259SMichael Clark { "lh", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1088ea103259SMichael Clark { "lw", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1089ea103259SMichael Clark { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1090ea103259SMichael Clark { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1091ea103259SMichael Clark { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1092ea103259SMichael Clark { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1093ea103259SMichael Clark { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1094ea103259SMichael Clark { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi, 0, 0, 0 }, 1095ea103259SMichael Clark { "slti", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1096ea103259SMichael Clark { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu, 0, 0, 0 }, 1097ea103259SMichael Clark { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori, 0, 0, 0 }, 1098ea103259SMichael Clark { "ori", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1099ea103259SMichael Clark { "andi", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1100ea103259SMichael Clark { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1101ea103259SMichael Clark { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1102ea103259SMichael Clark { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1103ea103259SMichael Clark { "add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1104ea103259SMichael Clark { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub, 0, 0, 0 }, 1105ea103259SMichael Clark { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1106ea103259SMichael Clark { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt, 0, 0, 0 }, 1107ea103259SMichael Clark { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu, 0, 0, 0 }, 1108ea103259SMichael Clark { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1109ea103259SMichael Clark { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1110ea103259SMichael Clark { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1111ea103259SMichael Clark { "or", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1112ea103259SMichael Clark { "and", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1113ea103259SMichael Clark { "fence", rv_codec_r_f, rv_fmt_pred_succ, NULL, 0, 0, 0 }, 1114ea103259SMichael Clark { "fence.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1115ea103259SMichael Clark { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1116ea103259SMichael Clark { "ld", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1117ea103259SMichael Clark { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1118ea103259SMichael Clark { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw, 0, 0, 0 }, 1119ea103259SMichael Clark { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1120ea103259SMichael Clark { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1121ea103259SMichael Clark { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1122ea103259SMichael Clark { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1123ea103259SMichael Clark { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw, 0, 0, 0 }, 1124ea103259SMichael Clark { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1125ea103259SMichael Clark { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1126ea103259SMichael Clark { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1127ea103259SMichael Clark { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1128ea103259SMichael Clark { "lq", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1129ea103259SMichael Clark { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1130ea103259SMichael Clark { "addid", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1131ea103259SMichael Clark { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1132ea103259SMichael Clark { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1133ea103259SMichael Clark { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1134ea103259SMichael Clark { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1135ea103259SMichael Clark { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1136ea103259SMichael Clark { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1137ea103259SMichael Clark { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1138ea103259SMichael Clark { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1139ea103259SMichael Clark { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1140ea103259SMichael Clark { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1141ea103259SMichael Clark { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1142ea103259SMichael Clark { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1143ea103259SMichael Clark { "div", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1144ea103259SMichael Clark { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1145ea103259SMichael Clark { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1146ea103259SMichael Clark { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1147ea103259SMichael Clark { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1148ea103259SMichael Clark { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1149ea103259SMichael Clark { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1150ea103259SMichael Clark { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1151ea103259SMichael Clark { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1152ea103259SMichael Clark { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1153ea103259SMichael Clark { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1154ea103259SMichael Clark { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1155ea103259SMichael Clark { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1156ea103259SMichael Clark { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1157ea103259SMichael Clark { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1158ea103259SMichael Clark { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1159ea103259SMichael Clark { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1160ea103259SMichael Clark { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1161ea103259SMichael Clark { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1162ea103259SMichael Clark { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1163ea103259SMichael Clark { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1164ea103259SMichael Clark { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1165ea103259SMichael Clark { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1166ea103259SMichael Clark { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1167ea103259SMichael Clark { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1168ea103259SMichael Clark { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1169ea103259SMichael Clark { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1170ea103259SMichael Clark { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1171ea103259SMichael Clark { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1172ea103259SMichael Clark { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1173ea103259SMichael Clark { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1174ea103259SMichael Clark { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1175ea103259SMichael Clark { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1176ea103259SMichael Clark { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1177ea103259SMichael Clark { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1178ea103259SMichael Clark { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1179ea103259SMichael Clark { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1180ea103259SMichael Clark { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1181ea103259SMichael Clark { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1182ea103259SMichael Clark { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1183ea103259SMichael Clark { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1184ea103259SMichael Clark { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1185ea103259SMichael Clark { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1186ea103259SMichael Clark { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1187ea103259SMichael Clark { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1188ea103259SMichael Clark { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1189ea103259SMichael Clark { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1190ea103259SMichael Clark { "ecall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1191ea103259SMichael Clark { "ebreak", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1192ea103259SMichael Clark { "uret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1193ea103259SMichael Clark { "sret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1194ea103259SMichael Clark { "hret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1195ea103259SMichael Clark { "mret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1196ea103259SMichael Clark { "dret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1197ea103259SMichael Clark { "sfence.vm", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, 1198ea103259SMichael Clark { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 }, 1199ea103259SMichael Clark { "wfi", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1200ea103259SMichael Clark { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw, 0, 0, 0 }, 1201ea103259SMichael Clark { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs, 0, 0, 0 }, 1202ea103259SMichael Clark { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1, NULL, 0, 0, 0 }, 1203ea103259SMichael Clark { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi, 0, 0, 0 }, 1204ea103259SMichael Clark { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, 1205ea103259SMichael Clark { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, 1206ea103259SMichael Clark { "flw", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1207ea103259SMichael Clark { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1208ea103259SMichael Clark { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1209ea103259SMichael Clark { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1210ea103259SMichael Clark { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1211ea103259SMichael Clark { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1212ea103259SMichael Clark { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1213ea103259SMichael Clark { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1214ea103259SMichael Clark { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1215ea103259SMichael Clark { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1216ea103259SMichael Clark { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s, 0, 0, 0 }, 1217ea103259SMichael Clark { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s, 0, 0, 0 }, 1218ea103259SMichael Clark { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s, 0, 0, 0 }, 1219ea103259SMichael Clark { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1220ea103259SMichael Clark { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1221ea103259SMichael Clark { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1222ea103259SMichael Clark { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1223ea103259SMichael Clark { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1224ea103259SMichael Clark { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1225ea103259SMichael Clark { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1226ea103259SMichael Clark { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1227ea103259SMichael Clark { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1228ea103259SMichael Clark { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1229ea103259SMichael Clark { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1230ea103259SMichael Clark { "fclass.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1231ea103259SMichael Clark { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1232ea103259SMichael Clark { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1233ea103259SMichael Clark { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1234ea103259SMichael Clark { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1235ea103259SMichael Clark { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1236ea103259SMichael Clark { "fld", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1237ea103259SMichael Clark { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1238ea103259SMichael Clark { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1239ea103259SMichael Clark { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1240ea103259SMichael Clark { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1241ea103259SMichael Clark { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1242ea103259SMichael Clark { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1243ea103259SMichael Clark { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1244ea103259SMichael Clark { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1245ea103259SMichael Clark { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1246ea103259SMichael Clark { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d, 0, 0, 0 }, 1247ea103259SMichael Clark { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d, 0, 0, 0 }, 1248ea103259SMichael Clark { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d, 0, 0, 0 }, 1249ea103259SMichael Clark { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1250ea103259SMichael Clark { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1251ea103259SMichael Clark { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1252ea103259SMichael Clark { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1253ea103259SMichael Clark { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1254ea103259SMichael Clark { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1255ea103259SMichael Clark { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1256ea103259SMichael Clark { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1257ea103259SMichael Clark { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1258ea103259SMichael Clark { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1259ea103259SMichael Clark { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1260ea103259SMichael Clark { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1261ea103259SMichael Clark { "fclass.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1262ea103259SMichael Clark { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1263ea103259SMichael Clark { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1264ea103259SMichael Clark { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1265ea103259SMichael Clark { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1266ea103259SMichael Clark { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1267ea103259SMichael Clark { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1268ea103259SMichael Clark { "flq", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1269ea103259SMichael Clark { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1270ea103259SMichael Clark { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1271ea103259SMichael Clark { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1272ea103259SMichael Clark { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1273ea103259SMichael Clark { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1274ea103259SMichael Clark { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1275ea103259SMichael Clark { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1276ea103259SMichael Clark { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1277ea103259SMichael Clark { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1278ea103259SMichael Clark { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q, 0, 0, 0 }, 1279ea103259SMichael Clark { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q, 0, 0, 0 }, 1280ea103259SMichael Clark { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q, 0, 0, 0 }, 1281ea103259SMichael Clark { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1282ea103259SMichael Clark { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1283ea103259SMichael Clark { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1284ea103259SMichael Clark { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1285ea103259SMichael Clark { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1286ea103259SMichael Clark { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1287ea103259SMichael Clark { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1288ea103259SMichael Clark { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1289ea103259SMichael Clark { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1290ea103259SMichael Clark { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1291ea103259SMichael Clark { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1292ea103259SMichael Clark { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1293ea103259SMichael Clark { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1294ea103259SMichael Clark { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1295ea103259SMichael Clark { "fclass.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1296ea103259SMichael Clark { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1297ea103259SMichael Clark { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1298ea103259SMichael Clark { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1299ea103259SMichael Clark { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1300ea103259SMichael Clark { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1301ea103259SMichael Clark { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1302f88222daSMichael Clark { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, 1303f88222daSMichael Clark rv_op_addi, rv_op_addi, rvcd_imm_nz }, 130498624d13SWeiwei Li { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, 130598624d13SWeiwei Li rv_op_fld, 0 }, 130698624d13SWeiwei Li { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_lw, 130798624d13SWeiwei Li rv_op_lw }, 1308ea103259SMichael Clark { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 0 }, 130998624d13SWeiwei Li { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd, 131098624d13SWeiwei Li rv_op_fsd, 0 }, 131198624d13SWeiwei Li { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op_sw, 131298624d13SWeiwei Li rv_op_sw }, 1313ea103259SMichael Clark { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 0 }, 131498624d13SWeiwei Li { "c.nop", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_addi, rv_op_addi, 131598624d13SWeiwei Li rv_op_addi }, 1316f88222daSMichael Clark { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi, 1317f88222daSMichael Clark rv_op_addi, rvcd_imm_nz }, 1318ea103259SMichael Clark { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 }, 131998624d13SWeiwei Li { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi, 132098624d13SWeiwei Li rv_op_addi }, 1321f88222daSMichael Clark { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, 1322f88222daSMichael Clark rv_op_addi, rv_op_addi, rvcd_imm_nz }, 1323f88222daSMichael Clark { "c.lui", rv_codec_ci_lui, rv_fmt_rd_imm, NULL, rv_op_lui, rv_op_lui, 1324f88222daSMichael Clark rv_op_lui, rvcd_imm_nz }, 1325f88222daSMichael Clark { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli, 1326f88222daSMichael Clark rv_op_srli, rv_op_srli, rvcd_imm_nz }, 1327f88222daSMichael Clark { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai, 1328f88222daSMichael Clark rv_op_srai, rv_op_srai, rvcd_imm_nz }, 1329f88222daSMichael Clark { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi, 13302e3df911SWladimir J. van der Laan rv_op_andi, rv_op_andi }, 133198624d13SWeiwei Li { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub, 133298624d13SWeiwei Li rv_op_sub }, 133398624d13SWeiwei Li { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor, rv_op_xor, 133498624d13SWeiwei Li rv_op_xor }, 133598624d13SWeiwei Li { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or, rv_op_or, 133698624d13SWeiwei Li rv_op_or }, 133798624d13SWeiwei Li { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and, rv_op_and, 133898624d13SWeiwei Li rv_op_and }, 133998624d13SWeiwei Li { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw, rv_op_subw, 134098624d13SWeiwei Li rv_op_subw }, 134198624d13SWeiwei Li { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw, rv_op_addw, 134298624d13SWeiwei Li rv_op_addw }, 134398624d13SWeiwei Li { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal, rv_op_jal, 134498624d13SWeiwei Li rv_op_jal }, 134598624d13SWeiwei Li { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq, rv_op_beq, 134698624d13SWeiwei Li rv_op_beq }, 134798624d13SWeiwei Li { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op_bne, 134898624d13SWeiwei Li rv_op_bne }, 1349f88222daSMichael Clark { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli, 1350f88222daSMichael Clark rv_op_slli, rv_op_slli, rvcd_imm_nz }, 135198624d13SWeiwei Li { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, 135298624d13SWeiwei Li rv_op_fld, rv_op_fld }, 135398624d13SWeiwei Li { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, 135498624d13SWeiwei Li rv_op_lw, rv_op_lw }, 135598624d13SWeiwei Li { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 135698624d13SWeiwei Li 0 }, 135798624d13SWeiwei Li { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, 135898624d13SWeiwei Li rv_op_jalr, rv_op_jalr }, 135998624d13SWeiwei Li { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi, rv_op_addi, 136098624d13SWeiwei Li rv_op_addi }, 136198624d13SWeiwei Li { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak, 136298624d13SWeiwei Li rv_op_ebreak, rv_op_ebreak }, 136398624d13SWeiwei Li { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, 136498624d13SWeiwei Li rv_op_jalr, rv_op_jalr }, 136598624d13SWeiwei Li { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add, rv_op_add, 136698624d13SWeiwei Li rv_op_add }, 136798624d13SWeiwei Li { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd, 136898624d13SWeiwei Li rv_op_fsd, rv_op_fsd }, 136998624d13SWeiwei Li { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, 137098624d13SWeiwei Li rv_op_sw, rv_op_sw }, 137198624d13SWeiwei Li { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 137298624d13SWeiwei Li 0 }, 137398624d13SWeiwei Li { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, 137498624d13SWeiwei Li rv_op_ld }, 137598624d13SWeiwei Li { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd, 137698624d13SWeiwei Li rv_op_sd }, 137798624d13SWeiwei Li { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, 0, rv_op_addiw, 137898624d13SWeiwei Li rv_op_addiw }, 137998624d13SWeiwei Li { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, 138098624d13SWeiwei Li rv_op_ld }, 138198624d13SWeiwei Li { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd, 138298624d13SWeiwei Li rv_op_sd }, 1383ea103259SMichael Clark { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq }, 1384ea103259SMichael Clark { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq }, 1385ea103259SMichael Clark { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq }, 138698624d13SWeiwei Li { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 138798624d13SWeiwei Li rv_op_sq }, 1388ea103259SMichael Clark { "nop", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, 1389ea103259SMichael Clark { "mv", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1390ea103259SMichael Clark { "not", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1391ea103259SMichael Clark { "neg", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1392ea103259SMichael Clark { "negw", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1393ea103259SMichael Clark { "sext.w", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1394ea103259SMichael Clark { "seqz", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1395ea103259SMichael Clark { "snez", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1396ea103259SMichael Clark { "sltz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1397ea103259SMichael Clark { "sgtz", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 13980d581506SMikhail Tyutin { "fmv.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 13990d581506SMikhail Tyutin { "fabs.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14000d581506SMikhail Tyutin { "fneg.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14010d581506SMikhail Tyutin { "fmv.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14020d581506SMikhail Tyutin { "fabs.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14030d581506SMikhail Tyutin { "fneg.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14040d581506SMikhail Tyutin { "fmv.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14050d581506SMikhail Tyutin { "fabs.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14060d581506SMikhail Tyutin { "fneg.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 1407ea103259SMichael Clark { "beqz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1408ea103259SMichael Clark { "bnez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1409ea103259SMichael Clark { "blez", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, 1410ea103259SMichael Clark { "bgez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1411ea103259SMichael Clark { "bltz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1412ea103259SMichael Clark { "bgtz", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, 1413ea103259SMichael Clark { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1414ea103259SMichael Clark { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1415ea103259SMichael Clark { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1416ea103259SMichael Clark { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1417ea103259SMichael Clark { "j", rv_codec_uj, rv_fmt_offset, NULL, 0, 0, 0 }, 1418ea103259SMichael Clark { "ret", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, 1419ea103259SMichael Clark { "jr", rv_codec_i, rv_fmt_rs1, NULL, 0, 0, 0 }, 1420ea103259SMichael Clark { "rdcycle", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1421ea103259SMichael Clark { "rdtime", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1422ea103259SMichael Clark { "rdinstret", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1423ea103259SMichael Clark { "rdcycleh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1424ea103259SMichael Clark { "rdtimeh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1425ea103259SMichael Clark { "rdinstreth", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1426ea103259SMichael Clark { "frcsr", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1427ea103259SMichael Clark { "frrm", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1428ea103259SMichael Clark { "frflags", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1429ea103259SMichael Clark { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1430ea103259SMichael Clark { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1431ea103259SMichael Clark { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1432ea103259SMichael Clark { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, 1433ea103259SMichael Clark { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, 143402c1b569SPhilipp Tomsich { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143502c1b569SPhilipp Tomsich { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143602c1b569SPhilipp Tomsich { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143702c1b569SPhilipp Tomsich { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143802c1b569SPhilipp Tomsich { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143902c1b569SPhilipp Tomsich { "clz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144002c1b569SPhilipp Tomsich { "ctz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144102c1b569SPhilipp Tomsich { "cpop", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144202c1b569SPhilipp Tomsich { "sext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144302c1b569SPhilipp Tomsich { "sext.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 14443de1fb71SPhilipp Tomsich { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14453de1fb71SPhilipp Tomsich { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14463de1fb71SPhilipp Tomsich { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 144702c1b569SPhilipp Tomsich { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 144802c1b569SPhilipp Tomsich { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 144902c1b569SPhilipp Tomsich { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145002c1b569SPhilipp Tomsich { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145102c1b569SPhilipp Tomsich { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145202c1b569SPhilipp Tomsich { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145302c1b569SPhilipp Tomsich { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145402c1b569SPhilipp Tomsich { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145502c1b569SPhilipp Tomsich { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145602c1b569SPhilipp Tomsich { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145702c1b569SPhilipp Tomsich { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145802c1b569SPhilipp Tomsich { "min", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145902c1b569SPhilipp Tomsich { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146002c1b569SPhilipp Tomsich { "max", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146102c1b569SPhilipp Tomsich { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146202c1b569SPhilipp Tomsich { "clzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146327062902SIvan Klokov { "ctzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146402c1b569SPhilipp Tomsich { "cpopw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146513e269f6SIvan Klokov { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 146602c1b569SPhilipp Tomsich { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146702c1b569SPhilipp Tomsich { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146802c1b569SPhilipp Tomsich { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146902c1b569SPhilipp Tomsich { "rev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147002c1b569SPhilipp Tomsich { "zext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147102c1b569SPhilipp Tomsich { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 147202c1b569SPhilipp Tomsich { "orc.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147302c1b569SPhilipp Tomsich { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147402c1b569SPhilipp Tomsich { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147502c1b569SPhilipp Tomsich { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147602c1b569SPhilipp Tomsich { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14775748c886SWeiwei Li { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14785748c886SWeiwei Li { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14795748c886SWeiwei Li { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14805748c886SWeiwei Li { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14815748c886SWeiwei Li { "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum, NULL, 0, 0, 0 }, 14825748c886SWeiwei Li { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14835748c886SWeiwei Li { "aes64im", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14845748c886SWeiwei Li { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14855748c886SWeiwei Li { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14865748c886SWeiwei Li { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14875748c886SWeiwei Li { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14885748c886SWeiwei Li { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14895748c886SWeiwei Li { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14905748c886SWeiwei Li { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14915748c886SWeiwei Li { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14925748c886SWeiwei Li { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14935748c886SWeiwei Li { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14945748c886SWeiwei Li { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14955748c886SWeiwei Li { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14965748c886SWeiwei Li { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14975748c886SWeiwei Li { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14985748c886SWeiwei Li { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14995748c886SWeiwei Li { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15005748c886SWeiwei Li { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15015748c886SWeiwei Li { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15025748c886SWeiwei Li { "sm3p0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 15035748c886SWeiwei Li { "sm3p1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 15045748c886SWeiwei Li { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 15055748c886SWeiwei Li { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 15065748c886SWeiwei Li { "brev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15075748c886SWeiwei Li { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15085748c886SWeiwei Li { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15095748c886SWeiwei Li { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15105748c886SWeiwei Li { "unzip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15115748c886SWeiwei Li { "zip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15125748c886SWeiwei Li { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 151307f4964dSYang Liu { "xperm8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15148deb4756SWeiwei Li { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15158deb4756SWeiwei Li { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15168deb4756SWeiwei Li { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15178deb4756SWeiwei Li { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15188deb4756SWeiwei Li { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15198deb4756SWeiwei Li { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15208deb4756SWeiwei Li { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15218deb4756SWeiwei Li { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15228deb4756SWeiwei Li { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15238deb4756SWeiwei Li { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15248deb4756SWeiwei Li { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15258deb4756SWeiwei Li { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15268deb4756SWeiwei Li { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15278deb4756SWeiwei Li { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15288deb4756SWeiwei Li { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15298deb4756SWeiwei Li { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15308deb4756SWeiwei Li { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15318deb4756SWeiwei Li { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15328deb4756SWeiwei Li { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15338deb4756SWeiwei Li { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15348deb4756SWeiwei Li { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15358deb4756SWeiwei Li { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15368deb4756SWeiwei Li { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15378deb4756SWeiwei Li { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15388deb4756SWeiwei Li { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15398deb4756SWeiwei Li { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15408deb4756SWeiwei Li { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15418deb4756SWeiwei Li { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15428deb4756SWeiwei Li { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15438deb4756SWeiwei Li { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15448deb4756SWeiwei Li { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15458deb4756SWeiwei Li { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15468deb4756SWeiwei Li { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15478deb4756SWeiwei Li { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15488deb4756SWeiwei Li { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15498deb4756SWeiwei Li { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15508deb4756SWeiwei Li { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15518deb4756SWeiwei Li { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15528deb4756SWeiwei Li { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15538deb4756SWeiwei Li { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15548deb4756SWeiwei Li { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15558deb4756SWeiwei Li { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15568deb4756SWeiwei Li { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15578deb4756SWeiwei Li { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15588deb4756SWeiwei Li { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15598deb4756SWeiwei Li { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15608deb4756SWeiwei Li { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15618deb4756SWeiwei Li { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15628deb4756SWeiwei Li { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15638deb4756SWeiwei Li { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15648deb4756SWeiwei Li { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15658deb4756SWeiwei Li { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15668deb4756SWeiwei Li { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15678deb4756SWeiwei Li { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15688deb4756SWeiwei Li { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15698deb4756SWeiwei Li { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15708deb4756SWeiwei Li { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15718deb4756SWeiwei Li { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15728deb4756SWeiwei Li { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15738deb4756SWeiwei Li { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15748deb4756SWeiwei Li { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 15758deb4756SWeiwei Li { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15768deb4756SWeiwei Li { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15778deb4756SWeiwei Li { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15788deb4756SWeiwei Li { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 15798deb4756SWeiwei Li { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15808deb4756SWeiwei Li { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15818deb4756SWeiwei Li { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15828deb4756SWeiwei Li { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15838deb4756SWeiwei Li { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15848deb4756SWeiwei Li { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15858deb4756SWeiwei Li { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15868deb4756SWeiwei Li { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15878deb4756SWeiwei Li { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15888deb4756SWeiwei Li { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15898deb4756SWeiwei Li { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15908deb4756SWeiwei Li { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15918deb4756SWeiwei Li { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15928deb4756SWeiwei Li { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15938deb4756SWeiwei Li { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15948deb4756SWeiwei Li { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15958deb4756SWeiwei Li { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 15968deb4756SWeiwei Li { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 15978deb4756SWeiwei Li { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 15988deb4756SWeiwei Li { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 15998deb4756SWeiwei Li { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16008deb4756SWeiwei Li { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 16018deb4756SWeiwei Li { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16028deb4756SWeiwei Li { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16038deb4756SWeiwei Li { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16048deb4756SWeiwei Li { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16058deb4756SWeiwei Li { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16068deb4756SWeiwei Li { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16078deb4756SWeiwei Li { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16088deb4756SWeiwei Li { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16098deb4756SWeiwei Li { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16108deb4756SWeiwei Li { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16118deb4756SWeiwei Li { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16128deb4756SWeiwei Li { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16138deb4756SWeiwei Li { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16148deb4756SWeiwei Li { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16158deb4756SWeiwei Li { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16168deb4756SWeiwei Li { "vsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16178deb4756SWeiwei Li { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16188deb4756SWeiwei Li { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16198deb4756SWeiwei Li { "vsrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16208deb4756SWeiwei Li { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16218deb4756SWeiwei Li { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16228deb4756SWeiwei Li { "vsra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16238deb4756SWeiwei Li { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16248deb4756SWeiwei Li { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16258deb4756SWeiwei Li { "vnsrl.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16268deb4756SWeiwei Li { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16278deb4756SWeiwei Li { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16288deb4756SWeiwei Li { "vnsra.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16298deb4756SWeiwei Li { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16308deb4756SWeiwei Li { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16318deb4756SWeiwei Li { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16328deb4756SWeiwei Li { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16338deb4756SWeiwei Li { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16348deb4756SWeiwei Li { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16358deb4756SWeiwei Li { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16368deb4756SWeiwei Li { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16378deb4756SWeiwei Li { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16388deb4756SWeiwei Li { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16398deb4756SWeiwei Li { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16408deb4756SWeiwei Li { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16418deb4756SWeiwei Li { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16428deb4756SWeiwei Li { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16438deb4756SWeiwei Li { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16448deb4756SWeiwei Li { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16458deb4756SWeiwei Li { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16468deb4756SWeiwei Li { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16478deb4756SWeiwei Li { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16488deb4756SWeiwei Li { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16498deb4756SWeiwei Li { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16508deb4756SWeiwei Li { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16518deb4756SWeiwei Li { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16528deb4756SWeiwei Li { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16538deb4756SWeiwei Li { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16548deb4756SWeiwei Li { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16558deb4756SWeiwei Li { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16568deb4756SWeiwei Li { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16578deb4756SWeiwei Li { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16588deb4756SWeiwei Li { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16598deb4756SWeiwei Li { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16608deb4756SWeiwei Li { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16618deb4756SWeiwei Li { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16628deb4756SWeiwei Li { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16638deb4756SWeiwei Li { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16648deb4756SWeiwei Li { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16658deb4756SWeiwei Li { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16668deb4756SWeiwei Li { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16678deb4756SWeiwei Li { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16688deb4756SWeiwei Li { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16698deb4756SWeiwei Li { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16708deb4756SWeiwei Li { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16718deb4756SWeiwei Li { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16728deb4756SWeiwei Li { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16738deb4756SWeiwei Li { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16748deb4756SWeiwei Li { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16758deb4756SWeiwei Li { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16768deb4756SWeiwei Li { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16778deb4756SWeiwei Li { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16788deb4756SWeiwei Li { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16798deb4756SWeiwei Li { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16808deb4756SWeiwei Li { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16818deb4756SWeiwei Li { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16828deb4756SWeiwei Li { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16838deb4756SWeiwei Li { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16848deb4756SWeiwei Li { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16858deb4756SWeiwei Li { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16868deb4756SWeiwei Li { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16878deb4756SWeiwei Li { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16888deb4756SWeiwei Li { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16898deb4756SWeiwei Li { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16908deb4756SWeiwei Li { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16918deb4756SWeiwei Li { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16928deb4756SWeiwei Li { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16938deb4756SWeiwei Li { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16948deb4756SWeiwei Li { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1, NULL, 0, 0, 0 }, 16958deb4756SWeiwei Li { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, 16968deb4756SWeiwei Li { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm, NULL, 0, 0, 0 }, 16978deb4756SWeiwei Li { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16988deb4756SWeiwei Li { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16998deb4756SWeiwei Li { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 17008deb4756SWeiwei Li { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17018deb4756SWeiwei Li { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17028deb4756SWeiwei Li { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 17038deb4756SWeiwei Li { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17048deb4756SWeiwei Li { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17058deb4756SWeiwei Li { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 17068deb4756SWeiwei Li { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17078deb4756SWeiwei Li { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17088deb4756SWeiwei Li { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17098deb4756SWeiwei Li { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17108deb4756SWeiwei Li { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17118deb4756SWeiwei Li { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17128deb4756SWeiwei Li { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17138deb4756SWeiwei Li { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17148deb4756SWeiwei Li { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17158deb4756SWeiwei Li { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17168deb4756SWeiwei Li { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17178deb4756SWeiwei Li { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17188deb4756SWeiwei Li { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17198deb4756SWeiwei Li { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17208deb4756SWeiwei Li { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17218deb4756SWeiwei Li { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17228deb4756SWeiwei Li { "vssrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 17238deb4756SWeiwei Li { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17248deb4756SWeiwei Li { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17258deb4756SWeiwei Li { "vssra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 17268deb4756SWeiwei Li { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17278deb4756SWeiwei Li { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17288deb4756SWeiwei Li { "vnclipu.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 17298deb4756SWeiwei Li { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17308deb4756SWeiwei Li { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17318deb4756SWeiwei Li { "vnclip.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 17328deb4756SWeiwei Li { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17338deb4756SWeiwei Li { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17348deb4756SWeiwei Li { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17358deb4756SWeiwei Li { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17368deb4756SWeiwei Li { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17378deb4756SWeiwei Li { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17388deb4756SWeiwei Li { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17398deb4756SWeiwei Li { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17408deb4756SWeiwei Li { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17418deb4756SWeiwei Li { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17428deb4756SWeiwei Li { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17438deb4756SWeiwei Li { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17448deb4756SWeiwei Li { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17458deb4756SWeiwei Li { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17468deb4756SWeiwei Li { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17478deb4756SWeiwei Li { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17488deb4756SWeiwei Li { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17498deb4756SWeiwei Li { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17508deb4756SWeiwei Li { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17518deb4756SWeiwei Li { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17528deb4756SWeiwei Li { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17538deb4756SWeiwei Li { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17548deb4756SWeiwei Li { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17558deb4756SWeiwei Li { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17568deb4756SWeiwei Li { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17578deb4756SWeiwei Li { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17588deb4756SWeiwei Li { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17598deb4756SWeiwei Li { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17608deb4756SWeiwei Li { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17618deb4756SWeiwei Li { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17628deb4756SWeiwei Li { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17638deb4756SWeiwei Li { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17648deb4756SWeiwei Li { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17658deb4756SWeiwei Li { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17668deb4756SWeiwei Li { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17678deb4756SWeiwei Li { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17688deb4756SWeiwei Li { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17698deb4756SWeiwei Li { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17708deb4756SWeiwei Li { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17718deb4756SWeiwei Li { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17728deb4756SWeiwei Li { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17738deb4756SWeiwei Li { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17748deb4756SWeiwei Li { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 17758deb4756SWeiwei Li { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, 17768deb4756SWeiwei Li { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 17778deb4756SWeiwei Li { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 17788deb4756SWeiwei Li { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 17798deb4756SWeiwei Li { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17808deb4756SWeiwei Li { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17818deb4756SWeiwei Li { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17828deb4756SWeiwei Li { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17838deb4756SWeiwei Li { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17848deb4756SWeiwei Li { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17858deb4756SWeiwei Li { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17868deb4756SWeiwei Li { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17878deb4756SWeiwei Li { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17888deb4756SWeiwei Li { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17898deb4756SWeiwei Li { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17908deb4756SWeiwei Li { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17918deb4756SWeiwei Li { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17928deb4756SWeiwei Li { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17938deb4756SWeiwei Li { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17948deb4756SWeiwei Li { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17958deb4756SWeiwei Li { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17968deb4756SWeiwei Li { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17978deb4756SWeiwei Li { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17988deb4756SWeiwei Li { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17998deb4756SWeiwei Li { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 18008deb4756SWeiwei Li { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 18018deb4756SWeiwei Li { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18028deb4756SWeiwei Li { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl, NULL, 0, 0, 0 }, 18038deb4756SWeiwei Li { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, 18048deb4756SWeiwei Li { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18058deb4756SWeiwei Li { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18068deb4756SWeiwei Li { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18078deb4756SWeiwei Li { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18088deb4756SWeiwei Li { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18098deb4756SWeiwei Li { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18108deb4756SWeiwei Li { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18118deb4756SWeiwei Li { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18128deb4756SWeiwei Li { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18138deb4756SWeiwei Li { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18148deb4756SWeiwei Li { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18158deb4756SWeiwei Li { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18168deb4756SWeiwei Li { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18178deb4756SWeiwei Li { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18188deb4756SWeiwei Li { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18198deb4756SWeiwei Li { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18208deb4756SWeiwei Li { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18218deb4756SWeiwei Li { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18228deb4756SWeiwei Li { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18238deb4756SWeiwei Li { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18248deb4756SWeiwei Li { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18258deb4756SWeiwei Li { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18268deb4756SWeiwei Li { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18278deb4756SWeiwei Li { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18288deb4756SWeiwei Li { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18298deb4756SWeiwei Li { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18308deb4756SWeiwei Li { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18318deb4756SWeiwei Li { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18328deb4756SWeiwei Li { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18338deb4756SWeiwei Li { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18348deb4756SWeiwei Li { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18358deb4756SWeiwei Li { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18368deb4756SWeiwei Li { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18378deb4756SWeiwei Li { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18388deb4756SWeiwei Li { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18398deb4756SWeiwei Li { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18408deb4756SWeiwei Li { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18418deb4756SWeiwei Li { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18428deb4756SWeiwei Li { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18438deb4756SWeiwei Li { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18448deb4756SWeiwei Li { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18458deb4756SWeiwei Li { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18468deb4756SWeiwei Li { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18478deb4756SWeiwei Li { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18488deb4756SWeiwei Li { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18498deb4756SWeiwei Li { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, 18508deb4756SWeiwei Li { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, 18518deb4756SWeiwei Li { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18528deb4756SWeiwei Li { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18538deb4756SWeiwei Li { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18548deb4756SWeiwei Li { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18558deb4756SWeiwei Li { "vid.v", rv_codec_v_r, rv_fmt_vd_vm, NULL, 0, 0, 0 }, 18568deb4756SWeiwei Li { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2, NULL, 0, 0, 0 }, 18578deb4756SWeiwei Li { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, 18588deb4756SWeiwei Li { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 }, 18598deb4756SWeiwei Li { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, 18608deb4756SWeiwei Li { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18618deb4756SWeiwei Li { "vslideup.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18628deb4756SWeiwei Li { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18638deb4756SWeiwei Li { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18648deb4756SWeiwei Li { "vslidedown.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18658deb4756SWeiwei Li { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18668deb4756SWeiwei Li { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18678deb4756SWeiwei Li { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18688deb4756SWeiwei Li { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18698deb4756SWeiwei Li { "vrgather.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18708deb4756SWeiwei Li { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, 18718deb4756SWeiwei Li { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18728deb4756SWeiwei Li { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18738deb4756SWeiwei Li { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18748deb4756SWeiwei Li { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18758deb4756SWeiwei Li { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18768deb4756SWeiwei Li { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18778deb4756SWeiwei Li { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18788deb4756SWeiwei Li { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18798deb4756SWeiwei Li { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18808deb4756SWeiwei Li { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18818deb4756SWeiwei Li { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli, NULL, 0, 0, 0 }, 18828deb4756SWeiwei Li { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli, NULL, 0, 0, 0 }, 18838deb4756SWeiwei Li { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 18842c71d02eSWeiwei Li { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18852c71d02eSWeiwei Li { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18862c71d02eSWeiwei Li { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18872c71d02eSWeiwei Li { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18882c71d02eSWeiwei Li { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18892c71d02eSWeiwei Li { "c.not", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18902c71d02eSWeiwei Li { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2, NULL, 0, 0 }, 18912c71d02eSWeiwei Li { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18922c71d02eSWeiwei Li { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18932c71d02eSWeiwei Li { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18942c71d02eSWeiwei Li { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18952c71d02eSWeiwei Li { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18962c71d02eSWeiwei Li { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist, NULL, 0, 0 }, 18972c71d02eSWeiwei Li { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 }, 18982c71d02eSWeiwei Li { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0, 0 }, 18992c71d02eSWeiwei Li { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 }, 19002c71d02eSWeiwei Li { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 19012c71d02eSWeiwei Li { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 19022c71d02eSWeiwei Li { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, 19032c71d02eSWeiwei Li { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, 1904d397be9aSRichard Henderson { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1905d397be9aSRichard Henderson { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1906ea103259SMichael Clark }; 1907ea103259SMichael Clark 1908ea103259SMichael Clark /* CSR names */ 1909ea103259SMichael Clark 1910ea103259SMichael Clark static const char *csr_name(int csrno) 1911ea103259SMichael Clark { 1912ea103259SMichael Clark switch (csrno) { 1913ea103259SMichael Clark case 0x0000: return "ustatus"; 1914ea103259SMichael Clark case 0x0001: return "fflags"; 1915ea103259SMichael Clark case 0x0002: return "frm"; 1916ea103259SMichael Clark case 0x0003: return "fcsr"; 1917ea103259SMichael Clark case 0x0004: return "uie"; 1918ea103259SMichael Clark case 0x0005: return "utvec"; 191907f4964dSYang Liu case 0x0008: return "vstart"; 192007f4964dSYang Liu case 0x0009: return "vxsat"; 192107f4964dSYang Liu case 0x000a: return "vxrm"; 192207f4964dSYang Liu case 0x000f: return "vcsr"; 19235748c886SWeiwei Li case 0x0015: return "seed"; 19242c71d02eSWeiwei Li case 0x0017: return "jvt"; 1925ea103259SMichael Clark case 0x0040: return "uscratch"; 1926ea103259SMichael Clark case 0x0041: return "uepc"; 1927ea103259SMichael Clark case 0x0042: return "ucause"; 1928ea103259SMichael Clark case 0x0043: return "utval"; 1929ea103259SMichael Clark case 0x0044: return "uip"; 1930ea103259SMichael Clark case 0x0100: return "sstatus"; 1931ea103259SMichael Clark case 0x0104: return "sie"; 1932ea103259SMichael Clark case 0x0105: return "stvec"; 1933ea103259SMichael Clark case 0x0106: return "scounteren"; 1934ea103259SMichael Clark case 0x0140: return "sscratch"; 1935ea103259SMichael Clark case 0x0141: return "sepc"; 1936ea103259SMichael Clark case 0x0142: return "scause"; 1937ea103259SMichael Clark case 0x0143: return "stval"; 1938ea103259SMichael Clark case 0x0144: return "sip"; 1939ea103259SMichael Clark case 0x0180: return "satp"; 1940ea103259SMichael Clark case 0x0200: return "hstatus"; 1941ea103259SMichael Clark case 0x0202: return "hedeleg"; 1942ea103259SMichael Clark case 0x0203: return "hideleg"; 1943ea103259SMichael Clark case 0x0204: return "hie"; 1944ea103259SMichael Clark case 0x0205: return "htvec"; 1945ea103259SMichael Clark case 0x0240: return "hscratch"; 1946ea103259SMichael Clark case 0x0241: return "hepc"; 1947ea103259SMichael Clark case 0x0242: return "hcause"; 1948ea103259SMichael Clark case 0x0243: return "hbadaddr"; 1949ea103259SMichael Clark case 0x0244: return "hip"; 1950ea103259SMichael Clark case 0x0300: return "mstatus"; 1951ea103259SMichael Clark case 0x0301: return "misa"; 1952ea103259SMichael Clark case 0x0302: return "medeleg"; 1953ea103259SMichael Clark case 0x0303: return "mideleg"; 1954ea103259SMichael Clark case 0x0304: return "mie"; 1955ea103259SMichael Clark case 0x0305: return "mtvec"; 1956ea103259SMichael Clark case 0x0306: return "mcounteren"; 1957ea103259SMichael Clark case 0x0320: return "mucounteren"; 1958ea103259SMichael Clark case 0x0321: return "mscounteren"; 1959ea103259SMichael Clark case 0x0322: return "mhcounteren"; 1960ea103259SMichael Clark case 0x0323: return "mhpmevent3"; 1961ea103259SMichael Clark case 0x0324: return "mhpmevent4"; 1962ea103259SMichael Clark case 0x0325: return "mhpmevent5"; 1963ea103259SMichael Clark case 0x0326: return "mhpmevent6"; 1964ea103259SMichael Clark case 0x0327: return "mhpmevent7"; 1965ea103259SMichael Clark case 0x0328: return "mhpmevent8"; 1966ea103259SMichael Clark case 0x0329: return "mhpmevent9"; 1967ea103259SMichael Clark case 0x032a: return "mhpmevent10"; 1968ea103259SMichael Clark case 0x032b: return "mhpmevent11"; 1969ea103259SMichael Clark case 0x032c: return "mhpmevent12"; 1970ea103259SMichael Clark case 0x032d: return "mhpmevent13"; 1971ea103259SMichael Clark case 0x032e: return "mhpmevent14"; 1972ea103259SMichael Clark case 0x032f: return "mhpmevent15"; 1973ea103259SMichael Clark case 0x0330: return "mhpmevent16"; 1974ea103259SMichael Clark case 0x0331: return "mhpmevent17"; 1975ea103259SMichael Clark case 0x0332: return "mhpmevent18"; 1976ea103259SMichael Clark case 0x0333: return "mhpmevent19"; 1977ea103259SMichael Clark case 0x0334: return "mhpmevent20"; 1978ea103259SMichael Clark case 0x0335: return "mhpmevent21"; 1979ea103259SMichael Clark case 0x0336: return "mhpmevent22"; 1980ea103259SMichael Clark case 0x0337: return "mhpmevent23"; 1981ea103259SMichael Clark case 0x0338: return "mhpmevent24"; 1982ea103259SMichael Clark case 0x0339: return "mhpmevent25"; 1983ea103259SMichael Clark case 0x033a: return "mhpmevent26"; 1984ea103259SMichael Clark case 0x033b: return "mhpmevent27"; 1985ea103259SMichael Clark case 0x033c: return "mhpmevent28"; 1986ea103259SMichael Clark case 0x033d: return "mhpmevent29"; 1987ea103259SMichael Clark case 0x033e: return "mhpmevent30"; 1988ea103259SMichael Clark case 0x033f: return "mhpmevent31"; 1989ea103259SMichael Clark case 0x0340: return "mscratch"; 1990ea103259SMichael Clark case 0x0341: return "mepc"; 1991ea103259SMichael Clark case 0x0342: return "mcause"; 1992ea103259SMichael Clark case 0x0343: return "mtval"; 1993ea103259SMichael Clark case 0x0344: return "mip"; 1994ea103259SMichael Clark case 0x0380: return "mbase"; 1995ea103259SMichael Clark case 0x0381: return "mbound"; 1996ea103259SMichael Clark case 0x0382: return "mibase"; 1997ea103259SMichael Clark case 0x0383: return "mibound"; 1998ea103259SMichael Clark case 0x0384: return "mdbase"; 1999ea103259SMichael Clark case 0x0385: return "mdbound"; 2000ea103259SMichael Clark case 0x03a0: return "pmpcfg3"; 2001ea103259SMichael Clark case 0x03b0: return "pmpaddr0"; 2002ea103259SMichael Clark case 0x03b1: return "pmpaddr1"; 2003ea103259SMichael Clark case 0x03b2: return "pmpaddr2"; 2004ea103259SMichael Clark case 0x03b3: return "pmpaddr3"; 2005ea103259SMichael Clark case 0x03b4: return "pmpaddr4"; 2006ea103259SMichael Clark case 0x03b5: return "pmpaddr5"; 2007ea103259SMichael Clark case 0x03b6: return "pmpaddr6"; 2008ea103259SMichael Clark case 0x03b7: return "pmpaddr7"; 2009ea103259SMichael Clark case 0x03b8: return "pmpaddr8"; 2010ea103259SMichael Clark case 0x03b9: return "pmpaddr9"; 2011ea103259SMichael Clark case 0x03ba: return "pmpaddr10"; 2012ea103259SMichael Clark case 0x03bb: return "pmpaddr11"; 2013ea103259SMichael Clark case 0x03bc: return "pmpaddr12"; 2014ea103259SMichael Clark case 0x03bd: return "pmpaddr14"; 2015ea103259SMichael Clark case 0x03be: return "pmpaddr13"; 2016ea103259SMichael Clark case 0x03bf: return "pmpaddr15"; 2017ea103259SMichael Clark case 0x0780: return "mtohost"; 2018ea103259SMichael Clark case 0x0781: return "mfromhost"; 2019ea103259SMichael Clark case 0x0782: return "mreset"; 2020ea103259SMichael Clark case 0x0783: return "mipi"; 2021ea103259SMichael Clark case 0x0784: return "miobase"; 2022ea103259SMichael Clark case 0x07a0: return "tselect"; 2023ea103259SMichael Clark case 0x07a1: return "tdata1"; 2024ea103259SMichael Clark case 0x07a2: return "tdata2"; 2025ea103259SMichael Clark case 0x07a3: return "tdata3"; 2026ea103259SMichael Clark case 0x07b0: return "dcsr"; 2027ea103259SMichael Clark case 0x07b1: return "dpc"; 2028ea103259SMichael Clark case 0x07b2: return "dscratch"; 2029ea103259SMichael Clark case 0x0b00: return "mcycle"; 2030ea103259SMichael Clark case 0x0b01: return "mtime"; 2031ea103259SMichael Clark case 0x0b02: return "minstret"; 2032ea103259SMichael Clark case 0x0b03: return "mhpmcounter3"; 2033ea103259SMichael Clark case 0x0b04: return "mhpmcounter4"; 2034ea103259SMichael Clark case 0x0b05: return "mhpmcounter5"; 2035ea103259SMichael Clark case 0x0b06: return "mhpmcounter6"; 2036ea103259SMichael Clark case 0x0b07: return "mhpmcounter7"; 2037ea103259SMichael Clark case 0x0b08: return "mhpmcounter8"; 2038ea103259SMichael Clark case 0x0b09: return "mhpmcounter9"; 2039ea103259SMichael Clark case 0x0b0a: return "mhpmcounter10"; 2040ea103259SMichael Clark case 0x0b0b: return "mhpmcounter11"; 2041ea103259SMichael Clark case 0x0b0c: return "mhpmcounter12"; 2042ea103259SMichael Clark case 0x0b0d: return "mhpmcounter13"; 2043ea103259SMichael Clark case 0x0b0e: return "mhpmcounter14"; 2044ea103259SMichael Clark case 0x0b0f: return "mhpmcounter15"; 2045ea103259SMichael Clark case 0x0b10: return "mhpmcounter16"; 2046ea103259SMichael Clark case 0x0b11: return "mhpmcounter17"; 2047ea103259SMichael Clark case 0x0b12: return "mhpmcounter18"; 2048ea103259SMichael Clark case 0x0b13: return "mhpmcounter19"; 2049ea103259SMichael Clark case 0x0b14: return "mhpmcounter20"; 2050ea103259SMichael Clark case 0x0b15: return "mhpmcounter21"; 2051ea103259SMichael Clark case 0x0b16: return "mhpmcounter22"; 2052ea103259SMichael Clark case 0x0b17: return "mhpmcounter23"; 2053ea103259SMichael Clark case 0x0b18: return "mhpmcounter24"; 2054ea103259SMichael Clark case 0x0b19: return "mhpmcounter25"; 2055ea103259SMichael Clark case 0x0b1a: return "mhpmcounter26"; 2056ea103259SMichael Clark case 0x0b1b: return "mhpmcounter27"; 2057ea103259SMichael Clark case 0x0b1c: return "mhpmcounter28"; 2058ea103259SMichael Clark case 0x0b1d: return "mhpmcounter29"; 2059ea103259SMichael Clark case 0x0b1e: return "mhpmcounter30"; 2060ea103259SMichael Clark case 0x0b1f: return "mhpmcounter31"; 2061ea103259SMichael Clark case 0x0b80: return "mcycleh"; 2062ea103259SMichael Clark case 0x0b81: return "mtimeh"; 2063ea103259SMichael Clark case 0x0b82: return "minstreth"; 2064ea103259SMichael Clark case 0x0b83: return "mhpmcounter3h"; 2065ea103259SMichael Clark case 0x0b84: return "mhpmcounter4h"; 2066ea103259SMichael Clark case 0x0b85: return "mhpmcounter5h"; 2067ea103259SMichael Clark case 0x0b86: return "mhpmcounter6h"; 2068ea103259SMichael Clark case 0x0b87: return "mhpmcounter7h"; 2069ea103259SMichael Clark case 0x0b88: return "mhpmcounter8h"; 2070ea103259SMichael Clark case 0x0b89: return "mhpmcounter9h"; 2071ea103259SMichael Clark case 0x0b8a: return "mhpmcounter10h"; 2072ea103259SMichael Clark case 0x0b8b: return "mhpmcounter11h"; 2073ea103259SMichael Clark case 0x0b8c: return "mhpmcounter12h"; 2074ea103259SMichael Clark case 0x0b8d: return "mhpmcounter13h"; 2075ea103259SMichael Clark case 0x0b8e: return "mhpmcounter14h"; 2076ea103259SMichael Clark case 0x0b8f: return "mhpmcounter15h"; 2077ea103259SMichael Clark case 0x0b90: return "mhpmcounter16h"; 2078ea103259SMichael Clark case 0x0b91: return "mhpmcounter17h"; 2079ea103259SMichael Clark case 0x0b92: return "mhpmcounter18h"; 2080ea103259SMichael Clark case 0x0b93: return "mhpmcounter19h"; 2081ea103259SMichael Clark case 0x0b94: return "mhpmcounter20h"; 2082ea103259SMichael Clark case 0x0b95: return "mhpmcounter21h"; 2083ea103259SMichael Clark case 0x0b96: return "mhpmcounter22h"; 2084ea103259SMichael Clark case 0x0b97: return "mhpmcounter23h"; 2085ea103259SMichael Clark case 0x0b98: return "mhpmcounter24h"; 2086ea103259SMichael Clark case 0x0b99: return "mhpmcounter25h"; 2087ea103259SMichael Clark case 0x0b9a: return "mhpmcounter26h"; 2088ea103259SMichael Clark case 0x0b9b: return "mhpmcounter27h"; 2089ea103259SMichael Clark case 0x0b9c: return "mhpmcounter28h"; 2090ea103259SMichael Clark case 0x0b9d: return "mhpmcounter29h"; 2091ea103259SMichael Clark case 0x0b9e: return "mhpmcounter30h"; 2092ea103259SMichael Clark case 0x0b9f: return "mhpmcounter31h"; 2093ea103259SMichael Clark case 0x0c00: return "cycle"; 2094ea103259SMichael Clark case 0x0c01: return "time"; 2095ea103259SMichael Clark case 0x0c02: return "instret"; 209607f4964dSYang Liu case 0x0c20: return "vl"; 209707f4964dSYang Liu case 0x0c21: return "vtype"; 209807f4964dSYang Liu case 0x0c22: return "vlenb"; 2099ea103259SMichael Clark case 0x0c80: return "cycleh"; 2100ea103259SMichael Clark case 0x0c81: return "timeh"; 2101ea103259SMichael Clark case 0x0c82: return "instreth"; 2102ea103259SMichael Clark case 0x0d00: return "scycle"; 2103ea103259SMichael Clark case 0x0d01: return "stime"; 2104ea103259SMichael Clark case 0x0d02: return "sinstret"; 2105ea103259SMichael Clark case 0x0d80: return "scycleh"; 2106ea103259SMichael Clark case 0x0d81: return "stimeh"; 2107ea103259SMichael Clark case 0x0d82: return "sinstreth"; 2108ea103259SMichael Clark case 0x0e00: return "hcycle"; 2109ea103259SMichael Clark case 0x0e01: return "htime"; 2110ea103259SMichael Clark case 0x0e02: return "hinstret"; 2111ea103259SMichael Clark case 0x0e80: return "hcycleh"; 2112ea103259SMichael Clark case 0x0e81: return "htimeh"; 2113ea103259SMichael Clark case 0x0e82: return "hinstreth"; 2114ea103259SMichael Clark case 0x0f11: return "mvendorid"; 2115ea103259SMichael Clark case 0x0f12: return "marchid"; 2116ea103259SMichael Clark case 0x0f13: return "mimpid"; 2117ea103259SMichael Clark case 0x0f14: return "mhartid"; 2118ea103259SMichael Clark default: return NULL; 2119ea103259SMichael Clark } 2120ea103259SMichael Clark } 2121ea103259SMichael Clark 2122ea103259SMichael Clark /* decode opcode */ 2123ea103259SMichael Clark 2124ea103259SMichael Clark static void decode_inst_opcode(rv_decode *dec, rv_isa isa) 2125ea103259SMichael Clark { 2126ea103259SMichael Clark rv_inst inst = dec->inst; 2127ea103259SMichael Clark rv_opcode op = rv_op_illegal; 21283bd87176SWeiwei Li switch ((inst >> 0) & 0b11) { 2129ea103259SMichael Clark case 0: 21303bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2131ea103259SMichael Clark case 0: op = rv_op_c_addi4spn; break; 2132ea103259SMichael Clark case 1: 2133ea103259SMichael Clark if (isa == rv128) { 2134ea103259SMichael Clark op = rv_op_c_lq; 2135ea103259SMichael Clark } else { 2136ea103259SMichael Clark op = rv_op_c_fld; 2137ea103259SMichael Clark } 2138ea103259SMichael Clark break; 2139ea103259SMichael Clark case 2: op = rv_op_c_lw; break; 2140ea103259SMichael Clark case 3: 2141ea103259SMichael Clark if (isa == rv32) { 2142ea103259SMichael Clark op = rv_op_c_flw; 2143ea103259SMichael Clark } else { 2144ea103259SMichael Clark op = rv_op_c_ld; 2145ea103259SMichael Clark } 2146ea103259SMichael Clark break; 21472c71d02eSWeiwei Li case 4: 21482c71d02eSWeiwei Li switch ((inst >> 10) & 0b111) { 21492c71d02eSWeiwei Li case 0: op = rv_op_c_lbu; break; 21502c71d02eSWeiwei Li case 1: 21512c71d02eSWeiwei Li if (((inst >> 6) & 1) == 0) { 21522c71d02eSWeiwei Li op = rv_op_c_lhu; 21532c71d02eSWeiwei Li } else { 21542c71d02eSWeiwei Li op = rv_op_c_lh; 21552c71d02eSWeiwei Li } 21562c71d02eSWeiwei Li break; 21572c71d02eSWeiwei Li case 2: op = rv_op_c_sb; break; 21582c71d02eSWeiwei Li case 3: 21592c71d02eSWeiwei Li if (((inst >> 6) & 1) == 0) { 21602c71d02eSWeiwei Li op = rv_op_c_sh; 21612c71d02eSWeiwei Li } 21622c71d02eSWeiwei Li break; 21632c71d02eSWeiwei Li } 21642c71d02eSWeiwei Li break; 2165ea103259SMichael Clark case 5: 2166ea103259SMichael Clark if (isa == rv128) { 2167ea103259SMichael Clark op = rv_op_c_sq; 2168ea103259SMichael Clark } else { 2169ea103259SMichael Clark op = rv_op_c_fsd; 2170ea103259SMichael Clark } 2171ea103259SMichael Clark break; 2172ea103259SMichael Clark case 6: op = rv_op_c_sw; break; 2173ea103259SMichael Clark case 7: 2174ea103259SMichael Clark if (isa == rv32) { 2175ea103259SMichael Clark op = rv_op_c_fsw; 2176ea103259SMichael Clark } else { 2177ea103259SMichael Clark op = rv_op_c_sd; 2178ea103259SMichael Clark } 2179ea103259SMichael Clark break; 2180ea103259SMichael Clark } 2181ea103259SMichael Clark break; 2182ea103259SMichael Clark case 1: 21833bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2184ea103259SMichael Clark case 0: 21853bd87176SWeiwei Li switch ((inst >> 2) & 0b11111111111) { 2186ea103259SMichael Clark case 0: op = rv_op_c_nop; break; 2187ea103259SMichael Clark default: op = rv_op_c_addi; break; 2188ea103259SMichael Clark } 2189ea103259SMichael Clark break; 2190ea103259SMichael Clark case 1: 2191ea103259SMichael Clark if (isa == rv32) { 2192ea103259SMichael Clark op = rv_op_c_jal; 2193ea103259SMichael Clark } else { 2194ea103259SMichael Clark op = rv_op_c_addiw; 2195ea103259SMichael Clark } 2196ea103259SMichael Clark break; 2197ea103259SMichael Clark case 2: op = rv_op_c_li; break; 2198ea103259SMichael Clark case 3: 21993bd87176SWeiwei Li switch ((inst >> 7) & 0b11111) { 2200ea103259SMichael Clark case 2: op = rv_op_c_addi16sp; break; 2201ea103259SMichael Clark default: op = rv_op_c_lui; break; 2202ea103259SMichael Clark } 2203ea103259SMichael Clark break; 2204ea103259SMichael Clark case 4: 22053bd87176SWeiwei Li switch ((inst >> 10) & 0b11) { 2206ea103259SMichael Clark case 0: 2207ea103259SMichael Clark op = rv_op_c_srli; 2208ea103259SMichael Clark break; 2209ea103259SMichael Clark case 1: 2210ea103259SMichael Clark op = rv_op_c_srai; 2211ea103259SMichael Clark break; 2212ea103259SMichael Clark case 2: op = rv_op_c_andi; break; 2213ea103259SMichael Clark case 3: 2214ea103259SMichael Clark switch (((inst >> 10) & 0b100) | ((inst >> 5) & 0b011)) { 2215ea103259SMichael Clark case 0: op = rv_op_c_sub; break; 2216ea103259SMichael Clark case 1: op = rv_op_c_xor; break; 2217ea103259SMichael Clark case 2: op = rv_op_c_or; break; 2218ea103259SMichael Clark case 3: op = rv_op_c_and; break; 2219ea103259SMichael Clark case 4: op = rv_op_c_subw; break; 2220ea103259SMichael Clark case 5: op = rv_op_c_addw; break; 22212c71d02eSWeiwei Li case 6: op = rv_op_c_mul; break; 22222c71d02eSWeiwei Li case 7: 22232c71d02eSWeiwei Li switch ((inst >> 2) & 0b111) { 22242c71d02eSWeiwei Li case 0: op = rv_op_c_zext_b; break; 22252c71d02eSWeiwei Li case 1: op = rv_op_c_sext_b; break; 22262c71d02eSWeiwei Li case 2: op = rv_op_c_zext_h; break; 22272c71d02eSWeiwei Li case 3: op = rv_op_c_sext_h; break; 22282c71d02eSWeiwei Li case 4: op = rv_op_c_zext_w; break; 22292c71d02eSWeiwei Li case 5: op = rv_op_c_not; break; 22302c71d02eSWeiwei Li } 22312c71d02eSWeiwei Li break; 2232ea103259SMichael Clark } 2233ea103259SMichael Clark break; 2234ea103259SMichael Clark } 2235ea103259SMichael Clark break; 2236ea103259SMichael Clark case 5: op = rv_op_c_j; break; 2237ea103259SMichael Clark case 6: op = rv_op_c_beqz; break; 2238ea103259SMichael Clark case 7: op = rv_op_c_bnez; break; 2239ea103259SMichael Clark } 2240ea103259SMichael Clark break; 2241ea103259SMichael Clark case 2: 22423bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2243ea103259SMichael Clark case 0: 2244ea103259SMichael Clark op = rv_op_c_slli; 2245ea103259SMichael Clark break; 2246ea103259SMichael Clark case 1: 2247ea103259SMichael Clark if (isa == rv128) { 2248ea103259SMichael Clark op = rv_op_c_lqsp; 2249ea103259SMichael Clark } else { 2250ea103259SMichael Clark op = rv_op_c_fldsp; 2251ea103259SMichael Clark } 2252ea103259SMichael Clark break; 2253ea103259SMichael Clark case 2: op = rv_op_c_lwsp; break; 2254ea103259SMichael Clark case 3: 2255ea103259SMichael Clark if (isa == rv32) { 2256ea103259SMichael Clark op = rv_op_c_flwsp; 2257ea103259SMichael Clark } else { 2258ea103259SMichael Clark op = rv_op_c_ldsp; 2259ea103259SMichael Clark } 2260ea103259SMichael Clark break; 2261ea103259SMichael Clark case 4: 22623bd87176SWeiwei Li switch ((inst >> 12) & 0b1) { 2263ea103259SMichael Clark case 0: 22643bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2265ea103259SMichael Clark case 0: op = rv_op_c_jr; break; 2266ea103259SMichael Clark default: op = rv_op_c_mv; break; 2267ea103259SMichael Clark } 2268ea103259SMichael Clark break; 2269ea103259SMichael Clark case 1: 22703bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2271ea103259SMichael Clark case 0: 22723bd87176SWeiwei Li switch ((inst >> 7) & 0b11111) { 2273ea103259SMichael Clark case 0: op = rv_op_c_ebreak; break; 2274ea103259SMichael Clark default: op = rv_op_c_jalr; break; 2275ea103259SMichael Clark } 2276ea103259SMichael Clark break; 2277ea103259SMichael Clark default: op = rv_op_c_add; break; 2278ea103259SMichael Clark } 2279ea103259SMichael Clark break; 2280ea103259SMichael Clark } 2281ea103259SMichael Clark break; 2282ea103259SMichael Clark case 5: 2283ea103259SMichael Clark if (isa == rv128) { 2284ea103259SMichael Clark op = rv_op_c_sqsp; 2285ea103259SMichael Clark } else { 22861dc34be1SMichael Clark op = rv_op_c_fsdsp; 22872a2b221bSWeiwei Li if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) { 22882c71d02eSWeiwei Li switch ((inst >> 8) & 0b01111) { 22892c71d02eSWeiwei Li case 8: 22902c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 22912c71d02eSWeiwei Li op = rv_op_cm_push; 22922c71d02eSWeiwei Li } 22932c71d02eSWeiwei Li break; 22942c71d02eSWeiwei Li case 10: 22952c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 22962c71d02eSWeiwei Li op = rv_op_cm_pop; 22972c71d02eSWeiwei Li } 22982c71d02eSWeiwei Li break; 22992c71d02eSWeiwei Li case 12: 23002c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 23012c71d02eSWeiwei Li op = rv_op_cm_popretz; 23022c71d02eSWeiwei Li } 23032c71d02eSWeiwei Li break; 23042c71d02eSWeiwei Li case 14: 23052c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 23062c71d02eSWeiwei Li op = rv_op_cm_popret; 23072c71d02eSWeiwei Li } 23082c71d02eSWeiwei Li break; 23092c71d02eSWeiwei Li } 23102c71d02eSWeiwei Li } else { 23112c71d02eSWeiwei Li switch ((inst >> 10) & 0b011) { 23122c71d02eSWeiwei Li case 0: 23132a2b221bSWeiwei Li if (!dec->cfg->ext_zcmt) { 23142a2b221bSWeiwei Li break; 23152a2b221bSWeiwei Li } 23162c71d02eSWeiwei Li if (((inst >> 2) & 0xFF) >= 32) { 23172c71d02eSWeiwei Li op = rv_op_cm_jalt; 23182c71d02eSWeiwei Li } else { 23192c71d02eSWeiwei Li op = rv_op_cm_jt; 23202c71d02eSWeiwei Li } 23212c71d02eSWeiwei Li break; 23222c71d02eSWeiwei Li case 3: 23232a2b221bSWeiwei Li if (!dec->cfg->ext_zcmp) { 23242a2b221bSWeiwei Li break; 23252a2b221bSWeiwei Li } 23262c71d02eSWeiwei Li switch ((inst >> 5) & 0b011) { 23272c71d02eSWeiwei Li case 1: op = rv_op_cm_mvsa01; break; 23282c71d02eSWeiwei Li case 3: op = rv_op_cm_mva01s; break; 23292c71d02eSWeiwei Li } 23302c71d02eSWeiwei Li break; 23312c71d02eSWeiwei Li } 23322c71d02eSWeiwei Li } 2333ea103259SMichael Clark } 23341dc34be1SMichael Clark break; 2335ea103259SMichael Clark case 6: op = rv_op_c_swsp; break; 2336ea103259SMichael Clark case 7: 2337ea103259SMichael Clark if (isa == rv32) { 2338ea103259SMichael Clark op = rv_op_c_fswsp; 2339ea103259SMichael Clark } else { 2340ea103259SMichael Clark op = rv_op_c_sdsp; 2341ea103259SMichael Clark } 2342ea103259SMichael Clark break; 2343ea103259SMichael Clark } 2344ea103259SMichael Clark break; 2345ea103259SMichael Clark case 3: 23463bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2347ea103259SMichael Clark case 0: 23483bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2349ea103259SMichael Clark case 0: op = rv_op_lb; break; 2350ea103259SMichael Clark case 1: op = rv_op_lh; break; 2351ea103259SMichael Clark case 2: op = rv_op_lw; break; 2352ea103259SMichael Clark case 3: op = rv_op_ld; break; 2353ea103259SMichael Clark case 4: op = rv_op_lbu; break; 2354ea103259SMichael Clark case 5: op = rv_op_lhu; break; 2355ea103259SMichael Clark case 6: op = rv_op_lwu; break; 2356ea103259SMichael Clark case 7: op = rv_op_ldu; break; 2357ea103259SMichael Clark } 2358ea103259SMichael Clark break; 2359ea103259SMichael Clark case 1: 23603bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 236107f4964dSYang Liu case 0: 23623bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 236307f4964dSYang Liu case 40: op = rv_op_vl1re8_v; break; 236407f4964dSYang Liu case 552: op = rv_op_vl2re8_v; break; 236507f4964dSYang Liu case 1576: op = rv_op_vl4re8_v; break; 236607f4964dSYang Liu case 3624: op = rv_op_vl8re8_v; break; 236707f4964dSYang Liu } 23683bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 236907f4964dSYang Liu case 0: 23703bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 237107f4964dSYang Liu case 0: op = rv_op_vle8_v; break; 237207f4964dSYang Liu case 11: op = rv_op_vlm_v; break; 237307f4964dSYang Liu case 16: op = rv_op_vle8ff_v; break; 237407f4964dSYang Liu } 237507f4964dSYang Liu break; 237607f4964dSYang Liu case 1: op = rv_op_vluxei8_v; break; 237707f4964dSYang Liu case 2: op = rv_op_vlse8_v; break; 237807f4964dSYang Liu case 3: op = rv_op_vloxei8_v; break; 237907f4964dSYang Liu } 238007f4964dSYang Liu break; 2381ea103259SMichael Clark case 2: op = rv_op_flw; break; 2382ea103259SMichael Clark case 3: op = rv_op_fld; break; 2383ea103259SMichael Clark case 4: op = rv_op_flq; break; 238407f4964dSYang Liu case 5: 23853bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 238607f4964dSYang Liu case 40: op = rv_op_vl1re16_v; break; 238707f4964dSYang Liu case 552: op = rv_op_vl2re16_v; break; 238807f4964dSYang Liu case 1576: op = rv_op_vl4re16_v; break; 238907f4964dSYang Liu case 3624: op = rv_op_vl8re16_v; break; 239007f4964dSYang Liu } 23913bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 239207f4964dSYang Liu case 0: 23933bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 239407f4964dSYang Liu case 0: op = rv_op_vle16_v; break; 239507f4964dSYang Liu case 16: op = rv_op_vle16ff_v; break; 239607f4964dSYang Liu } 239707f4964dSYang Liu break; 239807f4964dSYang Liu case 1: op = rv_op_vluxei16_v; break; 239907f4964dSYang Liu case 2: op = rv_op_vlse16_v; break; 240007f4964dSYang Liu case 3: op = rv_op_vloxei16_v; break; 240107f4964dSYang Liu } 240207f4964dSYang Liu break; 240307f4964dSYang Liu case 6: 24043bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 240507f4964dSYang Liu case 40: op = rv_op_vl1re32_v; break; 240607f4964dSYang Liu case 552: op = rv_op_vl2re32_v; break; 240707f4964dSYang Liu case 1576: op = rv_op_vl4re32_v; break; 240807f4964dSYang Liu case 3624: op = rv_op_vl8re32_v; break; 240907f4964dSYang Liu } 24103bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 241107f4964dSYang Liu case 0: 24123bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 241307f4964dSYang Liu case 0: op = rv_op_vle32_v; break; 241407f4964dSYang Liu case 16: op = rv_op_vle32ff_v; break; 241507f4964dSYang Liu } 241607f4964dSYang Liu break; 241707f4964dSYang Liu case 1: op = rv_op_vluxei32_v; break; 241807f4964dSYang Liu case 2: op = rv_op_vlse32_v; break; 241907f4964dSYang Liu case 3: op = rv_op_vloxei32_v; break; 242007f4964dSYang Liu } 242107f4964dSYang Liu break; 242207f4964dSYang Liu case 7: 24233bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 242407f4964dSYang Liu case 40: op = rv_op_vl1re64_v; break; 242507f4964dSYang Liu case 552: op = rv_op_vl2re64_v; break; 242607f4964dSYang Liu case 1576: op = rv_op_vl4re64_v; break; 242707f4964dSYang Liu case 3624: op = rv_op_vl8re64_v; break; 242807f4964dSYang Liu } 24293bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 243007f4964dSYang Liu case 0: 24313bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 243207f4964dSYang Liu case 0: op = rv_op_vle64_v; break; 243307f4964dSYang Liu case 16: op = rv_op_vle64ff_v; break; 243407f4964dSYang Liu } 243507f4964dSYang Liu break; 243607f4964dSYang Liu case 1: op = rv_op_vluxei64_v; break; 243707f4964dSYang Liu case 2: op = rv_op_vlse64_v; break; 243807f4964dSYang Liu case 3: op = rv_op_vloxei64_v; break; 243907f4964dSYang Liu } 244007f4964dSYang Liu break; 2441ea103259SMichael Clark } 2442ea103259SMichael Clark break; 2443ea103259SMichael Clark case 3: 24443bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2445ea103259SMichael Clark case 0: op = rv_op_fence; break; 2446ea103259SMichael Clark case 1: op = rv_op_fence_i; break; 2447ea103259SMichael Clark case 2: op = rv_op_lq; break; 2448ea103259SMichael Clark } 2449ea103259SMichael Clark break; 2450ea103259SMichael Clark case 4: 24513bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2452ea103259SMichael Clark case 0: op = rv_op_addi; break; 2453ea103259SMichael Clark case 1: 24543bd87176SWeiwei Li switch ((inst >> 27) & 0b11111) { 245502c1b569SPhilipp Tomsich case 0b00000: op = rv_op_slli; break; 24565748c886SWeiwei Li case 0b00001: 24573bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24585748c886SWeiwei Li case 0b0001111: op = rv_op_zip; break; 24595748c886SWeiwei Li } 24605748c886SWeiwei Li break; 24615748c886SWeiwei Li case 0b00010: 24623bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24635748c886SWeiwei Li case 0b0000000: op = rv_op_sha256sum0; break; 24645748c886SWeiwei Li case 0b0000001: op = rv_op_sha256sum1; break; 24655748c886SWeiwei Li case 0b0000010: op = rv_op_sha256sig0; break; 24665748c886SWeiwei Li case 0b0000011: op = rv_op_sha256sig1; break; 24675748c886SWeiwei Li case 0b0000100: op = rv_op_sha512sum0; break; 24685748c886SWeiwei Li case 0b0000101: op = rv_op_sha512sum1; break; 24695748c886SWeiwei Li case 0b0000110: op = rv_op_sha512sig0; break; 24705748c886SWeiwei Li case 0b0000111: op = rv_op_sha512sig1; break; 24715748c886SWeiwei Li case 0b0001000: op = rv_op_sm3p0; break; 24725748c886SWeiwei Li case 0b0001001: op = rv_op_sm3p1; break; 24735748c886SWeiwei Li } 24745748c886SWeiwei Li break; 247502c1b569SPhilipp Tomsich case 0b00101: op = rv_op_bseti; break; 24765748c886SWeiwei Li case 0b00110: 24773bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24785748c886SWeiwei Li case 0b0000000: op = rv_op_aes64im; break; 24795748c886SWeiwei Li default: 24805748c886SWeiwei Li if (((inst >> 24) & 0b0111) == 0b001) { 24815748c886SWeiwei Li op = rv_op_aes64ks1i; 24825748c886SWeiwei Li } 24835748c886SWeiwei Li break; 24845748c886SWeiwei Li } 24855748c886SWeiwei Li break; 248602c1b569SPhilipp Tomsich case 0b01001: op = rv_op_bclri; break; 248702c1b569SPhilipp Tomsich case 0b01101: op = rv_op_binvi; break; 248802c1b569SPhilipp Tomsich case 0b01100: 24893bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 249002c1b569SPhilipp Tomsich case 0b0000000: op = rv_op_clz; break; 249102c1b569SPhilipp Tomsich case 0b0000001: op = rv_op_ctz; break; 249202c1b569SPhilipp Tomsich case 0b0000010: op = rv_op_cpop; break; 249302c1b569SPhilipp Tomsich /* 0b0000011 */ 249402c1b569SPhilipp Tomsich case 0b0000100: op = rv_op_sext_b; break; 249502c1b569SPhilipp Tomsich case 0b0000101: op = rv_op_sext_h; break; 249602c1b569SPhilipp Tomsich } 249702c1b569SPhilipp Tomsich break; 2498ea103259SMichael Clark } 2499ea103259SMichael Clark break; 2500ea103259SMichael Clark case 2: op = rv_op_slti; break; 2501ea103259SMichael Clark case 3: op = rv_op_sltiu; break; 2502ea103259SMichael Clark case 4: op = rv_op_xori; break; 2503ea103259SMichael Clark case 5: 25043bd87176SWeiwei Li switch ((inst >> 27) & 0b11111) { 250502c1b569SPhilipp Tomsich case 0b00000: op = rv_op_srli; break; 25065748c886SWeiwei Li case 0b00001: 25073bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 25085748c886SWeiwei Li case 0b0001111: op = rv_op_unzip; break; 25095748c886SWeiwei Li } 25105748c886SWeiwei Li break; 251102c1b569SPhilipp Tomsich case 0b00101: op = rv_op_orc_b; break; 251202c1b569SPhilipp Tomsich case 0b01000: op = rv_op_srai; break; 251302c1b569SPhilipp Tomsich case 0b01001: op = rv_op_bexti; break; 251402c1b569SPhilipp Tomsich case 0b01100: op = rv_op_rori; break; 251502c1b569SPhilipp Tomsich case 0b01101: 251602c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b1111111) { 25175748c886SWeiwei Li case 0b0011000: op = rv_op_rev8; break; 251802c1b569SPhilipp Tomsich case 0b0111000: op = rv_op_rev8; break; 25195748c886SWeiwei Li case 0b0000111: op = rv_op_brev8; break; 252002c1b569SPhilipp Tomsich } 252102c1b569SPhilipp Tomsich break; 2522ea103259SMichael Clark } 2523ea103259SMichael Clark break; 2524ea103259SMichael Clark case 6: op = rv_op_ori; break; 2525ea103259SMichael Clark case 7: op = rv_op_andi; break; 2526ea103259SMichael Clark } 2527ea103259SMichael Clark break; 2528ea103259SMichael Clark case 5: op = rv_op_auipc; break; 2529ea103259SMichael Clark case 6: 25303bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2531ea103259SMichael Clark case 0: op = rv_op_addiw; break; 2532ea103259SMichael Clark case 1: 25333bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 2534ea103259SMichael Clark case 0: op = rv_op_slliw; break; 253513e269f6SIvan Klokov case 2: op = rv_op_slli_uw; break; 253613e269f6SIvan Klokov case 24: 253702c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 253802c1b569SPhilipp Tomsich case 0b00000: op = rv_op_clzw; break; 253902c1b569SPhilipp Tomsich case 0b00001: op = rv_op_ctzw; break; 254002c1b569SPhilipp Tomsich case 0b00010: op = rv_op_cpopw; break; 254102c1b569SPhilipp Tomsich } 254202c1b569SPhilipp Tomsich break; 2543ea103259SMichael Clark } 2544ea103259SMichael Clark break; 2545ea103259SMichael Clark case 5: 25463bd87176SWeiwei Li switch ((inst >> 25) & 0b1111111) { 2547ea103259SMichael Clark case 0: op = rv_op_srliw; break; 2548ea103259SMichael Clark case 32: op = rv_op_sraiw; break; 254902c1b569SPhilipp Tomsich case 48: op = rv_op_roriw; break; 2550ea103259SMichael Clark } 2551ea103259SMichael Clark break; 2552ea103259SMichael Clark } 2553ea103259SMichael Clark break; 2554ea103259SMichael Clark case 8: 25553bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2556ea103259SMichael Clark case 0: op = rv_op_sb; break; 2557ea103259SMichael Clark case 1: op = rv_op_sh; break; 2558ea103259SMichael Clark case 2: op = rv_op_sw; break; 2559ea103259SMichael Clark case 3: op = rv_op_sd; break; 2560ea103259SMichael Clark case 4: op = rv_op_sq; break; 2561ea103259SMichael Clark } 2562ea103259SMichael Clark break; 2563ea103259SMichael Clark case 9: 25643bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 256507f4964dSYang Liu case 0: 25663bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 256707f4964dSYang Liu case 40: op = rv_op_vs1r_v; break; 256807f4964dSYang Liu case 552: op = rv_op_vs2r_v; break; 256907f4964dSYang Liu case 1576: op = rv_op_vs4r_v; break; 257007f4964dSYang Liu case 3624: op = rv_op_vs8r_v; break; 257107f4964dSYang Liu } 25723bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 257307f4964dSYang Liu case 0: 25743bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 257507f4964dSYang Liu case 0: op = rv_op_vse8_v; break; 257607f4964dSYang Liu case 11: op = rv_op_vsm_v; break; 257707f4964dSYang Liu } 257807f4964dSYang Liu break; 257907f4964dSYang Liu case 1: op = rv_op_vsuxei8_v; break; 258007f4964dSYang Liu case 2: op = rv_op_vsse8_v; break; 258107f4964dSYang Liu case 3: op = rv_op_vsoxei8_v; break; 258207f4964dSYang Liu } 258307f4964dSYang Liu break; 2584ea103259SMichael Clark case 2: op = rv_op_fsw; break; 2585ea103259SMichael Clark case 3: op = rv_op_fsd; break; 2586ea103259SMichael Clark case 4: op = rv_op_fsq; break; 258707f4964dSYang Liu case 5: 25883bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 258907f4964dSYang Liu case 0: 25903bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 259107f4964dSYang Liu case 0: op = rv_op_vse16_v; break; 259207f4964dSYang Liu } 259307f4964dSYang Liu break; 259407f4964dSYang Liu case 1: op = rv_op_vsuxei16_v; break; 259507f4964dSYang Liu case 2: op = rv_op_vsse16_v; break; 259607f4964dSYang Liu case 3: op = rv_op_vsoxei16_v; break; 259707f4964dSYang Liu } 259807f4964dSYang Liu break; 259907f4964dSYang Liu case 6: 26003bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 260107f4964dSYang Liu case 0: 26023bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 260307f4964dSYang Liu case 0: op = rv_op_vse32_v; break; 260407f4964dSYang Liu } 260507f4964dSYang Liu break; 260607f4964dSYang Liu case 1: op = rv_op_vsuxei32_v; break; 260707f4964dSYang Liu case 2: op = rv_op_vsse32_v; break; 260807f4964dSYang Liu case 3: op = rv_op_vsoxei32_v; break; 260907f4964dSYang Liu } 261007f4964dSYang Liu break; 261107f4964dSYang Liu case 7: 26123bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 261307f4964dSYang Liu case 0: 26143bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 261507f4964dSYang Liu case 0: op = rv_op_vse64_v; break; 261607f4964dSYang Liu } 261707f4964dSYang Liu break; 261807f4964dSYang Liu case 1: op = rv_op_vsuxei64_v; break; 261907f4964dSYang Liu case 2: op = rv_op_vsse64_v; break; 262007f4964dSYang Liu case 3: op = rv_op_vsoxei64_v; break; 262107f4964dSYang Liu } 262207f4964dSYang Liu break; 2623ea103259SMichael Clark } 2624ea103259SMichael Clark break; 2625ea103259SMichael Clark case 11: 262698624d13SWeiwei Li switch (((inst >> 24) & 0b11111000) | 262798624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2628ea103259SMichael Clark case 2: op = rv_op_amoadd_w; break; 2629ea103259SMichael Clark case 3: op = rv_op_amoadd_d; break; 2630ea103259SMichael Clark case 4: op = rv_op_amoadd_q; break; 2631ea103259SMichael Clark case 10: op = rv_op_amoswap_w; break; 2632ea103259SMichael Clark case 11: op = rv_op_amoswap_d; break; 2633ea103259SMichael Clark case 12: op = rv_op_amoswap_q; break; 2634ea103259SMichael Clark case 18: 26353bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2636ea103259SMichael Clark case 0: op = rv_op_lr_w; break; 2637ea103259SMichael Clark } 2638ea103259SMichael Clark break; 2639ea103259SMichael Clark case 19: 26403bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2641ea103259SMichael Clark case 0: op = rv_op_lr_d; break; 2642ea103259SMichael Clark } 2643ea103259SMichael Clark break; 2644ea103259SMichael Clark case 20: 26453bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2646ea103259SMichael Clark case 0: op = rv_op_lr_q; break; 2647ea103259SMichael Clark } 2648ea103259SMichael Clark break; 2649ea103259SMichael Clark case 26: op = rv_op_sc_w; break; 2650ea103259SMichael Clark case 27: op = rv_op_sc_d; break; 2651ea103259SMichael Clark case 28: op = rv_op_sc_q; break; 2652ea103259SMichael Clark case 34: op = rv_op_amoxor_w; break; 2653ea103259SMichael Clark case 35: op = rv_op_amoxor_d; break; 2654ea103259SMichael Clark case 36: op = rv_op_amoxor_q; break; 2655ea103259SMichael Clark case 66: op = rv_op_amoor_w; break; 2656ea103259SMichael Clark case 67: op = rv_op_amoor_d; break; 2657ea103259SMichael Clark case 68: op = rv_op_amoor_q; break; 2658ea103259SMichael Clark case 98: op = rv_op_amoand_w; break; 2659ea103259SMichael Clark case 99: op = rv_op_amoand_d; break; 2660ea103259SMichael Clark case 100: op = rv_op_amoand_q; break; 2661ea103259SMichael Clark case 130: op = rv_op_amomin_w; break; 2662ea103259SMichael Clark case 131: op = rv_op_amomin_d; break; 2663ea103259SMichael Clark case 132: op = rv_op_amomin_q; break; 2664ea103259SMichael Clark case 162: op = rv_op_amomax_w; break; 2665ea103259SMichael Clark case 163: op = rv_op_amomax_d; break; 2666ea103259SMichael Clark case 164: op = rv_op_amomax_q; break; 2667ea103259SMichael Clark case 194: op = rv_op_amominu_w; break; 2668ea103259SMichael Clark case 195: op = rv_op_amominu_d; break; 2669ea103259SMichael Clark case 196: op = rv_op_amominu_q; break; 2670ea103259SMichael Clark case 226: op = rv_op_amomaxu_w; break; 2671ea103259SMichael Clark case 227: op = rv_op_amomaxu_d; break; 2672ea103259SMichael Clark case 228: op = rv_op_amomaxu_q; break; 2673ea103259SMichael Clark } 2674ea103259SMichael Clark break; 2675ea103259SMichael Clark case 12: 267698624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 267798624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 2678ea103259SMichael Clark case 0: op = rv_op_add; break; 2679ea103259SMichael Clark case 1: op = rv_op_sll; break; 2680ea103259SMichael Clark case 2: op = rv_op_slt; break; 2681ea103259SMichael Clark case 3: op = rv_op_sltu; break; 2682ea103259SMichael Clark case 4: op = rv_op_xor; break; 2683ea103259SMichael Clark case 5: op = rv_op_srl; break; 2684ea103259SMichael Clark case 6: op = rv_op_or; break; 2685ea103259SMichael Clark case 7: op = rv_op_and; break; 2686ea103259SMichael Clark case 8: op = rv_op_mul; break; 2687ea103259SMichael Clark case 9: op = rv_op_mulh; break; 2688ea103259SMichael Clark case 10: op = rv_op_mulhsu; break; 2689ea103259SMichael Clark case 11: op = rv_op_mulhu; break; 2690ea103259SMichael Clark case 12: op = rv_op_div; break; 2691ea103259SMichael Clark case 13: op = rv_op_divu; break; 2692ea103259SMichael Clark case 14: op = rv_op_rem; break; 2693ea103259SMichael Clark case 15: op = rv_op_remu; break; 269402c1b569SPhilipp Tomsich case 36: 269502c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 269602c1b569SPhilipp Tomsich case 0: op = rv_op_zext_h; break; 26975748c886SWeiwei Li default: op = rv_op_pack; break; 269802c1b569SPhilipp Tomsich } 269902c1b569SPhilipp Tomsich break; 27005748c886SWeiwei Li case 39: op = rv_op_packh; break; 27015748c886SWeiwei Li 270202c1b569SPhilipp Tomsich case 41: op = rv_op_clmul; break; 270302c1b569SPhilipp Tomsich case 42: op = rv_op_clmulr; break; 270402c1b569SPhilipp Tomsich case 43: op = rv_op_clmulh; break; 270502c1b569SPhilipp Tomsich case 44: op = rv_op_min; break; 270602c1b569SPhilipp Tomsich case 45: op = rv_op_minu; break; 270702c1b569SPhilipp Tomsich case 46: op = rv_op_max; break; 270802c1b569SPhilipp Tomsich case 47: op = rv_op_maxu; break; 2709d397be9aSRichard Henderson case 075: op = rv_op_czero_eqz; break; 2710d397be9aSRichard Henderson case 077: op = rv_op_czero_nez; break; 271102c1b569SPhilipp Tomsich case 130: op = rv_op_sh1add; break; 271202c1b569SPhilipp Tomsich case 132: op = rv_op_sh2add; break; 271302c1b569SPhilipp Tomsich case 134: op = rv_op_sh3add; break; 271402c1b569SPhilipp Tomsich case 161: op = rv_op_bset; break; 27155748c886SWeiwei Li case 162: op = rv_op_xperm4; break; 27165748c886SWeiwei Li case 164: op = rv_op_xperm8; break; 27175748c886SWeiwei Li case 200: op = rv_op_aes64es; break; 27185748c886SWeiwei Li case 216: op = rv_op_aes64esm; break; 27195748c886SWeiwei Li case 232: op = rv_op_aes64ds; break; 27205748c886SWeiwei Li case 248: op = rv_op_aes64dsm; break; 2721ea103259SMichael Clark case 256: op = rv_op_sub; break; 272202c1b569SPhilipp Tomsich case 260: op = rv_op_xnor; break; 2723ea103259SMichael Clark case 261: op = rv_op_sra; break; 272402c1b569SPhilipp Tomsich case 262: op = rv_op_orn; break; 272502c1b569SPhilipp Tomsich case 263: op = rv_op_andn; break; 272602c1b569SPhilipp Tomsich case 289: op = rv_op_bclr; break; 272702c1b569SPhilipp Tomsich case 293: op = rv_op_bext; break; 27285748c886SWeiwei Li case 320: op = rv_op_sha512sum0r; break; 27295748c886SWeiwei Li case 328: op = rv_op_sha512sum1r; break; 27305748c886SWeiwei Li case 336: op = rv_op_sha512sig0l; break; 27315748c886SWeiwei Li case 344: op = rv_op_sha512sig1l; break; 27325748c886SWeiwei Li case 368: op = rv_op_sha512sig0h; break; 27335748c886SWeiwei Li case 376: op = rv_op_sha512sig1h; break; 273402c1b569SPhilipp Tomsich case 385: op = rv_op_rol; break; 27355748c886SWeiwei Li case 389: op = rv_op_ror; break; 273602c1b569SPhilipp Tomsich case 417: op = rv_op_binv; break; 27375748c886SWeiwei Li case 504: op = rv_op_aes64ks2; break; 27385748c886SWeiwei Li } 27395748c886SWeiwei Li switch ((inst >> 25) & 0b0011111) { 27405748c886SWeiwei Li case 17: op = rv_op_aes32esi; break; 27415748c886SWeiwei Li case 19: op = rv_op_aes32esmi; break; 27425748c886SWeiwei Li case 21: op = rv_op_aes32dsi; break; 27435748c886SWeiwei Li case 23: op = rv_op_aes32dsmi; break; 27445748c886SWeiwei Li case 24: op = rv_op_sm4ed; break; 27455748c886SWeiwei Li case 26: op = rv_op_sm4ks; break; 2746ea103259SMichael Clark } 2747ea103259SMichael Clark break; 2748ea103259SMichael Clark case 13: op = rv_op_lui; break; 2749ea103259SMichael Clark case 14: 275098624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 275198624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 2752ea103259SMichael Clark case 0: op = rv_op_addw; break; 2753ea103259SMichael Clark case 1: op = rv_op_sllw; break; 2754ea103259SMichael Clark case 5: op = rv_op_srlw; break; 2755ea103259SMichael Clark case 8: op = rv_op_mulw; break; 2756ea103259SMichael Clark case 12: op = rv_op_divw; break; 2757ea103259SMichael Clark case 13: op = rv_op_divuw; break; 2758ea103259SMichael Clark case 14: op = rv_op_remw; break; 2759ea103259SMichael Clark case 15: op = rv_op_remuw; break; 276002c1b569SPhilipp Tomsich case 32: op = rv_op_add_uw; break; 276102c1b569SPhilipp Tomsich case 36: 276202c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 276302c1b569SPhilipp Tomsich case 0: op = rv_op_zext_h; break; 27645748c886SWeiwei Li default: op = rv_op_packw; break; 276502c1b569SPhilipp Tomsich } 276602c1b569SPhilipp Tomsich break; 276702c1b569SPhilipp Tomsich case 130: op = rv_op_sh1add_uw; break; 276802c1b569SPhilipp Tomsich case 132: op = rv_op_sh2add_uw; break; 276902c1b569SPhilipp Tomsich case 134: op = rv_op_sh3add_uw; break; 2770ea103259SMichael Clark case 256: op = rv_op_subw; break; 2771ea103259SMichael Clark case 261: op = rv_op_sraw; break; 277202c1b569SPhilipp Tomsich case 385: op = rv_op_rolw; break; 277302c1b569SPhilipp Tomsich case 389: op = rv_op_rorw; break; 2774ea103259SMichael Clark } 2775ea103259SMichael Clark break; 2776ea103259SMichael Clark case 16: 27773bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2778ea103259SMichael Clark case 0: op = rv_op_fmadd_s; break; 2779ea103259SMichael Clark case 1: op = rv_op_fmadd_d; break; 2780ea103259SMichael Clark case 3: op = rv_op_fmadd_q; break; 2781ea103259SMichael Clark } 2782ea103259SMichael Clark break; 2783ea103259SMichael Clark case 17: 27843bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2785ea103259SMichael Clark case 0: op = rv_op_fmsub_s; break; 2786ea103259SMichael Clark case 1: op = rv_op_fmsub_d; break; 2787ea103259SMichael Clark case 3: op = rv_op_fmsub_q; break; 2788ea103259SMichael Clark } 2789ea103259SMichael Clark break; 2790ea103259SMichael Clark case 18: 27913bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2792ea103259SMichael Clark case 0: op = rv_op_fnmsub_s; break; 2793ea103259SMichael Clark case 1: op = rv_op_fnmsub_d; break; 2794ea103259SMichael Clark case 3: op = rv_op_fnmsub_q; break; 2795ea103259SMichael Clark } 2796ea103259SMichael Clark break; 2797ea103259SMichael Clark case 19: 27983bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2799ea103259SMichael Clark case 0: op = rv_op_fnmadd_s; break; 2800ea103259SMichael Clark case 1: op = rv_op_fnmadd_d; break; 2801ea103259SMichael Clark case 3: op = rv_op_fnmadd_q; break; 2802ea103259SMichael Clark } 2803ea103259SMichael Clark break; 2804ea103259SMichael Clark case 20: 28053bd87176SWeiwei Li switch ((inst >> 25) & 0b1111111) { 2806ea103259SMichael Clark case 0: op = rv_op_fadd_s; break; 2807ea103259SMichael Clark case 1: op = rv_op_fadd_d; break; 2808ea103259SMichael Clark case 3: op = rv_op_fadd_q; break; 2809ea103259SMichael Clark case 4: op = rv_op_fsub_s; break; 2810ea103259SMichael Clark case 5: op = rv_op_fsub_d; break; 2811ea103259SMichael Clark case 7: op = rv_op_fsub_q; break; 2812ea103259SMichael Clark case 8: op = rv_op_fmul_s; break; 2813ea103259SMichael Clark case 9: op = rv_op_fmul_d; break; 2814ea103259SMichael Clark case 11: op = rv_op_fmul_q; break; 2815ea103259SMichael Clark case 12: op = rv_op_fdiv_s; break; 2816ea103259SMichael Clark case 13: op = rv_op_fdiv_d; break; 2817ea103259SMichael Clark case 15: op = rv_op_fdiv_q; break; 2818ea103259SMichael Clark case 16: 28193bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2820ea103259SMichael Clark case 0: op = rv_op_fsgnj_s; break; 2821ea103259SMichael Clark case 1: op = rv_op_fsgnjn_s; break; 2822ea103259SMichael Clark case 2: op = rv_op_fsgnjx_s; break; 2823ea103259SMichael Clark } 2824ea103259SMichael Clark break; 2825ea103259SMichael Clark case 17: 28263bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2827ea103259SMichael Clark case 0: op = rv_op_fsgnj_d; break; 2828ea103259SMichael Clark case 1: op = rv_op_fsgnjn_d; break; 2829ea103259SMichael Clark case 2: op = rv_op_fsgnjx_d; break; 2830ea103259SMichael Clark } 2831ea103259SMichael Clark break; 2832ea103259SMichael Clark case 19: 28333bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2834ea103259SMichael Clark case 0: op = rv_op_fsgnj_q; break; 2835ea103259SMichael Clark case 1: op = rv_op_fsgnjn_q; break; 2836ea103259SMichael Clark case 2: op = rv_op_fsgnjx_q; break; 2837ea103259SMichael Clark } 2838ea103259SMichael Clark break; 2839ea103259SMichael Clark case 20: 28403bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2841ea103259SMichael Clark case 0: op = rv_op_fmin_s; break; 2842ea103259SMichael Clark case 1: op = rv_op_fmax_s; break; 2843ea103259SMichael Clark } 2844ea103259SMichael Clark break; 2845ea103259SMichael Clark case 21: 28463bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2847ea103259SMichael Clark case 0: op = rv_op_fmin_d; break; 2848ea103259SMichael Clark case 1: op = rv_op_fmax_d; break; 2849ea103259SMichael Clark } 2850ea103259SMichael Clark break; 2851ea103259SMichael Clark case 23: 28523bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2853ea103259SMichael Clark case 0: op = rv_op_fmin_q; break; 2854ea103259SMichael Clark case 1: op = rv_op_fmax_q; break; 2855ea103259SMichael Clark } 2856ea103259SMichael Clark break; 2857ea103259SMichael Clark case 32: 28583bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2859ea103259SMichael Clark case 1: op = rv_op_fcvt_s_d; break; 2860ea103259SMichael Clark case 3: op = rv_op_fcvt_s_q; break; 2861ea103259SMichael Clark } 2862ea103259SMichael Clark break; 2863ea103259SMichael Clark case 33: 28643bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2865ea103259SMichael Clark case 0: op = rv_op_fcvt_d_s; break; 2866ea103259SMichael Clark case 3: op = rv_op_fcvt_d_q; break; 2867ea103259SMichael Clark } 2868ea103259SMichael Clark break; 2869ea103259SMichael Clark case 35: 28703bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2871ea103259SMichael Clark case 0: op = rv_op_fcvt_q_s; break; 2872ea103259SMichael Clark case 1: op = rv_op_fcvt_q_d; break; 2873ea103259SMichael Clark } 2874ea103259SMichael Clark break; 2875ea103259SMichael Clark case 44: 28763bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2877ea103259SMichael Clark case 0: op = rv_op_fsqrt_s; break; 2878ea103259SMichael Clark } 2879ea103259SMichael Clark break; 2880ea103259SMichael Clark case 45: 28813bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2882ea103259SMichael Clark case 0: op = rv_op_fsqrt_d; break; 2883ea103259SMichael Clark } 2884ea103259SMichael Clark break; 2885ea103259SMichael Clark case 47: 28863bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2887ea103259SMichael Clark case 0: op = rv_op_fsqrt_q; break; 2888ea103259SMichael Clark } 2889ea103259SMichael Clark break; 2890ea103259SMichael Clark case 80: 28913bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2892ea103259SMichael Clark case 0: op = rv_op_fle_s; break; 2893ea103259SMichael Clark case 1: op = rv_op_flt_s; break; 2894ea103259SMichael Clark case 2: op = rv_op_feq_s; break; 2895ea103259SMichael Clark } 2896ea103259SMichael Clark break; 2897ea103259SMichael Clark case 81: 28983bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2899ea103259SMichael Clark case 0: op = rv_op_fle_d; break; 2900ea103259SMichael Clark case 1: op = rv_op_flt_d; break; 2901ea103259SMichael Clark case 2: op = rv_op_feq_d; break; 2902ea103259SMichael Clark } 2903ea103259SMichael Clark break; 2904ea103259SMichael Clark case 83: 29053bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2906ea103259SMichael Clark case 0: op = rv_op_fle_q; break; 2907ea103259SMichael Clark case 1: op = rv_op_flt_q; break; 2908ea103259SMichael Clark case 2: op = rv_op_feq_q; break; 2909ea103259SMichael Clark } 2910ea103259SMichael Clark break; 2911ea103259SMichael Clark case 96: 29123bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2913ea103259SMichael Clark case 0: op = rv_op_fcvt_w_s; break; 2914ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_s; break; 2915ea103259SMichael Clark case 2: op = rv_op_fcvt_l_s; break; 2916ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_s; break; 2917ea103259SMichael Clark } 2918ea103259SMichael Clark break; 2919ea103259SMichael Clark case 97: 29203bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2921ea103259SMichael Clark case 0: op = rv_op_fcvt_w_d; break; 2922ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_d; break; 2923ea103259SMichael Clark case 2: op = rv_op_fcvt_l_d; break; 2924ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_d; break; 2925ea103259SMichael Clark } 2926ea103259SMichael Clark break; 2927ea103259SMichael Clark case 99: 29283bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2929ea103259SMichael Clark case 0: op = rv_op_fcvt_w_q; break; 2930ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_q; break; 2931ea103259SMichael Clark case 2: op = rv_op_fcvt_l_q; break; 2932ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_q; break; 2933ea103259SMichael Clark } 2934ea103259SMichael Clark break; 2935ea103259SMichael Clark case 104: 29363bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2937ea103259SMichael Clark case 0: op = rv_op_fcvt_s_w; break; 2938ea103259SMichael Clark case 1: op = rv_op_fcvt_s_wu; break; 2939ea103259SMichael Clark case 2: op = rv_op_fcvt_s_l; break; 2940ea103259SMichael Clark case 3: op = rv_op_fcvt_s_lu; break; 2941ea103259SMichael Clark } 2942ea103259SMichael Clark break; 2943ea103259SMichael Clark case 105: 29443bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2945ea103259SMichael Clark case 0: op = rv_op_fcvt_d_w; break; 2946ea103259SMichael Clark case 1: op = rv_op_fcvt_d_wu; break; 2947ea103259SMichael Clark case 2: op = rv_op_fcvt_d_l; break; 2948ea103259SMichael Clark case 3: op = rv_op_fcvt_d_lu; break; 2949ea103259SMichael Clark } 2950ea103259SMichael Clark break; 2951ea103259SMichael Clark case 107: 29523bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2953ea103259SMichael Clark case 0: op = rv_op_fcvt_q_w; break; 2954ea103259SMichael Clark case 1: op = rv_op_fcvt_q_wu; break; 2955ea103259SMichael Clark case 2: op = rv_op_fcvt_q_l; break; 2956ea103259SMichael Clark case 3: op = rv_op_fcvt_q_lu; break; 2957ea103259SMichael Clark } 2958ea103259SMichael Clark break; 2959ea103259SMichael Clark case 112: 296098624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 296198624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2962ea103259SMichael Clark case 0: op = rv_op_fmv_x_s; break; 2963ea103259SMichael Clark case 1: op = rv_op_fclass_s; break; 2964ea103259SMichael Clark } 2965ea103259SMichael Clark break; 2966ea103259SMichael Clark case 113: 296798624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 296898624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2969ea103259SMichael Clark case 0: op = rv_op_fmv_x_d; break; 2970ea103259SMichael Clark case 1: op = rv_op_fclass_d; break; 2971ea103259SMichael Clark } 2972ea103259SMichael Clark break; 2973ea103259SMichael Clark case 115: 297498624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 297598624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2976ea103259SMichael Clark case 0: op = rv_op_fmv_x_q; break; 2977ea103259SMichael Clark case 1: op = rv_op_fclass_q; break; 2978ea103259SMichael Clark } 2979ea103259SMichael Clark break; 2980ea103259SMichael Clark case 120: 298198624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 298298624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2983ea103259SMichael Clark case 0: op = rv_op_fmv_s_x; break; 2984ea103259SMichael Clark } 2985ea103259SMichael Clark break; 2986ea103259SMichael Clark case 121: 298798624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 298898624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2989ea103259SMichael Clark case 0: op = rv_op_fmv_d_x; break; 2990ea103259SMichael Clark } 2991ea103259SMichael Clark break; 2992ea103259SMichael Clark case 123: 299398624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 299498624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2995ea103259SMichael Clark case 0: op = rv_op_fmv_q_x; break; 2996ea103259SMichael Clark } 2997ea103259SMichael Clark break; 2998ea103259SMichael Clark } 2999ea103259SMichael Clark break; 300007f4964dSYang Liu case 21: 30013bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 300207f4964dSYang Liu case 0: 30033bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 300407f4964dSYang Liu case 0: op = rv_op_vadd_vv; break; 300507f4964dSYang Liu case 2: op = rv_op_vsub_vv; break; 300607f4964dSYang Liu case 4: op = rv_op_vminu_vv; break; 300707f4964dSYang Liu case 5: op = rv_op_vmin_vv; break; 300807f4964dSYang Liu case 6: op = rv_op_vmaxu_vv; break; 300907f4964dSYang Liu case 7: op = rv_op_vmax_vv; break; 301007f4964dSYang Liu case 9: op = rv_op_vand_vv; break; 301107f4964dSYang Liu case 10: op = rv_op_vor_vv; break; 301207f4964dSYang Liu case 11: op = rv_op_vxor_vv; break; 301307f4964dSYang Liu case 12: op = rv_op_vrgather_vv; break; 301407f4964dSYang Liu case 14: op = rv_op_vrgatherei16_vv; break; 301598624d13SWeiwei Li case 16: 301698624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 301798624d13SWeiwei Li op = rv_op_vadc_vvm; 301898624d13SWeiwei Li } 301998624d13SWeiwei Li break; 302007f4964dSYang Liu case 17: op = rv_op_vmadc_vvm; break; 302198624d13SWeiwei Li case 18: 302298624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 302398624d13SWeiwei Li op = rv_op_vsbc_vvm; 302498624d13SWeiwei Li } 302598624d13SWeiwei Li break; 302607f4964dSYang Liu case 19: op = rv_op_vmsbc_vvm; break; 302707f4964dSYang Liu case 23: 302807f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 302907f4964dSYang Liu op = rv_op_vmv_v_v; 303007f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 303107f4964dSYang Liu op = rv_op_vmerge_vvm; 303207f4964dSYang Liu break; 303307f4964dSYang Liu case 24: op = rv_op_vmseq_vv; break; 303407f4964dSYang Liu case 25: op = rv_op_vmsne_vv; break; 303507f4964dSYang Liu case 26: op = rv_op_vmsltu_vv; break; 303607f4964dSYang Liu case 27: op = rv_op_vmslt_vv; break; 303707f4964dSYang Liu case 28: op = rv_op_vmsleu_vv; break; 303807f4964dSYang Liu case 29: op = rv_op_vmsle_vv; break; 303907f4964dSYang Liu case 32: op = rv_op_vsaddu_vv; break; 304007f4964dSYang Liu case 33: op = rv_op_vsadd_vv; break; 304107f4964dSYang Liu case 34: op = rv_op_vssubu_vv; break; 304207f4964dSYang Liu case 35: op = rv_op_vssub_vv; break; 304307f4964dSYang Liu case 37: op = rv_op_vsll_vv; break; 304407f4964dSYang Liu case 39: op = rv_op_vsmul_vv; break; 304507f4964dSYang Liu case 40: op = rv_op_vsrl_vv; break; 304607f4964dSYang Liu case 41: op = rv_op_vsra_vv; break; 304707f4964dSYang Liu case 42: op = rv_op_vssrl_vv; break; 304807f4964dSYang Liu case 43: op = rv_op_vssra_vv; break; 304907f4964dSYang Liu case 44: op = rv_op_vnsrl_wv; break; 305007f4964dSYang Liu case 45: op = rv_op_vnsra_wv; break; 305107f4964dSYang Liu case 46: op = rv_op_vnclipu_wv; break; 305207f4964dSYang Liu case 47: op = rv_op_vnclip_wv; break; 305307f4964dSYang Liu case 48: op = rv_op_vwredsumu_vs; break; 305407f4964dSYang Liu case 49: op = rv_op_vwredsum_vs; break; 305507f4964dSYang Liu } 305607f4964dSYang Liu break; 305707f4964dSYang Liu case 1: 30583bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 305907f4964dSYang Liu case 0: op = rv_op_vfadd_vv; break; 306007f4964dSYang Liu case 1: op = rv_op_vfredusum_vs; break; 306107f4964dSYang Liu case 2: op = rv_op_vfsub_vv; break; 306207f4964dSYang Liu case 3: op = rv_op_vfredosum_vs; break; 306307f4964dSYang Liu case 4: op = rv_op_vfmin_vv; break; 306407f4964dSYang Liu case 5: op = rv_op_vfredmin_vs; break; 306507f4964dSYang Liu case 6: op = rv_op_vfmax_vv; break; 306607f4964dSYang Liu case 7: op = rv_op_vfredmax_vs; break; 306707f4964dSYang Liu case 8: op = rv_op_vfsgnj_vv; break; 306807f4964dSYang Liu case 9: op = rv_op_vfsgnjn_vv; break; 306907f4964dSYang Liu case 10: op = rv_op_vfsgnjx_vv; break; 307007f4964dSYang Liu case 16: 30713bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 307207f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_f_s; break; 307307f4964dSYang Liu } 307407f4964dSYang Liu break; 307507f4964dSYang Liu case 18: 30763bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 307707f4964dSYang Liu case 0: op = rv_op_vfcvt_xu_f_v; break; 307807f4964dSYang Liu case 1: op = rv_op_vfcvt_x_f_v; break; 307907f4964dSYang Liu case 2: op = rv_op_vfcvt_f_xu_v; break; 308007f4964dSYang Liu case 3: op = rv_op_vfcvt_f_x_v; break; 308107f4964dSYang Liu case 6: op = rv_op_vfcvt_rtz_xu_f_v; break; 308207f4964dSYang Liu case 7: op = rv_op_vfcvt_rtz_x_f_v; break; 308307f4964dSYang Liu case 8: op = rv_op_vfwcvt_xu_f_v; break; 308407f4964dSYang Liu case 9: op = rv_op_vfwcvt_x_f_v; break; 308507f4964dSYang Liu case 10: op = rv_op_vfwcvt_f_xu_v; break; 308607f4964dSYang Liu case 11: op = rv_op_vfwcvt_f_x_v; break; 308707f4964dSYang Liu case 12: op = rv_op_vfwcvt_f_f_v; break; 308807f4964dSYang Liu case 14: op = rv_op_vfwcvt_rtz_xu_f_v; break; 308907f4964dSYang Liu case 15: op = rv_op_vfwcvt_rtz_x_f_v; break; 309007f4964dSYang Liu case 16: op = rv_op_vfncvt_xu_f_w; break; 309107f4964dSYang Liu case 17: op = rv_op_vfncvt_x_f_w; break; 309207f4964dSYang Liu case 18: op = rv_op_vfncvt_f_xu_w; break; 309307f4964dSYang Liu case 19: op = rv_op_vfncvt_f_x_w; break; 309407f4964dSYang Liu case 20: op = rv_op_vfncvt_f_f_w; break; 309507f4964dSYang Liu case 21: op = rv_op_vfncvt_rod_f_f_w; break; 309607f4964dSYang Liu case 22: op = rv_op_vfncvt_rtz_xu_f_w; break; 309707f4964dSYang Liu case 23: op = rv_op_vfncvt_rtz_x_f_w; break; 309807f4964dSYang Liu } 309907f4964dSYang Liu break; 310007f4964dSYang Liu case 19: 31013bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 310207f4964dSYang Liu case 0: op = rv_op_vfsqrt_v; break; 310307f4964dSYang Liu case 4: op = rv_op_vfrsqrt7_v; break; 310407f4964dSYang Liu case 5: op = rv_op_vfrec7_v; break; 310507f4964dSYang Liu case 16: op = rv_op_vfclass_v; break; 310607f4964dSYang Liu } 310707f4964dSYang Liu break; 310807f4964dSYang Liu case 24: op = rv_op_vmfeq_vv; break; 310907f4964dSYang Liu case 25: op = rv_op_vmfle_vv; break; 311007f4964dSYang Liu case 27: op = rv_op_vmflt_vv; break; 311107f4964dSYang Liu case 28: op = rv_op_vmfne_vv; break; 311207f4964dSYang Liu case 32: op = rv_op_vfdiv_vv; break; 311307f4964dSYang Liu case 36: op = rv_op_vfmul_vv; break; 311407f4964dSYang Liu case 40: op = rv_op_vfmadd_vv; break; 311507f4964dSYang Liu case 41: op = rv_op_vfnmadd_vv; break; 311607f4964dSYang Liu case 42: op = rv_op_vfmsub_vv; break; 311707f4964dSYang Liu case 43: op = rv_op_vfnmsub_vv; break; 311807f4964dSYang Liu case 44: op = rv_op_vfmacc_vv; break; 311907f4964dSYang Liu case 45: op = rv_op_vfnmacc_vv; break; 312007f4964dSYang Liu case 46: op = rv_op_vfmsac_vv; break; 312107f4964dSYang Liu case 47: op = rv_op_vfnmsac_vv; break; 312207f4964dSYang Liu case 48: op = rv_op_vfwadd_vv; break; 312307f4964dSYang Liu case 49: op = rv_op_vfwredusum_vs; break; 312407f4964dSYang Liu case 50: op = rv_op_vfwsub_vv; break; 312507f4964dSYang Liu case 51: op = rv_op_vfwredosum_vs; break; 312607f4964dSYang Liu case 52: op = rv_op_vfwadd_wv; break; 312707f4964dSYang Liu case 54: op = rv_op_vfwsub_wv; break; 312807f4964dSYang Liu case 56: op = rv_op_vfwmul_vv; break; 312907f4964dSYang Liu case 60: op = rv_op_vfwmacc_vv; break; 313007f4964dSYang Liu case 61: op = rv_op_vfwnmacc_vv; break; 313107f4964dSYang Liu case 62: op = rv_op_vfwmsac_vv; break; 313207f4964dSYang Liu case 63: op = rv_op_vfwnmsac_vv; break; 313307f4964dSYang Liu } 313407f4964dSYang Liu break; 313507f4964dSYang Liu case 2: 31363bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 313707f4964dSYang Liu case 0: op = rv_op_vredsum_vs; break; 313807f4964dSYang Liu case 1: op = rv_op_vredand_vs; break; 313907f4964dSYang Liu case 2: op = rv_op_vredor_vs; break; 314007f4964dSYang Liu case 3: op = rv_op_vredxor_vs; break; 314107f4964dSYang Liu case 4: op = rv_op_vredminu_vs; break; 314207f4964dSYang Liu case 5: op = rv_op_vredmin_vs; break; 314307f4964dSYang Liu case 6: op = rv_op_vredmaxu_vs; break; 314407f4964dSYang Liu case 7: op = rv_op_vredmax_vs; break; 314507f4964dSYang Liu case 8: op = rv_op_vaaddu_vv; break; 314607f4964dSYang Liu case 9: op = rv_op_vaadd_vv; break; 314707f4964dSYang Liu case 10: op = rv_op_vasubu_vv; break; 314807f4964dSYang Liu case 11: op = rv_op_vasub_vv; break; 314907f4964dSYang Liu case 16: 31503bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 315107f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vmv_x_s; break; 315207f4964dSYang Liu case 16: op = rv_op_vcpop_m; break; 315307f4964dSYang Liu case 17: op = rv_op_vfirst_m; break; 315407f4964dSYang Liu } 315507f4964dSYang Liu break; 315607f4964dSYang Liu case 18: 31573bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 315807f4964dSYang Liu case 2: op = rv_op_vzext_vf8; break; 315907f4964dSYang Liu case 3: op = rv_op_vsext_vf8; break; 316007f4964dSYang Liu case 4: op = rv_op_vzext_vf4; break; 316107f4964dSYang Liu case 5: op = rv_op_vsext_vf4; break; 316207f4964dSYang Liu case 6: op = rv_op_vzext_vf2; break; 316307f4964dSYang Liu case 7: op = rv_op_vsext_vf2; break; 316407f4964dSYang Liu } 316507f4964dSYang Liu break; 316607f4964dSYang Liu case 20: 31673bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 316807f4964dSYang Liu case 1: op = rv_op_vmsbf_m; break; 316907f4964dSYang Liu case 2: op = rv_op_vmsof_m; break; 317007f4964dSYang Liu case 3: op = rv_op_vmsif_m; break; 317107f4964dSYang Liu case 16: op = rv_op_viota_m; break; 317298624d13SWeiwei Li case 17: 317398624d13SWeiwei Li if (((inst >> 20) & 0b11111) == 0) { 317498624d13SWeiwei Li op = rv_op_vid_v; 317598624d13SWeiwei Li } 317698624d13SWeiwei Li break; 317707f4964dSYang Liu } 317807f4964dSYang Liu break; 317907f4964dSYang Liu case 23: if ((inst >> 25) & 1) op = rv_op_vcompress_vm; break; 318007f4964dSYang Liu case 24: if ((inst >> 25) & 1) op = rv_op_vmandn_mm; break; 318107f4964dSYang Liu case 25: if ((inst >> 25) & 1) op = rv_op_vmand_mm; break; 318207f4964dSYang Liu case 26: if ((inst >> 25) & 1) op = rv_op_vmor_mm; break; 318307f4964dSYang Liu case 27: if ((inst >> 25) & 1) op = rv_op_vmxor_mm; break; 318407f4964dSYang Liu case 28: if ((inst >> 25) & 1) op = rv_op_vmorn_mm; break; 318507f4964dSYang Liu case 29: if ((inst >> 25) & 1) op = rv_op_vmnand_mm; break; 318607f4964dSYang Liu case 30: if ((inst >> 25) & 1) op = rv_op_vmnor_mm; break; 318707f4964dSYang Liu case 31: if ((inst >> 25) & 1) op = rv_op_vmxnor_mm; break; 318807f4964dSYang Liu case 32: op = rv_op_vdivu_vv; break; 318907f4964dSYang Liu case 33: op = rv_op_vdiv_vv; break; 319007f4964dSYang Liu case 34: op = rv_op_vremu_vv; break; 319107f4964dSYang Liu case 35: op = rv_op_vrem_vv; break; 319207f4964dSYang Liu case 36: op = rv_op_vmulhu_vv; break; 319307f4964dSYang Liu case 37: op = rv_op_vmul_vv; break; 319407f4964dSYang Liu case 38: op = rv_op_vmulhsu_vv; break; 319507f4964dSYang Liu case 39: op = rv_op_vmulh_vv; break; 319607f4964dSYang Liu case 41: op = rv_op_vmadd_vv; break; 319707f4964dSYang Liu case 43: op = rv_op_vnmsub_vv; break; 319807f4964dSYang Liu case 45: op = rv_op_vmacc_vv; break; 319907f4964dSYang Liu case 47: op = rv_op_vnmsac_vv; break; 320007f4964dSYang Liu case 48: op = rv_op_vwaddu_vv; break; 320107f4964dSYang Liu case 49: op = rv_op_vwadd_vv; break; 320207f4964dSYang Liu case 50: op = rv_op_vwsubu_vv; break; 320307f4964dSYang Liu case 51: op = rv_op_vwsub_vv; break; 320407f4964dSYang Liu case 52: op = rv_op_vwaddu_wv; break; 320507f4964dSYang Liu case 53: op = rv_op_vwadd_wv; break; 320607f4964dSYang Liu case 54: op = rv_op_vwsubu_wv; break; 320707f4964dSYang Liu case 55: op = rv_op_vwsub_wv; break; 320807f4964dSYang Liu case 56: op = rv_op_vwmulu_vv; break; 320907f4964dSYang Liu case 58: op = rv_op_vwmulsu_vv; break; 321007f4964dSYang Liu case 59: op = rv_op_vwmul_vv; break; 321107f4964dSYang Liu case 60: op = rv_op_vwmaccu_vv; break; 321207f4964dSYang Liu case 61: op = rv_op_vwmacc_vv; break; 321307f4964dSYang Liu case 63: op = rv_op_vwmaccsu_vv; break; 321407f4964dSYang Liu } 321507f4964dSYang Liu break; 321607f4964dSYang Liu case 3: 32173bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 321807f4964dSYang Liu case 0: op = rv_op_vadd_vi; break; 321907f4964dSYang Liu case 3: op = rv_op_vrsub_vi; break; 322007f4964dSYang Liu case 9: op = rv_op_vand_vi; break; 322107f4964dSYang Liu case 10: op = rv_op_vor_vi; break; 322207f4964dSYang Liu case 11: op = rv_op_vxor_vi; break; 322307f4964dSYang Liu case 12: op = rv_op_vrgather_vi; break; 322407f4964dSYang Liu case 14: op = rv_op_vslideup_vi; break; 322507f4964dSYang Liu case 15: op = rv_op_vslidedown_vi; break; 322698624d13SWeiwei Li case 16: 322798624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 322898624d13SWeiwei Li op = rv_op_vadc_vim; 322998624d13SWeiwei Li } 323098624d13SWeiwei Li break; 323107f4964dSYang Liu case 17: op = rv_op_vmadc_vim; break; 323207f4964dSYang Liu case 23: 323307f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 323407f4964dSYang Liu op = rv_op_vmv_v_i; 323507f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 323607f4964dSYang Liu op = rv_op_vmerge_vim; 323707f4964dSYang Liu break; 323807f4964dSYang Liu case 24: op = rv_op_vmseq_vi; break; 323907f4964dSYang Liu case 25: op = rv_op_vmsne_vi; break; 324007f4964dSYang Liu case 28: op = rv_op_vmsleu_vi; break; 324107f4964dSYang Liu case 29: op = rv_op_vmsle_vi; break; 324207f4964dSYang Liu case 30: op = rv_op_vmsgtu_vi; break; 324307f4964dSYang Liu case 31: op = rv_op_vmsgt_vi; break; 324407f4964dSYang Liu case 32: op = rv_op_vsaddu_vi; break; 324507f4964dSYang Liu case 33: op = rv_op_vsadd_vi; break; 324607f4964dSYang Liu case 37: op = rv_op_vsll_vi; break; 324707f4964dSYang Liu case 39: 32483bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 324907f4964dSYang Liu case 0: op = rv_op_vmv1r_v; break; 325007f4964dSYang Liu case 1: op = rv_op_vmv2r_v; break; 325107f4964dSYang Liu case 3: op = rv_op_vmv4r_v; break; 325207f4964dSYang Liu case 7: op = rv_op_vmv8r_v; break; 325307f4964dSYang Liu } 325407f4964dSYang Liu break; 325507f4964dSYang Liu case 40: op = rv_op_vsrl_vi; break; 325607f4964dSYang Liu case 41: op = rv_op_vsra_vi; break; 325707f4964dSYang Liu case 42: op = rv_op_vssrl_vi; break; 325807f4964dSYang Liu case 43: op = rv_op_vssra_vi; break; 325907f4964dSYang Liu case 44: op = rv_op_vnsrl_wi; break; 326007f4964dSYang Liu case 45: op = rv_op_vnsra_wi; break; 326107f4964dSYang Liu case 46: op = rv_op_vnclipu_wi; break; 326207f4964dSYang Liu case 47: op = rv_op_vnclip_wi; break; 326307f4964dSYang Liu } 326407f4964dSYang Liu break; 326507f4964dSYang Liu case 4: 32663bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 326707f4964dSYang Liu case 0: op = rv_op_vadd_vx; break; 326807f4964dSYang Liu case 2: op = rv_op_vsub_vx; break; 326907f4964dSYang Liu case 3: op = rv_op_vrsub_vx; break; 327007f4964dSYang Liu case 4: op = rv_op_vminu_vx; break; 327107f4964dSYang Liu case 5: op = rv_op_vmin_vx; break; 327207f4964dSYang Liu case 6: op = rv_op_vmaxu_vx; break; 327307f4964dSYang Liu case 7: op = rv_op_vmax_vx; break; 327407f4964dSYang Liu case 9: op = rv_op_vand_vx; break; 327507f4964dSYang Liu case 10: op = rv_op_vor_vx; break; 327607f4964dSYang Liu case 11: op = rv_op_vxor_vx; break; 327707f4964dSYang Liu case 12: op = rv_op_vrgather_vx; break; 327807f4964dSYang Liu case 14: op = rv_op_vslideup_vx; break; 327907f4964dSYang Liu case 15: op = rv_op_vslidedown_vx; break; 328098624d13SWeiwei Li case 16: 328198624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 328298624d13SWeiwei Li op = rv_op_vadc_vxm; 328398624d13SWeiwei Li } 328498624d13SWeiwei Li break; 328507f4964dSYang Liu case 17: op = rv_op_vmadc_vxm; break; 328698624d13SWeiwei Li case 18: 328798624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 328898624d13SWeiwei Li op = rv_op_vsbc_vxm; 328998624d13SWeiwei Li } 329098624d13SWeiwei Li break; 329107f4964dSYang Liu case 19: op = rv_op_vmsbc_vxm; break; 329207f4964dSYang Liu case 23: 329307f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 329407f4964dSYang Liu op = rv_op_vmv_v_x; 329507f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 329607f4964dSYang Liu op = rv_op_vmerge_vxm; 329707f4964dSYang Liu break; 329807f4964dSYang Liu case 24: op = rv_op_vmseq_vx; break; 329907f4964dSYang Liu case 25: op = rv_op_vmsne_vx; break; 330007f4964dSYang Liu case 26: op = rv_op_vmsltu_vx; break; 330107f4964dSYang Liu case 27: op = rv_op_vmslt_vx; break; 330207f4964dSYang Liu case 28: op = rv_op_vmsleu_vx; break; 330307f4964dSYang Liu case 29: op = rv_op_vmsle_vx; break; 330407f4964dSYang Liu case 30: op = rv_op_vmsgtu_vx; break; 330507f4964dSYang Liu case 31: op = rv_op_vmsgt_vx; break; 330607f4964dSYang Liu case 32: op = rv_op_vsaddu_vx; break; 330707f4964dSYang Liu case 33: op = rv_op_vsadd_vx; break; 330807f4964dSYang Liu case 34: op = rv_op_vssubu_vx; break; 330907f4964dSYang Liu case 35: op = rv_op_vssub_vx; break; 331007f4964dSYang Liu case 37: op = rv_op_vsll_vx; break; 331107f4964dSYang Liu case 39: op = rv_op_vsmul_vx; break; 331207f4964dSYang Liu case 40: op = rv_op_vsrl_vx; break; 331307f4964dSYang Liu case 41: op = rv_op_vsra_vx; break; 331407f4964dSYang Liu case 42: op = rv_op_vssrl_vx; break; 331507f4964dSYang Liu case 43: op = rv_op_vssra_vx; break; 331607f4964dSYang Liu case 44: op = rv_op_vnsrl_wx; break; 331707f4964dSYang Liu case 45: op = rv_op_vnsra_wx; break; 331807f4964dSYang Liu case 46: op = rv_op_vnclipu_wx; break; 331907f4964dSYang Liu case 47: op = rv_op_vnclip_wx; break; 332007f4964dSYang Liu } 332107f4964dSYang Liu break; 332207f4964dSYang Liu case 5: 33233bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 332407f4964dSYang Liu case 0: op = rv_op_vfadd_vf; break; 332507f4964dSYang Liu case 2: op = rv_op_vfsub_vf; break; 332607f4964dSYang Liu case 4: op = rv_op_vfmin_vf; break; 332707f4964dSYang Liu case 6: op = rv_op_vfmax_vf; break; 332807f4964dSYang Liu case 8: op = rv_op_vfsgnj_vf; break; 332907f4964dSYang Liu case 9: op = rv_op_vfsgnjn_vf; break; 333007f4964dSYang Liu case 10: op = rv_op_vfsgnjx_vf; break; 333107f4964dSYang Liu case 14: op = rv_op_vfslide1up_vf; break; 333207f4964dSYang Liu case 15: op = rv_op_vfslide1down_vf; break; 333307f4964dSYang Liu case 16: 33343bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 333507f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_s_f; break; 333607f4964dSYang Liu } 333707f4964dSYang Liu break; 333807f4964dSYang Liu case 23: 333907f4964dSYang Liu if (((inst >> 25) & 1) == 0) 334007f4964dSYang Liu op = rv_op_vfmerge_vfm; 334107f4964dSYang Liu else if (((inst >> 20) & 0b111111) == 32) 334207f4964dSYang Liu op = rv_op_vfmv_v_f; 334307f4964dSYang Liu break; 334407f4964dSYang Liu case 24: op = rv_op_vmfeq_vf; break; 334507f4964dSYang Liu case 25: op = rv_op_vmfle_vf; break; 334607f4964dSYang Liu case 27: op = rv_op_vmflt_vf; break; 334707f4964dSYang Liu case 28: op = rv_op_vmfne_vf; break; 334807f4964dSYang Liu case 29: op = rv_op_vmfgt_vf; break; 334907f4964dSYang Liu case 31: op = rv_op_vmfge_vf; break; 335007f4964dSYang Liu case 32: op = rv_op_vfdiv_vf; break; 335107f4964dSYang Liu case 33: op = rv_op_vfrdiv_vf; break; 335207f4964dSYang Liu case 36: op = rv_op_vfmul_vf; break; 335307f4964dSYang Liu case 39: op = rv_op_vfrsub_vf; break; 335407f4964dSYang Liu case 40: op = rv_op_vfmadd_vf; break; 335507f4964dSYang Liu case 41: op = rv_op_vfnmadd_vf; break; 335607f4964dSYang Liu case 42: op = rv_op_vfmsub_vf; break; 335707f4964dSYang Liu case 43: op = rv_op_vfnmsub_vf; break; 335807f4964dSYang Liu case 44: op = rv_op_vfmacc_vf; break; 335907f4964dSYang Liu case 45: op = rv_op_vfnmacc_vf; break; 336007f4964dSYang Liu case 46: op = rv_op_vfmsac_vf; break; 336107f4964dSYang Liu case 47: op = rv_op_vfnmsac_vf; break; 336207f4964dSYang Liu case 48: op = rv_op_vfwadd_vf; break; 336307f4964dSYang Liu case 50: op = rv_op_vfwsub_vf; break; 336407f4964dSYang Liu case 52: op = rv_op_vfwadd_wf; break; 336507f4964dSYang Liu case 54: op = rv_op_vfwsub_wf; break; 336607f4964dSYang Liu case 56: op = rv_op_vfwmul_vf; break; 336707f4964dSYang Liu case 60: op = rv_op_vfwmacc_vf; break; 336807f4964dSYang Liu case 61: op = rv_op_vfwnmacc_vf; break; 336907f4964dSYang Liu case 62: op = rv_op_vfwmsac_vf; break; 337007f4964dSYang Liu case 63: op = rv_op_vfwnmsac_vf; break; 337107f4964dSYang Liu } 337207f4964dSYang Liu break; 337307f4964dSYang Liu case 6: 33743bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 337507f4964dSYang Liu case 8: op = rv_op_vaaddu_vx; break; 337607f4964dSYang Liu case 9: op = rv_op_vaadd_vx; break; 337707f4964dSYang Liu case 10: op = rv_op_vasubu_vx; break; 337807f4964dSYang Liu case 11: op = rv_op_vasub_vx; break; 337907f4964dSYang Liu case 14: op = rv_op_vslide1up_vx; break; 338007f4964dSYang Liu case 15: op = rv_op_vslide1down_vx; break; 338107f4964dSYang Liu case 16: 33823bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 338307f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vmv_s_x; break; 338407f4964dSYang Liu } 338507f4964dSYang Liu break; 338607f4964dSYang Liu case 32: op = rv_op_vdivu_vx; break; 338707f4964dSYang Liu case 33: op = rv_op_vdiv_vx; break; 338807f4964dSYang Liu case 34: op = rv_op_vremu_vx; break; 338907f4964dSYang Liu case 35: op = rv_op_vrem_vx; break; 339007f4964dSYang Liu case 36: op = rv_op_vmulhu_vx; break; 339107f4964dSYang Liu case 37: op = rv_op_vmul_vx; break; 339207f4964dSYang Liu case 38: op = rv_op_vmulhsu_vx; break; 339307f4964dSYang Liu case 39: op = rv_op_vmulh_vx; break; 339407f4964dSYang Liu case 41: op = rv_op_vmadd_vx; break; 339507f4964dSYang Liu case 43: op = rv_op_vnmsub_vx; break; 339607f4964dSYang Liu case 45: op = rv_op_vmacc_vx; break; 339707f4964dSYang Liu case 47: op = rv_op_vnmsac_vx; break; 339807f4964dSYang Liu case 48: op = rv_op_vwaddu_vx; break; 339907f4964dSYang Liu case 49: op = rv_op_vwadd_vx; break; 340007f4964dSYang Liu case 50: op = rv_op_vwsubu_vx; break; 340107f4964dSYang Liu case 51: op = rv_op_vwsub_vx; break; 340207f4964dSYang Liu case 52: op = rv_op_vwaddu_wx; break; 340307f4964dSYang Liu case 53: op = rv_op_vwadd_wx; break; 340407f4964dSYang Liu case 54: op = rv_op_vwsubu_wx; break; 340507f4964dSYang Liu case 55: op = rv_op_vwsub_wx; break; 340607f4964dSYang Liu case 56: op = rv_op_vwmulu_vx; break; 340707f4964dSYang Liu case 58: op = rv_op_vwmulsu_vx; break; 340807f4964dSYang Liu case 59: op = rv_op_vwmul_vx; break; 340907f4964dSYang Liu case 60: op = rv_op_vwmaccu_vx; break; 341007f4964dSYang Liu case 61: op = rv_op_vwmacc_vx; break; 341107f4964dSYang Liu case 62: op = rv_op_vwmaccus_vx; break; 341207f4964dSYang Liu case 63: op = rv_op_vwmaccsu_vx; break; 341307f4964dSYang Liu } 341407f4964dSYang Liu break; 341507f4964dSYang Liu case 7: 341607f4964dSYang Liu if (((inst >> 31) & 1) == 0) { 341707f4964dSYang Liu op = rv_op_vsetvli; 341807f4964dSYang Liu } else if ((inst >> 30) & 1) { 341907f4964dSYang Liu op = rv_op_vsetivli; 342007f4964dSYang Liu } else if (((inst >> 25) & 0b11111) == 0) { 342107f4964dSYang Liu op = rv_op_vsetvl; 342207f4964dSYang Liu } 342307f4964dSYang Liu break; 342407f4964dSYang Liu } 342507f4964dSYang Liu break; 3426ea103259SMichael Clark case 22: 34273bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3428ea103259SMichael Clark case 0: op = rv_op_addid; break; 3429ea103259SMichael Clark case 1: 34303bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 3431ea103259SMichael Clark case 0: op = rv_op_sllid; break; 3432ea103259SMichael Clark } 3433ea103259SMichael Clark break; 3434ea103259SMichael Clark case 5: 34353bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 3436ea103259SMichael Clark case 0: op = rv_op_srlid; break; 3437ea103259SMichael Clark case 16: op = rv_op_sraid; break; 3438ea103259SMichael Clark } 3439ea103259SMichael Clark break; 3440ea103259SMichael Clark } 3441ea103259SMichael Clark break; 3442ea103259SMichael Clark case 24: 34433bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3444ea103259SMichael Clark case 0: op = rv_op_beq; break; 3445ea103259SMichael Clark case 1: op = rv_op_bne; break; 3446ea103259SMichael Clark case 4: op = rv_op_blt; break; 3447ea103259SMichael Clark case 5: op = rv_op_bge; break; 3448ea103259SMichael Clark case 6: op = rv_op_bltu; break; 3449ea103259SMichael Clark case 7: op = rv_op_bgeu; break; 3450ea103259SMichael Clark } 3451ea103259SMichael Clark break; 3452ea103259SMichael Clark case 25: 34533bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3454ea103259SMichael Clark case 0: op = rv_op_jalr; break; 3455ea103259SMichael Clark } 3456ea103259SMichael Clark break; 3457ea103259SMichael Clark case 27: op = rv_op_jal; break; 3458ea103259SMichael Clark case 28: 34593bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3460ea103259SMichael Clark case 0: 346198624d13SWeiwei Li switch (((inst >> 20) & 0b111111100000) | 346298624d13SWeiwei Li ((inst >> 7) & 0b000000011111)) { 3463ea103259SMichael Clark case 0: 34643bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3465ea103259SMichael Clark case 0: op = rv_op_ecall; break; 3466ea103259SMichael Clark case 32: op = rv_op_ebreak; break; 3467ea103259SMichael Clark case 64: op = rv_op_uret; break; 3468ea103259SMichael Clark } 3469ea103259SMichael Clark break; 3470ea103259SMichael Clark case 256: 34713bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 3472ea103259SMichael Clark case 2: 34733bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 3474ea103259SMichael Clark case 0: op = rv_op_sret; break; 3475ea103259SMichael Clark } 3476ea103259SMichael Clark break; 3477ea103259SMichael Clark case 4: op = rv_op_sfence_vm; break; 3478ea103259SMichael Clark case 5: 34793bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 3480ea103259SMichael Clark case 0: op = rv_op_wfi; break; 3481ea103259SMichael Clark } 3482ea103259SMichael Clark break; 3483ea103259SMichael Clark } 3484ea103259SMichael Clark break; 3485ea103259SMichael Clark case 288: op = rv_op_sfence_vma; break; 3486ea103259SMichael Clark case 512: 34873bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3488ea103259SMichael Clark case 64: op = rv_op_hret; break; 3489ea103259SMichael Clark } 3490ea103259SMichael Clark break; 3491ea103259SMichael Clark case 768: 34923bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3493ea103259SMichael Clark case 64: op = rv_op_mret; break; 3494ea103259SMichael Clark } 3495ea103259SMichael Clark break; 3496ea103259SMichael Clark case 1952: 34973bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3498ea103259SMichael Clark case 576: op = rv_op_dret; break; 3499ea103259SMichael Clark } 3500ea103259SMichael Clark break; 3501ea103259SMichael Clark } 3502ea103259SMichael Clark break; 3503ea103259SMichael Clark case 1: op = rv_op_csrrw; break; 3504ea103259SMichael Clark case 2: op = rv_op_csrrs; break; 3505ea103259SMichael Clark case 3: op = rv_op_csrrc; break; 3506ea103259SMichael Clark case 5: op = rv_op_csrrwi; break; 3507ea103259SMichael Clark case 6: op = rv_op_csrrsi; break; 3508ea103259SMichael Clark case 7: op = rv_op_csrrci; break; 3509ea103259SMichael Clark } 3510ea103259SMichael Clark break; 3511ea103259SMichael Clark case 30: 351298624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 351398624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 3514ea103259SMichael Clark case 0: op = rv_op_addd; break; 3515ea103259SMichael Clark case 1: op = rv_op_slld; break; 3516ea103259SMichael Clark case 5: op = rv_op_srld; break; 3517ea103259SMichael Clark case 8: op = rv_op_muld; break; 3518ea103259SMichael Clark case 12: op = rv_op_divd; break; 3519ea103259SMichael Clark case 13: op = rv_op_divud; break; 3520ea103259SMichael Clark case 14: op = rv_op_remd; break; 3521ea103259SMichael Clark case 15: op = rv_op_remud; break; 3522ea103259SMichael Clark case 256: op = rv_op_subd; break; 3523ea103259SMichael Clark case 261: op = rv_op_srad; break; 3524ea103259SMichael Clark } 3525ea103259SMichael Clark break; 3526ea103259SMichael Clark } 3527ea103259SMichael Clark break; 3528ea103259SMichael Clark } 3529ea103259SMichael Clark dec->op = op; 3530ea103259SMichael Clark } 3531ea103259SMichael Clark 3532ea103259SMichael Clark /* operand extractors */ 3533ea103259SMichael Clark 3534ea103259SMichael Clark static uint32_t operand_rd(rv_inst inst) 3535ea103259SMichael Clark { 3536ea103259SMichael Clark return (inst << 52) >> 59; 3537ea103259SMichael Clark } 3538ea103259SMichael Clark 3539ea103259SMichael Clark static uint32_t operand_rs1(rv_inst inst) 3540ea103259SMichael Clark { 3541ea103259SMichael Clark return (inst << 44) >> 59; 3542ea103259SMichael Clark } 3543ea103259SMichael Clark 3544ea103259SMichael Clark static uint32_t operand_rs2(rv_inst inst) 3545ea103259SMichael Clark { 3546ea103259SMichael Clark return (inst << 39) >> 59; 3547ea103259SMichael Clark } 3548ea103259SMichael Clark 3549ea103259SMichael Clark static uint32_t operand_rs3(rv_inst inst) 3550ea103259SMichael Clark { 3551ea103259SMichael Clark return (inst << 32) >> 59; 3552ea103259SMichael Clark } 3553ea103259SMichael Clark 3554ea103259SMichael Clark static uint32_t operand_aq(rv_inst inst) 3555ea103259SMichael Clark { 3556ea103259SMichael Clark return (inst << 37) >> 63; 3557ea103259SMichael Clark } 3558ea103259SMichael Clark 3559ea103259SMichael Clark static uint32_t operand_rl(rv_inst inst) 3560ea103259SMichael Clark { 3561ea103259SMichael Clark return (inst << 38) >> 63; 3562ea103259SMichael Clark } 3563ea103259SMichael Clark 3564ea103259SMichael Clark static uint32_t operand_pred(rv_inst inst) 3565ea103259SMichael Clark { 3566ea103259SMichael Clark return (inst << 36) >> 60; 3567ea103259SMichael Clark } 3568ea103259SMichael Clark 3569ea103259SMichael Clark static uint32_t operand_succ(rv_inst inst) 3570ea103259SMichael Clark { 3571ea103259SMichael Clark return (inst << 40) >> 60; 3572ea103259SMichael Clark } 3573ea103259SMichael Clark 3574ea103259SMichael Clark static uint32_t operand_rm(rv_inst inst) 3575ea103259SMichael Clark { 3576ea103259SMichael Clark return (inst << 49) >> 61; 3577ea103259SMichael Clark } 3578ea103259SMichael Clark 3579ea103259SMichael Clark static uint32_t operand_shamt5(rv_inst inst) 3580ea103259SMichael Clark { 3581ea103259SMichael Clark return (inst << 39) >> 59; 3582ea103259SMichael Clark } 3583ea103259SMichael Clark 3584ea103259SMichael Clark static uint32_t operand_shamt6(rv_inst inst) 3585ea103259SMichael Clark { 3586ea103259SMichael Clark return (inst << 38) >> 58; 3587ea103259SMichael Clark } 3588ea103259SMichael Clark 3589ea103259SMichael Clark static uint32_t operand_shamt7(rv_inst inst) 3590ea103259SMichael Clark { 3591ea103259SMichael Clark return (inst << 37) >> 57; 3592ea103259SMichael Clark } 3593ea103259SMichael Clark 3594ea103259SMichael Clark static uint32_t operand_crdq(rv_inst inst) 3595ea103259SMichael Clark { 3596ea103259SMichael Clark return (inst << 59) >> 61; 3597ea103259SMichael Clark } 3598ea103259SMichael Clark 3599ea103259SMichael Clark static uint32_t operand_crs1q(rv_inst inst) 3600ea103259SMichael Clark { 3601ea103259SMichael Clark return (inst << 54) >> 61; 3602ea103259SMichael Clark } 3603ea103259SMichael Clark 3604ea103259SMichael Clark static uint32_t operand_crs1rdq(rv_inst inst) 3605ea103259SMichael Clark { 3606ea103259SMichael Clark return (inst << 54) >> 61; 3607ea103259SMichael Clark } 3608ea103259SMichael Clark 3609ea103259SMichael Clark static uint32_t operand_crs2q(rv_inst inst) 3610ea103259SMichael Clark { 3611ea103259SMichael Clark return (inst << 59) >> 61; 3612ea103259SMichael Clark } 3613ea103259SMichael Clark 36142c71d02eSWeiwei Li static uint32_t calculate_xreg(uint32_t sreg) 36152c71d02eSWeiwei Li { 36162c71d02eSWeiwei Li return sreg < 2 ? sreg + 8 : sreg + 16; 36172c71d02eSWeiwei Li } 36182c71d02eSWeiwei Li 36192c71d02eSWeiwei Li static uint32_t operand_sreg1(rv_inst inst) 36202c71d02eSWeiwei Li { 36212c71d02eSWeiwei Li return calculate_xreg((inst << 54) >> 61); 36222c71d02eSWeiwei Li } 36232c71d02eSWeiwei Li 36242c71d02eSWeiwei Li static uint32_t operand_sreg2(rv_inst inst) 36252c71d02eSWeiwei Li { 36262c71d02eSWeiwei Li return calculate_xreg((inst << 59) >> 61); 36272c71d02eSWeiwei Li } 36282c71d02eSWeiwei Li 3629ea103259SMichael Clark static uint32_t operand_crd(rv_inst inst) 3630ea103259SMichael Clark { 3631ea103259SMichael Clark return (inst << 52) >> 59; 3632ea103259SMichael Clark } 3633ea103259SMichael Clark 3634ea103259SMichael Clark static uint32_t operand_crs1(rv_inst inst) 3635ea103259SMichael Clark { 3636ea103259SMichael Clark return (inst << 52) >> 59; 3637ea103259SMichael Clark } 3638ea103259SMichael Clark 3639ea103259SMichael Clark static uint32_t operand_crs1rd(rv_inst inst) 3640ea103259SMichael Clark { 3641ea103259SMichael Clark return (inst << 52) >> 59; 3642ea103259SMichael Clark } 3643ea103259SMichael Clark 3644ea103259SMichael Clark static uint32_t operand_crs2(rv_inst inst) 3645ea103259SMichael Clark { 3646ea103259SMichael Clark return (inst << 57) >> 59; 3647ea103259SMichael Clark } 3648ea103259SMichael Clark 3649ea103259SMichael Clark static uint32_t operand_cimmsh5(rv_inst inst) 3650ea103259SMichael Clark { 3651ea103259SMichael Clark return (inst << 57) >> 59; 3652ea103259SMichael Clark } 3653ea103259SMichael Clark 3654ea103259SMichael Clark static uint32_t operand_csr12(rv_inst inst) 3655ea103259SMichael Clark { 3656ea103259SMichael Clark return (inst << 32) >> 52; 3657ea103259SMichael Clark } 3658ea103259SMichael Clark 3659ea103259SMichael Clark static int32_t operand_imm12(rv_inst inst) 3660ea103259SMichael Clark { 3661ea103259SMichael Clark return ((int64_t)inst << 32) >> 52; 3662ea103259SMichael Clark } 3663ea103259SMichael Clark 3664ea103259SMichael Clark static int32_t operand_imm20(rv_inst inst) 3665ea103259SMichael Clark { 3666ea103259SMichael Clark return (((int64_t)inst << 32) >> 44) << 12; 3667ea103259SMichael Clark } 3668ea103259SMichael Clark 3669ea103259SMichael Clark static int32_t operand_jimm20(rv_inst inst) 3670ea103259SMichael Clark { 3671ea103259SMichael Clark return (((int64_t)inst << 32) >> 63) << 20 | 3672ea103259SMichael Clark ((inst << 33) >> 54) << 1 | 3673ea103259SMichael Clark ((inst << 43) >> 63) << 11 | 3674ea103259SMichael Clark ((inst << 44) >> 56) << 12; 3675ea103259SMichael Clark } 3676ea103259SMichael Clark 3677ea103259SMichael Clark static int32_t operand_simm12(rv_inst inst) 3678ea103259SMichael Clark { 3679ea103259SMichael Clark return (((int64_t)inst << 32) >> 57) << 5 | 3680ea103259SMichael Clark (inst << 52) >> 59; 3681ea103259SMichael Clark } 3682ea103259SMichael Clark 3683ea103259SMichael Clark static int32_t operand_sbimm12(rv_inst inst) 3684ea103259SMichael Clark { 3685ea103259SMichael Clark return (((int64_t)inst << 32) >> 63) << 12 | 3686ea103259SMichael Clark ((inst << 33) >> 58) << 5 | 3687ea103259SMichael Clark ((inst << 52) >> 60) << 1 | 3688ea103259SMichael Clark ((inst << 56) >> 63) << 11; 3689ea103259SMichael Clark } 3690ea103259SMichael Clark 369133632775SFrédéric Pétrot static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa) 3692ea103259SMichael Clark { 369333632775SFrédéric Pétrot int imm = ((inst << 51) >> 63) << 5 | 3694ea103259SMichael Clark (inst << 57) >> 59; 369533632775SFrédéric Pétrot if (isa == rv128) { 369633632775SFrédéric Pétrot imm = imm ? imm : 64; 369733632775SFrédéric Pétrot } 369833632775SFrédéric Pétrot return imm; 369933632775SFrédéric Pétrot } 370033632775SFrédéric Pétrot 370133632775SFrédéric Pétrot static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa) 370233632775SFrédéric Pétrot { 370333632775SFrédéric Pétrot int imm = ((inst << 51) >> 63) << 5 | 370433632775SFrédéric Pétrot (inst << 57) >> 59; 370533632775SFrédéric Pétrot if (isa == rv128) { 370633632775SFrédéric Pétrot imm = imm | (imm & 32) << 1; 370733632775SFrédéric Pétrot imm = imm ? imm : 64; 370833632775SFrédéric Pétrot } 370933632775SFrédéric Pétrot return imm; 3710ea103259SMichael Clark } 3711ea103259SMichael Clark 3712ea103259SMichael Clark static int32_t operand_cimmi(rv_inst inst) 3713ea103259SMichael Clark { 3714ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 5 | 3715ea103259SMichael Clark (inst << 57) >> 59; 3716ea103259SMichael Clark } 3717ea103259SMichael Clark 3718ea103259SMichael Clark static int32_t operand_cimmui(rv_inst inst) 3719ea103259SMichael Clark { 3720ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 17 | 3721ea103259SMichael Clark ((inst << 57) >> 59) << 12; 3722ea103259SMichael Clark } 3723ea103259SMichael Clark 3724ea103259SMichael Clark static uint32_t operand_cimmlwsp(rv_inst inst) 3725ea103259SMichael Clark { 3726ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3727ea103259SMichael Clark ((inst << 57) >> 61) << 2 | 3728ea103259SMichael Clark ((inst << 60) >> 62) << 6; 3729ea103259SMichael Clark } 3730ea103259SMichael Clark 3731ea103259SMichael Clark static uint32_t operand_cimmldsp(rv_inst inst) 3732ea103259SMichael Clark { 3733ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3734ea103259SMichael Clark ((inst << 57) >> 62) << 3 | 3735ea103259SMichael Clark ((inst << 59) >> 61) << 6; 3736ea103259SMichael Clark } 3737ea103259SMichael Clark 3738ea103259SMichael Clark static uint32_t operand_cimmlqsp(rv_inst inst) 3739ea103259SMichael Clark { 3740ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3741ea103259SMichael Clark ((inst << 57) >> 63) << 4 | 3742ea103259SMichael Clark ((inst << 58) >> 60) << 6; 3743ea103259SMichael Clark } 3744ea103259SMichael Clark 3745ea103259SMichael Clark static int32_t operand_cimm16sp(rv_inst inst) 3746ea103259SMichael Clark { 3747ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 9 | 3748ea103259SMichael Clark ((inst << 57) >> 63) << 4 | 3749ea103259SMichael Clark ((inst << 58) >> 63) << 6 | 3750ea103259SMichael Clark ((inst << 59) >> 62) << 7 | 3751ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3752ea103259SMichael Clark } 3753ea103259SMichael Clark 3754ea103259SMichael Clark static int32_t operand_cimmj(rv_inst inst) 3755ea103259SMichael Clark { 3756ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 11 | 3757ea103259SMichael Clark ((inst << 52) >> 63) << 4 | 3758ea103259SMichael Clark ((inst << 53) >> 62) << 8 | 3759ea103259SMichael Clark ((inst << 55) >> 63) << 10 | 3760ea103259SMichael Clark ((inst << 56) >> 63) << 6 | 3761ea103259SMichael Clark ((inst << 57) >> 63) << 7 | 3762ea103259SMichael Clark ((inst << 58) >> 61) << 1 | 3763ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3764ea103259SMichael Clark } 3765ea103259SMichael Clark 3766ea103259SMichael Clark static int32_t operand_cimmb(rv_inst inst) 3767ea103259SMichael Clark { 3768ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 8 | 3769ea103259SMichael Clark ((inst << 52) >> 62) << 3 | 3770ea103259SMichael Clark ((inst << 57) >> 62) << 6 | 3771ea103259SMichael Clark ((inst << 59) >> 62) << 1 | 3772ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3773ea103259SMichael Clark } 3774ea103259SMichael Clark 3775ea103259SMichael Clark static uint32_t operand_cimmswsp(rv_inst inst) 3776ea103259SMichael Clark { 3777ea103259SMichael Clark return ((inst << 51) >> 60) << 2 | 3778ea103259SMichael Clark ((inst << 55) >> 62) << 6; 3779ea103259SMichael Clark } 3780ea103259SMichael Clark 3781ea103259SMichael Clark static uint32_t operand_cimmsdsp(rv_inst inst) 3782ea103259SMichael Clark { 3783ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3784ea103259SMichael Clark ((inst << 54) >> 61) << 6; 3785ea103259SMichael Clark } 3786ea103259SMichael Clark 3787ea103259SMichael Clark static uint32_t operand_cimmsqsp(rv_inst inst) 3788ea103259SMichael Clark { 3789ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3790ea103259SMichael Clark ((inst << 53) >> 60) << 6; 3791ea103259SMichael Clark } 3792ea103259SMichael Clark 3793ea103259SMichael Clark static uint32_t operand_cimm4spn(rv_inst inst) 3794ea103259SMichael Clark { 3795ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3796ea103259SMichael Clark ((inst << 53) >> 60) << 6 | 3797ea103259SMichael Clark ((inst << 57) >> 63) << 2 | 3798ea103259SMichael Clark ((inst << 58) >> 63) << 3; 3799ea103259SMichael Clark } 3800ea103259SMichael Clark 3801ea103259SMichael Clark static uint32_t operand_cimmw(rv_inst inst) 3802ea103259SMichael Clark { 3803ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3804ea103259SMichael Clark ((inst << 57) >> 63) << 2 | 3805ea103259SMichael Clark ((inst << 58) >> 63) << 6; 3806ea103259SMichael Clark } 3807ea103259SMichael Clark 3808ea103259SMichael Clark static uint32_t operand_cimmd(rv_inst inst) 3809ea103259SMichael Clark { 3810ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3811ea103259SMichael Clark ((inst << 57) >> 62) << 6; 3812ea103259SMichael Clark } 3813ea103259SMichael Clark 3814ea103259SMichael Clark static uint32_t operand_cimmq(rv_inst inst) 3815ea103259SMichael Clark { 3816ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3817ea103259SMichael Clark ((inst << 53) >> 63) << 8 | 3818ea103259SMichael Clark ((inst << 57) >> 62) << 6; 3819ea103259SMichael Clark } 3820ea103259SMichael Clark 382107f4964dSYang Liu static uint32_t operand_vimm(rv_inst inst) 382207f4964dSYang Liu { 382307f4964dSYang Liu return (int64_t)(inst << 44) >> 59; 382407f4964dSYang Liu } 382507f4964dSYang Liu 382607f4964dSYang Liu static uint32_t operand_vzimm11(rv_inst inst) 382707f4964dSYang Liu { 382807f4964dSYang Liu return (inst << 33) >> 53; 382907f4964dSYang Liu } 383007f4964dSYang Liu 383107f4964dSYang Liu static uint32_t operand_vzimm10(rv_inst inst) 383207f4964dSYang Liu { 383307f4964dSYang Liu return (inst << 34) >> 54; 383407f4964dSYang Liu } 383507f4964dSYang Liu 38365748c886SWeiwei Li static uint32_t operand_bs(rv_inst inst) 38375748c886SWeiwei Li { 38385748c886SWeiwei Li return (inst << 32) >> 62; 38395748c886SWeiwei Li } 38405748c886SWeiwei Li 38415748c886SWeiwei Li static uint32_t operand_rnum(rv_inst inst) 38425748c886SWeiwei Li { 38435748c886SWeiwei Li return (inst << 40) >> 60; 38445748c886SWeiwei Li } 38455748c886SWeiwei Li 384607f4964dSYang Liu static uint32_t operand_vm(rv_inst inst) 384707f4964dSYang Liu { 384807f4964dSYang Liu return (inst << 38) >> 63; 384907f4964dSYang Liu } 385007f4964dSYang Liu 38512c71d02eSWeiwei Li static uint32_t operand_uimm_c_lb(rv_inst inst) 38522c71d02eSWeiwei Li { 38532c71d02eSWeiwei Li return (((inst << 58) >> 63) << 1) | 38542c71d02eSWeiwei Li ((inst << 57) >> 63); 38552c71d02eSWeiwei Li } 38562c71d02eSWeiwei Li 38572c71d02eSWeiwei Li static uint32_t operand_uimm_c_lh(rv_inst inst) 38582c71d02eSWeiwei Li { 38592c71d02eSWeiwei Li return (((inst << 58) >> 63) << 1); 38602c71d02eSWeiwei Li } 38612c71d02eSWeiwei Li 38622c71d02eSWeiwei Li static uint32_t operand_zcmp_spimm(rv_inst inst) 38632c71d02eSWeiwei Li { 38642c71d02eSWeiwei Li return ((inst << 60) >> 62) << 4; 38652c71d02eSWeiwei Li } 38662c71d02eSWeiwei Li 38672c71d02eSWeiwei Li static uint32_t operand_zcmp_rlist(rv_inst inst) 38682c71d02eSWeiwei Li { 38692c71d02eSWeiwei Li return ((inst << 56) >> 60); 38702c71d02eSWeiwei Li } 38712c71d02eSWeiwei Li 38722c71d02eSWeiwei Li static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t spimm) 38732c71d02eSWeiwei Li { 38742c71d02eSWeiwei Li int xlen_bytes_log2 = isa == rv64 ? 3 : 2; 38752c71d02eSWeiwei Li int regs = rlist == 15 ? 13 : rlist - 3; 38762c71d02eSWeiwei Li uint32_t stack_adj_base = ROUND_UP(regs << xlen_bytes_log2, 16); 38772c71d02eSWeiwei Li return stack_adj_base + spimm; 38782c71d02eSWeiwei Li } 38792c71d02eSWeiwei Li 38802c71d02eSWeiwei Li static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa) 38812c71d02eSWeiwei Li { 38822c71d02eSWeiwei Li return calculate_stack_adj(isa, operand_zcmp_rlist(inst), 38832c71d02eSWeiwei Li operand_zcmp_spimm(inst)); 38842c71d02eSWeiwei Li } 38852c71d02eSWeiwei Li 38862c71d02eSWeiwei Li static uint32_t operand_tbl_index(rv_inst inst) 38872c71d02eSWeiwei Li { 38882c71d02eSWeiwei Li return ((inst << 54) >> 56); 38892c71d02eSWeiwei Li } 38902c71d02eSWeiwei Li 3891ea103259SMichael Clark /* decode operands */ 3892ea103259SMichael Clark 389333632775SFrédéric Pétrot static void decode_inst_operands(rv_decode *dec, rv_isa isa) 3894ea103259SMichael Clark { 3895fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 3896ea103259SMichael Clark rv_inst inst = dec->inst; 3897ea103259SMichael Clark dec->codec = opcode_data[dec->op].codec; 3898ea103259SMichael Clark switch (dec->codec) { 3899ea103259SMichael Clark case rv_codec_none: 3900ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 3901ea103259SMichael Clark dec->imm = 0; 3902ea103259SMichael Clark break; 3903ea103259SMichael Clark case rv_codec_u: 3904ea103259SMichael Clark dec->rd = operand_rd(inst); 3905ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 3906ea103259SMichael Clark dec->imm = operand_imm20(inst); 3907ea103259SMichael Clark break; 3908ea103259SMichael Clark case rv_codec_uj: 3909ea103259SMichael Clark dec->rd = operand_rd(inst); 3910ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 3911ea103259SMichael Clark dec->imm = operand_jimm20(inst); 3912ea103259SMichael Clark break; 3913ea103259SMichael Clark case rv_codec_i: 3914ea103259SMichael Clark dec->rd = operand_rd(inst); 3915ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3916ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3917ea103259SMichael Clark dec->imm = operand_imm12(inst); 3918ea103259SMichael Clark break; 3919ea103259SMichael Clark case rv_codec_i_sh5: 3920ea103259SMichael Clark dec->rd = operand_rd(inst); 3921ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3922ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3923ea103259SMichael Clark dec->imm = operand_shamt5(inst); 3924ea103259SMichael Clark break; 3925ea103259SMichael Clark case rv_codec_i_sh6: 3926ea103259SMichael Clark dec->rd = operand_rd(inst); 3927ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3928ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3929ea103259SMichael Clark dec->imm = operand_shamt6(inst); 3930ea103259SMichael Clark break; 3931ea103259SMichael Clark case rv_codec_i_sh7: 3932ea103259SMichael Clark dec->rd = operand_rd(inst); 3933ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3934ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3935ea103259SMichael Clark dec->imm = operand_shamt7(inst); 3936ea103259SMichael Clark break; 3937ea103259SMichael Clark case rv_codec_i_csr: 3938ea103259SMichael Clark dec->rd = operand_rd(inst); 3939ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3940ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3941ea103259SMichael Clark dec->imm = operand_csr12(inst); 3942ea103259SMichael Clark break; 3943ea103259SMichael Clark case rv_codec_s: 3944ea103259SMichael Clark dec->rd = rv_ireg_zero; 3945ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3946ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3947ea103259SMichael Clark dec->imm = operand_simm12(inst); 3948ea103259SMichael Clark break; 3949ea103259SMichael Clark case rv_codec_sb: 3950ea103259SMichael Clark dec->rd = rv_ireg_zero; 3951ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3952ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3953ea103259SMichael Clark dec->imm = operand_sbimm12(inst); 3954ea103259SMichael Clark break; 3955ea103259SMichael Clark case rv_codec_r: 3956ea103259SMichael Clark dec->rd = operand_rd(inst); 3957ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3958ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3959ea103259SMichael Clark dec->imm = 0; 3960ea103259SMichael Clark break; 3961ea103259SMichael Clark case rv_codec_r_m: 3962ea103259SMichael Clark dec->rd = operand_rd(inst); 3963ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3964ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3965ea103259SMichael Clark dec->imm = 0; 3966ea103259SMichael Clark dec->rm = operand_rm(inst); 3967ea103259SMichael Clark break; 3968ea103259SMichael Clark case rv_codec_r4_m: 3969ea103259SMichael Clark dec->rd = operand_rd(inst); 3970ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3971ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3972ea103259SMichael Clark dec->rs3 = operand_rs3(inst); 3973ea103259SMichael Clark dec->imm = 0; 3974ea103259SMichael Clark dec->rm = operand_rm(inst); 3975ea103259SMichael Clark break; 3976ea103259SMichael Clark case rv_codec_r_a: 3977ea103259SMichael Clark dec->rd = operand_rd(inst); 3978ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3979ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3980ea103259SMichael Clark dec->imm = 0; 3981ea103259SMichael Clark dec->aq = operand_aq(inst); 3982ea103259SMichael Clark dec->rl = operand_rl(inst); 3983ea103259SMichael Clark break; 3984ea103259SMichael Clark case rv_codec_r_l: 3985ea103259SMichael Clark dec->rd = operand_rd(inst); 3986ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3987ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3988ea103259SMichael Clark dec->imm = 0; 3989ea103259SMichael Clark dec->aq = operand_aq(inst); 3990ea103259SMichael Clark dec->rl = operand_rl(inst); 3991ea103259SMichael Clark break; 3992ea103259SMichael Clark case rv_codec_r_f: 3993ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 3994ea103259SMichael Clark dec->pred = operand_pred(inst); 3995ea103259SMichael Clark dec->succ = operand_succ(inst); 3996ea103259SMichael Clark dec->imm = 0; 3997ea103259SMichael Clark break; 3998ea103259SMichael Clark case rv_codec_cb: 3999ea103259SMichael Clark dec->rd = rv_ireg_zero; 4000ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4001ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4002ea103259SMichael Clark dec->imm = operand_cimmb(inst); 4003ea103259SMichael Clark break; 4004ea103259SMichael Clark case rv_codec_cb_imm: 4005ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4006ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4007ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4008ea103259SMichael Clark break; 4009ea103259SMichael Clark case rv_codec_cb_sh5: 4010ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4011ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4012ea103259SMichael Clark dec->imm = operand_cimmsh5(inst); 4013ea103259SMichael Clark break; 4014ea103259SMichael Clark case rv_codec_cb_sh6: 4015ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4016ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 401733632775SFrédéric Pétrot dec->imm = operand_cimmshr6(inst, isa); 4018ea103259SMichael Clark break; 4019ea103259SMichael Clark case rv_codec_ci: 4020ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4021ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4022ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4023ea103259SMichael Clark break; 4024ea103259SMichael Clark case rv_codec_ci_sh5: 4025ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4026ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4027ea103259SMichael Clark dec->imm = operand_cimmsh5(inst); 4028ea103259SMichael Clark break; 4029ea103259SMichael Clark case rv_codec_ci_sh6: 4030ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4031ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 403233632775SFrédéric Pétrot dec->imm = operand_cimmshl6(inst, isa); 4033ea103259SMichael Clark break; 4034ea103259SMichael Clark case rv_codec_ci_16sp: 4035ea103259SMichael Clark dec->rd = rv_ireg_sp; 4036ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4037ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4038ea103259SMichael Clark dec->imm = operand_cimm16sp(inst); 4039ea103259SMichael Clark break; 4040ea103259SMichael Clark case rv_codec_ci_lwsp: 4041ea103259SMichael Clark dec->rd = operand_crd(inst); 4042ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4043ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4044ea103259SMichael Clark dec->imm = operand_cimmlwsp(inst); 4045ea103259SMichael Clark break; 4046ea103259SMichael Clark case rv_codec_ci_ldsp: 4047ea103259SMichael Clark dec->rd = operand_crd(inst); 4048ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4049ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4050ea103259SMichael Clark dec->imm = operand_cimmldsp(inst); 4051ea103259SMichael Clark break; 4052ea103259SMichael Clark case rv_codec_ci_lqsp: 4053ea103259SMichael Clark dec->rd = operand_crd(inst); 4054ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4055ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4056ea103259SMichael Clark dec->imm = operand_cimmlqsp(inst); 4057ea103259SMichael Clark break; 4058ea103259SMichael Clark case rv_codec_ci_li: 4059ea103259SMichael Clark dec->rd = operand_crd(inst); 4060ea103259SMichael Clark dec->rs1 = rv_ireg_zero; 4061ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4062ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4063ea103259SMichael Clark break; 4064ea103259SMichael Clark case rv_codec_ci_lui: 4065ea103259SMichael Clark dec->rd = operand_crd(inst); 4066ea103259SMichael Clark dec->rs1 = rv_ireg_zero; 4067ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4068ea103259SMichael Clark dec->imm = operand_cimmui(inst); 4069ea103259SMichael Clark break; 4070ea103259SMichael Clark case rv_codec_ci_none: 4071ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 4072ea103259SMichael Clark dec->imm = 0; 4073ea103259SMichael Clark break; 4074ea103259SMichael Clark case rv_codec_ciw_4spn: 4075ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4076ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4077ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4078ea103259SMichael Clark dec->imm = operand_cimm4spn(inst); 4079ea103259SMichael Clark break; 4080ea103259SMichael Clark case rv_codec_cj: 4081ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 4082ea103259SMichael Clark dec->imm = operand_cimmj(inst); 4083ea103259SMichael Clark break; 4084ea103259SMichael Clark case rv_codec_cj_jal: 4085ea103259SMichael Clark dec->rd = rv_ireg_ra; 4086ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 4087ea103259SMichael Clark dec->imm = operand_cimmj(inst); 4088ea103259SMichael Clark break; 4089ea103259SMichael Clark case rv_codec_cl_lw: 4090ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4091ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4092ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4093ea103259SMichael Clark dec->imm = operand_cimmw(inst); 4094ea103259SMichael Clark break; 4095ea103259SMichael Clark case rv_codec_cl_ld: 4096ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4097ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4098ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4099ea103259SMichael Clark dec->imm = operand_cimmd(inst); 4100ea103259SMichael Clark break; 4101ea103259SMichael Clark case rv_codec_cl_lq: 4102ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4103ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4104ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4105ea103259SMichael Clark dec->imm = operand_cimmq(inst); 4106ea103259SMichael Clark break; 4107ea103259SMichael Clark case rv_codec_cr: 4108ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4109ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4110ea103259SMichael Clark dec->imm = 0; 4111ea103259SMichael Clark break; 4112ea103259SMichael Clark case rv_codec_cr_mv: 4113ea103259SMichael Clark dec->rd = operand_crd(inst); 4114ea103259SMichael Clark dec->rs1 = operand_crs2(inst); 4115ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4116ea103259SMichael Clark dec->imm = 0; 4117ea103259SMichael Clark break; 4118ea103259SMichael Clark case rv_codec_cr_jalr: 4119ea103259SMichael Clark dec->rd = rv_ireg_ra; 4120ea103259SMichael Clark dec->rs1 = operand_crs1(inst); 4121ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4122ea103259SMichael Clark dec->imm = 0; 4123ea103259SMichael Clark break; 4124ea103259SMichael Clark case rv_codec_cr_jr: 4125ea103259SMichael Clark dec->rd = rv_ireg_zero; 4126ea103259SMichael Clark dec->rs1 = operand_crs1(inst); 4127ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4128ea103259SMichael Clark dec->imm = 0; 4129ea103259SMichael Clark break; 4130ea103259SMichael Clark case rv_codec_cs: 4131ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4132ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4133ea103259SMichael Clark dec->imm = 0; 4134ea103259SMichael Clark break; 4135ea103259SMichael Clark case rv_codec_cs_sw: 4136ea103259SMichael Clark dec->rd = rv_ireg_zero; 4137ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4138ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4139ea103259SMichael Clark dec->imm = operand_cimmw(inst); 4140ea103259SMichael Clark break; 4141ea103259SMichael Clark case rv_codec_cs_sd: 4142ea103259SMichael Clark dec->rd = rv_ireg_zero; 4143ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4144ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4145ea103259SMichael Clark dec->imm = operand_cimmd(inst); 4146ea103259SMichael Clark break; 4147ea103259SMichael Clark case rv_codec_cs_sq: 4148ea103259SMichael Clark dec->rd = rv_ireg_zero; 4149ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4150ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4151ea103259SMichael Clark dec->imm = operand_cimmq(inst); 4152ea103259SMichael Clark break; 4153ea103259SMichael Clark case rv_codec_css_swsp: 4154ea103259SMichael Clark dec->rd = rv_ireg_zero; 4155ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4156ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4157ea103259SMichael Clark dec->imm = operand_cimmswsp(inst); 4158ea103259SMichael Clark break; 4159ea103259SMichael Clark case rv_codec_css_sdsp: 4160ea103259SMichael Clark dec->rd = rv_ireg_zero; 4161ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4162ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4163ea103259SMichael Clark dec->imm = operand_cimmsdsp(inst); 4164ea103259SMichael Clark break; 4165ea103259SMichael Clark case rv_codec_css_sqsp: 4166ea103259SMichael Clark dec->rd = rv_ireg_zero; 4167ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4168ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4169ea103259SMichael Clark dec->imm = operand_cimmsqsp(inst); 4170ea103259SMichael Clark break; 41715748c886SWeiwei Li case rv_codec_k_bs: 41725748c886SWeiwei Li dec->rs1 = operand_rs1(inst); 41735748c886SWeiwei Li dec->rs2 = operand_rs2(inst); 41745748c886SWeiwei Li dec->bs = operand_bs(inst); 41755748c886SWeiwei Li break; 41765748c886SWeiwei Li case rv_codec_k_rnum: 41775748c886SWeiwei Li dec->rd = operand_rd(inst); 41785748c886SWeiwei Li dec->rs1 = operand_rs1(inst); 41795748c886SWeiwei Li dec->rnum = operand_rnum(inst); 41805748c886SWeiwei Li break; 418107f4964dSYang Liu case rv_codec_v_r: 418207f4964dSYang Liu dec->rd = operand_rd(inst); 418307f4964dSYang Liu dec->rs1 = operand_rs1(inst); 418407f4964dSYang Liu dec->rs2 = operand_rs2(inst); 418507f4964dSYang Liu dec->vm = operand_vm(inst); 418607f4964dSYang Liu break; 418707f4964dSYang Liu case rv_codec_v_ldst: 418807f4964dSYang Liu dec->rd = operand_rd(inst); 418907f4964dSYang Liu dec->rs1 = operand_rs1(inst); 419007f4964dSYang Liu dec->vm = operand_vm(inst); 419107f4964dSYang Liu break; 419207f4964dSYang Liu case rv_codec_v_i: 419307f4964dSYang Liu dec->rd = operand_rd(inst); 419407f4964dSYang Liu dec->rs2 = operand_rs2(inst); 419507f4964dSYang Liu dec->imm = operand_vimm(inst); 419607f4964dSYang Liu dec->vm = operand_vm(inst); 419707f4964dSYang Liu break; 419807f4964dSYang Liu case rv_codec_vsetvli: 419907f4964dSYang Liu dec->rd = operand_rd(inst); 420007f4964dSYang Liu dec->rs1 = operand_rs1(inst); 420107f4964dSYang Liu dec->vzimm = operand_vzimm11(inst); 420207f4964dSYang Liu break; 420307f4964dSYang Liu case rv_codec_vsetivli: 420407f4964dSYang Liu dec->rd = operand_rd(inst); 420507f4964dSYang Liu dec->imm = operand_vimm(inst); 420607f4964dSYang Liu dec->vzimm = operand_vzimm10(inst); 420707f4964dSYang Liu break; 42082c71d02eSWeiwei Li case rv_codec_zcb_lb: 42092c71d02eSWeiwei Li dec->rs1 = operand_crs1q(inst) + 8; 42102c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42112c71d02eSWeiwei Li dec->imm = operand_uimm_c_lb(inst); 42122c71d02eSWeiwei Li break; 42132c71d02eSWeiwei Li case rv_codec_zcb_lh: 42142c71d02eSWeiwei Li dec->rs1 = operand_crs1q(inst) + 8; 42152c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42162c71d02eSWeiwei Li dec->imm = operand_uimm_c_lh(inst); 42172c71d02eSWeiwei Li break; 42182c71d02eSWeiwei Li case rv_codec_zcb_ext: 42192c71d02eSWeiwei Li dec->rd = operand_crs1q(inst) + 8; 42202c71d02eSWeiwei Li break; 42212c71d02eSWeiwei Li case rv_codec_zcb_mul: 42222c71d02eSWeiwei Li dec->rd = operand_crs1rdq(inst) + 8; 42232c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42242c71d02eSWeiwei Li break; 42252c71d02eSWeiwei Li case rv_codec_zcmp_cm_pushpop: 42262c71d02eSWeiwei Li dec->imm = operand_zcmp_stack_adj(inst, isa); 42272c71d02eSWeiwei Li dec->rlist = operand_zcmp_rlist(inst); 42282c71d02eSWeiwei Li break; 42292c71d02eSWeiwei Li case rv_codec_zcmp_cm_mv: 42302c71d02eSWeiwei Li dec->rd = operand_sreg1(inst); 42312c71d02eSWeiwei Li dec->rs2 = operand_sreg2(inst); 42322c71d02eSWeiwei Li break; 42332c71d02eSWeiwei Li case rv_codec_zcmt_jt: 42342c71d02eSWeiwei Li dec->imm = operand_tbl_index(inst); 42352c71d02eSWeiwei Li break; 4236ea103259SMichael Clark }; 4237ea103259SMichael Clark } 4238ea103259SMichael Clark 4239ea103259SMichael Clark /* check constraint */ 4240ea103259SMichael Clark 4241ea103259SMichael Clark static bool check_constraints(rv_decode *dec, const rvc_constraint *c) 4242ea103259SMichael Clark { 4243ea103259SMichael Clark int32_t imm = dec->imm; 4244ea103259SMichael Clark uint8_t rd = dec->rd, rs1 = dec->rs1, rs2 = dec->rs2; 4245ea103259SMichael Clark while (*c != rvc_end) { 4246ea103259SMichael Clark switch (*c) { 4247ea103259SMichael Clark case rvc_rd_eq_ra: 4248ea103259SMichael Clark if (!(rd == 1)) { 4249ea103259SMichael Clark return false; 4250ea103259SMichael Clark } 4251ea103259SMichael Clark break; 4252ea103259SMichael Clark case rvc_rd_eq_x0: 4253ea103259SMichael Clark if (!(rd == 0)) { 4254ea103259SMichael Clark return false; 4255ea103259SMichael Clark } 4256ea103259SMichael Clark break; 4257ea103259SMichael Clark case rvc_rs1_eq_x0: 4258ea103259SMichael Clark if (!(rs1 == 0)) { 4259ea103259SMichael Clark return false; 4260ea103259SMichael Clark } 4261ea103259SMichael Clark break; 4262ea103259SMichael Clark case rvc_rs2_eq_x0: 4263ea103259SMichael Clark if (!(rs2 == 0)) { 4264ea103259SMichael Clark return false; 4265ea103259SMichael Clark } 4266ea103259SMichael Clark break; 4267ea103259SMichael Clark case rvc_rs2_eq_rs1: 4268ea103259SMichael Clark if (!(rs2 == rs1)) { 4269ea103259SMichael Clark return false; 4270ea103259SMichael Clark } 4271ea103259SMichael Clark break; 4272ea103259SMichael Clark case rvc_rs1_eq_ra: 4273ea103259SMichael Clark if (!(rs1 == 1)) { 4274ea103259SMichael Clark return false; 4275ea103259SMichael Clark } 4276ea103259SMichael Clark break; 4277ea103259SMichael Clark case rvc_imm_eq_zero: 4278ea103259SMichael Clark if (!(imm == 0)) { 4279ea103259SMichael Clark return false; 4280ea103259SMichael Clark } 4281ea103259SMichael Clark break; 4282ea103259SMichael Clark case rvc_imm_eq_n1: 4283ea103259SMichael Clark if (!(imm == -1)) { 4284ea103259SMichael Clark return false; 4285ea103259SMichael Clark } 4286ea103259SMichael Clark break; 4287ea103259SMichael Clark case rvc_imm_eq_p1: 4288ea103259SMichael Clark if (!(imm == 1)) { 4289ea103259SMichael Clark return false; 4290ea103259SMichael Clark } 4291ea103259SMichael Clark break; 4292ea103259SMichael Clark case rvc_csr_eq_0x001: 4293ea103259SMichael Clark if (!(imm == 0x001)) { 4294ea103259SMichael Clark return false; 4295ea103259SMichael Clark } 4296ea103259SMichael Clark break; 4297ea103259SMichael Clark case rvc_csr_eq_0x002: 4298ea103259SMichael Clark if (!(imm == 0x002)) { 4299ea103259SMichael Clark return false; 4300ea103259SMichael Clark } 4301ea103259SMichael Clark break; 4302ea103259SMichael Clark case rvc_csr_eq_0x003: 4303ea103259SMichael Clark if (!(imm == 0x003)) { 4304ea103259SMichael Clark return false; 4305ea103259SMichael Clark } 4306ea103259SMichael Clark break; 4307ea103259SMichael Clark case rvc_csr_eq_0xc00: 4308ea103259SMichael Clark if (!(imm == 0xc00)) { 4309ea103259SMichael Clark return false; 4310ea103259SMichael Clark } 4311ea103259SMichael Clark break; 4312ea103259SMichael Clark case rvc_csr_eq_0xc01: 4313ea103259SMichael Clark if (!(imm == 0xc01)) { 4314ea103259SMichael Clark return false; 4315ea103259SMichael Clark } 4316ea103259SMichael Clark break; 4317ea103259SMichael Clark case rvc_csr_eq_0xc02: 4318ea103259SMichael Clark if (!(imm == 0xc02)) { 4319ea103259SMichael Clark return false; 4320ea103259SMichael Clark } 4321ea103259SMichael Clark break; 4322ea103259SMichael Clark case rvc_csr_eq_0xc80: 4323ea103259SMichael Clark if (!(imm == 0xc80)) { 4324ea103259SMichael Clark return false; 4325ea103259SMichael Clark } 4326ea103259SMichael Clark break; 4327ea103259SMichael Clark case rvc_csr_eq_0xc81: 4328ea103259SMichael Clark if (!(imm == 0xc81)) { 4329ea103259SMichael Clark return false; 4330ea103259SMichael Clark } 4331ea103259SMichael Clark break; 4332ea103259SMichael Clark case rvc_csr_eq_0xc82: 4333ea103259SMichael Clark if (!(imm == 0xc82)) { 4334ea103259SMichael Clark return false; 4335ea103259SMichael Clark } 4336ea103259SMichael Clark break; 4337ea103259SMichael Clark default: break; 4338ea103259SMichael Clark } 4339ea103259SMichael Clark c++; 4340ea103259SMichael Clark } 4341ea103259SMichael Clark return true; 4342ea103259SMichael Clark } 4343ea103259SMichael Clark 4344ea103259SMichael Clark /* instruction length */ 4345ea103259SMichael Clark 4346ea103259SMichael Clark static size_t inst_length(rv_inst inst) 4347ea103259SMichael Clark { 4348ea103259SMichael Clark /* NOTE: supports maximum instruction size of 64-bits */ 4349ea103259SMichael Clark 43503bd87176SWeiwei Li /* 43513bd87176SWeiwei Li * instruction length coding 4352ea103259SMichael Clark * 4353ea103259SMichael Clark * aa - 16 bit aa != 11 4354ea103259SMichael Clark * bbb11 - 32 bit bbb != 111 4355ea103259SMichael Clark * 011111 - 48 bit 4356ea103259SMichael Clark * 0111111 - 64 bit 4357ea103259SMichael Clark */ 4358ea103259SMichael Clark 4359ea103259SMichael Clark return (inst & 0b11) != 0b11 ? 2 4360ea103259SMichael Clark : (inst & 0b11100) != 0b11100 ? 4 4361ea103259SMichael Clark : (inst & 0b111111) == 0b011111 ? 6 4362ea103259SMichael Clark : (inst & 0b1111111) == 0b0111111 ? 8 4363ea103259SMichael Clark : 0; 4364ea103259SMichael Clark } 4365ea103259SMichael Clark 4366ea103259SMichael Clark /* format instruction */ 4367ea103259SMichael Clark 4368ea103259SMichael Clark static void append(char *s1, const char *s2, size_t n) 4369ea103259SMichael Clark { 4370ea103259SMichael Clark size_t l1 = strlen(s1); 4371ea103259SMichael Clark if (n - l1 - 1 > 0) { 4372ea103259SMichael Clark strncat(s1, s2, n - l1); 4373ea103259SMichael Clark } 4374ea103259SMichael Clark } 4375ea103259SMichael Clark 4376ea103259SMichael Clark static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec) 4377ea103259SMichael Clark { 4378fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4379ea103259SMichael Clark char tmp[64]; 4380ea103259SMichael Clark const char *fmt; 4381ea103259SMichael Clark 4382ea103259SMichael Clark fmt = opcode_data[dec->op].format; 4383ea103259SMichael Clark while (*fmt) { 4384ea103259SMichael Clark switch (*fmt) { 4385ea103259SMichael Clark case 'O': 4386ea103259SMichael Clark append(buf, opcode_data[dec->op].name, buflen); 4387ea103259SMichael Clark break; 4388ea103259SMichael Clark case '(': 4389ea103259SMichael Clark append(buf, "(", buflen); 4390ea103259SMichael Clark break; 4391ea103259SMichael Clark case ',': 4392ea103259SMichael Clark append(buf, ",", buflen); 4393ea103259SMichael Clark break; 4394ea103259SMichael Clark case ')': 4395ea103259SMichael Clark append(buf, ")", buflen); 4396ea103259SMichael Clark break; 43972c71d02eSWeiwei Li case '-': 43982c71d02eSWeiwei Li append(buf, "-", buflen); 43992c71d02eSWeiwei Li break; 44005748c886SWeiwei Li case 'b': 44015748c886SWeiwei Li snprintf(tmp, sizeof(tmp), "%d", dec->bs); 44025748c886SWeiwei Li append(buf, tmp, buflen); 44035748c886SWeiwei Li break; 44045748c886SWeiwei Li case 'n': 44055748c886SWeiwei Li snprintf(tmp, sizeof(tmp), "%d", dec->rnum); 44065748c886SWeiwei Li append(buf, tmp, buflen); 44075748c886SWeiwei Li break; 4408ea103259SMichael Clark case '0': 4409ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rd], buflen); 4410ea103259SMichael Clark break; 4411ea103259SMichael Clark case '1': 4412ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rs1], buflen); 4413ea103259SMichael Clark break; 4414ea103259SMichael Clark case '2': 4415ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rs2], buflen); 4416ea103259SMichael Clark break; 4417ea103259SMichael Clark case '3': 4418c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rd] : 4419c54dab4cSWeiwei Li rv_freg_name_sym[dec->rd], 4420c54dab4cSWeiwei Li buflen); 4421ea103259SMichael Clark break; 4422ea103259SMichael Clark case '4': 4423c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs1] : 4424c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs1], 4425c54dab4cSWeiwei Li buflen); 4426ea103259SMichael Clark break; 4427ea103259SMichael Clark case '5': 4428c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs2] : 4429c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs2], 4430c54dab4cSWeiwei Li buflen); 4431ea103259SMichael Clark break; 4432ea103259SMichael Clark case '6': 4433c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs3] : 4434c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs3], 4435c54dab4cSWeiwei Li buflen); 4436ea103259SMichael Clark break; 4437ea103259SMichael Clark case '7': 4438ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->rs1); 4439ea103259SMichael Clark append(buf, tmp, buflen); 4440ea103259SMichael Clark break; 4441ea103259SMichael Clark case 'i': 4442ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->imm); 4443ea103259SMichael Clark append(buf, tmp, buflen); 4444ea103259SMichael Clark break; 444507f4964dSYang Liu case 'u': 444607f4964dSYang Liu snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b11111)); 444707f4964dSYang Liu append(buf, tmp, buflen); 444807f4964dSYang Liu break; 4449ea103259SMichael Clark case 'o': 4450ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->imm); 4451ea103259SMichael Clark append(buf, tmp, buflen); 4452ea103259SMichael Clark while (strlen(buf) < tab * 2) { 4453ea103259SMichael Clark append(buf, " ", buflen); 4454ea103259SMichael Clark } 4455ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "# 0x%" PRIx64, 4456ea103259SMichael Clark dec->pc + dec->imm); 4457ea103259SMichael Clark append(buf, tmp, buflen); 4458ea103259SMichael Clark break; 4459ea103259SMichael Clark case 'c': { 4460ea103259SMichael Clark const char *name = csr_name(dec->imm & 0xfff); 4461ea103259SMichael Clark if (name) { 4462ea103259SMichael Clark append(buf, name, buflen); 4463ea103259SMichael Clark } else { 4464ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "0x%03x", dec->imm & 0xfff); 4465ea103259SMichael Clark append(buf, tmp, buflen); 4466ea103259SMichael Clark } 4467ea103259SMichael Clark break; 4468ea103259SMichael Clark } 4469ea103259SMichael Clark case 'r': 4470ea103259SMichael Clark switch (dec->rm) { 4471ea103259SMichael Clark case rv_rm_rne: 4472ea103259SMichael Clark append(buf, "rne", buflen); 4473ea103259SMichael Clark break; 4474ea103259SMichael Clark case rv_rm_rtz: 4475ea103259SMichael Clark append(buf, "rtz", buflen); 4476ea103259SMichael Clark break; 4477ea103259SMichael Clark case rv_rm_rdn: 4478ea103259SMichael Clark append(buf, "rdn", buflen); 4479ea103259SMichael Clark break; 4480ea103259SMichael Clark case rv_rm_rup: 4481ea103259SMichael Clark append(buf, "rup", buflen); 4482ea103259SMichael Clark break; 4483ea103259SMichael Clark case rv_rm_rmm: 4484ea103259SMichael Clark append(buf, "rmm", buflen); 4485ea103259SMichael Clark break; 4486ea103259SMichael Clark case rv_rm_dyn: 4487ea103259SMichael Clark append(buf, "dyn", buflen); 4488ea103259SMichael Clark break; 4489ea103259SMichael Clark default: 4490ea103259SMichael Clark append(buf, "inv", buflen); 4491ea103259SMichael Clark break; 4492ea103259SMichael Clark } 4493ea103259SMichael Clark break; 4494ea103259SMichael Clark case 'p': 4495ea103259SMichael Clark if (dec->pred & rv_fence_i) { 4496ea103259SMichael Clark append(buf, "i", buflen); 4497ea103259SMichael Clark } 4498ea103259SMichael Clark if (dec->pred & rv_fence_o) { 4499ea103259SMichael Clark append(buf, "o", buflen); 4500ea103259SMichael Clark } 4501ea103259SMichael Clark if (dec->pred & rv_fence_r) { 4502ea103259SMichael Clark append(buf, "r", buflen); 4503ea103259SMichael Clark } 4504ea103259SMichael Clark if (dec->pred & rv_fence_w) { 4505ea103259SMichael Clark append(buf, "w", buflen); 4506ea103259SMichael Clark } 4507ea103259SMichael Clark break; 4508ea103259SMichael Clark case 's': 4509ea103259SMichael Clark if (dec->succ & rv_fence_i) { 4510ea103259SMichael Clark append(buf, "i", buflen); 4511ea103259SMichael Clark } 4512ea103259SMichael Clark if (dec->succ & rv_fence_o) { 4513ea103259SMichael Clark append(buf, "o", buflen); 4514ea103259SMichael Clark } 4515ea103259SMichael Clark if (dec->succ & rv_fence_r) { 4516ea103259SMichael Clark append(buf, "r", buflen); 4517ea103259SMichael Clark } 4518ea103259SMichael Clark if (dec->succ & rv_fence_w) { 4519ea103259SMichael Clark append(buf, "w", buflen); 4520ea103259SMichael Clark } 4521ea103259SMichael Clark break; 4522ea103259SMichael Clark case '\t': 4523ea103259SMichael Clark while (strlen(buf) < tab) { 4524ea103259SMichael Clark append(buf, " ", buflen); 4525ea103259SMichael Clark } 4526ea103259SMichael Clark break; 4527ea103259SMichael Clark case 'A': 4528ea103259SMichael Clark if (dec->aq) { 4529ea103259SMichael Clark append(buf, ".aq", buflen); 4530ea103259SMichael Clark } 4531ea103259SMichael Clark break; 4532ea103259SMichael Clark case 'R': 4533ea103259SMichael Clark if (dec->rl) { 4534ea103259SMichael Clark append(buf, ".rl", buflen); 4535ea103259SMichael Clark } 4536ea103259SMichael Clark break; 453707f4964dSYang Liu case 'l': 453807f4964dSYang Liu append(buf, ",v0", buflen); 453907f4964dSYang Liu break; 454007f4964dSYang Liu case 'm': 454107f4964dSYang Liu if (dec->vm == 0) { 454207f4964dSYang Liu append(buf, ",v0.t", buflen); 454307f4964dSYang Liu } 454407f4964dSYang Liu break; 454507f4964dSYang Liu case 'D': 454607f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rd], buflen); 454707f4964dSYang Liu break; 454807f4964dSYang Liu case 'E': 454907f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs1], buflen); 455007f4964dSYang Liu break; 455107f4964dSYang Liu case 'F': 455207f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs2], buflen); 455307f4964dSYang Liu break; 455407f4964dSYang Liu case 'G': 455507f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs3], buflen); 455607f4964dSYang Liu break; 455707f4964dSYang Liu case 'v': { 455807f4964dSYang Liu char nbuf[32] = {0}; 455907f4964dSYang Liu const int sew = 1 << (((dec->vzimm >> 3) & 0b111) + 3); 456007f4964dSYang Liu sprintf(nbuf, "%d", sew); 456107f4964dSYang Liu const int lmul = dec->vzimm & 0b11; 456207f4964dSYang Liu const int flmul = (dec->vzimm >> 2) & 1; 456307f4964dSYang Liu const char *vta = (dec->vzimm >> 6) & 1 ? "ta" : "tu"; 456407f4964dSYang Liu const char *vma = (dec->vzimm >> 7) & 1 ? "ma" : "mu"; 456507f4964dSYang Liu append(buf, "e", buflen); 456607f4964dSYang Liu append(buf, nbuf, buflen); 456707f4964dSYang Liu append(buf, ",m", buflen); 456807f4964dSYang Liu if (flmul) { 456907f4964dSYang Liu switch (lmul) { 457007f4964dSYang Liu case 3: 457107f4964dSYang Liu sprintf(nbuf, "f2"); 457207f4964dSYang Liu break; 457307f4964dSYang Liu case 2: 457407f4964dSYang Liu sprintf(nbuf, "f4"); 457507f4964dSYang Liu break; 457607f4964dSYang Liu case 1: 457707f4964dSYang Liu sprintf(nbuf, "f8"); 457807f4964dSYang Liu break; 457907f4964dSYang Liu } 458007f4964dSYang Liu append(buf, nbuf, buflen); 458107f4964dSYang Liu } else { 458207f4964dSYang Liu sprintf(nbuf, "%d", 1 << lmul); 458307f4964dSYang Liu append(buf, nbuf, buflen); 458407f4964dSYang Liu } 458507f4964dSYang Liu append(buf, ",", buflen); 458607f4964dSYang Liu append(buf, vta, buflen); 458707f4964dSYang Liu append(buf, ",", buflen); 458807f4964dSYang Liu append(buf, vma, buflen); 458907f4964dSYang Liu break; 459007f4964dSYang Liu } 45912c71d02eSWeiwei Li case 'x': { 45922c71d02eSWeiwei Li switch (dec->rlist) { 45932c71d02eSWeiwei Li case 4: 45942c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra}"); 45952c71d02eSWeiwei Li break; 45962c71d02eSWeiwei Li case 5: 45972c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0}"); 45982c71d02eSWeiwei Li break; 45992c71d02eSWeiwei Li case 15: 46002c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0-s11}"); 46012c71d02eSWeiwei Li break; 46022c71d02eSWeiwei Li default: 46032c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0-s%d}", dec->rlist - 5); 46042c71d02eSWeiwei Li break; 46052c71d02eSWeiwei Li } 46062c71d02eSWeiwei Li append(buf, tmp, buflen); 46072c71d02eSWeiwei Li break; 46082c71d02eSWeiwei Li } 4609ea103259SMichael Clark default: 4610ea103259SMichael Clark break; 4611ea103259SMichael Clark } 4612ea103259SMichael Clark fmt++; 4613ea103259SMichael Clark } 4614ea103259SMichael Clark } 4615ea103259SMichael Clark 4616ea103259SMichael Clark /* lift instruction to pseudo-instruction */ 4617ea103259SMichael Clark 4618ea103259SMichael Clark static void decode_inst_lift_pseudo(rv_decode *dec) 4619ea103259SMichael Clark { 4620fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4621ea103259SMichael Clark const rv_comp_data *comp_data = opcode_data[dec->op].pseudo; 4622ea103259SMichael Clark if (!comp_data) { 4623ea103259SMichael Clark return; 4624ea103259SMichael Clark } 4625ea103259SMichael Clark while (comp_data->constraints) { 4626ea103259SMichael Clark if (check_constraints(dec, comp_data->constraints)) { 4627ea103259SMichael Clark dec->op = comp_data->op; 4628ea103259SMichael Clark dec->codec = opcode_data[dec->op].codec; 4629ea103259SMichael Clark return; 4630ea103259SMichael Clark } 4631ea103259SMichael Clark comp_data++; 4632ea103259SMichael Clark } 4633ea103259SMichael Clark } 4634ea103259SMichael Clark 4635ea103259SMichael Clark /* decompress instruction */ 4636ea103259SMichael Clark 4637ea103259SMichael Clark static void decode_inst_decompress_rv32(rv_decode *dec) 4638ea103259SMichael Clark { 4639fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4640ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv32; 4641ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4642f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4643f88222daSMichael Clark && dec->imm == 0) { 4644f88222daSMichael Clark dec->op = rv_op_illegal; 4645f88222daSMichael Clark } else { 4646ea103259SMichael Clark dec->op = decomp_op; 4647ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4648ea103259SMichael Clark } 4649ea103259SMichael Clark } 4650f88222daSMichael Clark } 4651ea103259SMichael Clark 4652ea103259SMichael Clark static void decode_inst_decompress_rv64(rv_decode *dec) 4653ea103259SMichael Clark { 4654fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4655ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv64; 4656ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4657f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4658f88222daSMichael Clark && dec->imm == 0) { 4659f88222daSMichael Clark dec->op = rv_op_illegal; 4660f88222daSMichael Clark } else { 4661ea103259SMichael Clark dec->op = decomp_op; 4662ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4663ea103259SMichael Clark } 4664ea103259SMichael Clark } 4665f88222daSMichael Clark } 4666ea103259SMichael Clark 4667ea103259SMichael Clark static void decode_inst_decompress_rv128(rv_decode *dec) 4668ea103259SMichael Clark { 4669fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4670ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv128; 4671ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4672f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4673f88222daSMichael Clark && dec->imm == 0) { 4674f88222daSMichael Clark dec->op = rv_op_illegal; 4675f88222daSMichael Clark } else { 4676ea103259SMichael Clark dec->op = decomp_op; 4677ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4678ea103259SMichael Clark } 4679ea103259SMichael Clark } 4680f88222daSMichael Clark } 4681ea103259SMichael Clark 4682ea103259SMichael Clark static void decode_inst_decompress(rv_decode *dec, rv_isa isa) 4683ea103259SMichael Clark { 4684ea103259SMichael Clark switch (isa) { 4685ea103259SMichael Clark case rv32: 4686ea103259SMichael Clark decode_inst_decompress_rv32(dec); 4687ea103259SMichael Clark break; 4688ea103259SMichael Clark case rv64: 4689ea103259SMichael Clark decode_inst_decompress_rv64(dec); 4690ea103259SMichael Clark break; 4691ea103259SMichael Clark case rv128: 4692ea103259SMichael Clark decode_inst_decompress_rv128(dec); 4693ea103259SMichael Clark break; 4694ea103259SMichael Clark } 4695ea103259SMichael Clark } 4696ea103259SMichael Clark 4697ea103259SMichael Clark /* disassemble instruction */ 4698ea103259SMichael Clark 4699ea103259SMichael Clark static void 4700454c2201SWeiwei Li disasm_inst(char *buf, size_t buflen, rv_isa isa, uint64_t pc, rv_inst inst, 4701454c2201SWeiwei Li RISCVCPUConfig *cfg) 4702ea103259SMichael Clark { 4703ea103259SMichael Clark rv_decode dec = { 0 }; 4704ea103259SMichael Clark dec.pc = pc; 4705ea103259SMichael Clark dec.inst = inst; 4706454c2201SWeiwei Li dec.cfg = cfg; 4707c859a242SChristoph Müllner 4708c859a242SChristoph Müllner static const struct { 4709c859a242SChristoph Müllner bool (*guard_func)(const RISCVCPUConfig *); 4710c859a242SChristoph Müllner const rv_opcode_data *opcode_data; 4711c859a242SChristoph Müllner void (*decode_func)(rv_decode *, rv_isa); 4712c859a242SChristoph Müllner } decoders[] = { 4713c859a242SChristoph Müllner { always_true_p, rvi_opcode_data, decode_inst_opcode }, 4714*f6f72338SChristoph Müllner { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops }, 4715c859a242SChristoph Müllner }; 4716c859a242SChristoph Müllner 4717c859a242SChristoph Müllner for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) { 4718c859a242SChristoph Müllner bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func; 4719c859a242SChristoph Müllner const rv_opcode_data *opcode_data = decoders[i].opcode_data; 4720c859a242SChristoph Müllner void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func; 4721c859a242SChristoph Müllner 4722c859a242SChristoph Müllner if (guard_func(cfg)) { 4723c859a242SChristoph Müllner dec.opcode_data = opcode_data; 4724c859a242SChristoph Müllner decode_func(&dec, isa); 4725c859a242SChristoph Müllner if (dec.op != rv_op_illegal) 4726c859a242SChristoph Müllner break; 4727c859a242SChristoph Müllner } 4728c859a242SChristoph Müllner } 4729c859a242SChristoph Müllner 4730c859a242SChristoph Müllner if (dec.op == rv_op_illegal) { 4731c859a242SChristoph Müllner dec.opcode_data = rvi_opcode_data; 4732c859a242SChristoph Müllner } 4733c859a242SChristoph Müllner 473433632775SFrédéric Pétrot decode_inst_operands(&dec, isa); 4735ea103259SMichael Clark decode_inst_decompress(&dec, isa); 4736ea103259SMichael Clark decode_inst_lift_pseudo(&dec); 473707f4964dSYang Liu format_inst(buf, buflen, 24, &dec); 4738ea103259SMichael Clark } 4739ea103259SMichael Clark 47406296a799SMichael Clark #define INST_FMT_2 "%04" PRIx64 " " 47416296a799SMichael Clark #define INST_FMT_4 "%08" PRIx64 " " 47426296a799SMichael Clark #define INST_FMT_6 "%012" PRIx64 " " 47436296a799SMichael Clark #define INST_FMT_8 "%016" PRIx64 " " 47446296a799SMichael Clark 4745ea103259SMichael Clark static int 4746ea103259SMichael Clark print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa) 4747ea103259SMichael Clark { 4748ea103259SMichael Clark char buf[128] = { 0 }; 4749ea103259SMichael Clark bfd_byte packet[2]; 4750ea103259SMichael Clark rv_inst inst = 0; 4751ea103259SMichael Clark size_t len = 2; 4752ea103259SMichael Clark bfd_vma n; 4753ea103259SMichael Clark int status; 4754ea103259SMichael Clark 4755ea103259SMichael Clark /* Instructions are made of 2-byte packets in little-endian order */ 4756ea103259SMichael Clark for (n = 0; n < len; n += 2) { 4757ea103259SMichael Clark status = (*info->read_memory_func)(memaddr + n, packet, 2, info); 4758ea103259SMichael Clark if (status != 0) { 4759ea103259SMichael Clark /* Don't fail just because we fell off the end. */ 4760ea103259SMichael Clark if (n > 0) { 4761ea103259SMichael Clark break; 4762ea103259SMichael Clark } 4763ea103259SMichael Clark (*info->memory_error_func)(status, memaddr, info); 4764ea103259SMichael Clark return status; 4765ea103259SMichael Clark } 4766ea103259SMichael Clark inst |= ((rv_inst) bfd_getl16(packet)) << (8 * n); 4767ea103259SMichael Clark if (n == 0) { 4768ea103259SMichael Clark len = inst_length(inst); 4769ea103259SMichael Clark } 4770ea103259SMichael Clark } 4771ea103259SMichael Clark 47726296a799SMichael Clark switch (len) { 47736296a799SMichael Clark case 2: 47746296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_2, inst); 47756296a799SMichael Clark break; 47766296a799SMichael Clark case 4: 47776296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_4, inst); 47786296a799SMichael Clark break; 47796296a799SMichael Clark case 6: 47806296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_6, inst); 47816296a799SMichael Clark break; 47826296a799SMichael Clark default: 47836296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_8, inst); 47846296a799SMichael Clark break; 47856296a799SMichael Clark } 47866296a799SMichael Clark 4787454c2201SWeiwei Li disasm_inst(buf, sizeof(buf), isa, memaddr, inst, 4788454c2201SWeiwei Li (RISCVCPUConfig *)info->target_info); 4789ea103259SMichael Clark (*info->fprintf_func)(info->stream, "%s", buf); 4790ea103259SMichael Clark 4791ea103259SMichael Clark return len; 4792ea103259SMichael Clark } 4793ea103259SMichael Clark 4794ea103259SMichael Clark int print_insn_riscv32(bfd_vma memaddr, struct disassemble_info *info) 4795ea103259SMichael Clark { 4796ea103259SMichael Clark return print_insn_riscv(memaddr, info, rv32); 4797ea103259SMichael Clark } 4798ea103259SMichael Clark 4799ea103259SMichael Clark int print_insn_riscv64(bfd_vma memaddr, struct disassemble_info *info) 4800ea103259SMichael Clark { 4801ea103259SMichael Clark return print_insn_riscv(memaddr, info, rv64); 4802ea103259SMichael Clark } 4803332dab68SFrédéric Pétrot 4804332dab68SFrédéric Pétrot int print_insn_riscv128(bfd_vma memaddr, struct disassemble_info *info) 4805332dab68SFrédéric Pétrot { 4806332dab68SFrédéric Pétrot return print_insn_riscv(memaddr, info, rv128); 4807332dab68SFrédéric Pétrot } 4808