xref: /qemu/disas/riscv.c (revision 9d92f56d4a44a14ec099e9af5148c4c9c85fd59e)
1ea103259SMichael Clark /*
2ea103259SMichael Clark  * QEMU RISC-V Disassembler
3ea103259SMichael Clark  *
4ea103259SMichael Clark  * Copyright (c) 2016-2017 Michael Clark <michaeljclark@mac.com>
5ea103259SMichael Clark  * Copyright (c) 2017-2018 SiFive, Inc.
6ea103259SMichael Clark  *
7ea103259SMichael Clark  * This program is free software; you can redistribute it and/or modify it
8ea103259SMichael Clark  * under the terms and conditions of the GNU General Public License,
9ea103259SMichael Clark  * version 2 or later, as published by the Free Software Foundation.
10ea103259SMichael Clark  *
11ea103259SMichael Clark  * This program is distributed in the hope it will be useful, but WITHOUT
12ea103259SMichael Clark  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13ea103259SMichael Clark  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14ea103259SMichael Clark  * more details.
15ea103259SMichael Clark  *
16ea103259SMichael Clark  * You should have received a copy of the GNU General Public License along with
17ea103259SMichael Clark  * this program.  If not, see <http://www.gnu.org/licenses/>.
18ea103259SMichael Clark  */
19ea103259SMichael Clark 
20ea103259SMichael Clark #include "qemu/osdep.h"
21318df723SChristoph Müllner #include "qemu/bitops.h"
223979fca4SMarkus Armbruster #include "disas/dis-asm.h"
23454c2201SWeiwei Li #include "target/riscv/cpu_cfg.h"
245d326db2SChristoph Müllner #include "disas/riscv.h"
25ea103259SMichael Clark 
26f6f72338SChristoph Müllner /* Vendor extensions */
27318df723SChristoph Müllner #include "disas/riscv-xthead.h"
28f6f72338SChristoph Müllner #include "disas/riscv-xventana.h"
29f6f72338SChristoph Müllner 
30ea103259SMichael Clark typedef enum {
3101b1361fSChristoph Müllner     /* 0 is reserved for rv_op_illegal. */
32ea103259SMichael Clark     rv_op_lui = 1,
33ea103259SMichael Clark     rv_op_auipc = 2,
34ea103259SMichael Clark     rv_op_jal = 3,
35ea103259SMichael Clark     rv_op_jalr = 4,
36ea103259SMichael Clark     rv_op_beq = 5,
37ea103259SMichael Clark     rv_op_bne = 6,
38ea103259SMichael Clark     rv_op_blt = 7,
39ea103259SMichael Clark     rv_op_bge = 8,
40ea103259SMichael Clark     rv_op_bltu = 9,
41ea103259SMichael Clark     rv_op_bgeu = 10,
42ea103259SMichael Clark     rv_op_lb = 11,
43ea103259SMichael Clark     rv_op_lh = 12,
44ea103259SMichael Clark     rv_op_lw = 13,
45ea103259SMichael Clark     rv_op_lbu = 14,
46ea103259SMichael Clark     rv_op_lhu = 15,
47ea103259SMichael Clark     rv_op_sb = 16,
48ea103259SMichael Clark     rv_op_sh = 17,
49ea103259SMichael Clark     rv_op_sw = 18,
50ea103259SMichael Clark     rv_op_addi = 19,
51ea103259SMichael Clark     rv_op_slti = 20,
52ea103259SMichael Clark     rv_op_sltiu = 21,
53ea103259SMichael Clark     rv_op_xori = 22,
54ea103259SMichael Clark     rv_op_ori = 23,
55ea103259SMichael Clark     rv_op_andi = 24,
56ea103259SMichael Clark     rv_op_slli = 25,
57ea103259SMichael Clark     rv_op_srli = 26,
58ea103259SMichael Clark     rv_op_srai = 27,
59ea103259SMichael Clark     rv_op_add = 28,
60ea103259SMichael Clark     rv_op_sub = 29,
61ea103259SMichael Clark     rv_op_sll = 30,
62ea103259SMichael Clark     rv_op_slt = 31,
63ea103259SMichael Clark     rv_op_sltu = 32,
64ea103259SMichael Clark     rv_op_xor = 33,
65ea103259SMichael Clark     rv_op_srl = 34,
66ea103259SMichael Clark     rv_op_sra = 35,
67ea103259SMichael Clark     rv_op_or = 36,
68ea103259SMichael Clark     rv_op_and = 37,
69ea103259SMichael Clark     rv_op_fence = 38,
70ea103259SMichael Clark     rv_op_fence_i = 39,
71ea103259SMichael Clark     rv_op_lwu = 40,
72ea103259SMichael Clark     rv_op_ld = 41,
73ea103259SMichael Clark     rv_op_sd = 42,
74ea103259SMichael Clark     rv_op_addiw = 43,
75ea103259SMichael Clark     rv_op_slliw = 44,
76ea103259SMichael Clark     rv_op_srliw = 45,
77ea103259SMichael Clark     rv_op_sraiw = 46,
78ea103259SMichael Clark     rv_op_addw = 47,
79ea103259SMichael Clark     rv_op_subw = 48,
80ea103259SMichael Clark     rv_op_sllw = 49,
81ea103259SMichael Clark     rv_op_srlw = 50,
82ea103259SMichael Clark     rv_op_sraw = 51,
83ea103259SMichael Clark     rv_op_ldu = 52,
84ea103259SMichael Clark     rv_op_lq = 53,
85ea103259SMichael Clark     rv_op_sq = 54,
86ea103259SMichael Clark     rv_op_addid = 55,
87ea103259SMichael Clark     rv_op_sllid = 56,
88ea103259SMichael Clark     rv_op_srlid = 57,
89ea103259SMichael Clark     rv_op_sraid = 58,
90ea103259SMichael Clark     rv_op_addd = 59,
91ea103259SMichael Clark     rv_op_subd = 60,
92ea103259SMichael Clark     rv_op_slld = 61,
93ea103259SMichael Clark     rv_op_srld = 62,
94ea103259SMichael Clark     rv_op_srad = 63,
95ea103259SMichael Clark     rv_op_mul = 64,
96ea103259SMichael Clark     rv_op_mulh = 65,
97ea103259SMichael Clark     rv_op_mulhsu = 66,
98ea103259SMichael Clark     rv_op_mulhu = 67,
99ea103259SMichael Clark     rv_op_div = 68,
100ea103259SMichael Clark     rv_op_divu = 69,
101ea103259SMichael Clark     rv_op_rem = 70,
102ea103259SMichael Clark     rv_op_remu = 71,
103ea103259SMichael Clark     rv_op_mulw = 72,
104ea103259SMichael Clark     rv_op_divw = 73,
105ea103259SMichael Clark     rv_op_divuw = 74,
106ea103259SMichael Clark     rv_op_remw = 75,
107ea103259SMichael Clark     rv_op_remuw = 76,
108ea103259SMichael Clark     rv_op_muld = 77,
109ea103259SMichael Clark     rv_op_divd = 78,
110ea103259SMichael Clark     rv_op_divud = 79,
111ea103259SMichael Clark     rv_op_remd = 80,
112ea103259SMichael Clark     rv_op_remud = 81,
113ea103259SMichael Clark     rv_op_lr_w = 82,
114ea103259SMichael Clark     rv_op_sc_w = 83,
115ea103259SMichael Clark     rv_op_amoswap_w = 84,
116ea103259SMichael Clark     rv_op_amoadd_w = 85,
117ea103259SMichael Clark     rv_op_amoxor_w = 86,
118ea103259SMichael Clark     rv_op_amoor_w = 87,
119ea103259SMichael Clark     rv_op_amoand_w = 88,
120ea103259SMichael Clark     rv_op_amomin_w = 89,
121ea103259SMichael Clark     rv_op_amomax_w = 90,
122ea103259SMichael Clark     rv_op_amominu_w = 91,
123ea103259SMichael Clark     rv_op_amomaxu_w = 92,
124ea103259SMichael Clark     rv_op_lr_d = 93,
125ea103259SMichael Clark     rv_op_sc_d = 94,
126ea103259SMichael Clark     rv_op_amoswap_d = 95,
127ea103259SMichael Clark     rv_op_amoadd_d = 96,
128ea103259SMichael Clark     rv_op_amoxor_d = 97,
129ea103259SMichael Clark     rv_op_amoor_d = 98,
130ea103259SMichael Clark     rv_op_amoand_d = 99,
131ea103259SMichael Clark     rv_op_amomin_d = 100,
132ea103259SMichael Clark     rv_op_amomax_d = 101,
133ea103259SMichael Clark     rv_op_amominu_d = 102,
134ea103259SMichael Clark     rv_op_amomaxu_d = 103,
135ea103259SMichael Clark     rv_op_lr_q = 104,
136ea103259SMichael Clark     rv_op_sc_q = 105,
137ea103259SMichael Clark     rv_op_amoswap_q = 106,
138ea103259SMichael Clark     rv_op_amoadd_q = 107,
139ea103259SMichael Clark     rv_op_amoxor_q = 108,
140ea103259SMichael Clark     rv_op_amoor_q = 109,
141ea103259SMichael Clark     rv_op_amoand_q = 110,
142ea103259SMichael Clark     rv_op_amomin_q = 111,
143ea103259SMichael Clark     rv_op_amomax_q = 112,
144ea103259SMichael Clark     rv_op_amominu_q = 113,
145ea103259SMichael Clark     rv_op_amomaxu_q = 114,
146ea103259SMichael Clark     rv_op_ecall = 115,
147ea103259SMichael Clark     rv_op_ebreak = 116,
148ea103259SMichael Clark     rv_op_uret = 117,
149ea103259SMichael Clark     rv_op_sret = 118,
150ea103259SMichael Clark     rv_op_hret = 119,
151ea103259SMichael Clark     rv_op_mret = 120,
152ea103259SMichael Clark     rv_op_dret = 121,
153ea103259SMichael Clark     rv_op_sfence_vm = 122,
154ea103259SMichael Clark     rv_op_sfence_vma = 123,
155ea103259SMichael Clark     rv_op_wfi = 124,
156ea103259SMichael Clark     rv_op_csrrw = 125,
157ea103259SMichael Clark     rv_op_csrrs = 126,
158ea103259SMichael Clark     rv_op_csrrc = 127,
159ea103259SMichael Clark     rv_op_csrrwi = 128,
160ea103259SMichael Clark     rv_op_csrrsi = 129,
161ea103259SMichael Clark     rv_op_csrrci = 130,
162ea103259SMichael Clark     rv_op_flw = 131,
163ea103259SMichael Clark     rv_op_fsw = 132,
164ea103259SMichael Clark     rv_op_fmadd_s = 133,
165ea103259SMichael Clark     rv_op_fmsub_s = 134,
166ea103259SMichael Clark     rv_op_fnmsub_s = 135,
167ea103259SMichael Clark     rv_op_fnmadd_s = 136,
168ea103259SMichael Clark     rv_op_fadd_s = 137,
169ea103259SMichael Clark     rv_op_fsub_s = 138,
170ea103259SMichael Clark     rv_op_fmul_s = 139,
171ea103259SMichael Clark     rv_op_fdiv_s = 140,
172ea103259SMichael Clark     rv_op_fsgnj_s = 141,
173ea103259SMichael Clark     rv_op_fsgnjn_s = 142,
174ea103259SMichael Clark     rv_op_fsgnjx_s = 143,
175ea103259SMichael Clark     rv_op_fmin_s = 144,
176ea103259SMichael Clark     rv_op_fmax_s = 145,
177ea103259SMichael Clark     rv_op_fsqrt_s = 146,
178ea103259SMichael Clark     rv_op_fle_s = 147,
179ea103259SMichael Clark     rv_op_flt_s = 148,
180ea103259SMichael Clark     rv_op_feq_s = 149,
181ea103259SMichael Clark     rv_op_fcvt_w_s = 150,
182ea103259SMichael Clark     rv_op_fcvt_wu_s = 151,
183ea103259SMichael Clark     rv_op_fcvt_s_w = 152,
184ea103259SMichael Clark     rv_op_fcvt_s_wu = 153,
185ea103259SMichael Clark     rv_op_fmv_x_s = 154,
186ea103259SMichael Clark     rv_op_fclass_s = 155,
187ea103259SMichael Clark     rv_op_fmv_s_x = 156,
188ea103259SMichael Clark     rv_op_fcvt_l_s = 157,
189ea103259SMichael Clark     rv_op_fcvt_lu_s = 158,
190ea103259SMichael Clark     rv_op_fcvt_s_l = 159,
191ea103259SMichael Clark     rv_op_fcvt_s_lu = 160,
192ea103259SMichael Clark     rv_op_fld = 161,
193ea103259SMichael Clark     rv_op_fsd = 162,
194ea103259SMichael Clark     rv_op_fmadd_d = 163,
195ea103259SMichael Clark     rv_op_fmsub_d = 164,
196ea103259SMichael Clark     rv_op_fnmsub_d = 165,
197ea103259SMichael Clark     rv_op_fnmadd_d = 166,
198ea103259SMichael Clark     rv_op_fadd_d = 167,
199ea103259SMichael Clark     rv_op_fsub_d = 168,
200ea103259SMichael Clark     rv_op_fmul_d = 169,
201ea103259SMichael Clark     rv_op_fdiv_d = 170,
202ea103259SMichael Clark     rv_op_fsgnj_d = 171,
203ea103259SMichael Clark     rv_op_fsgnjn_d = 172,
204ea103259SMichael Clark     rv_op_fsgnjx_d = 173,
205ea103259SMichael Clark     rv_op_fmin_d = 174,
206ea103259SMichael Clark     rv_op_fmax_d = 175,
207ea103259SMichael Clark     rv_op_fcvt_s_d = 176,
208ea103259SMichael Clark     rv_op_fcvt_d_s = 177,
209ea103259SMichael Clark     rv_op_fsqrt_d = 178,
210ea103259SMichael Clark     rv_op_fle_d = 179,
211ea103259SMichael Clark     rv_op_flt_d = 180,
212ea103259SMichael Clark     rv_op_feq_d = 181,
213ea103259SMichael Clark     rv_op_fcvt_w_d = 182,
214ea103259SMichael Clark     rv_op_fcvt_wu_d = 183,
215ea103259SMichael Clark     rv_op_fcvt_d_w = 184,
216ea103259SMichael Clark     rv_op_fcvt_d_wu = 185,
217ea103259SMichael Clark     rv_op_fclass_d = 186,
218ea103259SMichael Clark     rv_op_fcvt_l_d = 187,
219ea103259SMichael Clark     rv_op_fcvt_lu_d = 188,
220ea103259SMichael Clark     rv_op_fmv_x_d = 189,
221ea103259SMichael Clark     rv_op_fcvt_d_l = 190,
222ea103259SMichael Clark     rv_op_fcvt_d_lu = 191,
223ea103259SMichael Clark     rv_op_fmv_d_x = 192,
224ea103259SMichael Clark     rv_op_flq = 193,
225ea103259SMichael Clark     rv_op_fsq = 194,
226ea103259SMichael Clark     rv_op_fmadd_q = 195,
227ea103259SMichael Clark     rv_op_fmsub_q = 196,
228ea103259SMichael Clark     rv_op_fnmsub_q = 197,
229ea103259SMichael Clark     rv_op_fnmadd_q = 198,
230ea103259SMichael Clark     rv_op_fadd_q = 199,
231ea103259SMichael Clark     rv_op_fsub_q = 200,
232ea103259SMichael Clark     rv_op_fmul_q = 201,
233ea103259SMichael Clark     rv_op_fdiv_q = 202,
234ea103259SMichael Clark     rv_op_fsgnj_q = 203,
235ea103259SMichael Clark     rv_op_fsgnjn_q = 204,
236ea103259SMichael Clark     rv_op_fsgnjx_q = 205,
237ea103259SMichael Clark     rv_op_fmin_q = 206,
238ea103259SMichael Clark     rv_op_fmax_q = 207,
239ea103259SMichael Clark     rv_op_fcvt_s_q = 208,
240ea103259SMichael Clark     rv_op_fcvt_q_s = 209,
241ea103259SMichael Clark     rv_op_fcvt_d_q = 210,
242ea103259SMichael Clark     rv_op_fcvt_q_d = 211,
243ea103259SMichael Clark     rv_op_fsqrt_q = 212,
244ea103259SMichael Clark     rv_op_fle_q = 213,
245ea103259SMichael Clark     rv_op_flt_q = 214,
246ea103259SMichael Clark     rv_op_feq_q = 215,
247ea103259SMichael Clark     rv_op_fcvt_w_q = 216,
248ea103259SMichael Clark     rv_op_fcvt_wu_q = 217,
249ea103259SMichael Clark     rv_op_fcvt_q_w = 218,
250ea103259SMichael Clark     rv_op_fcvt_q_wu = 219,
251ea103259SMichael Clark     rv_op_fclass_q = 220,
252ea103259SMichael Clark     rv_op_fcvt_l_q = 221,
253ea103259SMichael Clark     rv_op_fcvt_lu_q = 222,
254ea103259SMichael Clark     rv_op_fcvt_q_l = 223,
255ea103259SMichael Clark     rv_op_fcvt_q_lu = 224,
256ea103259SMichael Clark     rv_op_fmv_x_q = 225,
257ea103259SMichael Clark     rv_op_fmv_q_x = 226,
258ea103259SMichael Clark     rv_op_c_addi4spn = 227,
259ea103259SMichael Clark     rv_op_c_fld = 228,
260ea103259SMichael Clark     rv_op_c_lw = 229,
261ea103259SMichael Clark     rv_op_c_flw = 230,
262ea103259SMichael Clark     rv_op_c_fsd = 231,
263ea103259SMichael Clark     rv_op_c_sw = 232,
264ea103259SMichael Clark     rv_op_c_fsw = 233,
265ea103259SMichael Clark     rv_op_c_nop = 234,
266ea103259SMichael Clark     rv_op_c_addi = 235,
267ea103259SMichael Clark     rv_op_c_jal = 236,
268ea103259SMichael Clark     rv_op_c_li = 237,
269ea103259SMichael Clark     rv_op_c_addi16sp = 238,
270ea103259SMichael Clark     rv_op_c_lui = 239,
271ea103259SMichael Clark     rv_op_c_srli = 240,
272ea103259SMichael Clark     rv_op_c_srai = 241,
273ea103259SMichael Clark     rv_op_c_andi = 242,
274ea103259SMichael Clark     rv_op_c_sub = 243,
275ea103259SMichael Clark     rv_op_c_xor = 244,
276ea103259SMichael Clark     rv_op_c_or = 245,
277ea103259SMichael Clark     rv_op_c_and = 246,
278ea103259SMichael Clark     rv_op_c_subw = 247,
279ea103259SMichael Clark     rv_op_c_addw = 248,
280ea103259SMichael Clark     rv_op_c_j = 249,
281ea103259SMichael Clark     rv_op_c_beqz = 250,
282ea103259SMichael Clark     rv_op_c_bnez = 251,
283ea103259SMichael Clark     rv_op_c_slli = 252,
284ea103259SMichael Clark     rv_op_c_fldsp = 253,
285ea103259SMichael Clark     rv_op_c_lwsp = 254,
286ea103259SMichael Clark     rv_op_c_flwsp = 255,
287ea103259SMichael Clark     rv_op_c_jr = 256,
288ea103259SMichael Clark     rv_op_c_mv = 257,
289ea103259SMichael Clark     rv_op_c_ebreak = 258,
290ea103259SMichael Clark     rv_op_c_jalr = 259,
291ea103259SMichael Clark     rv_op_c_add = 260,
292ea103259SMichael Clark     rv_op_c_fsdsp = 261,
293ea103259SMichael Clark     rv_op_c_swsp = 262,
294ea103259SMichael Clark     rv_op_c_fswsp = 263,
295ea103259SMichael Clark     rv_op_c_ld = 264,
296ea103259SMichael Clark     rv_op_c_sd = 265,
297ea103259SMichael Clark     rv_op_c_addiw = 266,
298ea103259SMichael Clark     rv_op_c_ldsp = 267,
299ea103259SMichael Clark     rv_op_c_sdsp = 268,
300ea103259SMichael Clark     rv_op_c_lq = 269,
301ea103259SMichael Clark     rv_op_c_sq = 270,
302ea103259SMichael Clark     rv_op_c_lqsp = 271,
303ea103259SMichael Clark     rv_op_c_sqsp = 272,
304ea103259SMichael Clark     rv_op_nop = 273,
305ea103259SMichael Clark     rv_op_mv = 274,
306ea103259SMichael Clark     rv_op_not = 275,
307ea103259SMichael Clark     rv_op_neg = 276,
308ea103259SMichael Clark     rv_op_negw = 277,
309ea103259SMichael Clark     rv_op_sext_w = 278,
310ea103259SMichael Clark     rv_op_seqz = 279,
311ea103259SMichael Clark     rv_op_snez = 280,
312ea103259SMichael Clark     rv_op_sltz = 281,
313ea103259SMichael Clark     rv_op_sgtz = 282,
314ea103259SMichael Clark     rv_op_fmv_s = 283,
315ea103259SMichael Clark     rv_op_fabs_s = 284,
316ea103259SMichael Clark     rv_op_fneg_s = 285,
317ea103259SMichael Clark     rv_op_fmv_d = 286,
318ea103259SMichael Clark     rv_op_fabs_d = 287,
319ea103259SMichael Clark     rv_op_fneg_d = 288,
320ea103259SMichael Clark     rv_op_fmv_q = 289,
321ea103259SMichael Clark     rv_op_fabs_q = 290,
322ea103259SMichael Clark     rv_op_fneg_q = 291,
323ea103259SMichael Clark     rv_op_beqz = 292,
324ea103259SMichael Clark     rv_op_bnez = 293,
325ea103259SMichael Clark     rv_op_blez = 294,
326ea103259SMichael Clark     rv_op_bgez = 295,
327ea103259SMichael Clark     rv_op_bltz = 296,
328ea103259SMichael Clark     rv_op_bgtz = 297,
329ea103259SMichael Clark     rv_op_ble = 298,
330ea103259SMichael Clark     rv_op_bleu = 299,
331ea103259SMichael Clark     rv_op_bgt = 300,
332ea103259SMichael Clark     rv_op_bgtu = 301,
333ea103259SMichael Clark     rv_op_j = 302,
334ea103259SMichael Clark     rv_op_ret = 303,
335ea103259SMichael Clark     rv_op_jr = 304,
336ea103259SMichael Clark     rv_op_rdcycle = 305,
337ea103259SMichael Clark     rv_op_rdtime = 306,
338ea103259SMichael Clark     rv_op_rdinstret = 307,
339ea103259SMichael Clark     rv_op_rdcycleh = 308,
340ea103259SMichael Clark     rv_op_rdtimeh = 309,
341ea103259SMichael Clark     rv_op_rdinstreth = 310,
342ea103259SMichael Clark     rv_op_frcsr = 311,
343ea103259SMichael Clark     rv_op_frrm = 312,
344ea103259SMichael Clark     rv_op_frflags = 313,
345ea103259SMichael Clark     rv_op_fscsr = 314,
346ea103259SMichael Clark     rv_op_fsrm = 315,
347ea103259SMichael Clark     rv_op_fsflags = 316,
348ea103259SMichael Clark     rv_op_fsrmi = 317,
349ea103259SMichael Clark     rv_op_fsflagsi = 318,
35002c1b569SPhilipp Tomsich     rv_op_bseti = 319,
35102c1b569SPhilipp Tomsich     rv_op_bclri = 320,
35202c1b569SPhilipp Tomsich     rv_op_binvi = 321,
35302c1b569SPhilipp Tomsich     rv_op_bexti = 322,
35402c1b569SPhilipp Tomsich     rv_op_rori = 323,
35502c1b569SPhilipp Tomsich     rv_op_clz = 324,
35602c1b569SPhilipp Tomsich     rv_op_ctz = 325,
35702c1b569SPhilipp Tomsich     rv_op_cpop = 326,
35802c1b569SPhilipp Tomsich     rv_op_sext_h = 327,
35902c1b569SPhilipp Tomsich     rv_op_sext_b = 328,
36002c1b569SPhilipp Tomsich     rv_op_xnor = 329,
36102c1b569SPhilipp Tomsich     rv_op_orn = 330,
36202c1b569SPhilipp Tomsich     rv_op_andn = 331,
36302c1b569SPhilipp Tomsich     rv_op_rol = 332,
36402c1b569SPhilipp Tomsich     rv_op_ror = 333,
36502c1b569SPhilipp Tomsich     rv_op_sh1add = 334,
36602c1b569SPhilipp Tomsich     rv_op_sh2add = 335,
36702c1b569SPhilipp Tomsich     rv_op_sh3add = 336,
36802c1b569SPhilipp Tomsich     rv_op_sh1add_uw = 337,
36902c1b569SPhilipp Tomsich     rv_op_sh2add_uw = 338,
37002c1b569SPhilipp Tomsich     rv_op_sh3add_uw = 339,
37102c1b569SPhilipp Tomsich     rv_op_clmul = 340,
37202c1b569SPhilipp Tomsich     rv_op_clmulr = 341,
37302c1b569SPhilipp Tomsich     rv_op_clmulh = 342,
37402c1b569SPhilipp Tomsich     rv_op_min = 343,
37502c1b569SPhilipp Tomsich     rv_op_minu = 344,
37602c1b569SPhilipp Tomsich     rv_op_max = 345,
37702c1b569SPhilipp Tomsich     rv_op_maxu = 346,
37802c1b569SPhilipp Tomsich     rv_op_clzw = 347,
37902c1b569SPhilipp Tomsich     rv_op_ctzw = 348,
38002c1b569SPhilipp Tomsich     rv_op_cpopw = 349,
38102c1b569SPhilipp Tomsich     rv_op_slli_uw = 350,
38202c1b569SPhilipp Tomsich     rv_op_add_uw = 351,
38302c1b569SPhilipp Tomsich     rv_op_rolw = 352,
38402c1b569SPhilipp Tomsich     rv_op_rorw = 353,
38502c1b569SPhilipp Tomsich     rv_op_rev8 = 354,
38602c1b569SPhilipp Tomsich     rv_op_zext_h = 355,
38702c1b569SPhilipp Tomsich     rv_op_roriw = 356,
38802c1b569SPhilipp Tomsich     rv_op_orc_b = 357,
38902c1b569SPhilipp Tomsich     rv_op_bset = 358,
39002c1b569SPhilipp Tomsich     rv_op_bclr = 359,
39102c1b569SPhilipp Tomsich     rv_op_binv = 360,
39202c1b569SPhilipp Tomsich     rv_op_bext = 361,
3935748c886SWeiwei Li     rv_op_aes32esmi = 362,
3945748c886SWeiwei Li     rv_op_aes32esi = 363,
3955748c886SWeiwei Li     rv_op_aes32dsmi = 364,
3965748c886SWeiwei Li     rv_op_aes32dsi = 365,
3975748c886SWeiwei Li     rv_op_aes64ks1i = 366,
3985748c886SWeiwei Li     rv_op_aes64ks2 = 367,
3995748c886SWeiwei Li     rv_op_aes64im = 368,
4005748c886SWeiwei Li     rv_op_aes64esm = 369,
4015748c886SWeiwei Li     rv_op_aes64es = 370,
4025748c886SWeiwei Li     rv_op_aes64dsm = 371,
4035748c886SWeiwei Li     rv_op_aes64ds = 372,
4045748c886SWeiwei Li     rv_op_sha256sig0 = 373,
4055748c886SWeiwei Li     rv_op_sha256sig1 = 374,
4065748c886SWeiwei Li     rv_op_sha256sum0 = 375,
4075748c886SWeiwei Li     rv_op_sha256sum1 = 376,
4085748c886SWeiwei Li     rv_op_sha512sig0 = 377,
4095748c886SWeiwei Li     rv_op_sha512sig1 = 378,
4105748c886SWeiwei Li     rv_op_sha512sum0 = 379,
4115748c886SWeiwei Li     rv_op_sha512sum1 = 380,
4125748c886SWeiwei Li     rv_op_sha512sum0r = 381,
4135748c886SWeiwei Li     rv_op_sha512sum1r = 382,
4145748c886SWeiwei Li     rv_op_sha512sig0l = 383,
4155748c886SWeiwei Li     rv_op_sha512sig0h = 384,
4165748c886SWeiwei Li     rv_op_sha512sig1l = 385,
4175748c886SWeiwei Li     rv_op_sha512sig1h = 386,
4185748c886SWeiwei Li     rv_op_sm3p0 = 387,
4195748c886SWeiwei Li     rv_op_sm3p1 = 388,
4205748c886SWeiwei Li     rv_op_sm4ed = 389,
4215748c886SWeiwei Li     rv_op_sm4ks = 390,
4225748c886SWeiwei Li     rv_op_brev8 = 391,
4235748c886SWeiwei Li     rv_op_pack = 392,
4245748c886SWeiwei Li     rv_op_packh = 393,
4255748c886SWeiwei Li     rv_op_packw = 394,
4265748c886SWeiwei Li     rv_op_unzip = 395,
4275748c886SWeiwei Li     rv_op_zip = 396,
4285748c886SWeiwei Li     rv_op_xperm4 = 397,
4295748c886SWeiwei Li     rv_op_xperm8 = 398,
43007f4964dSYang Liu     rv_op_vle8_v = 399,
43107f4964dSYang Liu     rv_op_vle16_v = 400,
43207f4964dSYang Liu     rv_op_vle32_v = 401,
43307f4964dSYang Liu     rv_op_vle64_v = 402,
43407f4964dSYang Liu     rv_op_vse8_v = 403,
43507f4964dSYang Liu     rv_op_vse16_v = 404,
43607f4964dSYang Liu     rv_op_vse32_v = 405,
43707f4964dSYang Liu     rv_op_vse64_v = 406,
43807f4964dSYang Liu     rv_op_vlm_v = 407,
43907f4964dSYang Liu     rv_op_vsm_v = 408,
44007f4964dSYang Liu     rv_op_vlse8_v = 409,
44107f4964dSYang Liu     rv_op_vlse16_v = 410,
44207f4964dSYang Liu     rv_op_vlse32_v = 411,
44307f4964dSYang Liu     rv_op_vlse64_v = 412,
44407f4964dSYang Liu     rv_op_vsse8_v = 413,
44507f4964dSYang Liu     rv_op_vsse16_v = 414,
44607f4964dSYang Liu     rv_op_vsse32_v = 415,
44707f4964dSYang Liu     rv_op_vsse64_v = 416,
44807f4964dSYang Liu     rv_op_vluxei8_v = 417,
44907f4964dSYang Liu     rv_op_vluxei16_v = 418,
45007f4964dSYang Liu     rv_op_vluxei32_v = 419,
45107f4964dSYang Liu     rv_op_vluxei64_v = 420,
45207f4964dSYang Liu     rv_op_vloxei8_v = 421,
45307f4964dSYang Liu     rv_op_vloxei16_v = 422,
45407f4964dSYang Liu     rv_op_vloxei32_v = 423,
45507f4964dSYang Liu     rv_op_vloxei64_v = 424,
45607f4964dSYang Liu     rv_op_vsuxei8_v = 425,
45707f4964dSYang Liu     rv_op_vsuxei16_v = 426,
45807f4964dSYang Liu     rv_op_vsuxei32_v = 427,
45907f4964dSYang Liu     rv_op_vsuxei64_v = 428,
46007f4964dSYang Liu     rv_op_vsoxei8_v = 429,
46107f4964dSYang Liu     rv_op_vsoxei16_v = 430,
46207f4964dSYang Liu     rv_op_vsoxei32_v = 431,
46307f4964dSYang Liu     rv_op_vsoxei64_v = 432,
46407f4964dSYang Liu     rv_op_vle8ff_v = 433,
46507f4964dSYang Liu     rv_op_vle16ff_v = 434,
46607f4964dSYang Liu     rv_op_vle32ff_v = 435,
46707f4964dSYang Liu     rv_op_vle64ff_v = 436,
46807f4964dSYang Liu     rv_op_vl1re8_v = 437,
46907f4964dSYang Liu     rv_op_vl1re16_v = 438,
47007f4964dSYang Liu     rv_op_vl1re32_v = 439,
47107f4964dSYang Liu     rv_op_vl1re64_v = 440,
47207f4964dSYang Liu     rv_op_vl2re8_v = 441,
47307f4964dSYang Liu     rv_op_vl2re16_v = 442,
47407f4964dSYang Liu     rv_op_vl2re32_v = 443,
47507f4964dSYang Liu     rv_op_vl2re64_v = 444,
47607f4964dSYang Liu     rv_op_vl4re8_v = 445,
47707f4964dSYang Liu     rv_op_vl4re16_v = 446,
47807f4964dSYang Liu     rv_op_vl4re32_v = 447,
47907f4964dSYang Liu     rv_op_vl4re64_v = 448,
48007f4964dSYang Liu     rv_op_vl8re8_v = 449,
48107f4964dSYang Liu     rv_op_vl8re16_v = 450,
48207f4964dSYang Liu     rv_op_vl8re32_v = 451,
48307f4964dSYang Liu     rv_op_vl8re64_v = 452,
48407f4964dSYang Liu     rv_op_vs1r_v = 453,
48507f4964dSYang Liu     rv_op_vs2r_v = 454,
48607f4964dSYang Liu     rv_op_vs4r_v = 455,
48707f4964dSYang Liu     rv_op_vs8r_v = 456,
48807f4964dSYang Liu     rv_op_vadd_vv = 457,
48907f4964dSYang Liu     rv_op_vadd_vx = 458,
49007f4964dSYang Liu     rv_op_vadd_vi = 459,
49107f4964dSYang Liu     rv_op_vsub_vv = 460,
49207f4964dSYang Liu     rv_op_vsub_vx = 461,
49307f4964dSYang Liu     rv_op_vrsub_vx = 462,
49407f4964dSYang Liu     rv_op_vrsub_vi = 463,
49507f4964dSYang Liu     rv_op_vwaddu_vv = 464,
49607f4964dSYang Liu     rv_op_vwaddu_vx = 465,
49707f4964dSYang Liu     rv_op_vwadd_vv = 466,
49807f4964dSYang Liu     rv_op_vwadd_vx = 467,
49907f4964dSYang Liu     rv_op_vwsubu_vv = 468,
50007f4964dSYang Liu     rv_op_vwsubu_vx = 469,
50107f4964dSYang Liu     rv_op_vwsub_vv = 470,
50207f4964dSYang Liu     rv_op_vwsub_vx = 471,
50307f4964dSYang Liu     rv_op_vwaddu_wv = 472,
50407f4964dSYang Liu     rv_op_vwaddu_wx = 473,
50507f4964dSYang Liu     rv_op_vwadd_wv = 474,
50607f4964dSYang Liu     rv_op_vwadd_wx = 475,
50707f4964dSYang Liu     rv_op_vwsubu_wv = 476,
50807f4964dSYang Liu     rv_op_vwsubu_wx = 477,
50907f4964dSYang Liu     rv_op_vwsub_wv = 478,
51007f4964dSYang Liu     rv_op_vwsub_wx = 479,
51107f4964dSYang Liu     rv_op_vadc_vvm = 480,
51207f4964dSYang Liu     rv_op_vadc_vxm = 481,
51307f4964dSYang Liu     rv_op_vadc_vim = 482,
51407f4964dSYang Liu     rv_op_vmadc_vvm = 483,
51507f4964dSYang Liu     rv_op_vmadc_vxm = 484,
51607f4964dSYang Liu     rv_op_vmadc_vim = 485,
51707f4964dSYang Liu     rv_op_vsbc_vvm = 486,
51807f4964dSYang Liu     rv_op_vsbc_vxm = 487,
51907f4964dSYang Liu     rv_op_vmsbc_vvm = 488,
52007f4964dSYang Liu     rv_op_vmsbc_vxm = 489,
52107f4964dSYang Liu     rv_op_vand_vv = 490,
52207f4964dSYang Liu     rv_op_vand_vx = 491,
52307f4964dSYang Liu     rv_op_vand_vi = 492,
52407f4964dSYang Liu     rv_op_vor_vv = 493,
52507f4964dSYang Liu     rv_op_vor_vx = 494,
52607f4964dSYang Liu     rv_op_vor_vi = 495,
52707f4964dSYang Liu     rv_op_vxor_vv = 496,
52807f4964dSYang Liu     rv_op_vxor_vx = 497,
52907f4964dSYang Liu     rv_op_vxor_vi = 498,
53007f4964dSYang Liu     rv_op_vsll_vv = 499,
53107f4964dSYang Liu     rv_op_vsll_vx = 500,
53207f4964dSYang Liu     rv_op_vsll_vi = 501,
53307f4964dSYang Liu     rv_op_vsrl_vv = 502,
53407f4964dSYang Liu     rv_op_vsrl_vx = 503,
53507f4964dSYang Liu     rv_op_vsrl_vi = 504,
53607f4964dSYang Liu     rv_op_vsra_vv = 505,
53707f4964dSYang Liu     rv_op_vsra_vx = 506,
53807f4964dSYang Liu     rv_op_vsra_vi = 507,
53907f4964dSYang Liu     rv_op_vnsrl_wv = 508,
54007f4964dSYang Liu     rv_op_vnsrl_wx = 509,
54107f4964dSYang Liu     rv_op_vnsrl_wi = 510,
54207f4964dSYang Liu     rv_op_vnsra_wv = 511,
54307f4964dSYang Liu     rv_op_vnsra_wx = 512,
54407f4964dSYang Liu     rv_op_vnsra_wi = 513,
54507f4964dSYang Liu     rv_op_vmseq_vv = 514,
54607f4964dSYang Liu     rv_op_vmseq_vx = 515,
54707f4964dSYang Liu     rv_op_vmseq_vi = 516,
54807f4964dSYang Liu     rv_op_vmsne_vv = 517,
54907f4964dSYang Liu     rv_op_vmsne_vx = 518,
55007f4964dSYang Liu     rv_op_vmsne_vi = 519,
55107f4964dSYang Liu     rv_op_vmsltu_vv = 520,
55207f4964dSYang Liu     rv_op_vmsltu_vx = 521,
55307f4964dSYang Liu     rv_op_vmslt_vv = 522,
55407f4964dSYang Liu     rv_op_vmslt_vx = 523,
55507f4964dSYang Liu     rv_op_vmsleu_vv = 524,
55607f4964dSYang Liu     rv_op_vmsleu_vx = 525,
55707f4964dSYang Liu     rv_op_vmsleu_vi = 526,
55807f4964dSYang Liu     rv_op_vmsle_vv = 527,
55907f4964dSYang Liu     rv_op_vmsle_vx = 528,
56007f4964dSYang Liu     rv_op_vmsle_vi = 529,
56107f4964dSYang Liu     rv_op_vmsgtu_vx = 530,
56207f4964dSYang Liu     rv_op_vmsgtu_vi = 531,
56307f4964dSYang Liu     rv_op_vmsgt_vx = 532,
56407f4964dSYang Liu     rv_op_vmsgt_vi = 533,
56507f4964dSYang Liu     rv_op_vminu_vv = 534,
56607f4964dSYang Liu     rv_op_vminu_vx = 535,
56707f4964dSYang Liu     rv_op_vmin_vv = 536,
56807f4964dSYang Liu     rv_op_vmin_vx = 537,
56907f4964dSYang Liu     rv_op_vmaxu_vv = 538,
57007f4964dSYang Liu     rv_op_vmaxu_vx = 539,
57107f4964dSYang Liu     rv_op_vmax_vv = 540,
57207f4964dSYang Liu     rv_op_vmax_vx = 541,
57307f4964dSYang Liu     rv_op_vmul_vv = 542,
57407f4964dSYang Liu     rv_op_vmul_vx = 543,
57507f4964dSYang Liu     rv_op_vmulh_vv = 544,
57607f4964dSYang Liu     rv_op_vmulh_vx = 545,
57707f4964dSYang Liu     rv_op_vmulhu_vv = 546,
57807f4964dSYang Liu     rv_op_vmulhu_vx = 547,
57907f4964dSYang Liu     rv_op_vmulhsu_vv = 548,
58007f4964dSYang Liu     rv_op_vmulhsu_vx = 549,
58107f4964dSYang Liu     rv_op_vdivu_vv = 550,
58207f4964dSYang Liu     rv_op_vdivu_vx = 551,
58307f4964dSYang Liu     rv_op_vdiv_vv = 552,
58407f4964dSYang Liu     rv_op_vdiv_vx = 553,
58507f4964dSYang Liu     rv_op_vremu_vv = 554,
58607f4964dSYang Liu     rv_op_vremu_vx = 555,
58707f4964dSYang Liu     rv_op_vrem_vv = 556,
58807f4964dSYang Liu     rv_op_vrem_vx = 557,
58907f4964dSYang Liu     rv_op_vwmulu_vv = 558,
59007f4964dSYang Liu     rv_op_vwmulu_vx = 559,
59107f4964dSYang Liu     rv_op_vwmulsu_vv = 560,
59207f4964dSYang Liu     rv_op_vwmulsu_vx = 561,
59307f4964dSYang Liu     rv_op_vwmul_vv = 562,
59407f4964dSYang Liu     rv_op_vwmul_vx = 563,
59507f4964dSYang Liu     rv_op_vmacc_vv = 564,
59607f4964dSYang Liu     rv_op_vmacc_vx = 565,
59707f4964dSYang Liu     rv_op_vnmsac_vv = 566,
59807f4964dSYang Liu     rv_op_vnmsac_vx = 567,
59907f4964dSYang Liu     rv_op_vmadd_vv = 568,
60007f4964dSYang Liu     rv_op_vmadd_vx = 569,
60107f4964dSYang Liu     rv_op_vnmsub_vv = 570,
60207f4964dSYang Liu     rv_op_vnmsub_vx = 571,
60307f4964dSYang Liu     rv_op_vwmaccu_vv = 572,
60407f4964dSYang Liu     rv_op_vwmaccu_vx = 573,
60507f4964dSYang Liu     rv_op_vwmacc_vv = 574,
60607f4964dSYang Liu     rv_op_vwmacc_vx = 575,
60707f4964dSYang Liu     rv_op_vwmaccsu_vv = 576,
60807f4964dSYang Liu     rv_op_vwmaccsu_vx = 577,
60907f4964dSYang Liu     rv_op_vwmaccus_vx = 578,
61007f4964dSYang Liu     rv_op_vmv_v_v = 579,
61107f4964dSYang Liu     rv_op_vmv_v_x = 580,
61207f4964dSYang Liu     rv_op_vmv_v_i = 581,
61307f4964dSYang Liu     rv_op_vmerge_vvm = 582,
61407f4964dSYang Liu     rv_op_vmerge_vxm = 583,
61507f4964dSYang Liu     rv_op_vmerge_vim = 584,
61607f4964dSYang Liu     rv_op_vsaddu_vv = 585,
61707f4964dSYang Liu     rv_op_vsaddu_vx = 586,
61807f4964dSYang Liu     rv_op_vsaddu_vi = 587,
61907f4964dSYang Liu     rv_op_vsadd_vv = 588,
62007f4964dSYang Liu     rv_op_vsadd_vx = 589,
62107f4964dSYang Liu     rv_op_vsadd_vi = 590,
62207f4964dSYang Liu     rv_op_vssubu_vv = 591,
62307f4964dSYang Liu     rv_op_vssubu_vx = 592,
62407f4964dSYang Liu     rv_op_vssub_vv = 593,
62507f4964dSYang Liu     rv_op_vssub_vx = 594,
62607f4964dSYang Liu     rv_op_vaadd_vv = 595,
62707f4964dSYang Liu     rv_op_vaadd_vx = 596,
62807f4964dSYang Liu     rv_op_vaaddu_vv = 597,
62907f4964dSYang Liu     rv_op_vaaddu_vx = 598,
63007f4964dSYang Liu     rv_op_vasub_vv = 599,
63107f4964dSYang Liu     rv_op_vasub_vx = 600,
63207f4964dSYang Liu     rv_op_vasubu_vv = 601,
63307f4964dSYang Liu     rv_op_vasubu_vx = 602,
63407f4964dSYang Liu     rv_op_vsmul_vv = 603,
63507f4964dSYang Liu     rv_op_vsmul_vx = 604,
63607f4964dSYang Liu     rv_op_vssrl_vv = 605,
63707f4964dSYang Liu     rv_op_vssrl_vx = 606,
63807f4964dSYang Liu     rv_op_vssrl_vi = 607,
63907f4964dSYang Liu     rv_op_vssra_vv = 608,
64007f4964dSYang Liu     rv_op_vssra_vx = 609,
64107f4964dSYang Liu     rv_op_vssra_vi = 610,
64207f4964dSYang Liu     rv_op_vnclipu_wv = 611,
64307f4964dSYang Liu     rv_op_vnclipu_wx = 612,
64407f4964dSYang Liu     rv_op_vnclipu_wi = 613,
64507f4964dSYang Liu     rv_op_vnclip_wv = 614,
64607f4964dSYang Liu     rv_op_vnclip_wx = 615,
64707f4964dSYang Liu     rv_op_vnclip_wi = 616,
64807f4964dSYang Liu     rv_op_vfadd_vv = 617,
64907f4964dSYang Liu     rv_op_vfadd_vf = 618,
65007f4964dSYang Liu     rv_op_vfsub_vv = 619,
65107f4964dSYang Liu     rv_op_vfsub_vf = 620,
65207f4964dSYang Liu     rv_op_vfrsub_vf = 621,
65307f4964dSYang Liu     rv_op_vfwadd_vv = 622,
65407f4964dSYang Liu     rv_op_vfwadd_vf = 623,
65507f4964dSYang Liu     rv_op_vfwadd_wv = 624,
65607f4964dSYang Liu     rv_op_vfwadd_wf = 625,
65707f4964dSYang Liu     rv_op_vfwsub_vv = 626,
65807f4964dSYang Liu     rv_op_vfwsub_vf = 627,
65907f4964dSYang Liu     rv_op_vfwsub_wv = 628,
66007f4964dSYang Liu     rv_op_vfwsub_wf = 629,
66107f4964dSYang Liu     rv_op_vfmul_vv = 630,
66207f4964dSYang Liu     rv_op_vfmul_vf = 631,
66307f4964dSYang Liu     rv_op_vfdiv_vv = 632,
66407f4964dSYang Liu     rv_op_vfdiv_vf = 633,
66507f4964dSYang Liu     rv_op_vfrdiv_vf = 634,
66607f4964dSYang Liu     rv_op_vfwmul_vv = 635,
66707f4964dSYang Liu     rv_op_vfwmul_vf = 636,
66807f4964dSYang Liu     rv_op_vfmacc_vv = 637,
66907f4964dSYang Liu     rv_op_vfmacc_vf = 638,
67007f4964dSYang Liu     rv_op_vfnmacc_vv = 639,
67107f4964dSYang Liu     rv_op_vfnmacc_vf = 640,
67207f4964dSYang Liu     rv_op_vfmsac_vv = 641,
67307f4964dSYang Liu     rv_op_vfmsac_vf = 642,
67407f4964dSYang Liu     rv_op_vfnmsac_vv = 643,
67507f4964dSYang Liu     rv_op_vfnmsac_vf = 644,
67607f4964dSYang Liu     rv_op_vfmadd_vv = 645,
67707f4964dSYang Liu     rv_op_vfmadd_vf = 646,
67807f4964dSYang Liu     rv_op_vfnmadd_vv = 647,
67907f4964dSYang Liu     rv_op_vfnmadd_vf = 648,
68007f4964dSYang Liu     rv_op_vfmsub_vv = 649,
68107f4964dSYang Liu     rv_op_vfmsub_vf = 650,
68207f4964dSYang Liu     rv_op_vfnmsub_vv = 651,
68307f4964dSYang Liu     rv_op_vfnmsub_vf = 652,
68407f4964dSYang Liu     rv_op_vfwmacc_vv = 653,
68507f4964dSYang Liu     rv_op_vfwmacc_vf = 654,
68607f4964dSYang Liu     rv_op_vfwnmacc_vv = 655,
68707f4964dSYang Liu     rv_op_vfwnmacc_vf = 656,
68807f4964dSYang Liu     rv_op_vfwmsac_vv = 657,
68907f4964dSYang Liu     rv_op_vfwmsac_vf = 658,
69007f4964dSYang Liu     rv_op_vfwnmsac_vv = 659,
69107f4964dSYang Liu     rv_op_vfwnmsac_vf = 660,
69207f4964dSYang Liu     rv_op_vfsqrt_v = 661,
69307f4964dSYang Liu     rv_op_vfrsqrt7_v = 662,
69407f4964dSYang Liu     rv_op_vfrec7_v = 663,
69507f4964dSYang Liu     rv_op_vfmin_vv = 664,
69607f4964dSYang Liu     rv_op_vfmin_vf = 665,
69707f4964dSYang Liu     rv_op_vfmax_vv = 666,
69807f4964dSYang Liu     rv_op_vfmax_vf = 667,
69907f4964dSYang Liu     rv_op_vfsgnj_vv = 668,
70007f4964dSYang Liu     rv_op_vfsgnj_vf = 669,
70107f4964dSYang Liu     rv_op_vfsgnjn_vv = 670,
70207f4964dSYang Liu     rv_op_vfsgnjn_vf = 671,
70307f4964dSYang Liu     rv_op_vfsgnjx_vv = 672,
70407f4964dSYang Liu     rv_op_vfsgnjx_vf = 673,
70507f4964dSYang Liu     rv_op_vfslide1up_vf = 674,
70607f4964dSYang Liu     rv_op_vfslide1down_vf = 675,
70707f4964dSYang Liu     rv_op_vmfeq_vv = 676,
70807f4964dSYang Liu     rv_op_vmfeq_vf = 677,
70907f4964dSYang Liu     rv_op_vmfne_vv = 678,
71007f4964dSYang Liu     rv_op_vmfne_vf = 679,
71107f4964dSYang Liu     rv_op_vmflt_vv = 680,
71207f4964dSYang Liu     rv_op_vmflt_vf = 681,
71307f4964dSYang Liu     rv_op_vmfle_vv = 682,
71407f4964dSYang Liu     rv_op_vmfle_vf = 683,
71507f4964dSYang Liu     rv_op_vmfgt_vf = 684,
71607f4964dSYang Liu     rv_op_vmfge_vf = 685,
71707f4964dSYang Liu     rv_op_vfclass_v = 686,
71807f4964dSYang Liu     rv_op_vfmerge_vfm = 687,
71907f4964dSYang Liu     rv_op_vfmv_v_f = 688,
72007f4964dSYang Liu     rv_op_vfcvt_xu_f_v = 689,
72107f4964dSYang Liu     rv_op_vfcvt_x_f_v = 690,
72207f4964dSYang Liu     rv_op_vfcvt_f_xu_v = 691,
72307f4964dSYang Liu     rv_op_vfcvt_f_x_v = 692,
72407f4964dSYang Liu     rv_op_vfcvt_rtz_xu_f_v = 693,
72507f4964dSYang Liu     rv_op_vfcvt_rtz_x_f_v = 694,
72607f4964dSYang Liu     rv_op_vfwcvt_xu_f_v = 695,
72707f4964dSYang Liu     rv_op_vfwcvt_x_f_v = 696,
72807f4964dSYang Liu     rv_op_vfwcvt_f_xu_v = 697,
72907f4964dSYang Liu     rv_op_vfwcvt_f_x_v = 698,
73007f4964dSYang Liu     rv_op_vfwcvt_f_f_v = 699,
73107f4964dSYang Liu     rv_op_vfwcvt_rtz_xu_f_v = 700,
73207f4964dSYang Liu     rv_op_vfwcvt_rtz_x_f_v = 701,
73307f4964dSYang Liu     rv_op_vfncvt_xu_f_w = 702,
73407f4964dSYang Liu     rv_op_vfncvt_x_f_w = 703,
73507f4964dSYang Liu     rv_op_vfncvt_f_xu_w = 704,
73607f4964dSYang Liu     rv_op_vfncvt_f_x_w = 705,
73707f4964dSYang Liu     rv_op_vfncvt_f_f_w = 706,
73807f4964dSYang Liu     rv_op_vfncvt_rod_f_f_w = 707,
73907f4964dSYang Liu     rv_op_vfncvt_rtz_xu_f_w = 708,
74007f4964dSYang Liu     rv_op_vfncvt_rtz_x_f_w = 709,
74107f4964dSYang Liu     rv_op_vredsum_vs = 710,
74207f4964dSYang Liu     rv_op_vredand_vs = 711,
74307f4964dSYang Liu     rv_op_vredor_vs = 712,
74407f4964dSYang Liu     rv_op_vredxor_vs = 713,
74507f4964dSYang Liu     rv_op_vredminu_vs = 714,
74607f4964dSYang Liu     rv_op_vredmin_vs = 715,
74707f4964dSYang Liu     rv_op_vredmaxu_vs = 716,
74807f4964dSYang Liu     rv_op_vredmax_vs = 717,
74907f4964dSYang Liu     rv_op_vwredsumu_vs = 718,
75007f4964dSYang Liu     rv_op_vwredsum_vs = 719,
75107f4964dSYang Liu     rv_op_vfredusum_vs = 720,
75207f4964dSYang Liu     rv_op_vfredosum_vs = 721,
75307f4964dSYang Liu     rv_op_vfredmin_vs = 722,
75407f4964dSYang Liu     rv_op_vfredmax_vs = 723,
75507f4964dSYang Liu     rv_op_vfwredusum_vs = 724,
75607f4964dSYang Liu     rv_op_vfwredosum_vs = 725,
75707f4964dSYang Liu     rv_op_vmand_mm = 726,
75807f4964dSYang Liu     rv_op_vmnand_mm = 727,
75907f4964dSYang Liu     rv_op_vmandn_mm = 728,
76007f4964dSYang Liu     rv_op_vmxor_mm = 729,
76107f4964dSYang Liu     rv_op_vmor_mm = 730,
76207f4964dSYang Liu     rv_op_vmnor_mm = 731,
76307f4964dSYang Liu     rv_op_vmorn_mm = 732,
76407f4964dSYang Liu     rv_op_vmxnor_mm = 733,
76507f4964dSYang Liu     rv_op_vcpop_m = 734,
76607f4964dSYang Liu     rv_op_vfirst_m = 735,
76707f4964dSYang Liu     rv_op_vmsbf_m = 736,
76807f4964dSYang Liu     rv_op_vmsif_m = 737,
76907f4964dSYang Liu     rv_op_vmsof_m = 738,
77007f4964dSYang Liu     rv_op_viota_m = 739,
77107f4964dSYang Liu     rv_op_vid_v = 740,
77207f4964dSYang Liu     rv_op_vmv_x_s = 741,
77307f4964dSYang Liu     rv_op_vmv_s_x = 742,
77407f4964dSYang Liu     rv_op_vfmv_f_s = 743,
77507f4964dSYang Liu     rv_op_vfmv_s_f = 744,
77607f4964dSYang Liu     rv_op_vslideup_vx = 745,
77707f4964dSYang Liu     rv_op_vslideup_vi = 746,
77807f4964dSYang Liu     rv_op_vslide1up_vx = 747,
77907f4964dSYang Liu     rv_op_vslidedown_vx = 748,
78007f4964dSYang Liu     rv_op_vslidedown_vi = 749,
78107f4964dSYang Liu     rv_op_vslide1down_vx = 750,
78207f4964dSYang Liu     rv_op_vrgather_vv = 751,
78307f4964dSYang Liu     rv_op_vrgatherei16_vv = 752,
78407f4964dSYang Liu     rv_op_vrgather_vx = 753,
78507f4964dSYang Liu     rv_op_vrgather_vi = 754,
78607f4964dSYang Liu     rv_op_vcompress_vm = 755,
78707f4964dSYang Liu     rv_op_vmv1r_v = 756,
78807f4964dSYang Liu     rv_op_vmv2r_v = 757,
78907f4964dSYang Liu     rv_op_vmv4r_v = 758,
79007f4964dSYang Liu     rv_op_vmv8r_v = 759,
79107f4964dSYang Liu     rv_op_vzext_vf2 = 760,
79207f4964dSYang Liu     rv_op_vzext_vf4 = 761,
79307f4964dSYang Liu     rv_op_vzext_vf8 = 762,
79407f4964dSYang Liu     rv_op_vsext_vf2 = 763,
79507f4964dSYang Liu     rv_op_vsext_vf4 = 764,
79607f4964dSYang Liu     rv_op_vsext_vf8 = 765,
79707f4964dSYang Liu     rv_op_vsetvli = 766,
79807f4964dSYang Liu     rv_op_vsetivli = 767,
79907f4964dSYang Liu     rv_op_vsetvl = 768,
8002c71d02eSWeiwei Li     rv_op_c_zext_b = 769,
8012c71d02eSWeiwei Li     rv_op_c_sext_b = 770,
8022c71d02eSWeiwei Li     rv_op_c_zext_h = 771,
8032c71d02eSWeiwei Li     rv_op_c_sext_h = 772,
8042c71d02eSWeiwei Li     rv_op_c_zext_w = 773,
8052c71d02eSWeiwei Li     rv_op_c_not = 774,
8062c71d02eSWeiwei Li     rv_op_c_mul = 775,
8072c71d02eSWeiwei Li     rv_op_c_lbu = 776,
8082c71d02eSWeiwei Li     rv_op_c_lhu = 777,
8092c71d02eSWeiwei Li     rv_op_c_lh = 778,
8102c71d02eSWeiwei Li     rv_op_c_sb = 779,
8112c71d02eSWeiwei Li     rv_op_c_sh = 780,
8122c71d02eSWeiwei Li     rv_op_cm_push = 781,
8132c71d02eSWeiwei Li     rv_op_cm_pop = 782,
8142c71d02eSWeiwei Li     rv_op_cm_popret = 783,
8152c71d02eSWeiwei Li     rv_op_cm_popretz = 784,
8162c71d02eSWeiwei Li     rv_op_cm_mva01s = 785,
8172c71d02eSWeiwei Li     rv_op_cm_mvsa01 = 786,
8182c71d02eSWeiwei Li     rv_op_cm_jt = 787,
8192c71d02eSWeiwei Li     rv_op_cm_jalt = 788,
820d397be9aSRichard Henderson     rv_op_czero_eqz = 789,
821d397be9aSRichard Henderson     rv_op_czero_nez = 790,
82232b2d75bSWeiwei Li     rv_op_fcvt_bf16_s = 791,
82332b2d75bSWeiwei Li     rv_op_fcvt_s_bf16 = 792,
82432b2d75bSWeiwei Li     rv_op_vfncvtbf16_f_f_w = 793,
82532b2d75bSWeiwei Li     rv_op_vfwcvtbf16_f_f_v = 794,
82632b2d75bSWeiwei Li     rv_op_vfwmaccbf16_vv = 795,
82732b2d75bSWeiwei Li     rv_op_vfwmaccbf16_vf = 796,
82832b2d75bSWeiwei Li     rv_op_flh = 797,
82932b2d75bSWeiwei Li     rv_op_fsh = 798,
83032b2d75bSWeiwei Li     rv_op_fmv_h_x = 799,
83132b2d75bSWeiwei Li     rv_op_fmv_x_h = 800,
832a47842d1SChristoph Müllner     rv_op_fli_s = 801,
833a47842d1SChristoph Müllner     rv_op_fli_d = 802,
834a47842d1SChristoph Müllner     rv_op_fli_q = 803,
835a47842d1SChristoph Müllner     rv_op_fli_h = 804,
836a47842d1SChristoph Müllner     rv_op_fminm_s = 805,
837a47842d1SChristoph Müllner     rv_op_fmaxm_s = 806,
838a47842d1SChristoph Müllner     rv_op_fminm_d = 807,
839a47842d1SChristoph Müllner     rv_op_fmaxm_d = 808,
840a47842d1SChristoph Müllner     rv_op_fminm_q = 809,
841a47842d1SChristoph Müllner     rv_op_fmaxm_q = 810,
842a47842d1SChristoph Müllner     rv_op_fminm_h = 811,
843a47842d1SChristoph Müllner     rv_op_fmaxm_h = 812,
844a47842d1SChristoph Müllner     rv_op_fround_s = 813,
845a47842d1SChristoph Müllner     rv_op_froundnx_s = 814,
846a47842d1SChristoph Müllner     rv_op_fround_d = 815,
847a47842d1SChristoph Müllner     rv_op_froundnx_d = 816,
848a47842d1SChristoph Müllner     rv_op_fround_q = 817,
849a47842d1SChristoph Müllner     rv_op_froundnx_q = 818,
850a47842d1SChristoph Müllner     rv_op_fround_h = 819,
851a47842d1SChristoph Müllner     rv_op_froundnx_h = 820,
852a47842d1SChristoph Müllner     rv_op_fcvtmod_w_d = 821,
853a47842d1SChristoph Müllner     rv_op_fmvh_x_d = 822,
854a47842d1SChristoph Müllner     rv_op_fmvp_d_x = 823,
855a47842d1SChristoph Müllner     rv_op_fmvh_x_q = 824,
856a47842d1SChristoph Müllner     rv_op_fmvp_q_x = 825,
857a47842d1SChristoph Müllner     rv_op_fleq_s = 826,
858a47842d1SChristoph Müllner     rv_op_fltq_s = 827,
859a47842d1SChristoph Müllner     rv_op_fleq_d = 828,
860a47842d1SChristoph Müllner     rv_op_fltq_d = 829,
861a47842d1SChristoph Müllner     rv_op_fleq_q = 830,
862a47842d1SChristoph Müllner     rv_op_fltq_q = 831,
863a47842d1SChristoph Müllner     rv_op_fleq_h = 832,
864a47842d1SChristoph Müllner     rv_op_fltq_h = 833,
865*9d92f56dSMax Chou     rv_op_vaesdf_vv = 834,
866*9d92f56dSMax Chou     rv_op_vaesdf_vs = 835,
867*9d92f56dSMax Chou     rv_op_vaesdm_vv = 836,
868*9d92f56dSMax Chou     rv_op_vaesdm_vs = 837,
869*9d92f56dSMax Chou     rv_op_vaesef_vv = 838,
870*9d92f56dSMax Chou     rv_op_vaesef_vs = 839,
871*9d92f56dSMax Chou     rv_op_vaesem_vv = 840,
872*9d92f56dSMax Chou     rv_op_vaesem_vs = 841,
873*9d92f56dSMax Chou     rv_op_vaeskf1_vi = 842,
874*9d92f56dSMax Chou     rv_op_vaeskf2_vi = 843,
875*9d92f56dSMax Chou     rv_op_vaesz_vs = 844,
876*9d92f56dSMax Chou     rv_op_vandn_vv = 845,
877*9d92f56dSMax Chou     rv_op_vandn_vx = 846,
878*9d92f56dSMax Chou     rv_op_vbrev_v = 847,
879*9d92f56dSMax Chou     rv_op_vbrev8_v = 848,
880*9d92f56dSMax Chou     rv_op_vclmul_vv = 849,
881*9d92f56dSMax Chou     rv_op_vclmul_vx = 850,
882*9d92f56dSMax Chou     rv_op_vclmulh_vv = 851,
883*9d92f56dSMax Chou     rv_op_vclmulh_vx = 852,
884*9d92f56dSMax Chou     rv_op_vclz_v = 853,
885*9d92f56dSMax Chou     rv_op_vcpop_v = 854,
886*9d92f56dSMax Chou     rv_op_vctz_v = 855,
887*9d92f56dSMax Chou     rv_op_vghsh_vv = 856,
888*9d92f56dSMax Chou     rv_op_vgmul_vv = 857,
889*9d92f56dSMax Chou     rv_op_vrev8_v = 858,
890*9d92f56dSMax Chou     rv_op_vrol_vv = 859,
891*9d92f56dSMax Chou     rv_op_vrol_vx = 860,
892*9d92f56dSMax Chou     rv_op_vror_vv = 861,
893*9d92f56dSMax Chou     rv_op_vror_vx = 862,
894*9d92f56dSMax Chou     rv_op_vror_vi = 863,
895*9d92f56dSMax Chou     rv_op_vsha2ch_vv = 864,
896*9d92f56dSMax Chou     rv_op_vsha2cl_vv = 865,
897*9d92f56dSMax Chou     rv_op_vsha2ms_vv = 866,
898*9d92f56dSMax Chou     rv_op_vsm3c_vi = 867,
899*9d92f56dSMax Chou     rv_op_vsm3me_vv = 868,
900*9d92f56dSMax Chou     rv_op_vsm4k_vi = 869,
901*9d92f56dSMax Chou     rv_op_vsm4r_vv = 870,
902*9d92f56dSMax Chou     rv_op_vsm4r_vs = 871,
903*9d92f56dSMax Chou     rv_op_vwsll_vv = 872,
904*9d92f56dSMax Chou     rv_op_vwsll_vx = 873,
905*9d92f56dSMax Chou     rv_op_vwsll_vi = 874,
906ea103259SMichael Clark } rv_op;
907ea103259SMichael Clark 
908ea103259SMichael Clark /* register names */
909ea103259SMichael Clark 
910ea103259SMichael Clark static const char rv_ireg_name_sym[32][5] = {
911ea103259SMichael Clark     "zero", "ra",   "sp",   "gp",   "tp",   "t0",   "t1",   "t2",
912ea103259SMichael Clark     "s0",   "s1",   "a0",   "a1",   "a2",   "a3",   "a4",   "a5",
913ea103259SMichael Clark     "a6",   "a7",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
914ea103259SMichael Clark     "s8",   "s9",   "s10",  "s11",  "t3",   "t4",   "t5",   "t6",
915ea103259SMichael Clark };
916ea103259SMichael Clark 
917ea103259SMichael Clark static const char rv_freg_name_sym[32][5] = {
918ea103259SMichael Clark     "ft0",  "ft1",  "ft2",  "ft3",  "ft4",  "ft5",  "ft6",  "ft7",
919ea103259SMichael Clark     "fs0",  "fs1",  "fa0",  "fa1",  "fa2",  "fa3",  "fa4",  "fa5",
920ea103259SMichael Clark     "fa6",  "fa7",  "fs2",  "fs3",  "fs4",  "fs5",  "fs6",  "fs7",
921ea103259SMichael Clark     "fs8",  "fs9",  "fs10", "fs11", "ft8",  "ft9",  "ft10", "ft11",
922ea103259SMichael Clark };
923ea103259SMichael Clark 
92407f4964dSYang Liu static const char rv_vreg_name_sym[32][4] = {
92507f4964dSYang Liu     "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",
92607f4964dSYang Liu     "v8",  "v9",  "v10", "v11", "v12", "v13", "v14", "v15",
92707f4964dSYang Liu     "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
92807f4964dSYang Liu     "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
92907f4964dSYang Liu };
93007f4964dSYang Liu 
931a47842d1SChristoph Müllner /* The FLI.[HSDQ] numeric constants (0.0 for symbolic constants).
932a47842d1SChristoph Müllner  * The constants use the hex floating-point literal representation
933a47842d1SChristoph Müllner  * that is printed when using the printf %a format specifier,
934a47842d1SChristoph Müllner  * which matches the output that is generated by the disassembler.
935a47842d1SChristoph Müllner  */
936a47842d1SChristoph Müllner static const char rv_fli_name_const[32][9] =
937a47842d1SChristoph Müllner {
938a47842d1SChristoph Müllner     "0x1p+0", "min", "0x1p-16", "0x1p-15",
939a47842d1SChristoph Müllner     "0x1p-8", "0x1p-7", "0x1p-4", "0x1p-3",
940a47842d1SChristoph Müllner     "0x1p-2", "0x1.4p-2", "0x1.8p-2", "0x1.cp-2",
941a47842d1SChristoph Müllner     "0x1p-1", "0x1.4p-1", "0x1.8p-1", "0x1.cp-1",
942a47842d1SChristoph Müllner     "0x1p+0", "0x1.4p+0", "0x1.8p+0", "0x1.cp+0",
943a47842d1SChristoph Müllner     "0x1p+1", "0x1.4p+1", "0x1.8p+1", "0x1p+2",
944a47842d1SChristoph Müllner     "0x1p+3", "0x1p+4", "0x1p+7", "0x1p+8",
945a47842d1SChristoph Müllner     "0x1p+15", "0x1p+16", "inf", "nan"
946a47842d1SChristoph Müllner };
947a47842d1SChristoph Müllner 
948ea103259SMichael Clark /* pseudo-instruction constraints */
949ea103259SMichael Clark 
950ea103259SMichael Clark static const rvc_constraint rvcc_jal[] = { rvc_rd_eq_ra, rvc_end };
95198624d13SWeiwei Li static const rvc_constraint rvcc_jalr[] = { rvc_rd_eq_ra, rvc_imm_eq_zero,
95298624d13SWeiwei Li                                             rvc_end };
95398624d13SWeiwei Li static const rvc_constraint rvcc_nop[] = { rvc_rd_eq_x0, rvc_rs1_eq_x0,
95498624d13SWeiwei Li                                            rvc_imm_eq_zero, rvc_end };
955ea103259SMichael Clark static const rvc_constraint rvcc_mv[] = { rvc_imm_eq_zero, rvc_end };
956ea103259SMichael Clark static const rvc_constraint rvcc_not[] = { rvc_imm_eq_n1, rvc_end };
957ea103259SMichael Clark static const rvc_constraint rvcc_neg[] = { rvc_rs1_eq_x0, rvc_end };
958ea103259SMichael Clark static const rvc_constraint rvcc_negw[] = { rvc_rs1_eq_x0, rvc_end };
95933b4f859SMichael Clark static const rvc_constraint rvcc_sext_w[] = { rvc_imm_eq_zero, rvc_end };
960ea103259SMichael Clark static const rvc_constraint rvcc_seqz[] = { rvc_imm_eq_p1, rvc_end };
961ea103259SMichael Clark static const rvc_constraint rvcc_snez[] = { rvc_rs1_eq_x0, rvc_end };
962ea103259SMichael Clark static const rvc_constraint rvcc_sltz[] = { rvc_rs2_eq_x0, rvc_end };
963ea103259SMichael Clark static const rvc_constraint rvcc_sgtz[] = { rvc_rs1_eq_x0, rvc_end };
964ea103259SMichael Clark static const rvc_constraint rvcc_fmv_s[] = { rvc_rs2_eq_rs1, rvc_end };
965ea103259SMichael Clark static const rvc_constraint rvcc_fabs_s[] = { rvc_rs2_eq_rs1, rvc_end };
966ea103259SMichael Clark static const rvc_constraint rvcc_fneg_s[] = { rvc_rs2_eq_rs1, rvc_end };
967ea103259SMichael Clark static const rvc_constraint rvcc_fmv_d[] = { rvc_rs2_eq_rs1, rvc_end };
968ea103259SMichael Clark static const rvc_constraint rvcc_fabs_d[] = { rvc_rs2_eq_rs1, rvc_end };
969ea103259SMichael Clark static const rvc_constraint rvcc_fneg_d[] = { rvc_rs2_eq_rs1, rvc_end };
970ea103259SMichael Clark static const rvc_constraint rvcc_fmv_q[] = { rvc_rs2_eq_rs1, rvc_end };
971ea103259SMichael Clark static const rvc_constraint rvcc_fabs_q[] = { rvc_rs2_eq_rs1, rvc_end };
972ea103259SMichael Clark static const rvc_constraint rvcc_fneg_q[] = { rvc_rs2_eq_rs1, rvc_end };
973ea103259SMichael Clark static const rvc_constraint rvcc_beqz[] = { rvc_rs2_eq_x0, rvc_end };
974ea103259SMichael Clark static const rvc_constraint rvcc_bnez[] = { rvc_rs2_eq_x0, rvc_end };
975ea103259SMichael Clark static const rvc_constraint rvcc_blez[] = { rvc_rs1_eq_x0, rvc_end };
976ea103259SMichael Clark static const rvc_constraint rvcc_bgez[] = { rvc_rs2_eq_x0, rvc_end };
977ea103259SMichael Clark static const rvc_constraint rvcc_bltz[] = { rvc_rs2_eq_x0, rvc_end };
978ea103259SMichael Clark static const rvc_constraint rvcc_bgtz[] = { rvc_rs1_eq_x0, rvc_end };
979ea103259SMichael Clark static const rvc_constraint rvcc_ble[] = { rvc_end };
980ea103259SMichael Clark static const rvc_constraint rvcc_bleu[] = { rvc_end };
981ea103259SMichael Clark static const rvc_constraint rvcc_bgt[] = { rvc_end };
982ea103259SMichael Clark static const rvc_constraint rvcc_bgtu[] = { rvc_end };
983ea103259SMichael Clark static const rvc_constraint rvcc_j[] = { rvc_rd_eq_x0, rvc_end };
98498624d13SWeiwei Li static const rvc_constraint rvcc_ret[] = { rvc_rd_eq_x0, rvc_rs1_eq_ra,
98598624d13SWeiwei Li                                            rvc_end };
98698624d13SWeiwei Li static const rvc_constraint rvcc_jr[] = { rvc_rd_eq_x0, rvc_imm_eq_zero,
98798624d13SWeiwei Li                                           rvc_end };
98898624d13SWeiwei Li static const rvc_constraint rvcc_rdcycle[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc00,
98998624d13SWeiwei Li                                                rvc_end };
99098624d13SWeiwei Li static const rvc_constraint rvcc_rdtime[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc01,
99198624d13SWeiwei Li                                               rvc_end };
99298624d13SWeiwei Li static const rvc_constraint rvcc_rdinstret[] = { rvc_rs1_eq_x0,
99398624d13SWeiwei Li                                                  rvc_csr_eq_0xc02, rvc_end };
99498624d13SWeiwei Li static const rvc_constraint rvcc_rdcycleh[] = { rvc_rs1_eq_x0,
99598624d13SWeiwei Li                                                 rvc_csr_eq_0xc80, rvc_end };
99698624d13SWeiwei Li static const rvc_constraint rvcc_rdtimeh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc81,
99798624d13SWeiwei Li                                                rvc_end };
9982e3df911SWladimir J. van der Laan static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0,
9992e3df911SWladimir J. van der Laan                                                   rvc_csr_eq_0xc82, rvc_end };
100098624d13SWeiwei Li static const rvc_constraint rvcc_frcsr[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x003,
100198624d13SWeiwei Li                                              rvc_end };
100298624d13SWeiwei Li static const rvc_constraint rvcc_frrm[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x002,
100398624d13SWeiwei Li                                             rvc_end };
100498624d13SWeiwei Li static const rvc_constraint rvcc_frflags[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x001,
100598624d13SWeiwei Li                                                rvc_end };
1006ea103259SMichael Clark static const rvc_constraint rvcc_fscsr[] = { rvc_csr_eq_0x003, rvc_end };
1007ea103259SMichael Clark static const rvc_constraint rvcc_fsrm[] = { rvc_csr_eq_0x002, rvc_end };
1008ea103259SMichael Clark static const rvc_constraint rvcc_fsflags[] = { rvc_csr_eq_0x001, rvc_end };
1009ea103259SMichael Clark static const rvc_constraint rvcc_fsrmi[] = { rvc_csr_eq_0x002, rvc_end };
1010ea103259SMichael Clark static const rvc_constraint rvcc_fsflagsi[] = { rvc_csr_eq_0x001, rvc_end };
1011ea103259SMichael Clark 
1012ea103259SMichael Clark /* pseudo-instruction metadata */
1013ea103259SMichael Clark 
1014ea103259SMichael Clark static const rv_comp_data rvcp_jal[] = {
1015ea103259SMichael Clark     { rv_op_j, rvcc_j },
1016ea103259SMichael Clark     { rv_op_jal, rvcc_jal },
1017ea103259SMichael Clark     { rv_op_illegal, NULL }
1018ea103259SMichael Clark };
1019ea103259SMichael Clark 
1020ea103259SMichael Clark static const rv_comp_data rvcp_jalr[] = {
1021ea103259SMichael Clark     { rv_op_ret, rvcc_ret },
1022ea103259SMichael Clark     { rv_op_jr, rvcc_jr },
1023ea103259SMichael Clark     { rv_op_jalr, rvcc_jalr },
1024ea103259SMichael Clark     { rv_op_illegal, NULL }
1025ea103259SMichael Clark };
1026ea103259SMichael Clark 
1027ea103259SMichael Clark static const rv_comp_data rvcp_beq[] = {
1028ea103259SMichael Clark     { rv_op_beqz, rvcc_beqz },
1029ea103259SMichael Clark     { rv_op_illegal, NULL }
1030ea103259SMichael Clark };
1031ea103259SMichael Clark 
1032ea103259SMichael Clark static const rv_comp_data rvcp_bne[] = {
1033ea103259SMichael Clark     { rv_op_bnez, rvcc_bnez },
1034ea103259SMichael Clark     { rv_op_illegal, NULL }
1035ea103259SMichael Clark };
1036ea103259SMichael Clark 
1037ea103259SMichael Clark static const rv_comp_data rvcp_blt[] = {
1038ea103259SMichael Clark     { rv_op_bltz, rvcc_bltz },
1039ea103259SMichael Clark     { rv_op_bgtz, rvcc_bgtz },
1040ea103259SMichael Clark     { rv_op_bgt, rvcc_bgt },
1041ea103259SMichael Clark     { rv_op_illegal, NULL }
1042ea103259SMichael Clark };
1043ea103259SMichael Clark 
1044ea103259SMichael Clark static const rv_comp_data rvcp_bge[] = {
1045ea103259SMichael Clark     { rv_op_blez, rvcc_blez },
1046ea103259SMichael Clark     { rv_op_bgez, rvcc_bgez },
1047ea103259SMichael Clark     { rv_op_ble, rvcc_ble },
1048ea103259SMichael Clark     { rv_op_illegal, NULL }
1049ea103259SMichael Clark };
1050ea103259SMichael Clark 
1051ea103259SMichael Clark static const rv_comp_data rvcp_bltu[] = {
1052ea103259SMichael Clark     { rv_op_bgtu, rvcc_bgtu },
1053ea103259SMichael Clark     { rv_op_illegal, NULL }
1054ea103259SMichael Clark };
1055ea103259SMichael Clark 
1056ea103259SMichael Clark static const rv_comp_data rvcp_bgeu[] = {
1057ea103259SMichael Clark     { rv_op_bleu, rvcc_bleu },
1058ea103259SMichael Clark     { rv_op_illegal, NULL }
1059ea103259SMichael Clark };
1060ea103259SMichael Clark 
1061ea103259SMichael Clark static const rv_comp_data rvcp_addi[] = {
1062ea103259SMichael Clark     { rv_op_nop, rvcc_nop },
1063ea103259SMichael Clark     { rv_op_mv, rvcc_mv },
1064ea103259SMichael Clark     { rv_op_illegal, NULL }
1065ea103259SMichael Clark };
1066ea103259SMichael Clark 
1067ea103259SMichael Clark static const rv_comp_data rvcp_sltiu[] = {
1068ea103259SMichael Clark     { rv_op_seqz, rvcc_seqz },
1069ea103259SMichael Clark     { rv_op_illegal, NULL }
1070ea103259SMichael Clark };
1071ea103259SMichael Clark 
1072ea103259SMichael Clark static const rv_comp_data rvcp_xori[] = {
1073ea103259SMichael Clark     { rv_op_not, rvcc_not },
1074ea103259SMichael Clark     { rv_op_illegal, NULL }
1075ea103259SMichael Clark };
1076ea103259SMichael Clark 
1077ea103259SMichael Clark static const rv_comp_data rvcp_sub[] = {
1078ea103259SMichael Clark     { rv_op_neg, rvcc_neg },
1079ea103259SMichael Clark     { rv_op_illegal, NULL }
1080ea103259SMichael Clark };
1081ea103259SMichael Clark 
1082ea103259SMichael Clark static const rv_comp_data rvcp_slt[] = {
1083ea103259SMichael Clark     { rv_op_sltz, rvcc_sltz },
1084ea103259SMichael Clark     { rv_op_sgtz, rvcc_sgtz },
1085ea103259SMichael Clark     { rv_op_illegal, NULL }
1086ea103259SMichael Clark };
1087ea103259SMichael Clark 
1088ea103259SMichael Clark static const rv_comp_data rvcp_sltu[] = {
1089ea103259SMichael Clark     { rv_op_snez, rvcc_snez },
1090ea103259SMichael Clark     { rv_op_illegal, NULL }
1091ea103259SMichael Clark };
1092ea103259SMichael Clark 
1093ea103259SMichael Clark static const rv_comp_data rvcp_addiw[] = {
1094ea103259SMichael Clark     { rv_op_sext_w, rvcc_sext_w },
1095ea103259SMichael Clark     { rv_op_illegal, NULL }
1096ea103259SMichael Clark };
1097ea103259SMichael Clark 
1098ea103259SMichael Clark static const rv_comp_data rvcp_subw[] = {
1099ea103259SMichael Clark     { rv_op_negw, rvcc_negw },
1100ea103259SMichael Clark     { rv_op_illegal, NULL }
1101ea103259SMichael Clark };
1102ea103259SMichael Clark 
1103ea103259SMichael Clark static const rv_comp_data rvcp_csrrw[] = {
1104ea103259SMichael Clark     { rv_op_fscsr, rvcc_fscsr },
1105ea103259SMichael Clark     { rv_op_fsrm, rvcc_fsrm },
1106ea103259SMichael Clark     { rv_op_fsflags, rvcc_fsflags },
1107ea103259SMichael Clark     { rv_op_illegal, NULL }
1108ea103259SMichael Clark };
1109ea103259SMichael Clark 
11105748c886SWeiwei Li 
1111ea103259SMichael Clark static const rv_comp_data rvcp_csrrs[] = {
1112ea103259SMichael Clark     { rv_op_rdcycle, rvcc_rdcycle },
1113ea103259SMichael Clark     { rv_op_rdtime, rvcc_rdtime },
1114ea103259SMichael Clark     { rv_op_rdinstret, rvcc_rdinstret },
1115ea103259SMichael Clark     { rv_op_rdcycleh, rvcc_rdcycleh },
1116ea103259SMichael Clark     { rv_op_rdtimeh, rvcc_rdtimeh },
1117ea103259SMichael Clark     { rv_op_rdinstreth, rvcc_rdinstreth },
1118ea103259SMichael Clark     { rv_op_frcsr, rvcc_frcsr },
1119ea103259SMichael Clark     { rv_op_frrm, rvcc_frrm },
1120ea103259SMichael Clark     { rv_op_frflags, rvcc_frflags },
1121ea103259SMichael Clark     { rv_op_illegal, NULL }
1122ea103259SMichael Clark };
1123ea103259SMichael Clark 
1124ea103259SMichael Clark static const rv_comp_data rvcp_csrrwi[] = {
1125ea103259SMichael Clark     { rv_op_fsrmi, rvcc_fsrmi },
1126ea103259SMichael Clark     { rv_op_fsflagsi, rvcc_fsflagsi },
1127ea103259SMichael Clark     { rv_op_illegal, NULL }
1128ea103259SMichael Clark };
1129ea103259SMichael Clark 
1130ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_s[] = {
1131ea103259SMichael Clark     { rv_op_fmv_s, rvcc_fmv_s },
1132ea103259SMichael Clark     { rv_op_illegal, NULL }
1133ea103259SMichael Clark };
1134ea103259SMichael Clark 
1135ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_s[] = {
1136ea103259SMichael Clark     { rv_op_fneg_s, rvcc_fneg_s },
1137ea103259SMichael Clark     { rv_op_illegal, NULL }
1138ea103259SMichael Clark };
1139ea103259SMichael Clark 
1140ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_s[] = {
1141ea103259SMichael Clark     { rv_op_fabs_s, rvcc_fabs_s },
1142ea103259SMichael Clark     { rv_op_illegal, NULL }
1143ea103259SMichael Clark };
1144ea103259SMichael Clark 
1145ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_d[] = {
1146ea103259SMichael Clark     { rv_op_fmv_d, rvcc_fmv_d },
1147ea103259SMichael Clark     { rv_op_illegal, NULL }
1148ea103259SMichael Clark };
1149ea103259SMichael Clark 
1150ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_d[] = {
1151ea103259SMichael Clark     { rv_op_fneg_d, rvcc_fneg_d },
1152ea103259SMichael Clark     { rv_op_illegal, NULL }
1153ea103259SMichael Clark };
1154ea103259SMichael Clark 
1155ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_d[] = {
1156ea103259SMichael Clark     { rv_op_fabs_d, rvcc_fabs_d },
1157ea103259SMichael Clark     { rv_op_illegal, NULL }
1158ea103259SMichael Clark };
1159ea103259SMichael Clark 
1160ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_q[] = {
1161ea103259SMichael Clark     { rv_op_fmv_q, rvcc_fmv_q },
1162ea103259SMichael Clark     { rv_op_illegal, NULL }
1163ea103259SMichael Clark };
1164ea103259SMichael Clark 
1165ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_q[] = {
1166ea103259SMichael Clark     { rv_op_fneg_q, rvcc_fneg_q },
1167ea103259SMichael Clark     { rv_op_illegal, NULL }
1168ea103259SMichael Clark };
1169ea103259SMichael Clark 
1170ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_q[] = {
1171ea103259SMichael Clark     { rv_op_fabs_q, rvcc_fabs_q },
1172ea103259SMichael Clark     { rv_op_illegal, NULL }
1173ea103259SMichael Clark };
1174ea103259SMichael Clark 
1175ea103259SMichael Clark /* instruction metadata */
1176ea103259SMichael Clark 
1177fd7c64f6SChristoph Müllner const rv_opcode_data rvi_opcode_data[] = {
1178ea103259SMichael Clark     { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 },
117936df75a0SChristoph Müllner     { "lui", rv_codec_u, rv_fmt_rd_uimm, NULL, 0, 0, 0 },
118036df75a0SChristoph Müllner     { "auipc", rv_codec_u, rv_fmt_rd_uoffset, NULL, 0, 0, 0 },
1181ea103259SMichael Clark     { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal, 0, 0, 0 },
1182ea103259SMichael Clark     { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr, 0, 0, 0 },
1183ea103259SMichael Clark     { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq, 0, 0, 0 },
1184ea103259SMichael Clark     { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne, 0, 0, 0 },
1185ea103259SMichael Clark     { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt, 0, 0, 0 },
1186ea103259SMichael Clark     { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge, 0, 0, 0 },
1187ea103259SMichael Clark     { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu, 0, 0, 0 },
1188ea103259SMichael Clark     { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu, 0, 0, 0 },
1189ea103259SMichael Clark     { "lb", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1190ea103259SMichael Clark     { "lh", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1191ea103259SMichael Clark     { "lw", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1192ea103259SMichael Clark     { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1193ea103259SMichael Clark     { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1194ea103259SMichael Clark     { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1195ea103259SMichael Clark     { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1196ea103259SMichael Clark     { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1197ea103259SMichael Clark     { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi, 0, 0, 0 },
1198ea103259SMichael Clark     { "slti", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1199ea103259SMichael Clark     { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu, 0, 0, 0 },
1200ea103259SMichael Clark     { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori, 0, 0, 0 },
1201ea103259SMichael Clark     { "ori", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1202ea103259SMichael Clark     { "andi", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1203ea103259SMichael Clark     { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1204ea103259SMichael Clark     { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1205ea103259SMichael Clark     { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1206ea103259SMichael Clark     { "add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1207ea103259SMichael Clark     { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub, 0, 0, 0 },
1208ea103259SMichael Clark     { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1209ea103259SMichael Clark     { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt, 0, 0, 0 },
1210ea103259SMichael Clark     { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu, 0, 0, 0 },
1211ea103259SMichael Clark     { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1212ea103259SMichael Clark     { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1213ea103259SMichael Clark     { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1214ea103259SMichael Clark     { "or", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1215ea103259SMichael Clark     { "and", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1216ea103259SMichael Clark     { "fence", rv_codec_r_f, rv_fmt_pred_succ, NULL, 0, 0, 0 },
1217ea103259SMichael Clark     { "fence.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1218ea103259SMichael Clark     { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1219ea103259SMichael Clark     { "ld", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1220ea103259SMichael Clark     { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1221ea103259SMichael Clark     { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw, 0, 0, 0 },
1222ea103259SMichael Clark     { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1223ea103259SMichael Clark     { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1224ea103259SMichael Clark     { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1225ea103259SMichael Clark     { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1226ea103259SMichael Clark     { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw, 0, 0, 0 },
1227ea103259SMichael Clark     { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1228ea103259SMichael Clark     { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1229ea103259SMichael Clark     { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1230ea103259SMichael Clark     { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1231ea103259SMichael Clark     { "lq", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1232ea103259SMichael Clark     { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1233ea103259SMichael Clark     { "addid", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1234ea103259SMichael Clark     { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1235ea103259SMichael Clark     { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1236ea103259SMichael Clark     { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1237ea103259SMichael Clark     { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1238ea103259SMichael Clark     { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1239ea103259SMichael Clark     { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1240ea103259SMichael Clark     { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1241ea103259SMichael Clark     { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1242ea103259SMichael Clark     { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1243ea103259SMichael Clark     { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1244ea103259SMichael Clark     { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1245ea103259SMichael Clark     { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1246ea103259SMichael Clark     { "div", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1247ea103259SMichael Clark     { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1248ea103259SMichael Clark     { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1249ea103259SMichael Clark     { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1250ea103259SMichael Clark     { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1251ea103259SMichael Clark     { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1252ea103259SMichael Clark     { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1253ea103259SMichael Clark     { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1254ea103259SMichael Clark     { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1255ea103259SMichael Clark     { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1256ea103259SMichael Clark     { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1257ea103259SMichael Clark     { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1258ea103259SMichael Clark     { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1259ea103259SMichael Clark     { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1260ea103259SMichael Clark     { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1261ea103259SMichael Clark     { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1262ea103259SMichael Clark     { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1263ea103259SMichael Clark     { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1264ea103259SMichael Clark     { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1265ea103259SMichael Clark     { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1266ea103259SMichael Clark     { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1267ea103259SMichael Clark     { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1268ea103259SMichael Clark     { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1269ea103259SMichael Clark     { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1270ea103259SMichael Clark     { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1271ea103259SMichael Clark     { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1272ea103259SMichael Clark     { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1273ea103259SMichael Clark     { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1274ea103259SMichael Clark     { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1275ea103259SMichael Clark     { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1276ea103259SMichael Clark     { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1277ea103259SMichael Clark     { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1278ea103259SMichael Clark     { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1279ea103259SMichael Clark     { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1280ea103259SMichael Clark     { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1281ea103259SMichael Clark     { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1282ea103259SMichael Clark     { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1283ea103259SMichael Clark     { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1284ea103259SMichael Clark     { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1285ea103259SMichael Clark     { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1286ea103259SMichael Clark     { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1287ea103259SMichael Clark     { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1288ea103259SMichael Clark     { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1289ea103259SMichael Clark     { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1290ea103259SMichael Clark     { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1291ea103259SMichael Clark     { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1292ea103259SMichael Clark     { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1293ea103259SMichael Clark     { "ecall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1294ea103259SMichael Clark     { "ebreak", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1295ea103259SMichael Clark     { "uret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1296ea103259SMichael Clark     { "sret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1297ea103259SMichael Clark     { "hret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1298ea103259SMichael Clark     { "mret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1299ea103259SMichael Clark     { "dret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1300ea103259SMichael Clark     { "sfence.vm", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 },
1301ea103259SMichael Clark     { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 },
1302ea103259SMichael Clark     { "wfi", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1303ea103259SMichael Clark     { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw, 0, 0, 0 },
1304ea103259SMichael Clark     { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs, 0, 0, 0 },
1305ea103259SMichael Clark     { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1, NULL, 0, 0, 0 },
1306ea103259SMichael Clark     { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi, 0, 0, 0 },
1307ea103259SMichael Clark     { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 },
1308ea103259SMichael Clark     { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 },
1309ea103259SMichael Clark     { "flw", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1310ea103259SMichael Clark     { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1311ea103259SMichael Clark     { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1312ea103259SMichael Clark     { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1313ea103259SMichael Clark     { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1314ea103259SMichael Clark     { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1315ea103259SMichael Clark     { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1316ea103259SMichael Clark     { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1317ea103259SMichael Clark     { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1318ea103259SMichael Clark     { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1319ea103259SMichael Clark     { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s, 0, 0, 0 },
1320ea103259SMichael Clark     { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s, 0, 0, 0 },
1321ea103259SMichael Clark     { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s, 0, 0, 0 },
1322ea103259SMichael Clark     { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1323ea103259SMichael Clark     { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1324ea103259SMichael Clark     { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1325ea103259SMichael Clark     { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1326ea103259SMichael Clark     { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1327ea103259SMichael Clark     { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1328ea103259SMichael Clark     { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1329ea103259SMichael Clark     { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1330ea103259SMichael Clark     { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1331ea103259SMichael Clark     { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1332ea103259SMichael Clark     { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1333ea103259SMichael Clark     { "fclass.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1334ea103259SMichael Clark     { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1335ea103259SMichael Clark     { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1336ea103259SMichael Clark     { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1337ea103259SMichael Clark     { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1338ea103259SMichael Clark     { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1339ea103259SMichael Clark     { "fld", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1340ea103259SMichael Clark     { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1341ea103259SMichael Clark     { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1342ea103259SMichael Clark     { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1343ea103259SMichael Clark     { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1344ea103259SMichael Clark     { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1345ea103259SMichael Clark     { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1346ea103259SMichael Clark     { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1347ea103259SMichael Clark     { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1348ea103259SMichael Clark     { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1349ea103259SMichael Clark     { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d, 0, 0, 0 },
1350ea103259SMichael Clark     { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d, 0, 0, 0 },
1351ea103259SMichael Clark     { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d, 0, 0, 0 },
1352ea103259SMichael Clark     { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1353ea103259SMichael Clark     { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1354ea103259SMichael Clark     { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1355ea103259SMichael Clark     { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1356ea103259SMichael Clark     { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1357ea103259SMichael Clark     { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1358ea103259SMichael Clark     { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1359ea103259SMichael Clark     { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1360ea103259SMichael Clark     { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1361ea103259SMichael Clark     { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1362ea103259SMichael Clark     { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1363ea103259SMichael Clark     { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1364ea103259SMichael Clark     { "fclass.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1365ea103259SMichael Clark     { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1366ea103259SMichael Clark     { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1367ea103259SMichael Clark     { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1368ea103259SMichael Clark     { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1369ea103259SMichael Clark     { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1370ea103259SMichael Clark     { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1371ea103259SMichael Clark     { "flq", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1372ea103259SMichael Clark     { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1373ea103259SMichael Clark     { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1374ea103259SMichael Clark     { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1375ea103259SMichael Clark     { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1376ea103259SMichael Clark     { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1377ea103259SMichael Clark     { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1378ea103259SMichael Clark     { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1379ea103259SMichael Clark     { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1380ea103259SMichael Clark     { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1381ea103259SMichael Clark     { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q, 0, 0, 0 },
1382ea103259SMichael Clark     { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q, 0, 0, 0 },
1383ea103259SMichael Clark     { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q, 0, 0, 0 },
1384ea103259SMichael Clark     { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1385ea103259SMichael Clark     { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1386ea103259SMichael Clark     { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1387ea103259SMichael Clark     { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1388ea103259SMichael Clark     { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1389ea103259SMichael Clark     { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1390ea103259SMichael Clark     { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1391ea103259SMichael Clark     { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1392ea103259SMichael Clark     { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1393ea103259SMichael Clark     { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1394ea103259SMichael Clark     { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1395ea103259SMichael Clark     { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1396ea103259SMichael Clark     { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1397ea103259SMichael Clark     { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1398ea103259SMichael Clark     { "fclass.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1399ea103259SMichael Clark     { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1400ea103259SMichael Clark     { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1401ea103259SMichael Clark     { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1402ea103259SMichael Clark     { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1403ea103259SMichael Clark     { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1404ea103259SMichael Clark     { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1405f88222daSMichael Clark     { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi,
1406f88222daSMichael Clark       rv_op_addi, rv_op_addi, rvcd_imm_nz },
140798624d13SWeiwei Li     { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld,
140898624d13SWeiwei Li       rv_op_fld, 0 },
140998624d13SWeiwei Li     { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_lw,
141098624d13SWeiwei Li       rv_op_lw },
1411ea103259SMichael Clark     { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 0 },
141298624d13SWeiwei Li     { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd,
141398624d13SWeiwei Li       rv_op_fsd, 0 },
141498624d13SWeiwei Li     { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op_sw,
141598624d13SWeiwei Li       rv_op_sw },
1416ea103259SMichael Clark     { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 0 },
141798624d13SWeiwei Li     { "c.nop", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_addi, rv_op_addi,
141898624d13SWeiwei Li       rv_op_addi },
1419f88222daSMichael Clark     { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi,
1420f88222daSMichael Clark       rv_op_addi, rvcd_imm_nz },
1421ea103259SMichael Clark     { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 },
142298624d13SWeiwei Li     { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi,
142398624d13SWeiwei Li       rv_op_addi },
1424f88222daSMichael Clark     { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi,
1425f88222daSMichael Clark       rv_op_addi, rv_op_addi, rvcd_imm_nz },
142636df75a0SChristoph Müllner     { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui, rv_op_lui,
1427f88222daSMichael Clark       rv_op_lui, rvcd_imm_nz },
1428f88222daSMichael Clark     { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli,
1429f88222daSMichael Clark       rv_op_srli, rv_op_srli, rvcd_imm_nz },
1430f88222daSMichael Clark     { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai,
1431f88222daSMichael Clark       rv_op_srai, rv_op_srai, rvcd_imm_nz },
1432f88222daSMichael Clark     { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi,
14332e3df911SWladimir J. van der Laan       rv_op_andi, rv_op_andi },
143498624d13SWeiwei Li     { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub,
143598624d13SWeiwei Li       rv_op_sub },
143698624d13SWeiwei Li     { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor, rv_op_xor,
143798624d13SWeiwei Li       rv_op_xor },
143898624d13SWeiwei Li     { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or, rv_op_or,
143998624d13SWeiwei Li       rv_op_or },
144098624d13SWeiwei Li     { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and, rv_op_and,
144198624d13SWeiwei Li       rv_op_and },
144298624d13SWeiwei Li     { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw, rv_op_subw,
144398624d13SWeiwei Li       rv_op_subw },
144498624d13SWeiwei Li     { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw, rv_op_addw,
144598624d13SWeiwei Li       rv_op_addw },
144698624d13SWeiwei Li     { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal, rv_op_jal,
144798624d13SWeiwei Li       rv_op_jal },
144898624d13SWeiwei Li     { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq, rv_op_beq,
144998624d13SWeiwei Li       rv_op_beq },
145098624d13SWeiwei Li     { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op_bne,
145198624d13SWeiwei Li       rv_op_bne },
1452f88222daSMichael Clark     { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli,
1453f88222daSMichael Clark       rv_op_slli, rv_op_slli, rvcd_imm_nz },
145498624d13SWeiwei Li     { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld,
145598624d13SWeiwei Li       rv_op_fld, rv_op_fld },
145698624d13SWeiwei Li     { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw,
145798624d13SWeiwei Li       rv_op_lw, rv_op_lw },
145898624d13SWeiwei Li     { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0,
145998624d13SWeiwei Li       0 },
146098624d13SWeiwei Li     { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr,
146198624d13SWeiwei Li       rv_op_jalr, rv_op_jalr },
146298624d13SWeiwei Li     { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi, rv_op_addi,
146398624d13SWeiwei Li       rv_op_addi },
146498624d13SWeiwei Li     { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak,
146598624d13SWeiwei Li       rv_op_ebreak, rv_op_ebreak },
146698624d13SWeiwei Li     { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr,
146798624d13SWeiwei Li       rv_op_jalr, rv_op_jalr },
146898624d13SWeiwei Li     { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add, rv_op_add,
146998624d13SWeiwei Li       rv_op_add },
147098624d13SWeiwei Li     { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd,
147198624d13SWeiwei Li       rv_op_fsd, rv_op_fsd },
147298624d13SWeiwei Li     { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw,
147398624d13SWeiwei Li       rv_op_sw, rv_op_sw },
147498624d13SWeiwei Li     { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0,
147598624d13SWeiwei Li       0 },
147698624d13SWeiwei Li     { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld,
147798624d13SWeiwei Li       rv_op_ld },
147898624d13SWeiwei Li     { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd,
147998624d13SWeiwei Li       rv_op_sd },
148098624d13SWeiwei Li     { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, 0, rv_op_addiw,
148198624d13SWeiwei Li       rv_op_addiw },
148298624d13SWeiwei Li     { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld,
148398624d13SWeiwei Li       rv_op_ld },
148498624d13SWeiwei Li     { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd,
148598624d13SWeiwei Li       rv_op_sd },
1486ea103259SMichael Clark     { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq },
1487ea103259SMichael Clark     { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq },
1488ea103259SMichael Clark     { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq },
148998624d13SWeiwei Li     { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0,
149098624d13SWeiwei Li       rv_op_sq },
1491ea103259SMichael Clark     { "nop", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 },
1492ea103259SMichael Clark     { "mv", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1493ea103259SMichael Clark     { "not", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1494ea103259SMichael Clark     { "neg", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1495ea103259SMichael Clark     { "negw", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1496ea103259SMichael Clark     { "sext.w", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1497ea103259SMichael Clark     { "seqz", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1498ea103259SMichael Clark     { "snez", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1499ea103259SMichael Clark     { "sltz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1500ea103259SMichael Clark     { "sgtz", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
15010d581506SMikhail Tyutin     { "fmv.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15020d581506SMikhail Tyutin     { "fabs.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15030d581506SMikhail Tyutin     { "fneg.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15040d581506SMikhail Tyutin     { "fmv.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15050d581506SMikhail Tyutin     { "fabs.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15060d581506SMikhail Tyutin     { "fneg.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15070d581506SMikhail Tyutin     { "fmv.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15080d581506SMikhail Tyutin     { "fabs.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15090d581506SMikhail Tyutin     { "fneg.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
1510ea103259SMichael Clark     { "beqz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1511ea103259SMichael Clark     { "bnez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1512ea103259SMichael Clark     { "blez", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 },
1513ea103259SMichael Clark     { "bgez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1514ea103259SMichael Clark     { "bltz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1515ea103259SMichael Clark     { "bgtz", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 },
1516ea103259SMichael Clark     { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1517ea103259SMichael Clark     { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1518ea103259SMichael Clark     { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1519ea103259SMichael Clark     { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1520ea103259SMichael Clark     { "j", rv_codec_uj, rv_fmt_offset, NULL, 0, 0, 0 },
1521ea103259SMichael Clark     { "ret", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 },
1522ea103259SMichael Clark     { "jr", rv_codec_i, rv_fmt_rs1, NULL, 0, 0, 0 },
1523ea103259SMichael Clark     { "rdcycle", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1524ea103259SMichael Clark     { "rdtime", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1525ea103259SMichael Clark     { "rdinstret", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1526ea103259SMichael Clark     { "rdcycleh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1527ea103259SMichael Clark     { "rdtimeh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1528ea103259SMichael Clark     { "rdinstreth", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1529ea103259SMichael Clark     { "frcsr", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1530ea103259SMichael Clark     { "frrm", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1531ea103259SMichael Clark     { "frflags", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1532ea103259SMichael Clark     { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1533ea103259SMichael Clark     { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1534ea103259SMichael Clark     { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1535ea103259SMichael Clark     { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 },
1536ea103259SMichael Clark     { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 },
153702c1b569SPhilipp Tomsich     { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
153802c1b569SPhilipp Tomsich     { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
153902c1b569SPhilipp Tomsich     { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
154002c1b569SPhilipp Tomsich     { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
154102c1b569SPhilipp Tomsich     { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
154202c1b569SPhilipp Tomsich     { "clz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
154302c1b569SPhilipp Tomsich     { "ctz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
154402c1b569SPhilipp Tomsich     { "cpop", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
154502c1b569SPhilipp Tomsich     { "sext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
154602c1b569SPhilipp Tomsich     { "sext.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
15473de1fb71SPhilipp Tomsich     { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15483de1fb71SPhilipp Tomsich     { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15493de1fb71SPhilipp Tomsich     { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155002c1b569SPhilipp Tomsich     { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155102c1b569SPhilipp Tomsich     { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155202c1b569SPhilipp Tomsich     { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155302c1b569SPhilipp Tomsich     { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155402c1b569SPhilipp Tomsich     { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155502c1b569SPhilipp Tomsich     { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155602c1b569SPhilipp Tomsich     { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155702c1b569SPhilipp Tomsich     { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155802c1b569SPhilipp Tomsich     { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
155902c1b569SPhilipp Tomsich     { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156002c1b569SPhilipp Tomsich     { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156102c1b569SPhilipp Tomsich     { "min", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156202c1b569SPhilipp Tomsich     { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156302c1b569SPhilipp Tomsich     { "max", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156402c1b569SPhilipp Tomsich     { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
156502c1b569SPhilipp Tomsich     { "clzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
156627062902SIvan Klokov     { "ctzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
156702c1b569SPhilipp Tomsich     { "cpopw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
156813e269f6SIvan Klokov     { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
156902c1b569SPhilipp Tomsich     { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157002c1b569SPhilipp Tomsich     { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157102c1b569SPhilipp Tomsich     { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157202c1b569SPhilipp Tomsich     { "rev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
157302c1b569SPhilipp Tomsich     { "zext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
157402c1b569SPhilipp Tomsich     { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
157502c1b569SPhilipp Tomsich     { "orc.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
157602c1b569SPhilipp Tomsich     { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157702c1b569SPhilipp Tomsich     { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157802c1b569SPhilipp Tomsich     { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
157902c1b569SPhilipp Tomsich     { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15805748c886SWeiwei Li     { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
15815748c886SWeiwei Li     { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
15825748c886SWeiwei Li     { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
15835748c886SWeiwei Li     { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
15845748c886SWeiwei Li     { "aes64ks1i", rv_codec_k_rnum,  rv_fmt_rd_rs1_rnum, NULL, 0, 0, 0 },
15855748c886SWeiwei Li     { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15865748c886SWeiwei Li     { "aes64im", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
15875748c886SWeiwei Li     { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15885748c886SWeiwei Li     { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15895748c886SWeiwei Li     { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15905748c886SWeiwei Li     { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15915748c886SWeiwei Li     { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
15925748c886SWeiwei Li     { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
15935748c886SWeiwei Li     { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
15945748c886SWeiwei Li     { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
15955748c886SWeiwei Li     { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15965748c886SWeiwei Li     { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15975748c886SWeiwei Li     { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15985748c886SWeiwei Li     { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
15995748c886SWeiwei Li     { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16005748c886SWeiwei Li     { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16015748c886SWeiwei Li     { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16025748c886SWeiwei Li     { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16035748c886SWeiwei Li     { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16045748c886SWeiwei Li     { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16055748c886SWeiwei Li     { "sm3p0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16065748c886SWeiwei Li     { "sm3p1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16075748c886SWeiwei Li     { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16085748c886SWeiwei Li     { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16095748c886SWeiwei Li     { "brev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16105748c886SWeiwei Li     { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16115748c886SWeiwei Li     { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16125748c886SWeiwei Li     { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16135748c886SWeiwei Li     { "unzip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16145748c886SWeiwei Li     { "zip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16155748c886SWeiwei Li     { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
161607f4964dSYang Liu     { "xperm8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16178deb4756SWeiwei Li     { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16188deb4756SWeiwei Li     { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16198deb4756SWeiwei Li     { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16208deb4756SWeiwei Li     { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16218deb4756SWeiwei Li     { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16228deb4756SWeiwei Li     { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16238deb4756SWeiwei Li     { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16248deb4756SWeiwei Li     { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16258deb4756SWeiwei Li     { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16268deb4756SWeiwei Li     { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16278deb4756SWeiwei Li     { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16288deb4756SWeiwei Li     { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16298deb4756SWeiwei Li     { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16308deb4756SWeiwei Li     { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16318deb4756SWeiwei Li     { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16328deb4756SWeiwei Li     { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16338deb4756SWeiwei Li     { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16348deb4756SWeiwei Li     { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
16358deb4756SWeiwei Li     { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16368deb4756SWeiwei Li     { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16378deb4756SWeiwei Li     { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16388deb4756SWeiwei Li     { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16398deb4756SWeiwei Li     { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16408deb4756SWeiwei Li     { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16418deb4756SWeiwei Li     { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16428deb4756SWeiwei Li     { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16438deb4756SWeiwei Li     { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16448deb4756SWeiwei Li     { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16458deb4756SWeiwei Li     { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16468deb4756SWeiwei Li     { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16478deb4756SWeiwei Li     { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16488deb4756SWeiwei Li     { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16498deb4756SWeiwei Li     { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16508deb4756SWeiwei Li     { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
16518deb4756SWeiwei Li     { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16528deb4756SWeiwei Li     { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16538deb4756SWeiwei Li     { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16548deb4756SWeiwei Li     { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16558deb4756SWeiwei Li     { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16568deb4756SWeiwei Li     { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16578deb4756SWeiwei Li     { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16588deb4756SWeiwei Li     { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16598deb4756SWeiwei Li     { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16608deb4756SWeiwei Li     { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16618deb4756SWeiwei Li     { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16628deb4756SWeiwei Li     { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16638deb4756SWeiwei Li     { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16648deb4756SWeiwei Li     { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16658deb4756SWeiwei Li     { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16668deb4756SWeiwei Li     { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16678deb4756SWeiwei Li     { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16688deb4756SWeiwei Li     { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16698deb4756SWeiwei Li     { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16708deb4756SWeiwei Li     { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16718deb4756SWeiwei Li     { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16728deb4756SWeiwei Li     { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16738deb4756SWeiwei Li     { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16748deb4756SWeiwei Li     { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16758deb4756SWeiwei Li     { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16768deb4756SWeiwei Li     { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16778deb4756SWeiwei Li     { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
16788deb4756SWeiwei Li     { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16798deb4756SWeiwei Li     { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16808deb4756SWeiwei Li     { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16818deb4756SWeiwei Li     { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
16828deb4756SWeiwei Li     { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16838deb4756SWeiwei Li     { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16848deb4756SWeiwei Li     { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16858deb4756SWeiwei Li     { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16868deb4756SWeiwei Li     { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16878deb4756SWeiwei Li     { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16888deb4756SWeiwei Li     { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16898deb4756SWeiwei Li     { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16908deb4756SWeiwei Li     { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16918deb4756SWeiwei Li     { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16928deb4756SWeiwei Li     { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16938deb4756SWeiwei Li     { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16948deb4756SWeiwei Li     { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16958deb4756SWeiwei Li     { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16968deb4756SWeiwei Li     { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
16978deb4756SWeiwei Li     { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
16988deb4756SWeiwei Li     { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
16998deb4756SWeiwei Li     { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17008deb4756SWeiwei Li     { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
17018deb4756SWeiwei Li     { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17028deb4756SWeiwei Li     { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17038deb4756SWeiwei Li     { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
17048deb4756SWeiwei Li     { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17058deb4756SWeiwei Li     { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17068deb4756SWeiwei Li     { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17078deb4756SWeiwei Li     { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17088deb4756SWeiwei Li     { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17098deb4756SWeiwei Li     { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17108deb4756SWeiwei Li     { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17118deb4756SWeiwei Li     { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17128deb4756SWeiwei Li     { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17138deb4756SWeiwei Li     { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17148deb4756SWeiwei Li     { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17158deb4756SWeiwei Li     { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17168deb4756SWeiwei Li     { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17178deb4756SWeiwei Li     { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17188deb4756SWeiwei Li     { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17198deb4756SWeiwei Li     { "vsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17208deb4756SWeiwei Li     { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17218deb4756SWeiwei Li     { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17228deb4756SWeiwei Li     { "vsrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17238deb4756SWeiwei Li     { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17248deb4756SWeiwei Li     { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17258deb4756SWeiwei Li     { "vsra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17268deb4756SWeiwei Li     { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17278deb4756SWeiwei Li     { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17288deb4756SWeiwei Li     { "vnsrl.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17298deb4756SWeiwei Li     { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17308deb4756SWeiwei Li     { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17318deb4756SWeiwei Li     { "vnsra.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17328deb4756SWeiwei Li     { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17338deb4756SWeiwei Li     { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17348deb4756SWeiwei Li     { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17358deb4756SWeiwei Li     { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17368deb4756SWeiwei Li     { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17378deb4756SWeiwei Li     { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17388deb4756SWeiwei Li     { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17398deb4756SWeiwei Li     { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17408deb4756SWeiwei Li     { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17418deb4756SWeiwei Li     { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17428deb4756SWeiwei Li     { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17438deb4756SWeiwei Li     { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17448deb4756SWeiwei Li     { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17458deb4756SWeiwei Li     { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17468deb4756SWeiwei Li     { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17478deb4756SWeiwei Li     { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17488deb4756SWeiwei Li     { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17498deb4756SWeiwei Li     { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17508deb4756SWeiwei Li     { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17518deb4756SWeiwei Li     { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17528deb4756SWeiwei Li     { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17538deb4756SWeiwei Li     { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17548deb4756SWeiwei Li     { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17558deb4756SWeiwei Li     { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17568deb4756SWeiwei Li     { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17578deb4756SWeiwei Li     { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17588deb4756SWeiwei Li     { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17598deb4756SWeiwei Li     { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17608deb4756SWeiwei Li     { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17618deb4756SWeiwei Li     { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17628deb4756SWeiwei Li     { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17638deb4756SWeiwei Li     { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17648deb4756SWeiwei Li     { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17658deb4756SWeiwei Li     { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17668deb4756SWeiwei Li     { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17678deb4756SWeiwei Li     { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17688deb4756SWeiwei Li     { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17698deb4756SWeiwei Li     { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17708deb4756SWeiwei Li     { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17718deb4756SWeiwei Li     { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17728deb4756SWeiwei Li     { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17738deb4756SWeiwei Li     { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17748deb4756SWeiwei Li     { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17758deb4756SWeiwei Li     { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17768deb4756SWeiwei Li     { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17778deb4756SWeiwei Li     { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17788deb4756SWeiwei Li     { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17798deb4756SWeiwei Li     { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17808deb4756SWeiwei Li     { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17818deb4756SWeiwei Li     { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17828deb4756SWeiwei Li     { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17838deb4756SWeiwei Li     { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17848deb4756SWeiwei Li     { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17858deb4756SWeiwei Li     { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17868deb4756SWeiwei Li     { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17878deb4756SWeiwei Li     { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17888deb4756SWeiwei Li     { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17898deb4756SWeiwei Li     { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17908deb4756SWeiwei Li     { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17918deb4756SWeiwei Li     { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17928deb4756SWeiwei Li     { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17938deb4756SWeiwei Li     { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17948deb4756SWeiwei Li     { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
17958deb4756SWeiwei Li     { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17968deb4756SWeiwei Li     { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17978deb4756SWeiwei Li     { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1, NULL, 0, 0, 0 },
17988deb4756SWeiwei Li     { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 },
17998deb4756SWeiwei Li     { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm, NULL, 0, 0, 0 },
18008deb4756SWeiwei Li     { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
18018deb4756SWeiwei Li     { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
18028deb4756SWeiwei Li     { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
18038deb4756SWeiwei Li     { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18048deb4756SWeiwei Li     { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18058deb4756SWeiwei Li     { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18068deb4756SWeiwei Li     { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18078deb4756SWeiwei Li     { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18088deb4756SWeiwei Li     { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18098deb4756SWeiwei Li     { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18108deb4756SWeiwei Li     { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18118deb4756SWeiwei Li     { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18128deb4756SWeiwei Li     { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18138deb4756SWeiwei Li     { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18148deb4756SWeiwei Li     { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18158deb4756SWeiwei Li     { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18168deb4756SWeiwei Li     { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18178deb4756SWeiwei Li     { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18188deb4756SWeiwei Li     { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18198deb4756SWeiwei Li     { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18208deb4756SWeiwei Li     { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18218deb4756SWeiwei Li     { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18228deb4756SWeiwei Li     { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18238deb4756SWeiwei Li     { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18248deb4756SWeiwei Li     { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18258deb4756SWeiwei Li     { "vssrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18268deb4756SWeiwei Li     { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18278deb4756SWeiwei Li     { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18288deb4756SWeiwei Li     { "vssra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18298deb4756SWeiwei Li     { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18308deb4756SWeiwei Li     { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18318deb4756SWeiwei Li     { "vnclipu.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18328deb4756SWeiwei Li     { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18338deb4756SWeiwei Li     { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18348deb4756SWeiwei Li     { "vnclip.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18358deb4756SWeiwei Li     { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18368deb4756SWeiwei Li     { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18378deb4756SWeiwei Li     { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18388deb4756SWeiwei Li     { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18398deb4756SWeiwei Li     { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18408deb4756SWeiwei Li     { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18418deb4756SWeiwei Li     { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18428deb4756SWeiwei Li     { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18438deb4756SWeiwei Li     { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18448deb4756SWeiwei Li     { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18458deb4756SWeiwei Li     { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18468deb4756SWeiwei Li     { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18478deb4756SWeiwei Li     { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18488deb4756SWeiwei Li     { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18498deb4756SWeiwei Li     { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18508deb4756SWeiwei Li     { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18518deb4756SWeiwei Li     { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18528deb4756SWeiwei Li     { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18538deb4756SWeiwei Li     { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18548deb4756SWeiwei Li     { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18558deb4756SWeiwei Li     { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18568deb4756SWeiwei Li     { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18578deb4756SWeiwei Li     { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18588deb4756SWeiwei Li     { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18598deb4756SWeiwei Li     { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18608deb4756SWeiwei Li     { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18618deb4756SWeiwei Li     { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18628deb4756SWeiwei Li     { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18638deb4756SWeiwei Li     { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18648deb4756SWeiwei Li     { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18658deb4756SWeiwei Li     { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18668deb4756SWeiwei Li     { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18678deb4756SWeiwei Li     { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18688deb4756SWeiwei Li     { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18698deb4756SWeiwei Li     { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18708deb4756SWeiwei Li     { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18718deb4756SWeiwei Li     { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18728deb4756SWeiwei Li     { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18738deb4756SWeiwei Li     { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18748deb4756SWeiwei Li     { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18758deb4756SWeiwei Li     { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18768deb4756SWeiwei Li     { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18778deb4756SWeiwei Li     { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18788deb4756SWeiwei Li     { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
18798deb4756SWeiwei Li     { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
18808deb4756SWeiwei Li     { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
18818deb4756SWeiwei Li     { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
18828deb4756SWeiwei Li     { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18838deb4756SWeiwei Li     { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18848deb4756SWeiwei Li     { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18858deb4756SWeiwei Li     { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18868deb4756SWeiwei Li     { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18878deb4756SWeiwei Li     { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18888deb4756SWeiwei Li     { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18898deb4756SWeiwei Li     { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18908deb4756SWeiwei Li     { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18918deb4756SWeiwei Li     { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18928deb4756SWeiwei Li     { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18938deb4756SWeiwei Li     { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18948deb4756SWeiwei Li     { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18958deb4756SWeiwei Li     { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18968deb4756SWeiwei Li     { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18978deb4756SWeiwei Li     { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
18988deb4756SWeiwei Li     { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18998deb4756SWeiwei Li     { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19008deb4756SWeiwei Li     { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19018deb4756SWeiwei Li     { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19028deb4756SWeiwei Li     { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19038deb4756SWeiwei Li     { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19048deb4756SWeiwei Li     { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19058deb4756SWeiwei Li     { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl, NULL, 0, 0, 0 },
19068deb4756SWeiwei Li     { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 },
19078deb4756SWeiwei Li     { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19088deb4756SWeiwei Li     { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19098deb4756SWeiwei Li     { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19108deb4756SWeiwei Li     { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19118deb4756SWeiwei Li     { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19128deb4756SWeiwei Li     { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19138deb4756SWeiwei Li     { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19148deb4756SWeiwei Li     { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19158deb4756SWeiwei Li     { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19168deb4756SWeiwei Li     { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19178deb4756SWeiwei Li     { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19188deb4756SWeiwei Li     { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19198deb4756SWeiwei Li     { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19208deb4756SWeiwei Li     { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19218deb4756SWeiwei Li     { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19228deb4756SWeiwei Li     { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19238deb4756SWeiwei Li     { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19248deb4756SWeiwei Li     { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19258deb4756SWeiwei Li     { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19268deb4756SWeiwei Li     { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19278deb4756SWeiwei Li     { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19288deb4756SWeiwei Li     { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19298deb4756SWeiwei Li     { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19308deb4756SWeiwei Li     { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19318deb4756SWeiwei Li     { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19328deb4756SWeiwei Li     { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19338deb4756SWeiwei Li     { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19348deb4756SWeiwei Li     { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19358deb4756SWeiwei Li     { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19368deb4756SWeiwei Li     { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19378deb4756SWeiwei Li     { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19388deb4756SWeiwei Li     { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19398deb4756SWeiwei Li     { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19408deb4756SWeiwei Li     { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19418deb4756SWeiwei Li     { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19428deb4756SWeiwei Li     { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19438deb4756SWeiwei Li     { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19448deb4756SWeiwei Li     { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19458deb4756SWeiwei Li     { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19468deb4756SWeiwei Li     { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19478deb4756SWeiwei Li     { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19488deb4756SWeiwei Li     { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19498deb4756SWeiwei Li     { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19508deb4756SWeiwei Li     { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19518deb4756SWeiwei Li     { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19528deb4756SWeiwei Li     { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 },
19538deb4756SWeiwei Li     { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 },
19548deb4756SWeiwei Li     { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19558deb4756SWeiwei Li     { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19568deb4756SWeiwei Li     { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19578deb4756SWeiwei Li     { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19588deb4756SWeiwei Li     { "vid.v", rv_codec_v_r, rv_fmt_vd_vm, NULL, 0, 0, 0 },
19598deb4756SWeiwei Li     { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2, NULL, 0, 0, 0 },
19608deb4756SWeiwei Li     { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 },
19618deb4756SWeiwei Li     { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 },
19628deb4756SWeiwei Li     { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 },
19638deb4756SWeiwei Li     { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19648deb4756SWeiwei Li     { "vslideup.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19658deb4756SWeiwei Li     { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19668deb4756SWeiwei Li     { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19678deb4756SWeiwei Li     { "vslidedown.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19688deb4756SWeiwei Li     { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19698deb4756SWeiwei Li     { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19708deb4756SWeiwei Li     { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19718deb4756SWeiwei Li     { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19728deb4756SWeiwei Li     { "vrgather.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19738deb4756SWeiwei Li     { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
19748deb4756SWeiwei Li     { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19758deb4756SWeiwei Li     { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19768deb4756SWeiwei Li     { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19778deb4756SWeiwei Li     { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19788deb4756SWeiwei Li     { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19798deb4756SWeiwei Li     { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19808deb4756SWeiwei Li     { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19818deb4756SWeiwei Li     { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19828deb4756SWeiwei Li     { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19838deb4756SWeiwei Li     { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19848deb4756SWeiwei Li     { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli, NULL, 0, 0, 0 },
19858deb4756SWeiwei Li     { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli, NULL, 0, 0, 0 },
19868deb4756SWeiwei Li     { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
19872c71d02eSWeiwei Li     { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19882c71d02eSWeiwei Li     { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19892c71d02eSWeiwei Li     { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19902c71d02eSWeiwei Li     { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19912c71d02eSWeiwei Li     { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19922c71d02eSWeiwei Li     { "c.not", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
19932c71d02eSWeiwei Li     { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2, NULL, 0, 0 },
19942c71d02eSWeiwei Li     { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
19952c71d02eSWeiwei Li     { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
19962c71d02eSWeiwei Li     { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
19972c71d02eSWeiwei Li     { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
19982c71d02eSWeiwei Li     { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
19992c71d02eSWeiwei Li     { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist, NULL, 0, 0 },
20002c71d02eSWeiwei Li     { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 },
20012c71d02eSWeiwei Li     { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0, 0 },
20022c71d02eSWeiwei Li     { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 },
20032c71d02eSWeiwei Li     { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
20042c71d02eSWeiwei Li     { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
20052c71d02eSWeiwei Li     { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 },
20062c71d02eSWeiwei Li     { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 },
2007d397be9aSRichard Henderson     { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2008d397be9aSRichard Henderson     { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
200932b2d75bSWeiwei Li     { "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
201032b2d75bSWeiwei Li     { "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
201132b2d75bSWeiwei Li     { "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
201232b2d75bSWeiwei Li     { "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
201332b2d75bSWeiwei Li     { "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
201432b2d75bSWeiwei Li     { "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
201532b2d75bSWeiwei Li     { "flh", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
201632b2d75bSWeiwei Li     { "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
201732b2d75bSWeiwei Li     { "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
201832b2d75bSWeiwei Li     { "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2019a47842d1SChristoph Müllner     { "fli.s", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2020a47842d1SChristoph Müllner     { "fli.d", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2021a47842d1SChristoph Müllner     { "fli.q", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2022a47842d1SChristoph Müllner     { "fli.h", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2023a47842d1SChristoph Müllner     { "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2024a47842d1SChristoph Müllner     { "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2025a47842d1SChristoph Müllner     { "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2026a47842d1SChristoph Müllner     { "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2027a47842d1SChristoph Müllner     { "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2028a47842d1SChristoph Müllner     { "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2029a47842d1SChristoph Müllner     { "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2030a47842d1SChristoph Müllner     { "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2031a47842d1SChristoph Müllner     { "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2032a47842d1SChristoph Müllner     { "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2033a47842d1SChristoph Müllner     { "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2034a47842d1SChristoph Müllner     { "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2035a47842d1SChristoph Müllner     { "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2036a47842d1SChristoph Müllner     { "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2037a47842d1SChristoph Müllner     { "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2038a47842d1SChristoph Müllner     { "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2039a47842d1SChristoph Müllner     { "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
2040a47842d1SChristoph Müllner     { "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2041a47842d1SChristoph Müllner     { "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 },
2042a47842d1SChristoph Müllner     { "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2043a47842d1SChristoph Müllner     { "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 },
2044a47842d1SChristoph Müllner     { "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2045a47842d1SChristoph Müllner     { "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2046a47842d1SChristoph Müllner     { "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2047a47842d1SChristoph Müllner     { "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2048a47842d1SChristoph Müllner     { "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2049a47842d1SChristoph Müllner     { "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2050a47842d1SChristoph Müllner     { "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2051a47842d1SChristoph Müllner     { "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2052*9d92f56dSMax Chou     { "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2053*9d92f56dSMax Chou     { "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2054*9d92f56dSMax Chou     { "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2055*9d92f56dSMax Chou     { "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2056*9d92f56dSMax Chou     { "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2057*9d92f56dSMax Chou     { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2058*9d92f56dSMax Chou     { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2059*9d92f56dSMax Chou     { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2060*9d92f56dSMax Chou     { "vaeskf1.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
2061*9d92f56dSMax Chou     { "vaeskf2.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
2062*9d92f56dSMax Chou     { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2063*9d92f56dSMax Chou     { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2064*9d92f56dSMax Chou     { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2065*9d92f56dSMax Chou     { "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2066*9d92f56dSMax Chou     { "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2067*9d92f56dSMax Chou     { "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2068*9d92f56dSMax Chou     { "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2069*9d92f56dSMax Chou     { "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2070*9d92f56dSMax Chou     { "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2071*9d92f56dSMax Chou     { "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2072*9d92f56dSMax Chou     { "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2073*9d92f56dSMax Chou     { "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2074*9d92f56dSMax Chou     { "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
2075*9d92f56dSMax Chou     { "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2076*9d92f56dSMax Chou     { "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
2077*9d92f56dSMax Chou     { "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2078*9d92f56dSMax Chou     { "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2079*9d92f56dSMax Chou     { "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2080*9d92f56dSMax Chou     { "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2081*9d92f56dSMax Chou     { "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
2082*9d92f56dSMax Chou     { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
2083*9d92f56dSMax Chou     { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
2084*9d92f56dSMax Chou     { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
2085*9d92f56dSMax Chou     { "vsm3c.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
2086*9d92f56dSMax Chou     { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
2087*9d92f56dSMax Chou     { "vsm4k.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
2088*9d92f56dSMax Chou     { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2089*9d92f56dSMax Chou     { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
2090*9d92f56dSMax Chou     { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
2091*9d92f56dSMax Chou     { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
2092*9d92f56dSMax Chou     { "vwsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
2093ea103259SMichael Clark };
2094ea103259SMichael Clark 
2095ea103259SMichael Clark /* CSR names */
2096ea103259SMichael Clark 
2097ea103259SMichael Clark static const char *csr_name(int csrno)
2098ea103259SMichael Clark {
2099ea103259SMichael Clark     switch (csrno) {
2100ea103259SMichael Clark     case 0x0000: return "ustatus";
2101ea103259SMichael Clark     case 0x0001: return "fflags";
2102ea103259SMichael Clark     case 0x0002: return "frm";
2103ea103259SMichael Clark     case 0x0003: return "fcsr";
2104ea103259SMichael Clark     case 0x0004: return "uie";
2105ea103259SMichael Clark     case 0x0005: return "utvec";
210607f4964dSYang Liu     case 0x0008: return "vstart";
210707f4964dSYang Liu     case 0x0009: return "vxsat";
210807f4964dSYang Liu     case 0x000a: return "vxrm";
210907f4964dSYang Liu     case 0x000f: return "vcsr";
21105748c886SWeiwei Li     case 0x0015: return "seed";
21112c71d02eSWeiwei Li     case 0x0017: return "jvt";
2112ea103259SMichael Clark     case 0x0040: return "uscratch";
2113ea103259SMichael Clark     case 0x0041: return "uepc";
2114ea103259SMichael Clark     case 0x0042: return "ucause";
2115ea103259SMichael Clark     case 0x0043: return "utval";
2116ea103259SMichael Clark     case 0x0044: return "uip";
2117ea103259SMichael Clark     case 0x0100: return "sstatus";
2118ea103259SMichael Clark     case 0x0104: return "sie";
2119ea103259SMichael Clark     case 0x0105: return "stvec";
2120ea103259SMichael Clark     case 0x0106: return "scounteren";
2121ea103259SMichael Clark     case 0x0140: return "sscratch";
2122ea103259SMichael Clark     case 0x0141: return "sepc";
2123ea103259SMichael Clark     case 0x0142: return "scause";
2124ea103259SMichael Clark     case 0x0143: return "stval";
2125ea103259SMichael Clark     case 0x0144: return "sip";
2126ea103259SMichael Clark     case 0x0180: return "satp";
2127ea103259SMichael Clark     case 0x0200: return "hstatus";
2128ea103259SMichael Clark     case 0x0202: return "hedeleg";
2129ea103259SMichael Clark     case 0x0203: return "hideleg";
2130ea103259SMichael Clark     case 0x0204: return "hie";
2131ea103259SMichael Clark     case 0x0205: return "htvec";
2132ea103259SMichael Clark     case 0x0240: return "hscratch";
2133ea103259SMichael Clark     case 0x0241: return "hepc";
2134ea103259SMichael Clark     case 0x0242: return "hcause";
2135ea103259SMichael Clark     case 0x0243: return "hbadaddr";
2136ea103259SMichael Clark     case 0x0244: return "hip";
2137ea103259SMichael Clark     case 0x0300: return "mstatus";
2138ea103259SMichael Clark     case 0x0301: return "misa";
2139ea103259SMichael Clark     case 0x0302: return "medeleg";
2140ea103259SMichael Clark     case 0x0303: return "mideleg";
2141ea103259SMichael Clark     case 0x0304: return "mie";
2142ea103259SMichael Clark     case 0x0305: return "mtvec";
2143ea103259SMichael Clark     case 0x0306: return "mcounteren";
2144ea103259SMichael Clark     case 0x0320: return "mucounteren";
2145ea103259SMichael Clark     case 0x0321: return "mscounteren";
2146ea103259SMichael Clark     case 0x0322: return "mhcounteren";
2147ea103259SMichael Clark     case 0x0323: return "mhpmevent3";
2148ea103259SMichael Clark     case 0x0324: return "mhpmevent4";
2149ea103259SMichael Clark     case 0x0325: return "mhpmevent5";
2150ea103259SMichael Clark     case 0x0326: return "mhpmevent6";
2151ea103259SMichael Clark     case 0x0327: return "mhpmevent7";
2152ea103259SMichael Clark     case 0x0328: return "mhpmevent8";
2153ea103259SMichael Clark     case 0x0329: return "mhpmevent9";
2154ea103259SMichael Clark     case 0x032a: return "mhpmevent10";
2155ea103259SMichael Clark     case 0x032b: return "mhpmevent11";
2156ea103259SMichael Clark     case 0x032c: return "mhpmevent12";
2157ea103259SMichael Clark     case 0x032d: return "mhpmevent13";
2158ea103259SMichael Clark     case 0x032e: return "mhpmevent14";
2159ea103259SMichael Clark     case 0x032f: return "mhpmevent15";
2160ea103259SMichael Clark     case 0x0330: return "mhpmevent16";
2161ea103259SMichael Clark     case 0x0331: return "mhpmevent17";
2162ea103259SMichael Clark     case 0x0332: return "mhpmevent18";
2163ea103259SMichael Clark     case 0x0333: return "mhpmevent19";
2164ea103259SMichael Clark     case 0x0334: return "mhpmevent20";
2165ea103259SMichael Clark     case 0x0335: return "mhpmevent21";
2166ea103259SMichael Clark     case 0x0336: return "mhpmevent22";
2167ea103259SMichael Clark     case 0x0337: return "mhpmevent23";
2168ea103259SMichael Clark     case 0x0338: return "mhpmevent24";
2169ea103259SMichael Clark     case 0x0339: return "mhpmevent25";
2170ea103259SMichael Clark     case 0x033a: return "mhpmevent26";
2171ea103259SMichael Clark     case 0x033b: return "mhpmevent27";
2172ea103259SMichael Clark     case 0x033c: return "mhpmevent28";
2173ea103259SMichael Clark     case 0x033d: return "mhpmevent29";
2174ea103259SMichael Clark     case 0x033e: return "mhpmevent30";
2175ea103259SMichael Clark     case 0x033f: return "mhpmevent31";
2176ea103259SMichael Clark     case 0x0340: return "mscratch";
2177ea103259SMichael Clark     case 0x0341: return "mepc";
2178ea103259SMichael Clark     case 0x0342: return "mcause";
2179ea103259SMichael Clark     case 0x0343: return "mtval";
2180ea103259SMichael Clark     case 0x0344: return "mip";
2181ea103259SMichael Clark     case 0x0380: return "mbase";
2182ea103259SMichael Clark     case 0x0381: return "mbound";
2183ea103259SMichael Clark     case 0x0382: return "mibase";
2184ea103259SMichael Clark     case 0x0383: return "mibound";
2185ea103259SMichael Clark     case 0x0384: return "mdbase";
2186ea103259SMichael Clark     case 0x0385: return "mdbound";
2187ea103259SMichael Clark     case 0x03a0: return "pmpcfg3";
2188ea103259SMichael Clark     case 0x03b0: return "pmpaddr0";
2189ea103259SMichael Clark     case 0x03b1: return "pmpaddr1";
2190ea103259SMichael Clark     case 0x03b2: return "pmpaddr2";
2191ea103259SMichael Clark     case 0x03b3: return "pmpaddr3";
2192ea103259SMichael Clark     case 0x03b4: return "pmpaddr4";
2193ea103259SMichael Clark     case 0x03b5: return "pmpaddr5";
2194ea103259SMichael Clark     case 0x03b6: return "pmpaddr6";
2195ea103259SMichael Clark     case 0x03b7: return "pmpaddr7";
2196ea103259SMichael Clark     case 0x03b8: return "pmpaddr8";
2197ea103259SMichael Clark     case 0x03b9: return "pmpaddr9";
2198ea103259SMichael Clark     case 0x03ba: return "pmpaddr10";
2199ea103259SMichael Clark     case 0x03bb: return "pmpaddr11";
2200ea103259SMichael Clark     case 0x03bc: return "pmpaddr12";
2201cffa9954SAlvin Chang     case 0x03bd: return "pmpaddr13";
2202cffa9954SAlvin Chang     case 0x03be: return "pmpaddr14";
2203ea103259SMichael Clark     case 0x03bf: return "pmpaddr15";
2204ea103259SMichael Clark     case 0x0780: return "mtohost";
2205ea103259SMichael Clark     case 0x0781: return "mfromhost";
2206ea103259SMichael Clark     case 0x0782: return "mreset";
2207ea103259SMichael Clark     case 0x0783: return "mipi";
2208ea103259SMichael Clark     case 0x0784: return "miobase";
2209ea103259SMichael Clark     case 0x07a0: return "tselect";
2210ea103259SMichael Clark     case 0x07a1: return "tdata1";
2211ea103259SMichael Clark     case 0x07a2: return "tdata2";
2212ea103259SMichael Clark     case 0x07a3: return "tdata3";
2213ea103259SMichael Clark     case 0x07b0: return "dcsr";
2214ea103259SMichael Clark     case 0x07b1: return "dpc";
2215ea103259SMichael Clark     case 0x07b2: return "dscratch";
2216ea103259SMichael Clark     case 0x0b00: return "mcycle";
2217ea103259SMichael Clark     case 0x0b01: return "mtime";
2218ea103259SMichael Clark     case 0x0b02: return "minstret";
2219ea103259SMichael Clark     case 0x0b03: return "mhpmcounter3";
2220ea103259SMichael Clark     case 0x0b04: return "mhpmcounter4";
2221ea103259SMichael Clark     case 0x0b05: return "mhpmcounter5";
2222ea103259SMichael Clark     case 0x0b06: return "mhpmcounter6";
2223ea103259SMichael Clark     case 0x0b07: return "mhpmcounter7";
2224ea103259SMichael Clark     case 0x0b08: return "mhpmcounter8";
2225ea103259SMichael Clark     case 0x0b09: return "mhpmcounter9";
2226ea103259SMichael Clark     case 0x0b0a: return "mhpmcounter10";
2227ea103259SMichael Clark     case 0x0b0b: return "mhpmcounter11";
2228ea103259SMichael Clark     case 0x0b0c: return "mhpmcounter12";
2229ea103259SMichael Clark     case 0x0b0d: return "mhpmcounter13";
2230ea103259SMichael Clark     case 0x0b0e: return "mhpmcounter14";
2231ea103259SMichael Clark     case 0x0b0f: return "mhpmcounter15";
2232ea103259SMichael Clark     case 0x0b10: return "mhpmcounter16";
2233ea103259SMichael Clark     case 0x0b11: return "mhpmcounter17";
2234ea103259SMichael Clark     case 0x0b12: return "mhpmcounter18";
2235ea103259SMichael Clark     case 0x0b13: return "mhpmcounter19";
2236ea103259SMichael Clark     case 0x0b14: return "mhpmcounter20";
2237ea103259SMichael Clark     case 0x0b15: return "mhpmcounter21";
2238ea103259SMichael Clark     case 0x0b16: return "mhpmcounter22";
2239ea103259SMichael Clark     case 0x0b17: return "mhpmcounter23";
2240ea103259SMichael Clark     case 0x0b18: return "mhpmcounter24";
2241ea103259SMichael Clark     case 0x0b19: return "mhpmcounter25";
2242ea103259SMichael Clark     case 0x0b1a: return "mhpmcounter26";
2243ea103259SMichael Clark     case 0x0b1b: return "mhpmcounter27";
2244ea103259SMichael Clark     case 0x0b1c: return "mhpmcounter28";
2245ea103259SMichael Clark     case 0x0b1d: return "mhpmcounter29";
2246ea103259SMichael Clark     case 0x0b1e: return "mhpmcounter30";
2247ea103259SMichael Clark     case 0x0b1f: return "mhpmcounter31";
2248ea103259SMichael Clark     case 0x0b80: return "mcycleh";
2249ea103259SMichael Clark     case 0x0b81: return "mtimeh";
2250ea103259SMichael Clark     case 0x0b82: return "minstreth";
2251ea103259SMichael Clark     case 0x0b83: return "mhpmcounter3h";
2252ea103259SMichael Clark     case 0x0b84: return "mhpmcounter4h";
2253ea103259SMichael Clark     case 0x0b85: return "mhpmcounter5h";
2254ea103259SMichael Clark     case 0x0b86: return "mhpmcounter6h";
2255ea103259SMichael Clark     case 0x0b87: return "mhpmcounter7h";
2256ea103259SMichael Clark     case 0x0b88: return "mhpmcounter8h";
2257ea103259SMichael Clark     case 0x0b89: return "mhpmcounter9h";
2258ea103259SMichael Clark     case 0x0b8a: return "mhpmcounter10h";
2259ea103259SMichael Clark     case 0x0b8b: return "mhpmcounter11h";
2260ea103259SMichael Clark     case 0x0b8c: return "mhpmcounter12h";
2261ea103259SMichael Clark     case 0x0b8d: return "mhpmcounter13h";
2262ea103259SMichael Clark     case 0x0b8e: return "mhpmcounter14h";
2263ea103259SMichael Clark     case 0x0b8f: return "mhpmcounter15h";
2264ea103259SMichael Clark     case 0x0b90: return "mhpmcounter16h";
2265ea103259SMichael Clark     case 0x0b91: return "mhpmcounter17h";
2266ea103259SMichael Clark     case 0x0b92: return "mhpmcounter18h";
2267ea103259SMichael Clark     case 0x0b93: return "mhpmcounter19h";
2268ea103259SMichael Clark     case 0x0b94: return "mhpmcounter20h";
2269ea103259SMichael Clark     case 0x0b95: return "mhpmcounter21h";
2270ea103259SMichael Clark     case 0x0b96: return "mhpmcounter22h";
2271ea103259SMichael Clark     case 0x0b97: return "mhpmcounter23h";
2272ea103259SMichael Clark     case 0x0b98: return "mhpmcounter24h";
2273ea103259SMichael Clark     case 0x0b99: return "mhpmcounter25h";
2274ea103259SMichael Clark     case 0x0b9a: return "mhpmcounter26h";
2275ea103259SMichael Clark     case 0x0b9b: return "mhpmcounter27h";
2276ea103259SMichael Clark     case 0x0b9c: return "mhpmcounter28h";
2277ea103259SMichael Clark     case 0x0b9d: return "mhpmcounter29h";
2278ea103259SMichael Clark     case 0x0b9e: return "mhpmcounter30h";
2279ea103259SMichael Clark     case 0x0b9f: return "mhpmcounter31h";
2280ea103259SMichael Clark     case 0x0c00: return "cycle";
2281ea103259SMichael Clark     case 0x0c01: return "time";
2282ea103259SMichael Clark     case 0x0c02: return "instret";
228307f4964dSYang Liu     case 0x0c20: return "vl";
228407f4964dSYang Liu     case 0x0c21: return "vtype";
228507f4964dSYang Liu     case 0x0c22: return "vlenb";
2286ea103259SMichael Clark     case 0x0c80: return "cycleh";
2287ea103259SMichael Clark     case 0x0c81: return "timeh";
2288ea103259SMichael Clark     case 0x0c82: return "instreth";
2289ea103259SMichael Clark     case 0x0d00: return "scycle";
2290ea103259SMichael Clark     case 0x0d01: return "stime";
2291ea103259SMichael Clark     case 0x0d02: return "sinstret";
2292ea103259SMichael Clark     case 0x0d80: return "scycleh";
2293ea103259SMichael Clark     case 0x0d81: return "stimeh";
2294ea103259SMichael Clark     case 0x0d82: return "sinstreth";
2295ea103259SMichael Clark     case 0x0e00: return "hcycle";
2296ea103259SMichael Clark     case 0x0e01: return "htime";
2297ea103259SMichael Clark     case 0x0e02: return "hinstret";
2298ea103259SMichael Clark     case 0x0e80: return "hcycleh";
2299ea103259SMichael Clark     case 0x0e81: return "htimeh";
2300ea103259SMichael Clark     case 0x0e82: return "hinstreth";
2301ea103259SMichael Clark     case 0x0f11: return "mvendorid";
2302ea103259SMichael Clark     case 0x0f12: return "marchid";
2303ea103259SMichael Clark     case 0x0f13: return "mimpid";
2304ea103259SMichael Clark     case 0x0f14: return "mhartid";
2305ea103259SMichael Clark     default: return NULL;
2306ea103259SMichael Clark     }
2307ea103259SMichael Clark }
2308ea103259SMichael Clark 
2309ea103259SMichael Clark /* decode opcode */
2310ea103259SMichael Clark 
2311ea103259SMichael Clark static void decode_inst_opcode(rv_decode *dec, rv_isa isa)
2312ea103259SMichael Clark {
2313ea103259SMichael Clark     rv_inst inst = dec->inst;
2314ea103259SMichael Clark     rv_opcode op = rv_op_illegal;
23153bd87176SWeiwei Li     switch ((inst >> 0) & 0b11) {
2316ea103259SMichael Clark     case 0:
23173bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2318ea103259SMichael Clark         case 0: op = rv_op_c_addi4spn; break;
2319ea103259SMichael Clark         case 1:
2320ea103259SMichael Clark             if (isa == rv128) {
2321ea103259SMichael Clark                 op = rv_op_c_lq;
2322ea103259SMichael Clark             } else {
2323ea103259SMichael Clark                 op = rv_op_c_fld;
2324ea103259SMichael Clark             }
2325ea103259SMichael Clark             break;
2326ea103259SMichael Clark         case 2: op = rv_op_c_lw; break;
2327ea103259SMichael Clark         case 3:
2328ea103259SMichael Clark             if (isa == rv32) {
2329ea103259SMichael Clark                 op = rv_op_c_flw;
2330ea103259SMichael Clark             } else {
2331ea103259SMichael Clark                 op = rv_op_c_ld;
2332ea103259SMichael Clark             }
2333ea103259SMichael Clark             break;
23342c71d02eSWeiwei Li         case 4:
23352c71d02eSWeiwei Li             switch ((inst >> 10) & 0b111) {
23362c71d02eSWeiwei Li             case 0: op = rv_op_c_lbu; break;
23372c71d02eSWeiwei Li             case 1:
23382c71d02eSWeiwei Li                 if (((inst >> 6) & 1) == 0) {
23392c71d02eSWeiwei Li                     op = rv_op_c_lhu;
23402c71d02eSWeiwei Li                 } else {
23412c71d02eSWeiwei Li                     op = rv_op_c_lh;
23422c71d02eSWeiwei Li                 }
23432c71d02eSWeiwei Li                 break;
23442c71d02eSWeiwei Li             case 2: op = rv_op_c_sb; break;
23452c71d02eSWeiwei Li             case 3:
23462c71d02eSWeiwei Li                 if (((inst >> 6) & 1) == 0) {
23472c71d02eSWeiwei Li                     op = rv_op_c_sh;
23482c71d02eSWeiwei Li                 }
23492c71d02eSWeiwei Li                 break;
23502c71d02eSWeiwei Li             }
23512c71d02eSWeiwei Li             break;
2352ea103259SMichael Clark         case 5:
2353ea103259SMichael Clark             if (isa == rv128) {
2354ea103259SMichael Clark                 op = rv_op_c_sq;
2355ea103259SMichael Clark             } else {
2356ea103259SMichael Clark                 op = rv_op_c_fsd;
2357ea103259SMichael Clark             }
2358ea103259SMichael Clark             break;
2359ea103259SMichael Clark         case 6: op = rv_op_c_sw; break;
2360ea103259SMichael Clark         case 7:
2361ea103259SMichael Clark             if (isa == rv32) {
2362ea103259SMichael Clark                 op = rv_op_c_fsw;
2363ea103259SMichael Clark             } else {
2364ea103259SMichael Clark                 op = rv_op_c_sd;
2365ea103259SMichael Clark             }
2366ea103259SMichael Clark             break;
2367ea103259SMichael Clark         }
2368ea103259SMichael Clark         break;
2369ea103259SMichael Clark     case 1:
23703bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2371ea103259SMichael Clark         case 0:
23723bd87176SWeiwei Li             switch ((inst >> 2) & 0b11111111111) {
2373ea103259SMichael Clark             case 0: op = rv_op_c_nop; break;
2374ea103259SMichael Clark             default: op = rv_op_c_addi; break;
2375ea103259SMichael Clark             }
2376ea103259SMichael Clark             break;
2377ea103259SMichael Clark         case 1:
2378ea103259SMichael Clark             if (isa == rv32) {
2379ea103259SMichael Clark                 op = rv_op_c_jal;
2380ea103259SMichael Clark             } else {
2381ea103259SMichael Clark                 op = rv_op_c_addiw;
2382ea103259SMichael Clark             }
2383ea103259SMichael Clark             break;
2384ea103259SMichael Clark         case 2: op = rv_op_c_li; break;
2385ea103259SMichael Clark         case 3:
23863bd87176SWeiwei Li             switch ((inst >> 7) & 0b11111) {
2387ea103259SMichael Clark             case 2: op = rv_op_c_addi16sp; break;
2388ea103259SMichael Clark             default: op = rv_op_c_lui; break;
2389ea103259SMichael Clark             }
2390ea103259SMichael Clark             break;
2391ea103259SMichael Clark         case 4:
23923bd87176SWeiwei Li             switch ((inst >> 10) & 0b11) {
2393ea103259SMichael Clark             case 0:
2394ea103259SMichael Clark                 op = rv_op_c_srli;
2395ea103259SMichael Clark                 break;
2396ea103259SMichael Clark             case 1:
2397ea103259SMichael Clark                 op = rv_op_c_srai;
2398ea103259SMichael Clark                 break;
2399ea103259SMichael Clark             case 2: op = rv_op_c_andi; break;
2400ea103259SMichael Clark             case 3:
2401ea103259SMichael Clark                 switch (((inst >> 10) & 0b100) | ((inst >> 5) & 0b011)) {
2402ea103259SMichael Clark                 case 0: op = rv_op_c_sub; break;
2403ea103259SMichael Clark                 case 1: op = rv_op_c_xor; break;
2404ea103259SMichael Clark                 case 2: op = rv_op_c_or; break;
2405ea103259SMichael Clark                 case 3: op = rv_op_c_and; break;
2406ea103259SMichael Clark                 case 4: op = rv_op_c_subw; break;
2407ea103259SMichael Clark                 case 5: op = rv_op_c_addw; break;
24082c71d02eSWeiwei Li                 case 6: op = rv_op_c_mul; break;
24092c71d02eSWeiwei Li                 case 7:
24102c71d02eSWeiwei Li                     switch ((inst >> 2) & 0b111) {
24112c71d02eSWeiwei Li                     case 0: op = rv_op_c_zext_b; break;
24122c71d02eSWeiwei Li                     case 1: op = rv_op_c_sext_b; break;
24132c71d02eSWeiwei Li                     case 2: op = rv_op_c_zext_h; break;
24142c71d02eSWeiwei Li                     case 3: op = rv_op_c_sext_h; break;
24152c71d02eSWeiwei Li                     case 4: op = rv_op_c_zext_w; break;
24162c71d02eSWeiwei Li                     case 5: op = rv_op_c_not; break;
24172c71d02eSWeiwei Li                     }
24182c71d02eSWeiwei Li                     break;
2419ea103259SMichael Clark                 }
2420ea103259SMichael Clark                 break;
2421ea103259SMichael Clark             }
2422ea103259SMichael Clark             break;
2423ea103259SMichael Clark         case 5: op = rv_op_c_j; break;
2424ea103259SMichael Clark         case 6: op = rv_op_c_beqz; break;
2425ea103259SMichael Clark         case 7: op = rv_op_c_bnez; break;
2426ea103259SMichael Clark         }
2427ea103259SMichael Clark         break;
2428ea103259SMichael Clark     case 2:
24293bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2430ea103259SMichael Clark         case 0:
2431ea103259SMichael Clark             op = rv_op_c_slli;
2432ea103259SMichael Clark             break;
2433ea103259SMichael Clark         case 1:
2434ea103259SMichael Clark             if (isa == rv128) {
2435ea103259SMichael Clark                 op = rv_op_c_lqsp;
2436ea103259SMichael Clark             } else {
2437ea103259SMichael Clark                 op = rv_op_c_fldsp;
2438ea103259SMichael Clark             }
2439ea103259SMichael Clark             break;
2440ea103259SMichael Clark         case 2: op = rv_op_c_lwsp; break;
2441ea103259SMichael Clark         case 3:
2442ea103259SMichael Clark             if (isa == rv32) {
2443ea103259SMichael Clark                 op = rv_op_c_flwsp;
2444ea103259SMichael Clark             } else {
2445ea103259SMichael Clark                 op = rv_op_c_ldsp;
2446ea103259SMichael Clark             }
2447ea103259SMichael Clark             break;
2448ea103259SMichael Clark         case 4:
24493bd87176SWeiwei Li             switch ((inst >> 12) & 0b1) {
2450ea103259SMichael Clark             case 0:
24513bd87176SWeiwei Li                 switch ((inst >> 2) & 0b11111) {
2452ea103259SMichael Clark                 case 0: op = rv_op_c_jr; break;
2453ea103259SMichael Clark                 default: op = rv_op_c_mv; break;
2454ea103259SMichael Clark                 }
2455ea103259SMichael Clark                 break;
2456ea103259SMichael Clark             case 1:
24573bd87176SWeiwei Li                 switch ((inst >> 2) & 0b11111) {
2458ea103259SMichael Clark                 case 0:
24593bd87176SWeiwei Li                     switch ((inst >> 7) & 0b11111) {
2460ea103259SMichael Clark                     case 0: op = rv_op_c_ebreak; break;
2461ea103259SMichael Clark                     default: op = rv_op_c_jalr; break;
2462ea103259SMichael Clark                     }
2463ea103259SMichael Clark                     break;
2464ea103259SMichael Clark                 default: op = rv_op_c_add; break;
2465ea103259SMichael Clark                 }
2466ea103259SMichael Clark                 break;
2467ea103259SMichael Clark             }
2468ea103259SMichael Clark             break;
2469ea103259SMichael Clark         case 5:
2470ea103259SMichael Clark             if (isa == rv128) {
2471ea103259SMichael Clark                 op = rv_op_c_sqsp;
2472ea103259SMichael Clark             } else {
24731dc34be1SMichael Clark                 op = rv_op_c_fsdsp;
24742a2b221bSWeiwei Li                 if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) {
24752c71d02eSWeiwei Li                     switch ((inst >> 8) & 0b01111) {
24762c71d02eSWeiwei Li                     case 8:
24772c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
24782c71d02eSWeiwei Li                             op = rv_op_cm_push;
24792c71d02eSWeiwei Li                         }
24802c71d02eSWeiwei Li                         break;
24812c71d02eSWeiwei Li                     case 10:
24822c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
24832c71d02eSWeiwei Li                             op = rv_op_cm_pop;
24842c71d02eSWeiwei Li                         }
24852c71d02eSWeiwei Li                         break;
24862c71d02eSWeiwei Li                     case 12:
24872c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
24882c71d02eSWeiwei Li                             op = rv_op_cm_popretz;
24892c71d02eSWeiwei Li                         }
24902c71d02eSWeiwei Li                         break;
24912c71d02eSWeiwei Li                     case 14:
24922c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
24932c71d02eSWeiwei Li                             op = rv_op_cm_popret;
24942c71d02eSWeiwei Li                         }
24952c71d02eSWeiwei Li                         break;
24962c71d02eSWeiwei Li                     }
24972c71d02eSWeiwei Li                 } else {
24982c71d02eSWeiwei Li                     switch ((inst >> 10) & 0b011) {
24992c71d02eSWeiwei Li                     case 0:
25002a2b221bSWeiwei Li                         if (!dec->cfg->ext_zcmt) {
25012a2b221bSWeiwei Li                             break;
25022a2b221bSWeiwei Li                         }
25032c71d02eSWeiwei Li                         if (((inst >> 2) & 0xFF) >= 32) {
25042c71d02eSWeiwei Li                             op = rv_op_cm_jalt;
25052c71d02eSWeiwei Li                         } else {
25062c71d02eSWeiwei Li                             op = rv_op_cm_jt;
25072c71d02eSWeiwei Li                         }
25082c71d02eSWeiwei Li                         break;
25092c71d02eSWeiwei Li                     case 3:
25102a2b221bSWeiwei Li                         if (!dec->cfg->ext_zcmp) {
25112a2b221bSWeiwei Li                             break;
25122a2b221bSWeiwei Li                         }
25132c71d02eSWeiwei Li                         switch ((inst >> 5) & 0b011) {
25142c71d02eSWeiwei Li                         case 1: op = rv_op_cm_mvsa01; break;
25152c71d02eSWeiwei Li                         case 3: op = rv_op_cm_mva01s; break;
25162c71d02eSWeiwei Li                         }
25172c71d02eSWeiwei Li                         break;
25182c71d02eSWeiwei Li                     }
25192c71d02eSWeiwei Li                 }
2520ea103259SMichael Clark             }
25211dc34be1SMichael Clark             break;
2522ea103259SMichael Clark         case 6: op = rv_op_c_swsp; break;
2523ea103259SMichael Clark         case 7:
2524ea103259SMichael Clark             if (isa == rv32) {
2525ea103259SMichael Clark                 op = rv_op_c_fswsp;
2526ea103259SMichael Clark             } else {
2527ea103259SMichael Clark                 op = rv_op_c_sdsp;
2528ea103259SMichael Clark             }
2529ea103259SMichael Clark             break;
2530ea103259SMichael Clark         }
2531ea103259SMichael Clark         break;
2532ea103259SMichael Clark     case 3:
25333bd87176SWeiwei Li         switch ((inst >> 2) & 0b11111) {
2534ea103259SMichael Clark         case 0:
25353bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2536ea103259SMichael Clark             case 0: op = rv_op_lb; break;
2537ea103259SMichael Clark             case 1: op = rv_op_lh; break;
2538ea103259SMichael Clark             case 2: op = rv_op_lw; break;
2539ea103259SMichael Clark             case 3: op = rv_op_ld; break;
2540ea103259SMichael Clark             case 4: op = rv_op_lbu; break;
2541ea103259SMichael Clark             case 5: op = rv_op_lhu; break;
2542ea103259SMichael Clark             case 6: op = rv_op_lwu; break;
2543ea103259SMichael Clark             case 7: op = rv_op_ldu; break;
2544ea103259SMichael Clark             }
2545ea103259SMichael Clark             break;
2546ea103259SMichael Clark         case 1:
25473bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
254807f4964dSYang Liu             case 0:
25493bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
255007f4964dSYang Liu                 case 40: op = rv_op_vl1re8_v; break;
255107f4964dSYang Liu                 case 552: op = rv_op_vl2re8_v; break;
255207f4964dSYang Liu                 case 1576: op = rv_op_vl4re8_v; break;
255307f4964dSYang Liu                 case 3624: op = rv_op_vl8re8_v; break;
255407f4964dSYang Liu                 }
25553bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
255607f4964dSYang Liu                 case 0:
25573bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
255807f4964dSYang Liu                     case 0: op = rv_op_vle8_v; break;
255907f4964dSYang Liu                     case 11: op = rv_op_vlm_v; break;
256007f4964dSYang Liu                     case 16: op = rv_op_vle8ff_v; break;
256107f4964dSYang Liu                     }
256207f4964dSYang Liu                     break;
256307f4964dSYang Liu                 case 1: op = rv_op_vluxei8_v; break;
256407f4964dSYang Liu                 case 2: op = rv_op_vlse8_v; break;
256507f4964dSYang Liu                 case 3: op = rv_op_vloxei8_v; break;
256607f4964dSYang Liu                 }
256707f4964dSYang Liu                 break;
256832b2d75bSWeiwei Li             case 1: op = rv_op_flh; break;
2569ea103259SMichael Clark             case 2: op = rv_op_flw; break;
2570ea103259SMichael Clark             case 3: op = rv_op_fld; break;
2571ea103259SMichael Clark             case 4: op = rv_op_flq; break;
257207f4964dSYang Liu             case 5:
25733bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
257407f4964dSYang Liu                 case 40: op = rv_op_vl1re16_v; break;
257507f4964dSYang Liu                 case 552: op = rv_op_vl2re16_v; break;
257607f4964dSYang Liu                 case 1576: op = rv_op_vl4re16_v; break;
257707f4964dSYang Liu                 case 3624: op = rv_op_vl8re16_v; break;
257807f4964dSYang Liu                 }
25793bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
258007f4964dSYang Liu                 case 0:
25813bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
258207f4964dSYang Liu                     case 0: op = rv_op_vle16_v; break;
258307f4964dSYang Liu                     case 16: op = rv_op_vle16ff_v; break;
258407f4964dSYang Liu                     }
258507f4964dSYang Liu                     break;
258607f4964dSYang Liu                 case 1: op = rv_op_vluxei16_v; break;
258707f4964dSYang Liu                 case 2: op = rv_op_vlse16_v; break;
258807f4964dSYang Liu                 case 3: op = rv_op_vloxei16_v; break;
258907f4964dSYang Liu                 }
259007f4964dSYang Liu                 break;
259107f4964dSYang Liu             case 6:
25923bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
259307f4964dSYang Liu                 case 40: op = rv_op_vl1re32_v; break;
259407f4964dSYang Liu                 case 552: op = rv_op_vl2re32_v; break;
259507f4964dSYang Liu                 case 1576: op = rv_op_vl4re32_v; break;
259607f4964dSYang Liu                 case 3624: op = rv_op_vl8re32_v; break;
259707f4964dSYang Liu                 }
25983bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
259907f4964dSYang Liu                 case 0:
26003bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
260107f4964dSYang Liu                     case 0: op = rv_op_vle32_v; break;
260207f4964dSYang Liu                     case 16: op = rv_op_vle32ff_v; break;
260307f4964dSYang Liu                     }
260407f4964dSYang Liu                     break;
260507f4964dSYang Liu                 case 1: op = rv_op_vluxei32_v; break;
260607f4964dSYang Liu                 case 2: op = rv_op_vlse32_v; break;
260707f4964dSYang Liu                 case 3: op = rv_op_vloxei32_v; break;
260807f4964dSYang Liu                 }
260907f4964dSYang Liu                 break;
261007f4964dSYang Liu             case 7:
26113bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
261207f4964dSYang Liu                 case 40: op = rv_op_vl1re64_v; break;
261307f4964dSYang Liu                 case 552: op = rv_op_vl2re64_v; break;
261407f4964dSYang Liu                 case 1576: op = rv_op_vl4re64_v; break;
261507f4964dSYang Liu                 case 3624: op = rv_op_vl8re64_v; break;
261607f4964dSYang Liu                 }
26173bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
261807f4964dSYang Liu                 case 0:
26193bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
262007f4964dSYang Liu                     case 0: op = rv_op_vle64_v; break;
262107f4964dSYang Liu                     case 16: op = rv_op_vle64ff_v; break;
262207f4964dSYang Liu                     }
262307f4964dSYang Liu                     break;
262407f4964dSYang Liu                 case 1: op = rv_op_vluxei64_v; break;
262507f4964dSYang Liu                 case 2: op = rv_op_vlse64_v; break;
262607f4964dSYang Liu                 case 3: op = rv_op_vloxei64_v; break;
262707f4964dSYang Liu                 }
262807f4964dSYang Liu                 break;
2629ea103259SMichael Clark             }
2630ea103259SMichael Clark             break;
2631ea103259SMichael Clark         case 3:
26323bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2633ea103259SMichael Clark             case 0: op = rv_op_fence; break;
2634ea103259SMichael Clark             case 1: op = rv_op_fence_i; break;
2635ea103259SMichael Clark             case 2: op = rv_op_lq; break;
2636ea103259SMichael Clark             }
2637ea103259SMichael Clark             break;
2638ea103259SMichael Clark         case 4:
26393bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2640ea103259SMichael Clark             case 0: op = rv_op_addi; break;
2641ea103259SMichael Clark             case 1:
26423bd87176SWeiwei Li                 switch ((inst >> 27) & 0b11111) {
264302c1b569SPhilipp Tomsich                 case 0b00000: op = rv_op_slli; break;
26445748c886SWeiwei Li                 case 0b00001:
26453bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
26465748c886SWeiwei Li                     case 0b0001111: op = rv_op_zip; break;
26475748c886SWeiwei Li                     }
26485748c886SWeiwei Li                     break;
26495748c886SWeiwei Li                 case 0b00010:
26503bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
26515748c886SWeiwei Li                     case 0b0000000: op = rv_op_sha256sum0; break;
26525748c886SWeiwei Li                     case 0b0000001: op = rv_op_sha256sum1; break;
26535748c886SWeiwei Li                     case 0b0000010: op = rv_op_sha256sig0; break;
26545748c886SWeiwei Li                     case 0b0000011: op = rv_op_sha256sig1; break;
26555748c886SWeiwei Li                     case 0b0000100: op = rv_op_sha512sum0; break;
26565748c886SWeiwei Li                     case 0b0000101: op = rv_op_sha512sum1; break;
26575748c886SWeiwei Li                     case 0b0000110: op = rv_op_sha512sig0; break;
26585748c886SWeiwei Li                     case 0b0000111: op = rv_op_sha512sig1; break;
26595748c886SWeiwei Li                     case 0b0001000: op = rv_op_sm3p0; break;
26605748c886SWeiwei Li                     case 0b0001001: op = rv_op_sm3p1; break;
26615748c886SWeiwei Li                     }
26625748c886SWeiwei Li                     break;
266302c1b569SPhilipp Tomsich                 case 0b00101: op = rv_op_bseti; break;
26645748c886SWeiwei Li                 case 0b00110:
26653bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
26665748c886SWeiwei Li                     case 0b0000000: op = rv_op_aes64im; break;
26675748c886SWeiwei Li                     default:
26685748c886SWeiwei Li                         if (((inst >> 24) & 0b0111) == 0b001) {
26695748c886SWeiwei Li                             op = rv_op_aes64ks1i;
26705748c886SWeiwei Li                         }
26715748c886SWeiwei Li                         break;
26725748c886SWeiwei Li                      }
26735748c886SWeiwei Li                      break;
267402c1b569SPhilipp Tomsich                 case 0b01001: op = rv_op_bclri; break;
267502c1b569SPhilipp Tomsich                 case 0b01101: op = rv_op_binvi; break;
267602c1b569SPhilipp Tomsich                 case 0b01100:
26773bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
267802c1b569SPhilipp Tomsich                     case 0b0000000: op = rv_op_clz; break;
267902c1b569SPhilipp Tomsich                     case 0b0000001: op = rv_op_ctz; break;
268002c1b569SPhilipp Tomsich                     case 0b0000010: op = rv_op_cpop; break;
268102c1b569SPhilipp Tomsich                       /* 0b0000011 */
268202c1b569SPhilipp Tomsich                     case 0b0000100: op = rv_op_sext_b; break;
268302c1b569SPhilipp Tomsich                     case 0b0000101: op = rv_op_sext_h; break;
268402c1b569SPhilipp Tomsich                     }
268502c1b569SPhilipp Tomsich                     break;
2686ea103259SMichael Clark                 }
2687ea103259SMichael Clark                 break;
2688ea103259SMichael Clark             case 2: op = rv_op_slti; break;
2689ea103259SMichael Clark             case 3: op = rv_op_sltiu; break;
2690ea103259SMichael Clark             case 4: op = rv_op_xori; break;
2691ea103259SMichael Clark             case 5:
26923bd87176SWeiwei Li                 switch ((inst >> 27) & 0b11111) {
269302c1b569SPhilipp Tomsich                 case 0b00000: op = rv_op_srli; break;
26945748c886SWeiwei Li                 case 0b00001:
26953bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
26965748c886SWeiwei Li                     case 0b0001111: op = rv_op_unzip; break;
26975748c886SWeiwei Li                     }
26985748c886SWeiwei Li                     break;
269902c1b569SPhilipp Tomsich                 case 0b00101: op = rv_op_orc_b; break;
270002c1b569SPhilipp Tomsich                 case 0b01000: op = rv_op_srai; break;
270102c1b569SPhilipp Tomsich                 case 0b01001: op = rv_op_bexti; break;
270202c1b569SPhilipp Tomsich                 case 0b01100: op = rv_op_rori; break;
270302c1b569SPhilipp Tomsich                 case 0b01101:
270402c1b569SPhilipp Tomsich                     switch ((inst >> 20) & 0b1111111) {
27055748c886SWeiwei Li                     case 0b0011000: op = rv_op_rev8; break;
270602c1b569SPhilipp Tomsich                     case 0b0111000: op = rv_op_rev8; break;
27075748c886SWeiwei Li                     case 0b0000111: op = rv_op_brev8; break;
270802c1b569SPhilipp Tomsich                     }
270902c1b569SPhilipp Tomsich                     break;
2710ea103259SMichael Clark                 }
2711ea103259SMichael Clark                 break;
2712ea103259SMichael Clark             case 6: op = rv_op_ori; break;
2713ea103259SMichael Clark             case 7: op = rv_op_andi; break;
2714ea103259SMichael Clark             }
2715ea103259SMichael Clark             break;
2716ea103259SMichael Clark         case 5: op = rv_op_auipc; break;
2717ea103259SMichael Clark         case 6:
27183bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2719ea103259SMichael Clark             case 0: op = rv_op_addiw; break;
2720ea103259SMichael Clark             case 1:
27213bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
2722ea103259SMichael Clark                 case 0: op = rv_op_slliw; break;
272313e269f6SIvan Klokov                 case 2: op = rv_op_slli_uw; break;
272413e269f6SIvan Klokov                 case 24:
272502c1b569SPhilipp Tomsich                     switch ((inst >> 20) & 0b11111) {
272602c1b569SPhilipp Tomsich                     case 0b00000: op = rv_op_clzw; break;
272702c1b569SPhilipp Tomsich                     case 0b00001: op = rv_op_ctzw; break;
272802c1b569SPhilipp Tomsich                     case 0b00010: op = rv_op_cpopw; break;
272902c1b569SPhilipp Tomsich                     }
273002c1b569SPhilipp Tomsich                     break;
2731ea103259SMichael Clark                 }
2732ea103259SMichael Clark                 break;
2733ea103259SMichael Clark             case 5:
27343bd87176SWeiwei Li                 switch ((inst >> 25) & 0b1111111) {
2735ea103259SMichael Clark                 case 0: op = rv_op_srliw; break;
2736ea103259SMichael Clark                 case 32: op = rv_op_sraiw; break;
273702c1b569SPhilipp Tomsich                 case 48: op = rv_op_roriw; break;
2738ea103259SMichael Clark                 }
2739ea103259SMichael Clark                 break;
2740ea103259SMichael Clark             }
2741ea103259SMichael Clark             break;
2742ea103259SMichael Clark         case 8:
27433bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2744ea103259SMichael Clark             case 0: op = rv_op_sb; break;
2745ea103259SMichael Clark             case 1: op = rv_op_sh; break;
2746ea103259SMichael Clark             case 2: op = rv_op_sw; break;
2747ea103259SMichael Clark             case 3: op = rv_op_sd; break;
2748ea103259SMichael Clark             case 4: op = rv_op_sq; break;
2749ea103259SMichael Clark             }
2750ea103259SMichael Clark             break;
2751ea103259SMichael Clark         case 9:
27523bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
275307f4964dSYang Liu             case 0:
27543bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
275507f4964dSYang Liu                 case 40: op = rv_op_vs1r_v; break;
275607f4964dSYang Liu                 case 552: op = rv_op_vs2r_v; break;
275707f4964dSYang Liu                 case 1576: op = rv_op_vs4r_v; break;
275807f4964dSYang Liu                 case 3624: op = rv_op_vs8r_v; break;
275907f4964dSYang Liu                 }
27603bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
276107f4964dSYang Liu                 case 0:
27623bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
276307f4964dSYang Liu                     case 0: op = rv_op_vse8_v; break;
276407f4964dSYang Liu                     case 11: op = rv_op_vsm_v; break;
276507f4964dSYang Liu                     }
276607f4964dSYang Liu                     break;
276707f4964dSYang Liu                 case 1: op = rv_op_vsuxei8_v; break;
276807f4964dSYang Liu                 case 2: op = rv_op_vsse8_v; break;
276907f4964dSYang Liu                 case 3: op = rv_op_vsoxei8_v; break;
277007f4964dSYang Liu                 }
277107f4964dSYang Liu                 break;
277232b2d75bSWeiwei Li             case 1: op = rv_op_fsh; break;
2773ea103259SMichael Clark             case 2: op = rv_op_fsw; break;
2774ea103259SMichael Clark             case 3: op = rv_op_fsd; break;
2775ea103259SMichael Clark             case 4: op = rv_op_fsq; break;
277607f4964dSYang Liu             case 5:
27773bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
277807f4964dSYang Liu                 case 0:
27793bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
278007f4964dSYang Liu                     case 0: op = rv_op_vse16_v; break;
278107f4964dSYang Liu                     }
278207f4964dSYang Liu                     break;
278307f4964dSYang Liu                 case 1: op = rv_op_vsuxei16_v; break;
278407f4964dSYang Liu                 case 2: op = rv_op_vsse16_v; break;
278507f4964dSYang Liu                 case 3: op = rv_op_vsoxei16_v; break;
278607f4964dSYang Liu                 }
278707f4964dSYang Liu                 break;
278807f4964dSYang Liu             case 6:
27893bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
279007f4964dSYang Liu                 case 0:
27913bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
279207f4964dSYang Liu                     case 0: op = rv_op_vse32_v; break;
279307f4964dSYang Liu                     }
279407f4964dSYang Liu                     break;
279507f4964dSYang Liu                 case 1: op = rv_op_vsuxei32_v; break;
279607f4964dSYang Liu                 case 2: op = rv_op_vsse32_v; break;
279707f4964dSYang Liu                 case 3: op = rv_op_vsoxei32_v; break;
279807f4964dSYang Liu                 }
279907f4964dSYang Liu                 break;
280007f4964dSYang Liu             case 7:
28013bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
280207f4964dSYang Liu                 case 0:
28033bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
280407f4964dSYang Liu                     case 0: op = rv_op_vse64_v; break;
280507f4964dSYang Liu                     }
280607f4964dSYang Liu                     break;
280707f4964dSYang Liu                 case 1: op = rv_op_vsuxei64_v; break;
280807f4964dSYang Liu                 case 2: op = rv_op_vsse64_v; break;
280907f4964dSYang Liu                 case 3: op = rv_op_vsoxei64_v; break;
281007f4964dSYang Liu                 }
281107f4964dSYang Liu                 break;
2812ea103259SMichael Clark             }
2813ea103259SMichael Clark             break;
2814ea103259SMichael Clark         case 11:
281598624d13SWeiwei Li             switch (((inst >> 24) & 0b11111000) |
281698624d13SWeiwei Li                     ((inst >> 12) & 0b00000111)) {
2817ea103259SMichael Clark             case 2: op = rv_op_amoadd_w; break;
2818ea103259SMichael Clark             case 3: op = rv_op_amoadd_d; break;
2819ea103259SMichael Clark             case 4: op = rv_op_amoadd_q; break;
2820ea103259SMichael Clark             case 10: op = rv_op_amoswap_w; break;
2821ea103259SMichael Clark             case 11: op = rv_op_amoswap_d; break;
2822ea103259SMichael Clark             case 12: op = rv_op_amoswap_q; break;
2823ea103259SMichael Clark             case 18:
28243bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
2825ea103259SMichael Clark                 case 0: op = rv_op_lr_w; break;
2826ea103259SMichael Clark                 }
2827ea103259SMichael Clark                 break;
2828ea103259SMichael Clark             case 19:
28293bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
2830ea103259SMichael Clark                 case 0: op = rv_op_lr_d; break;
2831ea103259SMichael Clark                 }
2832ea103259SMichael Clark                 break;
2833ea103259SMichael Clark             case 20:
28343bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
2835ea103259SMichael Clark                 case 0: op = rv_op_lr_q; break;
2836ea103259SMichael Clark                 }
2837ea103259SMichael Clark                 break;
2838ea103259SMichael Clark             case 26: op = rv_op_sc_w; break;
2839ea103259SMichael Clark             case 27: op = rv_op_sc_d; break;
2840ea103259SMichael Clark             case 28: op = rv_op_sc_q; break;
2841ea103259SMichael Clark             case 34: op = rv_op_amoxor_w; break;
2842ea103259SMichael Clark             case 35: op = rv_op_amoxor_d; break;
2843ea103259SMichael Clark             case 36: op = rv_op_amoxor_q; break;
2844ea103259SMichael Clark             case 66: op = rv_op_amoor_w; break;
2845ea103259SMichael Clark             case 67: op = rv_op_amoor_d; break;
2846ea103259SMichael Clark             case 68: op = rv_op_amoor_q; break;
2847ea103259SMichael Clark             case 98: op = rv_op_amoand_w; break;
2848ea103259SMichael Clark             case 99: op = rv_op_amoand_d; break;
2849ea103259SMichael Clark             case 100: op = rv_op_amoand_q; break;
2850ea103259SMichael Clark             case 130: op = rv_op_amomin_w; break;
2851ea103259SMichael Clark             case 131: op = rv_op_amomin_d; break;
2852ea103259SMichael Clark             case 132: op = rv_op_amomin_q; break;
2853ea103259SMichael Clark             case 162: op = rv_op_amomax_w; break;
2854ea103259SMichael Clark             case 163: op = rv_op_amomax_d; break;
2855ea103259SMichael Clark             case 164: op = rv_op_amomax_q; break;
2856ea103259SMichael Clark             case 194: op = rv_op_amominu_w; break;
2857ea103259SMichael Clark             case 195: op = rv_op_amominu_d; break;
2858ea103259SMichael Clark             case 196: op = rv_op_amominu_q; break;
2859ea103259SMichael Clark             case 226: op = rv_op_amomaxu_w; break;
2860ea103259SMichael Clark             case 227: op = rv_op_amomaxu_d; break;
2861ea103259SMichael Clark             case 228: op = rv_op_amomaxu_q; break;
2862ea103259SMichael Clark             }
2863ea103259SMichael Clark             break;
2864ea103259SMichael Clark         case 12:
286598624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
286698624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
2867ea103259SMichael Clark             case 0: op = rv_op_add; break;
2868ea103259SMichael Clark             case 1: op = rv_op_sll; break;
2869ea103259SMichael Clark             case 2: op = rv_op_slt; break;
2870ea103259SMichael Clark             case 3: op = rv_op_sltu; break;
2871ea103259SMichael Clark             case 4: op = rv_op_xor; break;
2872ea103259SMichael Clark             case 5: op = rv_op_srl; break;
2873ea103259SMichael Clark             case 6: op = rv_op_or; break;
2874ea103259SMichael Clark             case 7: op = rv_op_and; break;
2875ea103259SMichael Clark             case 8: op = rv_op_mul; break;
2876ea103259SMichael Clark             case 9: op = rv_op_mulh; break;
2877ea103259SMichael Clark             case 10: op = rv_op_mulhsu; break;
2878ea103259SMichael Clark             case 11: op = rv_op_mulhu; break;
2879ea103259SMichael Clark             case 12: op = rv_op_div; break;
2880ea103259SMichael Clark             case 13: op = rv_op_divu; break;
2881ea103259SMichael Clark             case 14: op = rv_op_rem; break;
2882ea103259SMichael Clark             case 15: op = rv_op_remu; break;
288302c1b569SPhilipp Tomsich             case 36:
288402c1b569SPhilipp Tomsich                 switch ((inst >> 20) & 0b11111) {
288502c1b569SPhilipp Tomsich                 case 0: op = rv_op_zext_h; break;
28865748c886SWeiwei Li                 default: op = rv_op_pack; break;
288702c1b569SPhilipp Tomsich                 }
288802c1b569SPhilipp Tomsich                 break;
28895748c886SWeiwei Li             case 39: op = rv_op_packh; break;
28905748c886SWeiwei Li 
289102c1b569SPhilipp Tomsich             case 41: op = rv_op_clmul; break;
289202c1b569SPhilipp Tomsich             case 42: op = rv_op_clmulr; break;
289302c1b569SPhilipp Tomsich             case 43: op = rv_op_clmulh; break;
289402c1b569SPhilipp Tomsich             case 44: op = rv_op_min; break;
289502c1b569SPhilipp Tomsich             case 45: op = rv_op_minu; break;
289602c1b569SPhilipp Tomsich             case 46: op = rv_op_max; break;
289702c1b569SPhilipp Tomsich             case 47: op = rv_op_maxu; break;
2898d397be9aSRichard Henderson             case 075: op = rv_op_czero_eqz; break;
2899d397be9aSRichard Henderson             case 077: op = rv_op_czero_nez; break;
290002c1b569SPhilipp Tomsich             case 130: op = rv_op_sh1add; break;
290102c1b569SPhilipp Tomsich             case 132: op = rv_op_sh2add; break;
290202c1b569SPhilipp Tomsich             case 134: op = rv_op_sh3add; break;
290302c1b569SPhilipp Tomsich             case 161: op = rv_op_bset; break;
29045748c886SWeiwei Li             case 162: op = rv_op_xperm4; break;
29055748c886SWeiwei Li             case 164: op = rv_op_xperm8; break;
29065748c886SWeiwei Li             case 200: op = rv_op_aes64es; break;
29075748c886SWeiwei Li             case 216: op = rv_op_aes64esm; break;
29085748c886SWeiwei Li             case 232: op = rv_op_aes64ds; break;
29095748c886SWeiwei Li             case 248: op = rv_op_aes64dsm; break;
2910ea103259SMichael Clark             case 256: op = rv_op_sub; break;
291102c1b569SPhilipp Tomsich             case 260: op = rv_op_xnor; break;
2912ea103259SMichael Clark             case 261: op = rv_op_sra; break;
291302c1b569SPhilipp Tomsich             case 262: op = rv_op_orn; break;
291402c1b569SPhilipp Tomsich             case 263: op = rv_op_andn; break;
291502c1b569SPhilipp Tomsich             case 289: op = rv_op_bclr; break;
291602c1b569SPhilipp Tomsich             case 293: op = rv_op_bext; break;
29175748c886SWeiwei Li             case 320: op = rv_op_sha512sum0r; break;
29185748c886SWeiwei Li             case 328: op = rv_op_sha512sum1r; break;
29195748c886SWeiwei Li             case 336: op = rv_op_sha512sig0l; break;
29205748c886SWeiwei Li             case 344: op = rv_op_sha512sig1l; break;
29215748c886SWeiwei Li             case 368: op = rv_op_sha512sig0h; break;
29225748c886SWeiwei Li             case 376: op = rv_op_sha512sig1h; break;
292302c1b569SPhilipp Tomsich             case 385: op = rv_op_rol; break;
29245748c886SWeiwei Li             case 389: op = rv_op_ror; break;
292502c1b569SPhilipp Tomsich             case 417: op = rv_op_binv; break;
29265748c886SWeiwei Li             case 504: op = rv_op_aes64ks2; break;
29275748c886SWeiwei Li             }
29285748c886SWeiwei Li             switch ((inst >> 25) & 0b0011111) {
29295748c886SWeiwei Li             case 17: op = rv_op_aes32esi; break;
29305748c886SWeiwei Li             case 19: op = rv_op_aes32esmi; break;
29315748c886SWeiwei Li             case 21: op = rv_op_aes32dsi; break;
29325748c886SWeiwei Li             case 23: op = rv_op_aes32dsmi; break;
29335748c886SWeiwei Li             case 24: op = rv_op_sm4ed; break;
29345748c886SWeiwei Li             case 26: op = rv_op_sm4ks; break;
2935ea103259SMichael Clark             }
2936ea103259SMichael Clark             break;
2937ea103259SMichael Clark         case 13: op = rv_op_lui; break;
2938ea103259SMichael Clark         case 14:
293998624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
294098624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
2941ea103259SMichael Clark             case 0: op = rv_op_addw; break;
2942ea103259SMichael Clark             case 1: op = rv_op_sllw; break;
2943ea103259SMichael Clark             case 5: op = rv_op_srlw; break;
2944ea103259SMichael Clark             case 8: op = rv_op_mulw; break;
2945ea103259SMichael Clark             case 12: op = rv_op_divw; break;
2946ea103259SMichael Clark             case 13: op = rv_op_divuw; break;
2947ea103259SMichael Clark             case 14: op = rv_op_remw; break;
2948ea103259SMichael Clark             case 15: op = rv_op_remuw; break;
294902c1b569SPhilipp Tomsich             case 32: op = rv_op_add_uw; break;
295002c1b569SPhilipp Tomsich             case 36:
295102c1b569SPhilipp Tomsich                 switch ((inst >> 20) & 0b11111) {
295202c1b569SPhilipp Tomsich                 case 0: op = rv_op_zext_h; break;
29535748c886SWeiwei Li                 default: op = rv_op_packw; break;
295402c1b569SPhilipp Tomsich                 }
295502c1b569SPhilipp Tomsich                 break;
295602c1b569SPhilipp Tomsich             case 130: op = rv_op_sh1add_uw; break;
295702c1b569SPhilipp Tomsich             case 132: op = rv_op_sh2add_uw; break;
295802c1b569SPhilipp Tomsich             case 134: op = rv_op_sh3add_uw; break;
2959ea103259SMichael Clark             case 256: op = rv_op_subw; break;
2960ea103259SMichael Clark             case 261: op = rv_op_sraw; break;
296102c1b569SPhilipp Tomsich             case 385: op = rv_op_rolw; break;
296202c1b569SPhilipp Tomsich             case 389: op = rv_op_rorw; break;
2963ea103259SMichael Clark             }
2964ea103259SMichael Clark             break;
2965ea103259SMichael Clark         case 16:
29663bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
2967ea103259SMichael Clark             case 0: op = rv_op_fmadd_s; break;
2968ea103259SMichael Clark             case 1: op = rv_op_fmadd_d; break;
2969ea103259SMichael Clark             case 3: op = rv_op_fmadd_q; break;
2970ea103259SMichael Clark             }
2971ea103259SMichael Clark             break;
2972ea103259SMichael Clark         case 17:
29733bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
2974ea103259SMichael Clark             case 0: op = rv_op_fmsub_s; break;
2975ea103259SMichael Clark             case 1: op = rv_op_fmsub_d; break;
2976ea103259SMichael Clark             case 3: op = rv_op_fmsub_q; break;
2977ea103259SMichael Clark             }
2978ea103259SMichael Clark             break;
2979ea103259SMichael Clark         case 18:
29803bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
2981ea103259SMichael Clark             case 0: op = rv_op_fnmsub_s; break;
2982ea103259SMichael Clark             case 1: op = rv_op_fnmsub_d; break;
2983ea103259SMichael Clark             case 3: op = rv_op_fnmsub_q; break;
2984ea103259SMichael Clark             }
2985ea103259SMichael Clark             break;
2986ea103259SMichael Clark         case 19:
29873bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
2988ea103259SMichael Clark             case 0: op = rv_op_fnmadd_s; break;
2989ea103259SMichael Clark             case 1: op = rv_op_fnmadd_d; break;
2990ea103259SMichael Clark             case 3: op = rv_op_fnmadd_q; break;
2991ea103259SMichael Clark             }
2992ea103259SMichael Clark             break;
2993ea103259SMichael Clark         case 20:
29943bd87176SWeiwei Li             switch ((inst >> 25) & 0b1111111) {
2995ea103259SMichael Clark             case 0: op = rv_op_fadd_s; break;
2996ea103259SMichael Clark             case 1: op = rv_op_fadd_d; break;
2997ea103259SMichael Clark             case 3: op = rv_op_fadd_q; break;
2998ea103259SMichael Clark             case 4: op = rv_op_fsub_s; break;
2999ea103259SMichael Clark             case 5: op = rv_op_fsub_d; break;
3000ea103259SMichael Clark             case 7: op = rv_op_fsub_q; break;
3001ea103259SMichael Clark             case 8: op = rv_op_fmul_s; break;
3002ea103259SMichael Clark             case 9: op = rv_op_fmul_d; break;
3003ea103259SMichael Clark             case 11: op = rv_op_fmul_q; break;
3004ea103259SMichael Clark             case 12: op = rv_op_fdiv_s; break;
3005ea103259SMichael Clark             case 13: op = rv_op_fdiv_d; break;
3006ea103259SMichael Clark             case 15: op = rv_op_fdiv_q; break;
3007ea103259SMichael Clark             case 16:
30083bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3009ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_s; break;
3010ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_s; break;
3011ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_s; break;
3012ea103259SMichael Clark                 }
3013ea103259SMichael Clark                 break;
3014ea103259SMichael Clark             case 17:
30153bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3016ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_d; break;
3017ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_d; break;
3018ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_d; break;
3019ea103259SMichael Clark                 }
3020ea103259SMichael Clark                 break;
3021ea103259SMichael Clark             case 19:
30223bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3023ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_q; break;
3024ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_q; break;
3025ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_q; break;
3026ea103259SMichael Clark                 }
3027ea103259SMichael Clark                 break;
3028ea103259SMichael Clark             case 20:
30293bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3030ea103259SMichael Clark                 case 0: op = rv_op_fmin_s; break;
3031ea103259SMichael Clark                 case 1: op = rv_op_fmax_s; break;
3032a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_s; break;
3033a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_s; break;
3034ea103259SMichael Clark                 }
3035ea103259SMichael Clark                 break;
3036ea103259SMichael Clark             case 21:
30373bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3038ea103259SMichael Clark                 case 0: op = rv_op_fmin_d; break;
3039ea103259SMichael Clark                 case 1: op = rv_op_fmax_d; break;
3040a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_d; break;
3041a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_d; break;
3042a47842d1SChristoph Müllner                 }
3043a47842d1SChristoph Müllner                 break;
3044a47842d1SChristoph Müllner             case 22:
3045a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3046a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_h; break;
3047a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_h; break;
3048ea103259SMichael Clark                 }
3049ea103259SMichael Clark                 break;
3050ea103259SMichael Clark             case 23:
30513bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3052ea103259SMichael Clark                 case 0: op = rv_op_fmin_q; break;
3053ea103259SMichael Clark                 case 1: op = rv_op_fmax_q; break;
3054a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_q; break;
3055a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_q; break;
3056ea103259SMichael Clark                 }
3057ea103259SMichael Clark                 break;
3058ea103259SMichael Clark             case 32:
30593bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3060ea103259SMichael Clark                 case 1: op = rv_op_fcvt_s_d; break;
3061ea103259SMichael Clark                 case 3: op = rv_op_fcvt_s_q; break;
3062a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_s; break;
3063a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_s; break;
306432b2d75bSWeiwei Li                 case 6: op = rv_op_fcvt_s_bf16; break;
3065ea103259SMichael Clark                 }
3066ea103259SMichael Clark                 break;
3067ea103259SMichael Clark             case 33:
30683bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3069ea103259SMichael Clark                 case 0: op = rv_op_fcvt_d_s; break;
3070ea103259SMichael Clark                 case 3: op = rv_op_fcvt_d_q; break;
3071a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_d; break;
3072a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_d; break;
3073ea103259SMichael Clark                 }
3074ea103259SMichael Clark                 break;
307532b2d75bSWeiwei Li             case 34:
307632b2d75bSWeiwei Li                 switch (((inst >> 20) & 0b11111)) {
3077a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_h; break;
3078a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_h; break;
307932b2d75bSWeiwei Li                 case 8: op = rv_op_fcvt_bf16_s; break;
308032b2d75bSWeiwei Li                 }
308132b2d75bSWeiwei Li                 break;
3082ea103259SMichael Clark             case 35:
30833bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3084ea103259SMichael Clark                 case 0: op = rv_op_fcvt_q_s; break;
3085ea103259SMichael Clark                 case 1: op = rv_op_fcvt_q_d; break;
3086a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_q; break;
3087a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_q; break;
3088ea103259SMichael Clark                 }
3089ea103259SMichael Clark                 break;
3090ea103259SMichael Clark             case 44:
30913bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3092ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_s; break;
3093ea103259SMichael Clark                 }
3094ea103259SMichael Clark                 break;
3095ea103259SMichael Clark             case 45:
30963bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3097ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_d; break;
3098ea103259SMichael Clark                 }
3099ea103259SMichael Clark                 break;
3100ea103259SMichael Clark             case 47:
31013bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3102ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_q; break;
3103ea103259SMichael Clark                 }
3104ea103259SMichael Clark                 break;
3105ea103259SMichael Clark             case 80:
31063bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3107ea103259SMichael Clark                 case 0: op = rv_op_fle_s; break;
3108ea103259SMichael Clark                 case 1: op = rv_op_flt_s; break;
3109ea103259SMichael Clark                 case 2: op = rv_op_feq_s; break;
3110a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_s; break;
3111a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_s; break;
3112ea103259SMichael Clark                 }
3113ea103259SMichael Clark                 break;
3114ea103259SMichael Clark             case 81:
31153bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3116ea103259SMichael Clark                 case 0: op = rv_op_fle_d; break;
3117ea103259SMichael Clark                 case 1: op = rv_op_flt_d; break;
3118ea103259SMichael Clark                 case 2: op = rv_op_feq_d; break;
3119a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_d; break;
3120a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_d; break;
3121a47842d1SChristoph Müllner                 }
3122a47842d1SChristoph Müllner                 break;
3123a47842d1SChristoph Müllner             case 82:
3124a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3125a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_h; break;
3126a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_h; break;
3127ea103259SMichael Clark                 }
3128ea103259SMichael Clark                 break;
3129ea103259SMichael Clark             case 83:
31303bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3131ea103259SMichael Clark                 case 0: op = rv_op_fle_q; break;
3132ea103259SMichael Clark                 case 1: op = rv_op_flt_q; break;
3133ea103259SMichael Clark                 case 2: op = rv_op_feq_q; break;
3134a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_q; break;
3135a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_q; break;
3136a47842d1SChristoph Müllner                 }
3137a47842d1SChristoph Müllner                 break;
3138a47842d1SChristoph Müllner             case 89:
3139a47842d1SChristoph Müllner 		switch (((inst >> 12) & 0b111)) {
3140a47842d1SChristoph Müllner                 case 0: op = rv_op_fmvp_d_x; break;
3141a47842d1SChristoph Müllner                 }
3142a47842d1SChristoph Müllner                 break;
3143a47842d1SChristoph Müllner             case 91:
3144a47842d1SChristoph Müllner 		switch (((inst >> 12) & 0b111)) {
3145a47842d1SChristoph Müllner                 case 0: op = rv_op_fmvp_q_x; break;
3146ea103259SMichael Clark                 }
3147ea103259SMichael Clark                 break;
3148ea103259SMichael Clark             case 96:
31493bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3150ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_s; break;
3151ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_s; break;
3152ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_s; break;
3153ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_s; break;
3154ea103259SMichael Clark                 }
3155ea103259SMichael Clark                 break;
3156ea103259SMichael Clark             case 97:
31573bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3158ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_d; break;
3159ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_d; break;
3160ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_d; break;
3161ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_d; break;
3162a47842d1SChristoph Müllner                 case 8: op = rv_op_fcvtmod_w_d; break;
3163ea103259SMichael Clark                 }
3164ea103259SMichael Clark                 break;
3165ea103259SMichael Clark             case 99:
31663bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3167ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_q; break;
3168ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_q; break;
3169ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_q; break;
3170ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_q; break;
3171ea103259SMichael Clark                 }
3172ea103259SMichael Clark                 break;
3173ea103259SMichael Clark             case 104:
31743bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3175ea103259SMichael Clark                 case 0: op = rv_op_fcvt_s_w; break;
3176ea103259SMichael Clark                 case 1: op = rv_op_fcvt_s_wu; break;
3177ea103259SMichael Clark                 case 2: op = rv_op_fcvt_s_l; break;
3178ea103259SMichael Clark                 case 3: op = rv_op_fcvt_s_lu; break;
3179ea103259SMichael Clark                 }
3180ea103259SMichael Clark                 break;
3181ea103259SMichael Clark             case 105:
31823bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3183ea103259SMichael Clark                 case 0: op = rv_op_fcvt_d_w; break;
3184ea103259SMichael Clark                 case 1: op = rv_op_fcvt_d_wu; break;
3185ea103259SMichael Clark                 case 2: op = rv_op_fcvt_d_l; break;
3186ea103259SMichael Clark                 case 3: op = rv_op_fcvt_d_lu; break;
3187ea103259SMichael Clark                 }
3188ea103259SMichael Clark                 break;
3189ea103259SMichael Clark             case 107:
31903bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3191ea103259SMichael Clark                 case 0: op = rv_op_fcvt_q_w; break;
3192ea103259SMichael Clark                 case 1: op = rv_op_fcvt_q_wu; break;
3193ea103259SMichael Clark                 case 2: op = rv_op_fcvt_q_l; break;
3194ea103259SMichael Clark                 case 3: op = rv_op_fcvt_q_lu; break;
3195ea103259SMichael Clark                 }
3196ea103259SMichael Clark                 break;
3197ea103259SMichael Clark             case 112:
319898624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
319998624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3200ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_s; break;
3201ea103259SMichael Clark                 case 1: op = rv_op_fclass_s; break;
3202ea103259SMichael Clark                 }
3203ea103259SMichael Clark                 break;
3204ea103259SMichael Clark             case 113:
320598624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
320698624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3207ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_d; break;
3208ea103259SMichael Clark                 case 1: op = rv_op_fclass_d; break;
3209a47842d1SChristoph Müllner                 case 8: op = rv_op_fmvh_x_d; break;
3210ea103259SMichael Clark                 }
3211ea103259SMichael Clark                 break;
321232b2d75bSWeiwei Li             case 114:
321332b2d75bSWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
321432b2d75bSWeiwei Li                         ((inst >> 12) & 0b00000111)) {
321532b2d75bSWeiwei Li                 case 0: op = rv_op_fmv_x_h; break;
321632b2d75bSWeiwei Li                 }
321732b2d75bSWeiwei Li                 break;
3218ea103259SMichael Clark             case 115:
321998624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
322098624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3221ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_q; break;
3222ea103259SMichael Clark                 case 1: op = rv_op_fclass_q; break;
3223a47842d1SChristoph Müllner                 case 8: op = rv_op_fmvh_x_q; break;
3224ea103259SMichael Clark                 }
3225ea103259SMichael Clark                 break;
3226ea103259SMichael Clark             case 120:
322798624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
322898624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3229ea103259SMichael Clark                 case 0: op = rv_op_fmv_s_x; break;
3230a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_s; break;
3231ea103259SMichael Clark                 }
3232ea103259SMichael Clark                 break;
3233ea103259SMichael Clark             case 121:
323498624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
323598624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3236ea103259SMichael Clark                 case 0: op = rv_op_fmv_d_x; break;
3237a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_d; break;
3238ea103259SMichael Clark                 }
3239ea103259SMichael Clark                 break;
324032b2d75bSWeiwei Li             case 122:
324132b2d75bSWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
324232b2d75bSWeiwei Li                         ((inst >> 12) & 0b00000111)) {
324332b2d75bSWeiwei Li                 case 0: op = rv_op_fmv_h_x; break;
3244a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_h; break;
324532b2d75bSWeiwei Li                 }
324632b2d75bSWeiwei Li                 break;
3247ea103259SMichael Clark             case 123:
324898624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
324998624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3250ea103259SMichael Clark                 case 0: op = rv_op_fmv_q_x; break;
3251a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_q; break;
3252ea103259SMichael Clark                 }
3253ea103259SMichael Clark                 break;
3254ea103259SMichael Clark             }
3255ea103259SMichael Clark             break;
325607f4964dSYang Liu         case 21:
32573bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
325807f4964dSYang Liu             case 0:
32593bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
326007f4964dSYang Liu                 case 0: op = rv_op_vadd_vv; break;
3261*9d92f56dSMax Chou                 case 1: op = rv_op_vandn_vv; break;
326207f4964dSYang Liu                 case 2: op = rv_op_vsub_vv; break;
326307f4964dSYang Liu                 case 4: op = rv_op_vminu_vv; break;
326407f4964dSYang Liu                 case 5: op = rv_op_vmin_vv; break;
326507f4964dSYang Liu                 case 6: op = rv_op_vmaxu_vv; break;
326607f4964dSYang Liu                 case 7: op = rv_op_vmax_vv; break;
326707f4964dSYang Liu                 case 9: op = rv_op_vand_vv; break;
326807f4964dSYang Liu                 case 10: op = rv_op_vor_vv; break;
326907f4964dSYang Liu                 case 11: op = rv_op_vxor_vv; break;
327007f4964dSYang Liu                 case 12: op = rv_op_vrgather_vv; break;
327107f4964dSYang Liu                 case 14: op = rv_op_vrgatherei16_vv; break;
327298624d13SWeiwei Li                 case 16:
327398624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
327498624d13SWeiwei Li                         op = rv_op_vadc_vvm;
327598624d13SWeiwei Li                     }
327698624d13SWeiwei Li                     break;
327707f4964dSYang Liu                 case 17: op = rv_op_vmadc_vvm; break;
327898624d13SWeiwei Li                 case 18:
327998624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
328098624d13SWeiwei Li                         op = rv_op_vsbc_vvm;
328198624d13SWeiwei Li                     }
328298624d13SWeiwei Li                     break;
328307f4964dSYang Liu                 case 19: op = rv_op_vmsbc_vvm; break;
3284*9d92f56dSMax Chou                 case 20: op = rv_op_vror_vv; break;
3285*9d92f56dSMax Chou                 case 21: op = rv_op_vrol_vv; break;
328607f4964dSYang Liu                 case 23:
328707f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
328807f4964dSYang Liu                         op = rv_op_vmv_v_v;
328907f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
329007f4964dSYang Liu                         op = rv_op_vmerge_vvm;
329107f4964dSYang Liu                     break;
329207f4964dSYang Liu                 case 24: op = rv_op_vmseq_vv; break;
329307f4964dSYang Liu                 case 25: op = rv_op_vmsne_vv; break;
329407f4964dSYang Liu                 case 26: op = rv_op_vmsltu_vv; break;
329507f4964dSYang Liu                 case 27: op = rv_op_vmslt_vv; break;
329607f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vv; break;
329707f4964dSYang Liu                 case 29: op = rv_op_vmsle_vv; break;
329807f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vv; break;
329907f4964dSYang Liu                 case 33: op = rv_op_vsadd_vv; break;
330007f4964dSYang Liu                 case 34: op = rv_op_vssubu_vv; break;
330107f4964dSYang Liu                 case 35: op = rv_op_vssub_vv; break;
330207f4964dSYang Liu                 case 37: op = rv_op_vsll_vv; break;
330307f4964dSYang Liu                 case 39: op = rv_op_vsmul_vv; break;
330407f4964dSYang Liu                 case 40: op = rv_op_vsrl_vv; break;
330507f4964dSYang Liu                 case 41: op = rv_op_vsra_vv; break;
330607f4964dSYang Liu                 case 42: op = rv_op_vssrl_vv; break;
330707f4964dSYang Liu                 case 43: op = rv_op_vssra_vv; break;
330807f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wv; break;
330907f4964dSYang Liu                 case 45: op = rv_op_vnsra_wv; break;
331007f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wv; break;
331107f4964dSYang Liu                 case 47: op = rv_op_vnclip_wv; break;
331207f4964dSYang Liu                 case 48: op = rv_op_vwredsumu_vs; break;
331307f4964dSYang Liu                 case 49: op = rv_op_vwredsum_vs; break;
3314*9d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vv; break;
331507f4964dSYang Liu                 }
331607f4964dSYang Liu                 break;
331707f4964dSYang Liu             case 1:
33183bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
331907f4964dSYang Liu                 case 0: op = rv_op_vfadd_vv; break;
332007f4964dSYang Liu                 case 1: op = rv_op_vfredusum_vs; break;
332107f4964dSYang Liu                 case 2: op = rv_op_vfsub_vv; break;
332207f4964dSYang Liu                 case 3: op = rv_op_vfredosum_vs; break;
332307f4964dSYang Liu                 case 4: op = rv_op_vfmin_vv; break;
332407f4964dSYang Liu                 case 5: op = rv_op_vfredmin_vs; break;
332507f4964dSYang Liu                 case 6: op = rv_op_vfmax_vv; break;
332607f4964dSYang Liu                 case 7: op = rv_op_vfredmax_vs; break;
332707f4964dSYang Liu                 case 8: op = rv_op_vfsgnj_vv; break;
332807f4964dSYang Liu                 case 9: op = rv_op_vfsgnjn_vv; break;
332907f4964dSYang Liu                 case 10: op = rv_op_vfsgnjx_vv; break;
333007f4964dSYang Liu                 case 16:
33313bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
333207f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_f_s; break;
333307f4964dSYang Liu                     }
333407f4964dSYang Liu                     break;
333507f4964dSYang Liu                 case 18:
33363bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
333707f4964dSYang Liu                     case 0: op = rv_op_vfcvt_xu_f_v; break;
333807f4964dSYang Liu                     case 1: op = rv_op_vfcvt_x_f_v; break;
333907f4964dSYang Liu                     case 2: op = rv_op_vfcvt_f_xu_v; break;
334007f4964dSYang Liu                     case 3: op = rv_op_vfcvt_f_x_v; break;
334107f4964dSYang Liu                     case 6: op = rv_op_vfcvt_rtz_xu_f_v; break;
334207f4964dSYang Liu                     case 7: op = rv_op_vfcvt_rtz_x_f_v; break;
334307f4964dSYang Liu                     case 8: op = rv_op_vfwcvt_xu_f_v; break;
334407f4964dSYang Liu                     case 9: op = rv_op_vfwcvt_x_f_v; break;
334507f4964dSYang Liu                     case 10: op = rv_op_vfwcvt_f_xu_v; break;
334607f4964dSYang Liu                     case 11: op = rv_op_vfwcvt_f_x_v; break;
334707f4964dSYang Liu                     case 12: op = rv_op_vfwcvt_f_f_v; break;
334832b2d75bSWeiwei Li                     case 13: op = rv_op_vfwcvtbf16_f_f_v; break;
334907f4964dSYang Liu                     case 14: op = rv_op_vfwcvt_rtz_xu_f_v; break;
335007f4964dSYang Liu                     case 15: op = rv_op_vfwcvt_rtz_x_f_v; break;
335107f4964dSYang Liu                     case 16: op = rv_op_vfncvt_xu_f_w; break;
335207f4964dSYang Liu                     case 17: op = rv_op_vfncvt_x_f_w; break;
335307f4964dSYang Liu                     case 18: op = rv_op_vfncvt_f_xu_w; break;
335407f4964dSYang Liu                     case 19: op = rv_op_vfncvt_f_x_w; break;
335507f4964dSYang Liu                     case 20: op = rv_op_vfncvt_f_f_w; break;
335607f4964dSYang Liu                     case 21: op = rv_op_vfncvt_rod_f_f_w; break;
335707f4964dSYang Liu                     case 22: op = rv_op_vfncvt_rtz_xu_f_w; break;
335807f4964dSYang Liu                     case 23: op = rv_op_vfncvt_rtz_x_f_w; break;
335932b2d75bSWeiwei Li                     case 29: op = rv_op_vfncvtbf16_f_f_w; break;
336007f4964dSYang Liu                     }
336107f4964dSYang Liu                     break;
336207f4964dSYang Liu                 case 19:
33633bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
336407f4964dSYang Liu                     case 0: op = rv_op_vfsqrt_v; break;
336507f4964dSYang Liu                     case 4: op = rv_op_vfrsqrt7_v; break;
336607f4964dSYang Liu                     case 5: op = rv_op_vfrec7_v; break;
336707f4964dSYang Liu                     case 16: op = rv_op_vfclass_v; break;
336807f4964dSYang Liu                     }
336907f4964dSYang Liu                     break;
337007f4964dSYang Liu                 case 24: op = rv_op_vmfeq_vv; break;
337107f4964dSYang Liu                 case 25: op = rv_op_vmfle_vv; break;
337207f4964dSYang Liu                 case 27: op = rv_op_vmflt_vv; break;
337307f4964dSYang Liu                 case 28: op = rv_op_vmfne_vv; break;
337407f4964dSYang Liu                 case 32: op = rv_op_vfdiv_vv; break;
337507f4964dSYang Liu                 case 36: op = rv_op_vfmul_vv; break;
337607f4964dSYang Liu                 case 40: op = rv_op_vfmadd_vv; break;
337707f4964dSYang Liu                 case 41: op = rv_op_vfnmadd_vv; break;
337807f4964dSYang Liu                 case 42: op = rv_op_vfmsub_vv; break;
337907f4964dSYang Liu                 case 43: op = rv_op_vfnmsub_vv; break;
338007f4964dSYang Liu                 case 44: op = rv_op_vfmacc_vv; break;
338107f4964dSYang Liu                 case 45: op = rv_op_vfnmacc_vv; break;
338207f4964dSYang Liu                 case 46: op = rv_op_vfmsac_vv; break;
338307f4964dSYang Liu                 case 47: op = rv_op_vfnmsac_vv; break;
338407f4964dSYang Liu                 case 48: op = rv_op_vfwadd_vv; break;
338507f4964dSYang Liu                 case 49: op = rv_op_vfwredusum_vs; break;
338607f4964dSYang Liu                 case 50: op = rv_op_vfwsub_vv; break;
338707f4964dSYang Liu                 case 51: op = rv_op_vfwredosum_vs; break;
338807f4964dSYang Liu                 case 52: op = rv_op_vfwadd_wv; break;
338907f4964dSYang Liu                 case 54: op = rv_op_vfwsub_wv; break;
339007f4964dSYang Liu                 case 56: op = rv_op_vfwmul_vv; break;
339132b2d75bSWeiwei Li                 case 59: op = rv_op_vfwmaccbf16_vv; break;
339207f4964dSYang Liu                 case 60: op = rv_op_vfwmacc_vv; break;
339307f4964dSYang Liu                 case 61: op = rv_op_vfwnmacc_vv; break;
339407f4964dSYang Liu                 case 62: op = rv_op_vfwmsac_vv; break;
339507f4964dSYang Liu                 case 63: op = rv_op_vfwnmsac_vv; break;
339607f4964dSYang Liu                 }
339707f4964dSYang Liu                 break;
339807f4964dSYang Liu             case 2:
33993bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
340007f4964dSYang Liu                 case 0: op = rv_op_vredsum_vs; break;
340107f4964dSYang Liu                 case 1: op = rv_op_vredand_vs; break;
340207f4964dSYang Liu                 case 2: op = rv_op_vredor_vs; break;
340307f4964dSYang Liu                 case 3: op = rv_op_vredxor_vs; break;
340407f4964dSYang Liu                 case 4: op = rv_op_vredminu_vs; break;
340507f4964dSYang Liu                 case 5: op = rv_op_vredmin_vs; break;
340607f4964dSYang Liu                 case 6: op = rv_op_vredmaxu_vs; break;
340707f4964dSYang Liu                 case 7: op = rv_op_vredmax_vs; break;
340807f4964dSYang Liu                 case 8: op = rv_op_vaaddu_vv; break;
340907f4964dSYang Liu                 case 9: op = rv_op_vaadd_vv; break;
341007f4964dSYang Liu                 case 10: op = rv_op_vasubu_vv; break;
341107f4964dSYang Liu                 case 11: op = rv_op_vasub_vv; break;
3412*9d92f56dSMax Chou                 case 12: op = rv_op_vclmul_vv; break;
3413*9d92f56dSMax Chou                 case 13: op = rv_op_vclmulh_vv; break;
341407f4964dSYang Liu                 case 16:
34153bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
341607f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vmv_x_s; break;
341707f4964dSYang Liu                     case 16: op = rv_op_vcpop_m; break;
341807f4964dSYang Liu                     case 17: op = rv_op_vfirst_m; break;
341907f4964dSYang Liu                     }
342007f4964dSYang Liu                     break;
342107f4964dSYang Liu                 case 18:
34223bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
342307f4964dSYang Liu                     case 2: op = rv_op_vzext_vf8; break;
342407f4964dSYang Liu                     case 3: op = rv_op_vsext_vf8; break;
342507f4964dSYang Liu                     case 4: op = rv_op_vzext_vf4; break;
342607f4964dSYang Liu                     case 5: op = rv_op_vsext_vf4; break;
342707f4964dSYang Liu                     case 6: op = rv_op_vzext_vf2; break;
342807f4964dSYang Liu                     case 7: op = rv_op_vsext_vf2; break;
3429*9d92f56dSMax Chou                     case 8: op = rv_op_vbrev8_v; break;
3430*9d92f56dSMax Chou                     case 9: op = rv_op_vrev8_v; break;
3431*9d92f56dSMax Chou                     case 10: op = rv_op_vbrev_v; break;
3432*9d92f56dSMax Chou                     case 12: op = rv_op_vclz_v; break;
3433*9d92f56dSMax Chou                     case 13: op = rv_op_vctz_v; break;
3434*9d92f56dSMax Chou                     case 14: op = rv_op_vcpop_v; break;
343507f4964dSYang Liu                     }
343607f4964dSYang Liu                     break;
343707f4964dSYang Liu                 case 20:
34383bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
343907f4964dSYang Liu                     case 1: op = rv_op_vmsbf_m;  break;
344007f4964dSYang Liu                     case 2: op = rv_op_vmsof_m; break;
344107f4964dSYang Liu                     case 3: op = rv_op_vmsif_m; break;
344207f4964dSYang Liu                     case 16: op = rv_op_viota_m; break;
344398624d13SWeiwei Li                     case 17:
344498624d13SWeiwei Li                         if (((inst >> 20) & 0b11111) == 0) {
344598624d13SWeiwei Li                             op = rv_op_vid_v;
344698624d13SWeiwei Li                         }
344798624d13SWeiwei Li                         break;
344807f4964dSYang Liu                     }
344907f4964dSYang Liu                     break;
345007f4964dSYang Liu                 case 23: if ((inst >> 25) & 1) op = rv_op_vcompress_vm; break;
345107f4964dSYang Liu                 case 24: if ((inst >> 25) & 1) op = rv_op_vmandn_mm; break;
345207f4964dSYang Liu                 case 25: if ((inst >> 25) & 1) op = rv_op_vmand_mm; break;
345307f4964dSYang Liu                 case 26: if ((inst >> 25) & 1) op = rv_op_vmor_mm; break;
345407f4964dSYang Liu                 case 27: if ((inst >> 25) & 1) op = rv_op_vmxor_mm; break;
345507f4964dSYang Liu                 case 28: if ((inst >> 25) & 1) op = rv_op_vmorn_mm; break;
345607f4964dSYang Liu                 case 29: if ((inst >> 25) & 1) op = rv_op_vmnand_mm; break;
345707f4964dSYang Liu                 case 30: if ((inst >> 25) & 1) op = rv_op_vmnor_mm; break;
345807f4964dSYang Liu                 case 31: if ((inst >> 25) & 1) op = rv_op_vmxnor_mm; break;
345907f4964dSYang Liu                 case 32: op = rv_op_vdivu_vv; break;
346007f4964dSYang Liu                 case 33: op = rv_op_vdiv_vv; break;
346107f4964dSYang Liu                 case 34: op = rv_op_vremu_vv; break;
346207f4964dSYang Liu                 case 35: op = rv_op_vrem_vv; break;
346307f4964dSYang Liu                 case 36: op = rv_op_vmulhu_vv; break;
346407f4964dSYang Liu                 case 37: op = rv_op_vmul_vv; break;
346507f4964dSYang Liu                 case 38: op = rv_op_vmulhsu_vv; break;
346607f4964dSYang Liu                 case 39: op = rv_op_vmulh_vv; break;
346707f4964dSYang Liu                 case 41: op = rv_op_vmadd_vv; break;
346807f4964dSYang Liu                 case 43: op = rv_op_vnmsub_vv; break;
346907f4964dSYang Liu                 case 45: op = rv_op_vmacc_vv; break;
347007f4964dSYang Liu                 case 47: op = rv_op_vnmsac_vv; break;
347107f4964dSYang Liu                 case 48: op = rv_op_vwaddu_vv; break;
347207f4964dSYang Liu                 case 49: op = rv_op_vwadd_vv; break;
347307f4964dSYang Liu                 case 50: op = rv_op_vwsubu_vv; break;
347407f4964dSYang Liu                 case 51: op = rv_op_vwsub_vv; break;
347507f4964dSYang Liu                 case 52: op = rv_op_vwaddu_wv; break;
347607f4964dSYang Liu                 case 53: op = rv_op_vwadd_wv; break;
347707f4964dSYang Liu                 case 54: op = rv_op_vwsubu_wv; break;
347807f4964dSYang Liu                 case 55: op = rv_op_vwsub_wv; break;
347907f4964dSYang Liu                 case 56: op = rv_op_vwmulu_vv; break;
348007f4964dSYang Liu                 case 58: op = rv_op_vwmulsu_vv; break;
348107f4964dSYang Liu                 case 59: op = rv_op_vwmul_vv; break;
348207f4964dSYang Liu                 case 60: op = rv_op_vwmaccu_vv; break;
348307f4964dSYang Liu                 case 61: op = rv_op_vwmacc_vv; break;
348407f4964dSYang Liu                 case 63: op = rv_op_vwmaccsu_vv; break;
348507f4964dSYang Liu                 }
348607f4964dSYang Liu                 break;
348707f4964dSYang Liu             case 3:
34883bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
348907f4964dSYang Liu                 case 0: op = rv_op_vadd_vi; break;
349007f4964dSYang Liu                 case 3: op = rv_op_vrsub_vi; break;
349107f4964dSYang Liu                 case 9: op = rv_op_vand_vi; break;
349207f4964dSYang Liu                 case 10: op = rv_op_vor_vi; break;
349307f4964dSYang Liu                 case 11: op = rv_op_vxor_vi; break;
349407f4964dSYang Liu                 case 12: op = rv_op_vrgather_vi; break;
349507f4964dSYang Liu                 case 14: op = rv_op_vslideup_vi; break;
349607f4964dSYang Liu                 case 15: op = rv_op_vslidedown_vi; break;
349798624d13SWeiwei Li                 case 16:
349898624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
349998624d13SWeiwei Li                         op = rv_op_vadc_vim;
350098624d13SWeiwei Li                     }
350198624d13SWeiwei Li                     break;
350207f4964dSYang Liu                 case 17: op = rv_op_vmadc_vim; break;
3503*9d92f56dSMax Chou                 case 20: case 21: op = rv_op_vror_vi; break;
350407f4964dSYang Liu                 case 23:
350507f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
350607f4964dSYang Liu                         op = rv_op_vmv_v_i;
350707f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
350807f4964dSYang Liu                         op = rv_op_vmerge_vim;
350907f4964dSYang Liu                     break;
351007f4964dSYang Liu                 case 24: op = rv_op_vmseq_vi; break;
351107f4964dSYang Liu                 case 25: op = rv_op_vmsne_vi; break;
351207f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vi; break;
351307f4964dSYang Liu                 case 29: op = rv_op_vmsle_vi; break;
351407f4964dSYang Liu                 case 30: op = rv_op_vmsgtu_vi; break;
351507f4964dSYang Liu                 case 31: op = rv_op_vmsgt_vi; break;
351607f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vi; break;
351707f4964dSYang Liu                 case 33: op = rv_op_vsadd_vi; break;
351807f4964dSYang Liu                 case 37: op = rv_op_vsll_vi; break;
351907f4964dSYang Liu                 case 39:
35203bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
352107f4964dSYang Liu                     case 0: op = rv_op_vmv1r_v; break;
352207f4964dSYang Liu                     case 1: op = rv_op_vmv2r_v; break;
352307f4964dSYang Liu                     case 3: op = rv_op_vmv4r_v; break;
352407f4964dSYang Liu                     case 7: op = rv_op_vmv8r_v; break;
352507f4964dSYang Liu                     }
352607f4964dSYang Liu                     break;
352707f4964dSYang Liu                 case 40: op = rv_op_vsrl_vi; break;
352807f4964dSYang Liu                 case 41: op = rv_op_vsra_vi; break;
352907f4964dSYang Liu                 case 42: op = rv_op_vssrl_vi; break;
353007f4964dSYang Liu                 case 43: op = rv_op_vssra_vi; break;
353107f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wi; break;
353207f4964dSYang Liu                 case 45: op = rv_op_vnsra_wi; break;
353307f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wi; break;
353407f4964dSYang Liu                 case 47: op = rv_op_vnclip_wi; break;
3535*9d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vi; break;
353607f4964dSYang Liu                 }
353707f4964dSYang Liu                 break;
353807f4964dSYang Liu             case 4:
35393bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
354007f4964dSYang Liu                 case 0: op = rv_op_vadd_vx; break;
3541*9d92f56dSMax Chou                 case 1: op = rv_op_vandn_vx; break;
354207f4964dSYang Liu                 case 2: op = rv_op_vsub_vx; break;
354307f4964dSYang Liu                 case 3: op = rv_op_vrsub_vx; break;
354407f4964dSYang Liu                 case 4: op = rv_op_vminu_vx; break;
354507f4964dSYang Liu                 case 5: op = rv_op_vmin_vx; break;
354607f4964dSYang Liu                 case 6: op = rv_op_vmaxu_vx; break;
354707f4964dSYang Liu                 case 7: op = rv_op_vmax_vx; break;
354807f4964dSYang Liu                 case 9: op = rv_op_vand_vx; break;
354907f4964dSYang Liu                 case 10: op = rv_op_vor_vx; break;
355007f4964dSYang Liu                 case 11: op = rv_op_vxor_vx; break;
355107f4964dSYang Liu                 case 12: op = rv_op_vrgather_vx; break;
355207f4964dSYang Liu                 case 14: op = rv_op_vslideup_vx; break;
355307f4964dSYang Liu                 case 15: op = rv_op_vslidedown_vx; break;
355498624d13SWeiwei Li                 case 16:
355598624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
355698624d13SWeiwei Li                         op = rv_op_vadc_vxm;
355798624d13SWeiwei Li                     }
355898624d13SWeiwei Li                     break;
355907f4964dSYang Liu                 case 17: op = rv_op_vmadc_vxm; break;
356098624d13SWeiwei Li                 case 18:
356198624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
356298624d13SWeiwei Li                         op = rv_op_vsbc_vxm;
356398624d13SWeiwei Li                     }
356498624d13SWeiwei Li                     break;
356507f4964dSYang Liu                 case 19: op = rv_op_vmsbc_vxm; break;
3566*9d92f56dSMax Chou                 case 20: op = rv_op_vror_vx; break;
3567*9d92f56dSMax Chou                 case 21: op = rv_op_vrol_vx; break;
356807f4964dSYang Liu                 case 23:
356907f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
357007f4964dSYang Liu                         op = rv_op_vmv_v_x;
357107f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
357207f4964dSYang Liu                         op = rv_op_vmerge_vxm;
357307f4964dSYang Liu                     break;
357407f4964dSYang Liu                 case 24: op = rv_op_vmseq_vx; break;
357507f4964dSYang Liu                 case 25: op = rv_op_vmsne_vx; break;
357607f4964dSYang Liu                 case 26: op = rv_op_vmsltu_vx; break;
357707f4964dSYang Liu                 case 27: op = rv_op_vmslt_vx; break;
357807f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vx; break;
357907f4964dSYang Liu                 case 29: op = rv_op_vmsle_vx; break;
358007f4964dSYang Liu                 case 30: op = rv_op_vmsgtu_vx; break;
358107f4964dSYang Liu                 case 31: op = rv_op_vmsgt_vx; break;
358207f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vx; break;
358307f4964dSYang Liu                 case 33: op = rv_op_vsadd_vx; break;
358407f4964dSYang Liu                 case 34: op = rv_op_vssubu_vx; break;
358507f4964dSYang Liu                 case 35: op = rv_op_vssub_vx; break;
358607f4964dSYang Liu                 case 37: op = rv_op_vsll_vx; break;
358707f4964dSYang Liu                 case 39: op = rv_op_vsmul_vx; break;
358807f4964dSYang Liu                 case 40: op = rv_op_vsrl_vx; break;
358907f4964dSYang Liu                 case 41: op = rv_op_vsra_vx; break;
359007f4964dSYang Liu                 case 42: op = rv_op_vssrl_vx; break;
359107f4964dSYang Liu                 case 43: op = rv_op_vssra_vx; break;
359207f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wx; break;
359307f4964dSYang Liu                 case 45: op = rv_op_vnsra_wx; break;
359407f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wx; break;
359507f4964dSYang Liu                 case 47: op = rv_op_vnclip_wx; break;
3596*9d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vx; break;
359707f4964dSYang Liu                 }
359807f4964dSYang Liu                 break;
359907f4964dSYang Liu             case 5:
36003bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
360107f4964dSYang Liu                 case 0: op = rv_op_vfadd_vf; break;
360207f4964dSYang Liu                 case 2: op = rv_op_vfsub_vf; break;
360307f4964dSYang Liu                 case 4: op = rv_op_vfmin_vf; break;
360407f4964dSYang Liu                 case 6: op = rv_op_vfmax_vf; break;
360507f4964dSYang Liu                 case 8: op = rv_op_vfsgnj_vf; break;
360607f4964dSYang Liu                 case 9: op = rv_op_vfsgnjn_vf; break;
360707f4964dSYang Liu                 case 10: op = rv_op_vfsgnjx_vf; break;
360807f4964dSYang Liu                 case 14: op = rv_op_vfslide1up_vf; break;
360907f4964dSYang Liu                 case 15: op = rv_op_vfslide1down_vf; break;
361007f4964dSYang Liu                 case 16:
36113bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
361207f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_s_f; break;
361307f4964dSYang Liu                     }
361407f4964dSYang Liu                     break;
361507f4964dSYang Liu                 case 23:
361607f4964dSYang Liu                     if (((inst >> 25) & 1) == 0)
361707f4964dSYang Liu                         op = rv_op_vfmerge_vfm;
361807f4964dSYang Liu                     else if (((inst >> 20) & 0b111111) == 32)
361907f4964dSYang Liu                         op = rv_op_vfmv_v_f;
362007f4964dSYang Liu                     break;
362107f4964dSYang Liu                 case 24: op = rv_op_vmfeq_vf; break;
362207f4964dSYang Liu                 case 25: op = rv_op_vmfle_vf; break;
362307f4964dSYang Liu                 case 27: op = rv_op_vmflt_vf; break;
362407f4964dSYang Liu                 case 28: op = rv_op_vmfne_vf; break;
362507f4964dSYang Liu                 case 29: op = rv_op_vmfgt_vf; break;
362607f4964dSYang Liu                 case 31: op = rv_op_vmfge_vf; break;
362707f4964dSYang Liu                 case 32: op = rv_op_vfdiv_vf; break;
362807f4964dSYang Liu                 case 33: op = rv_op_vfrdiv_vf; break;
362907f4964dSYang Liu                 case 36: op = rv_op_vfmul_vf; break;
363007f4964dSYang Liu                 case 39: op = rv_op_vfrsub_vf; break;
363107f4964dSYang Liu                 case 40: op = rv_op_vfmadd_vf; break;
363207f4964dSYang Liu                 case 41: op = rv_op_vfnmadd_vf; break;
363307f4964dSYang Liu                 case 42: op = rv_op_vfmsub_vf; break;
363407f4964dSYang Liu                 case 43: op = rv_op_vfnmsub_vf; break;
363507f4964dSYang Liu                 case 44: op = rv_op_vfmacc_vf; break;
363607f4964dSYang Liu                 case 45: op = rv_op_vfnmacc_vf; break;
363707f4964dSYang Liu                 case 46: op = rv_op_vfmsac_vf; break;
363807f4964dSYang Liu                 case 47: op = rv_op_vfnmsac_vf; break;
363907f4964dSYang Liu                 case 48: op = rv_op_vfwadd_vf; break;
364007f4964dSYang Liu                 case 50: op = rv_op_vfwsub_vf; break;
364107f4964dSYang Liu                 case 52: op = rv_op_vfwadd_wf; break;
364207f4964dSYang Liu                 case 54: op = rv_op_vfwsub_wf; break;
364307f4964dSYang Liu                 case 56: op = rv_op_vfwmul_vf; break;
364432b2d75bSWeiwei Li                 case 59: op = rv_op_vfwmaccbf16_vf; break;
364507f4964dSYang Liu                 case 60: op = rv_op_vfwmacc_vf; break;
364607f4964dSYang Liu                 case 61: op = rv_op_vfwnmacc_vf; break;
364707f4964dSYang Liu                 case 62: op = rv_op_vfwmsac_vf; break;
364807f4964dSYang Liu                 case 63: op = rv_op_vfwnmsac_vf; break;
364907f4964dSYang Liu                 }
365007f4964dSYang Liu                 break;
365107f4964dSYang Liu             case 6:
36523bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
365307f4964dSYang Liu                 case 8: op = rv_op_vaaddu_vx; break;
365407f4964dSYang Liu                 case 9: op = rv_op_vaadd_vx; break;
365507f4964dSYang Liu                 case 10: op = rv_op_vasubu_vx; break;
365607f4964dSYang Liu                 case 11: op = rv_op_vasub_vx; break;
3657*9d92f56dSMax Chou                 case 12: op = rv_op_vclmul_vx; break;
3658*9d92f56dSMax Chou                 case 13: op = rv_op_vclmulh_vx; break;
365907f4964dSYang Liu                 case 14: op = rv_op_vslide1up_vx; break;
366007f4964dSYang Liu                 case 15: op = rv_op_vslide1down_vx; break;
366107f4964dSYang Liu                 case 16:
36623bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
366307f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vmv_s_x; break;
366407f4964dSYang Liu                     }
366507f4964dSYang Liu                     break;
366607f4964dSYang Liu                 case 32: op = rv_op_vdivu_vx; break;
366707f4964dSYang Liu                 case 33: op = rv_op_vdiv_vx; break;
366807f4964dSYang Liu                 case 34: op = rv_op_vremu_vx; break;
366907f4964dSYang Liu                 case 35: op = rv_op_vrem_vx; break;
367007f4964dSYang Liu                 case 36: op = rv_op_vmulhu_vx; break;
367107f4964dSYang Liu                 case 37: op = rv_op_vmul_vx; break;
367207f4964dSYang Liu                 case 38: op = rv_op_vmulhsu_vx; break;
367307f4964dSYang Liu                 case 39: op = rv_op_vmulh_vx; break;
367407f4964dSYang Liu                 case 41: op = rv_op_vmadd_vx; break;
367507f4964dSYang Liu                 case 43: op = rv_op_vnmsub_vx; break;
367607f4964dSYang Liu                 case 45: op = rv_op_vmacc_vx; break;
367707f4964dSYang Liu                 case 47: op = rv_op_vnmsac_vx; break;
367807f4964dSYang Liu                 case 48: op = rv_op_vwaddu_vx; break;
367907f4964dSYang Liu                 case 49: op = rv_op_vwadd_vx; break;
368007f4964dSYang Liu                 case 50: op = rv_op_vwsubu_vx; break;
368107f4964dSYang Liu                 case 51: op = rv_op_vwsub_vx; break;
368207f4964dSYang Liu                 case 52: op = rv_op_vwaddu_wx; break;
368307f4964dSYang Liu                 case 53: op = rv_op_vwadd_wx; break;
368407f4964dSYang Liu                 case 54: op = rv_op_vwsubu_wx; break;
368507f4964dSYang Liu                 case 55: op = rv_op_vwsub_wx; break;
368607f4964dSYang Liu                 case 56: op = rv_op_vwmulu_vx; break;
368707f4964dSYang Liu                 case 58: op = rv_op_vwmulsu_vx; break;
368807f4964dSYang Liu                 case 59: op = rv_op_vwmul_vx; break;
368907f4964dSYang Liu                 case 60: op = rv_op_vwmaccu_vx; break;
369007f4964dSYang Liu                 case 61: op = rv_op_vwmacc_vx; break;
369107f4964dSYang Liu                 case 62: op = rv_op_vwmaccus_vx; break;
369207f4964dSYang Liu                 case 63: op = rv_op_vwmaccsu_vx; break;
369307f4964dSYang Liu                 }
369407f4964dSYang Liu                 break;
369507f4964dSYang Liu             case 7:
369607f4964dSYang Liu                 if (((inst >> 31) & 1) == 0) {
369707f4964dSYang Liu                     op = rv_op_vsetvli;
369807f4964dSYang Liu                 } else if ((inst >> 30) & 1) {
369907f4964dSYang Liu                     op = rv_op_vsetivli;
370007f4964dSYang Liu                 } else if (((inst >> 25) & 0b11111) == 0) {
370107f4964dSYang Liu                     op = rv_op_vsetvl;
370207f4964dSYang Liu                 }
370307f4964dSYang Liu                 break;
370407f4964dSYang Liu             }
370507f4964dSYang Liu             break;
3706ea103259SMichael Clark         case 22:
37073bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3708ea103259SMichael Clark             case 0: op = rv_op_addid; break;
3709ea103259SMichael Clark             case 1:
37103bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
3711ea103259SMichael Clark                 case 0: op = rv_op_sllid; break;
3712ea103259SMichael Clark                 }
3713ea103259SMichael Clark                 break;
3714ea103259SMichael Clark             case 5:
37153bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
3716ea103259SMichael Clark                 case 0: op = rv_op_srlid; break;
3717ea103259SMichael Clark                 case 16: op = rv_op_sraid; break;
3718ea103259SMichael Clark                 }
3719ea103259SMichael Clark                 break;
3720ea103259SMichael Clark             }
3721ea103259SMichael Clark             break;
3722ea103259SMichael Clark         case 24:
37233bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3724ea103259SMichael Clark             case 0: op = rv_op_beq; break;
3725ea103259SMichael Clark             case 1: op = rv_op_bne; break;
3726ea103259SMichael Clark             case 4: op = rv_op_blt; break;
3727ea103259SMichael Clark             case 5: op = rv_op_bge; break;
3728ea103259SMichael Clark             case 6: op = rv_op_bltu; break;
3729ea103259SMichael Clark             case 7: op = rv_op_bgeu; break;
3730ea103259SMichael Clark             }
3731ea103259SMichael Clark             break;
3732ea103259SMichael Clark         case 25:
37333bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3734ea103259SMichael Clark             case 0: op = rv_op_jalr; break;
3735ea103259SMichael Clark             }
3736ea103259SMichael Clark             break;
3737ea103259SMichael Clark         case 27: op = rv_op_jal; break;
3738ea103259SMichael Clark         case 28:
37393bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3740ea103259SMichael Clark             case 0:
374198624d13SWeiwei Li                 switch (((inst >> 20) & 0b111111100000) |
374298624d13SWeiwei Li                         ((inst >> 7) & 0b000000011111)) {
3743ea103259SMichael Clark                 case 0:
37443bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
3745ea103259SMichael Clark                     case 0: op = rv_op_ecall; break;
3746ea103259SMichael Clark                     case 32: op = rv_op_ebreak; break;
3747ea103259SMichael Clark                     case 64: op = rv_op_uret; break;
3748ea103259SMichael Clark                     }
3749ea103259SMichael Clark                     break;
3750ea103259SMichael Clark                 case 256:
37513bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
3752ea103259SMichael Clark                     case 2:
37533bd87176SWeiwei Li                         switch ((inst >> 15) & 0b11111) {
3754ea103259SMichael Clark                         case 0: op = rv_op_sret; break;
3755ea103259SMichael Clark                         }
3756ea103259SMichael Clark                         break;
3757ea103259SMichael Clark                     case 4: op = rv_op_sfence_vm; break;
3758ea103259SMichael Clark                     case 5:
37593bd87176SWeiwei Li                         switch ((inst >> 15) & 0b11111) {
3760ea103259SMichael Clark                         case 0: op = rv_op_wfi; break;
3761ea103259SMichael Clark                         }
3762ea103259SMichael Clark                         break;
3763ea103259SMichael Clark                     }
3764ea103259SMichael Clark                     break;
3765ea103259SMichael Clark                 case 288: op = rv_op_sfence_vma; break;
3766ea103259SMichael Clark                 case 512:
37673bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
3768ea103259SMichael Clark                     case 64: op = rv_op_hret; break;
3769ea103259SMichael Clark                     }
3770ea103259SMichael Clark                     break;
3771ea103259SMichael Clark                 case 768:
37723bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
3773ea103259SMichael Clark                     case 64: op = rv_op_mret; break;
3774ea103259SMichael Clark                     }
3775ea103259SMichael Clark                     break;
3776ea103259SMichael Clark                 case 1952:
37773bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
3778ea103259SMichael Clark                     case 576: op = rv_op_dret; break;
3779ea103259SMichael Clark                     }
3780ea103259SMichael Clark                     break;
3781ea103259SMichael Clark                 }
3782ea103259SMichael Clark                 break;
3783ea103259SMichael Clark             case 1: op = rv_op_csrrw; break;
3784ea103259SMichael Clark             case 2: op = rv_op_csrrs; break;
3785ea103259SMichael Clark             case 3: op = rv_op_csrrc; break;
3786ea103259SMichael Clark             case 5: op = rv_op_csrrwi; break;
3787ea103259SMichael Clark             case 6: op = rv_op_csrrsi; break;
3788ea103259SMichael Clark             case 7: op = rv_op_csrrci; break;
3789ea103259SMichael Clark             }
3790ea103259SMichael Clark             break;
3791*9d92f56dSMax Chou         case 29:
3792*9d92f56dSMax Chou             if (((inst >> 25) & 1) == 1 && ((inst >> 12) & 0b111) == 2) {
3793*9d92f56dSMax Chou                 switch ((inst >> 26) & 0b111111) {
3794*9d92f56dSMax Chou                 case 32: op = rv_op_vsm3me_vv; break;
3795*9d92f56dSMax Chou                 case 33: op = rv_op_vsm4k_vi; break;
3796*9d92f56dSMax Chou                 case 34: op = rv_op_vaeskf1_vi; break;
3797*9d92f56dSMax Chou                 case 40:
3798*9d92f56dSMax Chou                     switch ((inst >> 15) & 0b11111) {
3799*9d92f56dSMax Chou                     case 0: op = rv_op_vaesdm_vv; break;
3800*9d92f56dSMax Chou                     case 1: op = rv_op_vaesdf_vv; break;
3801*9d92f56dSMax Chou                     case 2: op = rv_op_vaesem_vv; break;
3802*9d92f56dSMax Chou                     case 3: op = rv_op_vaesef_vv; break;
3803*9d92f56dSMax Chou                     case 16: op = rv_op_vsm4r_vv; break;
3804*9d92f56dSMax Chou                     case 17: op = rv_op_vgmul_vv; break;
3805*9d92f56dSMax Chou                     }
3806*9d92f56dSMax Chou                     break;
3807*9d92f56dSMax Chou                 case 41:
3808*9d92f56dSMax Chou                     switch ((inst >> 15) & 0b11111) {
3809*9d92f56dSMax Chou                     case 0: op = rv_op_vaesdm_vs; break;
3810*9d92f56dSMax Chou                     case 1: op = rv_op_vaesdf_vs; break;
3811*9d92f56dSMax Chou                     case 2: op = rv_op_vaesem_vs; break;
3812*9d92f56dSMax Chou                     case 3: op = rv_op_vaesef_vs; break;
3813*9d92f56dSMax Chou                     case 7: op = rv_op_vaesz_vs; break;
3814*9d92f56dSMax Chou                     case 16: op = rv_op_vsm4r_vs; break;
3815*9d92f56dSMax Chou                     }
3816*9d92f56dSMax Chou                     break;
3817*9d92f56dSMax Chou                 case 42: op = rv_op_vaeskf2_vi; break;
3818*9d92f56dSMax Chou                 case 43: op = rv_op_vsm3c_vi; break;
3819*9d92f56dSMax Chou                 case 44: op = rv_op_vghsh_vv; break;
3820*9d92f56dSMax Chou                 case 45: op = rv_op_vsha2ms_vv; break;
3821*9d92f56dSMax Chou                 case 46: op = rv_op_vsha2ch_vv; break;
3822*9d92f56dSMax Chou                 case 47: op = rv_op_vsha2cl_vv; break;
3823*9d92f56dSMax Chou                 }
3824*9d92f56dSMax Chou             }
3825*9d92f56dSMax Chou             break;
3826ea103259SMichael Clark         case 30:
382798624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
382898624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
3829ea103259SMichael Clark             case 0: op = rv_op_addd; break;
3830ea103259SMichael Clark             case 1: op = rv_op_slld; break;
3831ea103259SMichael Clark             case 5: op = rv_op_srld; break;
3832ea103259SMichael Clark             case 8: op = rv_op_muld; break;
3833ea103259SMichael Clark             case 12: op = rv_op_divd; break;
3834ea103259SMichael Clark             case 13: op = rv_op_divud; break;
3835ea103259SMichael Clark             case 14: op = rv_op_remd; break;
3836ea103259SMichael Clark             case 15: op = rv_op_remud; break;
3837ea103259SMichael Clark             case 256: op = rv_op_subd; break;
3838ea103259SMichael Clark             case 261: op = rv_op_srad; break;
3839ea103259SMichael Clark             }
3840ea103259SMichael Clark             break;
3841ea103259SMichael Clark         }
3842ea103259SMichael Clark         break;
3843ea103259SMichael Clark     }
3844ea103259SMichael Clark     dec->op = op;
3845ea103259SMichael Clark }
3846ea103259SMichael Clark 
3847ea103259SMichael Clark /* operand extractors */
3848ea103259SMichael Clark 
3849ea103259SMichael Clark static uint32_t operand_rd(rv_inst inst)
3850ea103259SMichael Clark {
3851ea103259SMichael Clark     return (inst << 52) >> 59;
3852ea103259SMichael Clark }
3853ea103259SMichael Clark 
3854ea103259SMichael Clark static uint32_t operand_rs1(rv_inst inst)
3855ea103259SMichael Clark {
3856ea103259SMichael Clark     return (inst << 44) >> 59;
3857ea103259SMichael Clark }
3858ea103259SMichael Clark 
3859ea103259SMichael Clark static uint32_t operand_rs2(rv_inst inst)
3860ea103259SMichael Clark {
3861ea103259SMichael Clark     return (inst << 39) >> 59;
3862ea103259SMichael Clark }
3863ea103259SMichael Clark 
3864ea103259SMichael Clark static uint32_t operand_rs3(rv_inst inst)
3865ea103259SMichael Clark {
3866ea103259SMichael Clark     return (inst << 32) >> 59;
3867ea103259SMichael Clark }
3868ea103259SMichael Clark 
3869ea103259SMichael Clark static uint32_t operand_aq(rv_inst inst)
3870ea103259SMichael Clark {
3871ea103259SMichael Clark     return (inst << 37) >> 63;
3872ea103259SMichael Clark }
3873ea103259SMichael Clark 
3874ea103259SMichael Clark static uint32_t operand_rl(rv_inst inst)
3875ea103259SMichael Clark {
3876ea103259SMichael Clark     return (inst << 38) >> 63;
3877ea103259SMichael Clark }
3878ea103259SMichael Clark 
3879ea103259SMichael Clark static uint32_t operand_pred(rv_inst inst)
3880ea103259SMichael Clark {
3881ea103259SMichael Clark     return (inst << 36) >> 60;
3882ea103259SMichael Clark }
3883ea103259SMichael Clark 
3884ea103259SMichael Clark static uint32_t operand_succ(rv_inst inst)
3885ea103259SMichael Clark {
3886ea103259SMichael Clark     return (inst << 40) >> 60;
3887ea103259SMichael Clark }
3888ea103259SMichael Clark 
3889ea103259SMichael Clark static uint32_t operand_rm(rv_inst inst)
3890ea103259SMichael Clark {
3891ea103259SMichael Clark     return (inst << 49) >> 61;
3892ea103259SMichael Clark }
3893ea103259SMichael Clark 
3894ea103259SMichael Clark static uint32_t operand_shamt5(rv_inst inst)
3895ea103259SMichael Clark {
3896ea103259SMichael Clark     return (inst << 39) >> 59;
3897ea103259SMichael Clark }
3898ea103259SMichael Clark 
3899ea103259SMichael Clark static uint32_t operand_shamt6(rv_inst inst)
3900ea103259SMichael Clark {
3901ea103259SMichael Clark     return (inst << 38) >> 58;
3902ea103259SMichael Clark }
3903ea103259SMichael Clark 
3904ea103259SMichael Clark static uint32_t operand_shamt7(rv_inst inst)
3905ea103259SMichael Clark {
3906ea103259SMichael Clark     return (inst << 37) >> 57;
3907ea103259SMichael Clark }
3908ea103259SMichael Clark 
3909ea103259SMichael Clark static uint32_t operand_crdq(rv_inst inst)
3910ea103259SMichael Clark {
3911ea103259SMichael Clark     return (inst << 59) >> 61;
3912ea103259SMichael Clark }
3913ea103259SMichael Clark 
3914ea103259SMichael Clark static uint32_t operand_crs1q(rv_inst inst)
3915ea103259SMichael Clark {
3916ea103259SMichael Clark     return (inst << 54) >> 61;
3917ea103259SMichael Clark }
3918ea103259SMichael Clark 
3919ea103259SMichael Clark static uint32_t operand_crs1rdq(rv_inst inst)
3920ea103259SMichael Clark {
3921ea103259SMichael Clark     return (inst << 54) >> 61;
3922ea103259SMichael Clark }
3923ea103259SMichael Clark 
3924ea103259SMichael Clark static uint32_t operand_crs2q(rv_inst inst)
3925ea103259SMichael Clark {
3926ea103259SMichael Clark     return (inst << 59) >> 61;
3927ea103259SMichael Clark }
3928ea103259SMichael Clark 
39292c71d02eSWeiwei Li static uint32_t calculate_xreg(uint32_t sreg)
39302c71d02eSWeiwei Li {
39312c71d02eSWeiwei Li     return sreg < 2 ? sreg + 8 : sreg + 16;
39322c71d02eSWeiwei Li }
39332c71d02eSWeiwei Li 
39342c71d02eSWeiwei Li static uint32_t operand_sreg1(rv_inst inst)
39352c71d02eSWeiwei Li {
39362c71d02eSWeiwei Li     return calculate_xreg((inst << 54) >> 61);
39372c71d02eSWeiwei Li }
39382c71d02eSWeiwei Li 
39392c71d02eSWeiwei Li static uint32_t operand_sreg2(rv_inst inst)
39402c71d02eSWeiwei Li {
39412c71d02eSWeiwei Li     return calculate_xreg((inst << 59) >> 61);
39422c71d02eSWeiwei Li }
39432c71d02eSWeiwei Li 
3944ea103259SMichael Clark static uint32_t operand_crd(rv_inst inst)
3945ea103259SMichael Clark {
3946ea103259SMichael Clark     return (inst << 52) >> 59;
3947ea103259SMichael Clark }
3948ea103259SMichael Clark 
3949ea103259SMichael Clark static uint32_t operand_crs1(rv_inst inst)
3950ea103259SMichael Clark {
3951ea103259SMichael Clark     return (inst << 52) >> 59;
3952ea103259SMichael Clark }
3953ea103259SMichael Clark 
3954ea103259SMichael Clark static uint32_t operand_crs1rd(rv_inst inst)
3955ea103259SMichael Clark {
3956ea103259SMichael Clark     return (inst << 52) >> 59;
3957ea103259SMichael Clark }
3958ea103259SMichael Clark 
3959ea103259SMichael Clark static uint32_t operand_crs2(rv_inst inst)
3960ea103259SMichael Clark {
3961ea103259SMichael Clark     return (inst << 57) >> 59;
3962ea103259SMichael Clark }
3963ea103259SMichael Clark 
3964ea103259SMichael Clark static uint32_t operand_cimmsh5(rv_inst inst)
3965ea103259SMichael Clark {
3966ea103259SMichael Clark     return (inst << 57) >> 59;
3967ea103259SMichael Clark }
3968ea103259SMichael Clark 
3969ea103259SMichael Clark static uint32_t operand_csr12(rv_inst inst)
3970ea103259SMichael Clark {
3971ea103259SMichael Clark     return (inst << 32) >> 52;
3972ea103259SMichael Clark }
3973ea103259SMichael Clark 
3974ea103259SMichael Clark static int32_t operand_imm12(rv_inst inst)
3975ea103259SMichael Clark {
3976ea103259SMichael Clark     return ((int64_t)inst << 32) >> 52;
3977ea103259SMichael Clark }
3978ea103259SMichael Clark 
3979ea103259SMichael Clark static int32_t operand_imm20(rv_inst inst)
3980ea103259SMichael Clark {
3981ea103259SMichael Clark     return (((int64_t)inst << 32) >> 44) << 12;
3982ea103259SMichael Clark }
3983ea103259SMichael Clark 
3984ea103259SMichael Clark static int32_t operand_jimm20(rv_inst inst)
3985ea103259SMichael Clark {
3986ea103259SMichael Clark     return (((int64_t)inst << 32) >> 63) << 20 |
3987ea103259SMichael Clark         ((inst << 33) >> 54) << 1 |
3988ea103259SMichael Clark         ((inst << 43) >> 63) << 11 |
3989ea103259SMichael Clark         ((inst << 44) >> 56) << 12;
3990ea103259SMichael Clark }
3991ea103259SMichael Clark 
3992ea103259SMichael Clark static int32_t operand_simm12(rv_inst inst)
3993ea103259SMichael Clark {
3994ea103259SMichael Clark     return (((int64_t)inst << 32) >> 57) << 5 |
3995ea103259SMichael Clark         (inst << 52) >> 59;
3996ea103259SMichael Clark }
3997ea103259SMichael Clark 
3998ea103259SMichael Clark static int32_t operand_sbimm12(rv_inst inst)
3999ea103259SMichael Clark {
4000ea103259SMichael Clark     return (((int64_t)inst << 32) >> 63) << 12 |
4001ea103259SMichael Clark         ((inst << 33) >> 58) << 5 |
4002ea103259SMichael Clark         ((inst << 52) >> 60) << 1 |
4003ea103259SMichael Clark         ((inst << 56) >> 63) << 11;
4004ea103259SMichael Clark }
4005ea103259SMichael Clark 
400633632775SFrédéric Pétrot static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa)
4007ea103259SMichael Clark {
400833632775SFrédéric Pétrot     int imm = ((inst << 51) >> 63) << 5 |
4009ea103259SMichael Clark         (inst << 57) >> 59;
401033632775SFrédéric Pétrot     if (isa == rv128) {
401133632775SFrédéric Pétrot         imm = imm ? imm : 64;
401233632775SFrédéric Pétrot     }
401333632775SFrédéric Pétrot     return imm;
401433632775SFrédéric Pétrot }
401533632775SFrédéric Pétrot 
401633632775SFrédéric Pétrot static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa)
401733632775SFrédéric Pétrot {
401833632775SFrédéric Pétrot     int imm = ((inst << 51) >> 63) << 5 |
401933632775SFrédéric Pétrot         (inst << 57) >> 59;
402033632775SFrédéric Pétrot     if (isa == rv128) {
402133632775SFrédéric Pétrot         imm = imm | (imm & 32) << 1;
402233632775SFrédéric Pétrot         imm = imm ? imm : 64;
402333632775SFrédéric Pétrot     }
402433632775SFrédéric Pétrot     return imm;
4025ea103259SMichael Clark }
4026ea103259SMichael Clark 
4027ea103259SMichael Clark static int32_t operand_cimmi(rv_inst inst)
4028ea103259SMichael Clark {
4029ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 5 |
4030ea103259SMichael Clark         (inst << 57) >> 59;
4031ea103259SMichael Clark }
4032ea103259SMichael Clark 
4033ea103259SMichael Clark static int32_t operand_cimmui(rv_inst inst)
4034ea103259SMichael Clark {
4035ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 17 |
4036ea103259SMichael Clark         ((inst << 57) >> 59) << 12;
4037ea103259SMichael Clark }
4038ea103259SMichael Clark 
4039ea103259SMichael Clark static uint32_t operand_cimmlwsp(rv_inst inst)
4040ea103259SMichael Clark {
4041ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4042ea103259SMichael Clark         ((inst << 57) >> 61) << 2 |
4043ea103259SMichael Clark         ((inst << 60) >> 62) << 6;
4044ea103259SMichael Clark }
4045ea103259SMichael Clark 
4046ea103259SMichael Clark static uint32_t operand_cimmldsp(rv_inst inst)
4047ea103259SMichael Clark {
4048ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4049ea103259SMichael Clark         ((inst << 57) >> 62) << 3 |
4050ea103259SMichael Clark         ((inst << 59) >> 61) << 6;
4051ea103259SMichael Clark }
4052ea103259SMichael Clark 
4053ea103259SMichael Clark static uint32_t operand_cimmlqsp(rv_inst inst)
4054ea103259SMichael Clark {
4055ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4056ea103259SMichael Clark         ((inst << 57) >> 63) << 4 |
4057ea103259SMichael Clark         ((inst << 58) >> 60) << 6;
4058ea103259SMichael Clark }
4059ea103259SMichael Clark 
4060ea103259SMichael Clark static int32_t operand_cimm16sp(rv_inst inst)
4061ea103259SMichael Clark {
4062ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 9 |
4063ea103259SMichael Clark         ((inst << 57) >> 63) << 4 |
4064ea103259SMichael Clark         ((inst << 58) >> 63) << 6 |
4065ea103259SMichael Clark         ((inst << 59) >> 62) << 7 |
4066ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4067ea103259SMichael Clark }
4068ea103259SMichael Clark 
4069ea103259SMichael Clark static int32_t operand_cimmj(rv_inst inst)
4070ea103259SMichael Clark {
4071ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 11 |
4072ea103259SMichael Clark         ((inst << 52) >> 63) << 4 |
4073ea103259SMichael Clark         ((inst << 53) >> 62) << 8 |
4074ea103259SMichael Clark         ((inst << 55) >> 63) << 10 |
4075ea103259SMichael Clark         ((inst << 56) >> 63) << 6 |
4076ea103259SMichael Clark         ((inst << 57) >> 63) << 7 |
4077ea103259SMichael Clark         ((inst << 58) >> 61) << 1 |
4078ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4079ea103259SMichael Clark }
4080ea103259SMichael Clark 
4081ea103259SMichael Clark static int32_t operand_cimmb(rv_inst inst)
4082ea103259SMichael Clark {
4083ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 8 |
4084ea103259SMichael Clark         ((inst << 52) >> 62) << 3 |
4085ea103259SMichael Clark         ((inst << 57) >> 62) << 6 |
4086ea103259SMichael Clark         ((inst << 59) >> 62) << 1 |
4087ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4088ea103259SMichael Clark }
4089ea103259SMichael Clark 
4090ea103259SMichael Clark static uint32_t operand_cimmswsp(rv_inst inst)
4091ea103259SMichael Clark {
4092ea103259SMichael Clark     return ((inst << 51) >> 60) << 2 |
4093ea103259SMichael Clark         ((inst << 55) >> 62) << 6;
4094ea103259SMichael Clark }
4095ea103259SMichael Clark 
4096ea103259SMichael Clark static uint32_t operand_cimmsdsp(rv_inst inst)
4097ea103259SMichael Clark {
4098ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4099ea103259SMichael Clark         ((inst << 54) >> 61) << 6;
4100ea103259SMichael Clark }
4101ea103259SMichael Clark 
4102ea103259SMichael Clark static uint32_t operand_cimmsqsp(rv_inst inst)
4103ea103259SMichael Clark {
4104ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4105ea103259SMichael Clark         ((inst << 53) >> 60) << 6;
4106ea103259SMichael Clark }
4107ea103259SMichael Clark 
4108ea103259SMichael Clark static uint32_t operand_cimm4spn(rv_inst inst)
4109ea103259SMichael Clark {
4110ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4111ea103259SMichael Clark         ((inst << 53) >> 60) << 6 |
4112ea103259SMichael Clark         ((inst << 57) >> 63) << 2 |
4113ea103259SMichael Clark         ((inst << 58) >> 63) << 3;
4114ea103259SMichael Clark }
4115ea103259SMichael Clark 
4116ea103259SMichael Clark static uint32_t operand_cimmw(rv_inst inst)
4117ea103259SMichael Clark {
4118ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4119ea103259SMichael Clark         ((inst << 57) >> 63) << 2 |
4120ea103259SMichael Clark         ((inst << 58) >> 63) << 6;
4121ea103259SMichael Clark }
4122ea103259SMichael Clark 
4123ea103259SMichael Clark static uint32_t operand_cimmd(rv_inst inst)
4124ea103259SMichael Clark {
4125ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4126ea103259SMichael Clark         ((inst << 57) >> 62) << 6;
4127ea103259SMichael Clark }
4128ea103259SMichael Clark 
4129ea103259SMichael Clark static uint32_t operand_cimmq(rv_inst inst)
4130ea103259SMichael Clark {
4131ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4132ea103259SMichael Clark         ((inst << 53) >> 63) << 8 |
4133ea103259SMichael Clark         ((inst << 57) >> 62) << 6;
4134ea103259SMichael Clark }
4135ea103259SMichael Clark 
413607f4964dSYang Liu static uint32_t operand_vimm(rv_inst inst)
413707f4964dSYang Liu {
413807f4964dSYang Liu     return (int64_t)(inst << 44) >> 59;
413907f4964dSYang Liu }
414007f4964dSYang Liu 
414107f4964dSYang Liu static uint32_t operand_vzimm11(rv_inst inst)
414207f4964dSYang Liu {
414307f4964dSYang Liu     return (inst << 33) >> 53;
414407f4964dSYang Liu }
414507f4964dSYang Liu 
414607f4964dSYang Liu static uint32_t operand_vzimm10(rv_inst inst)
414707f4964dSYang Liu {
414807f4964dSYang Liu     return (inst << 34) >> 54;
414907f4964dSYang Liu }
415007f4964dSYang Liu 
4151434c609bSMax Chou static uint32_t operand_vzimm6(rv_inst inst)
4152434c609bSMax Chou {
4153434c609bSMax Chou     return ((inst << 37) >> 63) << 5 |
4154434c609bSMax Chou         ((inst << 44) >> 59);
4155434c609bSMax Chou }
4156434c609bSMax Chou 
41575748c886SWeiwei Li static uint32_t operand_bs(rv_inst inst)
41585748c886SWeiwei Li {
41595748c886SWeiwei Li     return (inst << 32) >> 62;
41605748c886SWeiwei Li }
41615748c886SWeiwei Li 
41625748c886SWeiwei Li static uint32_t operand_rnum(rv_inst inst)
41635748c886SWeiwei Li {
41645748c886SWeiwei Li     return (inst << 40) >> 60;
41655748c886SWeiwei Li }
41665748c886SWeiwei Li 
416707f4964dSYang Liu static uint32_t operand_vm(rv_inst inst)
416807f4964dSYang Liu {
416907f4964dSYang Liu     return (inst << 38) >> 63;
417007f4964dSYang Liu }
417107f4964dSYang Liu 
41722c71d02eSWeiwei Li static uint32_t operand_uimm_c_lb(rv_inst inst)
41732c71d02eSWeiwei Li {
41742c71d02eSWeiwei Li     return (((inst << 58) >> 63) << 1) |
41752c71d02eSWeiwei Li         ((inst << 57) >> 63);
41762c71d02eSWeiwei Li }
41772c71d02eSWeiwei Li 
41782c71d02eSWeiwei Li static uint32_t operand_uimm_c_lh(rv_inst inst)
41792c71d02eSWeiwei Li {
41802c71d02eSWeiwei Li     return (((inst << 58) >> 63) << 1);
41812c71d02eSWeiwei Li }
41822c71d02eSWeiwei Li 
41832c71d02eSWeiwei Li static uint32_t operand_zcmp_spimm(rv_inst inst)
41842c71d02eSWeiwei Li {
41852c71d02eSWeiwei Li     return ((inst << 60) >> 62) << 4;
41862c71d02eSWeiwei Li }
41872c71d02eSWeiwei Li 
41882c71d02eSWeiwei Li static uint32_t operand_zcmp_rlist(rv_inst inst)
41892c71d02eSWeiwei Li {
41902c71d02eSWeiwei Li     return ((inst << 56) >> 60);
41912c71d02eSWeiwei Li }
41922c71d02eSWeiwei Li 
4193318df723SChristoph Müllner static uint32_t operand_imm6(rv_inst inst)
4194318df723SChristoph Müllner {
4195318df723SChristoph Müllner     return (inst << 38) >> 60;
4196318df723SChristoph Müllner }
4197318df723SChristoph Müllner 
4198318df723SChristoph Müllner static uint32_t operand_imm2(rv_inst inst)
4199318df723SChristoph Müllner {
4200318df723SChristoph Müllner     return (inst << 37) >> 62;
4201318df723SChristoph Müllner }
4202318df723SChristoph Müllner 
4203318df723SChristoph Müllner static uint32_t operand_immh(rv_inst inst)
4204318df723SChristoph Müllner {
4205318df723SChristoph Müllner     return (inst << 32) >> 58;
4206318df723SChristoph Müllner }
4207318df723SChristoph Müllner 
4208318df723SChristoph Müllner static uint32_t operand_imml(rv_inst inst)
4209318df723SChristoph Müllner {
4210318df723SChristoph Müllner     return (inst << 38) >> 58;
4211318df723SChristoph Müllner }
4212318df723SChristoph Müllner 
42132c71d02eSWeiwei Li static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t spimm)
42142c71d02eSWeiwei Li {
42152c71d02eSWeiwei Li     int xlen_bytes_log2 = isa == rv64 ? 3 : 2;
42162c71d02eSWeiwei Li     int regs = rlist == 15 ? 13 : rlist - 3;
42172c71d02eSWeiwei Li     uint32_t stack_adj_base = ROUND_UP(regs << xlen_bytes_log2, 16);
42182c71d02eSWeiwei Li     return stack_adj_base + spimm;
42192c71d02eSWeiwei Li }
42202c71d02eSWeiwei Li 
42212c71d02eSWeiwei Li static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa)
42222c71d02eSWeiwei Li {
42232c71d02eSWeiwei Li     return calculate_stack_adj(isa, operand_zcmp_rlist(inst),
42242c71d02eSWeiwei Li                                operand_zcmp_spimm(inst));
42252c71d02eSWeiwei Li }
42262c71d02eSWeiwei Li 
42272c71d02eSWeiwei Li static uint32_t operand_tbl_index(rv_inst inst)
42282c71d02eSWeiwei Li {
42292c71d02eSWeiwei Li     return ((inst << 54) >> 56);
42302c71d02eSWeiwei Li }
42312c71d02eSWeiwei Li 
4232ea103259SMichael Clark /* decode operands */
4233ea103259SMichael Clark 
423433632775SFrédéric Pétrot static void decode_inst_operands(rv_decode *dec, rv_isa isa)
4235ea103259SMichael Clark {
4236fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
4237ea103259SMichael Clark     rv_inst inst = dec->inst;
4238ea103259SMichael Clark     dec->codec = opcode_data[dec->op].codec;
4239ea103259SMichael Clark     switch (dec->codec) {
4240ea103259SMichael Clark     case rv_codec_none:
4241ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4242ea103259SMichael Clark         dec->imm = 0;
4243ea103259SMichael Clark         break;
4244ea103259SMichael Clark     case rv_codec_u:
4245ea103259SMichael Clark         dec->rd = operand_rd(inst);
4246ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4247ea103259SMichael Clark         dec->imm = operand_imm20(inst);
4248ea103259SMichael Clark         break;
4249ea103259SMichael Clark     case rv_codec_uj:
4250ea103259SMichael Clark         dec->rd = operand_rd(inst);
4251ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4252ea103259SMichael Clark         dec->imm = operand_jimm20(inst);
4253ea103259SMichael Clark         break;
4254ea103259SMichael Clark     case rv_codec_i:
4255ea103259SMichael Clark         dec->rd = operand_rd(inst);
4256ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4257ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4258ea103259SMichael Clark         dec->imm = operand_imm12(inst);
4259ea103259SMichael Clark         break;
4260ea103259SMichael Clark     case rv_codec_i_sh5:
4261ea103259SMichael Clark         dec->rd = operand_rd(inst);
4262ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4263ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4264ea103259SMichael Clark         dec->imm = operand_shamt5(inst);
4265ea103259SMichael Clark         break;
4266ea103259SMichael Clark     case rv_codec_i_sh6:
4267ea103259SMichael Clark         dec->rd = operand_rd(inst);
4268ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4269ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4270ea103259SMichael Clark         dec->imm = operand_shamt6(inst);
4271ea103259SMichael Clark         break;
4272ea103259SMichael Clark     case rv_codec_i_sh7:
4273ea103259SMichael Clark         dec->rd = operand_rd(inst);
4274ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4275ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4276ea103259SMichael Clark         dec->imm = operand_shamt7(inst);
4277ea103259SMichael Clark         break;
4278ea103259SMichael Clark     case rv_codec_i_csr:
4279ea103259SMichael Clark         dec->rd = operand_rd(inst);
4280ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4281ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4282ea103259SMichael Clark         dec->imm = operand_csr12(inst);
4283ea103259SMichael Clark         break;
4284ea103259SMichael Clark     case rv_codec_s:
4285ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4286ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4287ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4288ea103259SMichael Clark         dec->imm = operand_simm12(inst);
4289ea103259SMichael Clark         break;
4290ea103259SMichael Clark     case rv_codec_sb:
4291ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4292ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4293ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4294ea103259SMichael Clark         dec->imm = operand_sbimm12(inst);
4295ea103259SMichael Clark         break;
4296ea103259SMichael Clark     case rv_codec_r:
4297ea103259SMichael Clark         dec->rd = operand_rd(inst);
4298ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4299ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4300ea103259SMichael Clark         dec->imm = 0;
4301ea103259SMichael Clark         break;
4302ea103259SMichael Clark     case rv_codec_r_m:
4303ea103259SMichael Clark         dec->rd = operand_rd(inst);
4304ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4305ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4306ea103259SMichael Clark         dec->imm = 0;
4307ea103259SMichael Clark         dec->rm = operand_rm(inst);
4308ea103259SMichael Clark         break;
4309ea103259SMichael Clark     case rv_codec_r4_m:
4310ea103259SMichael Clark         dec->rd = operand_rd(inst);
4311ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4312ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4313ea103259SMichael Clark         dec->rs3 = operand_rs3(inst);
4314ea103259SMichael Clark         dec->imm = 0;
4315ea103259SMichael Clark         dec->rm = operand_rm(inst);
4316ea103259SMichael Clark         break;
4317ea103259SMichael Clark     case rv_codec_r_a:
4318ea103259SMichael Clark         dec->rd = operand_rd(inst);
4319ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4320ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4321ea103259SMichael Clark         dec->imm = 0;
4322ea103259SMichael Clark         dec->aq = operand_aq(inst);
4323ea103259SMichael Clark         dec->rl = operand_rl(inst);
4324ea103259SMichael Clark         break;
4325ea103259SMichael Clark     case rv_codec_r_l:
4326ea103259SMichael Clark         dec->rd = operand_rd(inst);
4327ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4328ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4329ea103259SMichael Clark         dec->imm = 0;
4330ea103259SMichael Clark         dec->aq = operand_aq(inst);
4331ea103259SMichael Clark         dec->rl = operand_rl(inst);
4332ea103259SMichael Clark         break;
4333ea103259SMichael Clark     case rv_codec_r_f:
4334ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4335ea103259SMichael Clark         dec->pred = operand_pred(inst);
4336ea103259SMichael Clark         dec->succ = operand_succ(inst);
4337ea103259SMichael Clark         dec->imm = 0;
4338ea103259SMichael Clark         break;
4339ea103259SMichael Clark     case rv_codec_cb:
4340ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4341ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4342ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4343ea103259SMichael Clark         dec->imm = operand_cimmb(inst);
4344ea103259SMichael Clark         break;
4345ea103259SMichael Clark     case rv_codec_cb_imm:
4346ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4347ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4348ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4349ea103259SMichael Clark         break;
4350ea103259SMichael Clark     case rv_codec_cb_sh5:
4351ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4352ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4353ea103259SMichael Clark         dec->imm = operand_cimmsh5(inst);
4354ea103259SMichael Clark         break;
4355ea103259SMichael Clark     case rv_codec_cb_sh6:
4356ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4357ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
435833632775SFrédéric Pétrot         dec->imm = operand_cimmshr6(inst, isa);
4359ea103259SMichael Clark         break;
4360ea103259SMichael Clark     case rv_codec_ci:
4361ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4362ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4363ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4364ea103259SMichael Clark         break;
4365ea103259SMichael Clark     case rv_codec_ci_sh5:
4366ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4367ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4368ea103259SMichael Clark         dec->imm = operand_cimmsh5(inst);
4369ea103259SMichael Clark         break;
4370ea103259SMichael Clark     case rv_codec_ci_sh6:
4371ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4372ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
437333632775SFrédéric Pétrot         dec->imm = operand_cimmshl6(inst, isa);
4374ea103259SMichael Clark         break;
4375ea103259SMichael Clark     case rv_codec_ci_16sp:
4376ea103259SMichael Clark         dec->rd = rv_ireg_sp;
4377ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4378ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4379ea103259SMichael Clark         dec->imm = operand_cimm16sp(inst);
4380ea103259SMichael Clark         break;
4381ea103259SMichael Clark     case rv_codec_ci_lwsp:
4382ea103259SMichael Clark         dec->rd = operand_crd(inst);
4383ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4384ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4385ea103259SMichael Clark         dec->imm = operand_cimmlwsp(inst);
4386ea103259SMichael Clark         break;
4387ea103259SMichael Clark     case rv_codec_ci_ldsp:
4388ea103259SMichael Clark         dec->rd = operand_crd(inst);
4389ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4390ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4391ea103259SMichael Clark         dec->imm = operand_cimmldsp(inst);
4392ea103259SMichael Clark         break;
4393ea103259SMichael Clark     case rv_codec_ci_lqsp:
4394ea103259SMichael Clark         dec->rd = operand_crd(inst);
4395ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4396ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4397ea103259SMichael Clark         dec->imm = operand_cimmlqsp(inst);
4398ea103259SMichael Clark         break;
4399ea103259SMichael Clark     case rv_codec_ci_li:
4400ea103259SMichael Clark         dec->rd = operand_crd(inst);
4401ea103259SMichael Clark         dec->rs1 = rv_ireg_zero;
4402ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4403ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4404ea103259SMichael Clark         break;
4405ea103259SMichael Clark     case rv_codec_ci_lui:
4406ea103259SMichael Clark         dec->rd = operand_crd(inst);
4407ea103259SMichael Clark         dec->rs1 = rv_ireg_zero;
4408ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4409ea103259SMichael Clark         dec->imm = operand_cimmui(inst);
4410ea103259SMichael Clark         break;
4411ea103259SMichael Clark     case rv_codec_ci_none:
4412ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4413ea103259SMichael Clark         dec->imm = 0;
4414ea103259SMichael Clark         break;
4415ea103259SMichael Clark     case rv_codec_ciw_4spn:
4416ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4417ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4418ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4419ea103259SMichael Clark         dec->imm = operand_cimm4spn(inst);
4420ea103259SMichael Clark         break;
4421ea103259SMichael Clark     case rv_codec_cj:
4422ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4423ea103259SMichael Clark         dec->imm = operand_cimmj(inst);
4424ea103259SMichael Clark         break;
4425ea103259SMichael Clark     case rv_codec_cj_jal:
4426ea103259SMichael Clark         dec->rd = rv_ireg_ra;
4427ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4428ea103259SMichael Clark         dec->imm = operand_cimmj(inst);
4429ea103259SMichael Clark         break;
4430ea103259SMichael Clark     case rv_codec_cl_lw:
4431ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4432ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4433ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4434ea103259SMichael Clark         dec->imm = operand_cimmw(inst);
4435ea103259SMichael Clark         break;
4436ea103259SMichael Clark     case rv_codec_cl_ld:
4437ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4438ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4439ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4440ea103259SMichael Clark         dec->imm = operand_cimmd(inst);
4441ea103259SMichael Clark         break;
4442ea103259SMichael Clark     case rv_codec_cl_lq:
4443ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4444ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4445ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4446ea103259SMichael Clark         dec->imm = operand_cimmq(inst);
4447ea103259SMichael Clark         break;
4448ea103259SMichael Clark     case rv_codec_cr:
4449ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4450ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4451ea103259SMichael Clark         dec->imm = 0;
4452ea103259SMichael Clark         break;
4453ea103259SMichael Clark     case rv_codec_cr_mv:
4454ea103259SMichael Clark         dec->rd = operand_crd(inst);
4455ea103259SMichael Clark         dec->rs1 = operand_crs2(inst);
4456ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4457ea103259SMichael Clark         dec->imm = 0;
4458ea103259SMichael Clark         break;
4459ea103259SMichael Clark     case rv_codec_cr_jalr:
4460ea103259SMichael Clark         dec->rd = rv_ireg_ra;
4461ea103259SMichael Clark         dec->rs1 = operand_crs1(inst);
4462ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4463ea103259SMichael Clark         dec->imm = 0;
4464ea103259SMichael Clark         break;
4465ea103259SMichael Clark     case rv_codec_cr_jr:
4466ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4467ea103259SMichael Clark         dec->rs1 = operand_crs1(inst);
4468ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4469ea103259SMichael Clark         dec->imm = 0;
4470ea103259SMichael Clark         break;
4471ea103259SMichael Clark     case rv_codec_cs:
4472ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4473ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4474ea103259SMichael Clark         dec->imm = 0;
4475ea103259SMichael Clark         break;
4476ea103259SMichael Clark     case rv_codec_cs_sw:
4477ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4478ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4479ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4480ea103259SMichael Clark         dec->imm = operand_cimmw(inst);
4481ea103259SMichael Clark         break;
4482ea103259SMichael Clark     case rv_codec_cs_sd:
4483ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4484ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4485ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4486ea103259SMichael Clark         dec->imm = operand_cimmd(inst);
4487ea103259SMichael Clark         break;
4488ea103259SMichael Clark     case rv_codec_cs_sq:
4489ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4490ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4491ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4492ea103259SMichael Clark         dec->imm = operand_cimmq(inst);
4493ea103259SMichael Clark         break;
4494ea103259SMichael Clark     case rv_codec_css_swsp:
4495ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4496ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4497ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4498ea103259SMichael Clark         dec->imm = operand_cimmswsp(inst);
4499ea103259SMichael Clark         break;
4500ea103259SMichael Clark     case rv_codec_css_sdsp:
4501ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4502ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4503ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4504ea103259SMichael Clark         dec->imm = operand_cimmsdsp(inst);
4505ea103259SMichael Clark         break;
4506ea103259SMichael Clark     case rv_codec_css_sqsp:
4507ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4508ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4509ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4510ea103259SMichael Clark         dec->imm = operand_cimmsqsp(inst);
4511ea103259SMichael Clark         break;
45125748c886SWeiwei Li     case rv_codec_k_bs:
45135748c886SWeiwei Li         dec->rs1 = operand_rs1(inst);
45145748c886SWeiwei Li         dec->rs2 = operand_rs2(inst);
45155748c886SWeiwei Li         dec->bs = operand_bs(inst);
45165748c886SWeiwei Li         break;
45175748c886SWeiwei Li     case rv_codec_k_rnum:
45185748c886SWeiwei Li         dec->rd = operand_rd(inst);
45195748c886SWeiwei Li         dec->rs1 = operand_rs1(inst);
45205748c886SWeiwei Li         dec->rnum = operand_rnum(inst);
45215748c886SWeiwei Li         break;
452207f4964dSYang Liu     case rv_codec_v_r:
452307f4964dSYang Liu         dec->rd = operand_rd(inst);
452407f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
452507f4964dSYang Liu         dec->rs2 = operand_rs2(inst);
452607f4964dSYang Liu         dec->vm = operand_vm(inst);
452707f4964dSYang Liu         break;
452807f4964dSYang Liu     case rv_codec_v_ldst:
452907f4964dSYang Liu         dec->rd = operand_rd(inst);
453007f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
453107f4964dSYang Liu         dec->vm = operand_vm(inst);
453207f4964dSYang Liu         break;
453307f4964dSYang Liu     case rv_codec_v_i:
453407f4964dSYang Liu         dec->rd = operand_rd(inst);
453507f4964dSYang Liu         dec->rs2 = operand_rs2(inst);
453607f4964dSYang Liu         dec->imm = operand_vimm(inst);
453707f4964dSYang Liu         dec->vm = operand_vm(inst);
453807f4964dSYang Liu         break;
4539434c609bSMax Chou     case rv_codec_vror_vi:
4540434c609bSMax Chou         dec->rd = operand_rd(inst);
4541434c609bSMax Chou         dec->rs2 = operand_rs2(inst);
4542434c609bSMax Chou         dec->imm = operand_vzimm6(inst);
4543434c609bSMax Chou         dec->vm = operand_vm(inst);
4544434c609bSMax Chou         break;
454507f4964dSYang Liu     case rv_codec_vsetvli:
454607f4964dSYang Liu         dec->rd = operand_rd(inst);
454707f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
454807f4964dSYang Liu         dec->vzimm = operand_vzimm11(inst);
454907f4964dSYang Liu         break;
455007f4964dSYang Liu     case rv_codec_vsetivli:
455107f4964dSYang Liu         dec->rd = operand_rd(inst);
455207f4964dSYang Liu         dec->imm = operand_vimm(inst);
455307f4964dSYang Liu         dec->vzimm = operand_vzimm10(inst);
455407f4964dSYang Liu         break;
45552c71d02eSWeiwei Li     case rv_codec_zcb_lb:
45562c71d02eSWeiwei Li         dec->rs1 = operand_crs1q(inst) + 8;
45572c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
45582c71d02eSWeiwei Li         dec->imm = operand_uimm_c_lb(inst);
45592c71d02eSWeiwei Li         break;
45602c71d02eSWeiwei Li     case rv_codec_zcb_lh:
45612c71d02eSWeiwei Li         dec->rs1 = operand_crs1q(inst) + 8;
45622c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
45632c71d02eSWeiwei Li         dec->imm = operand_uimm_c_lh(inst);
45642c71d02eSWeiwei Li         break;
45652c71d02eSWeiwei Li     case rv_codec_zcb_ext:
45662c71d02eSWeiwei Li         dec->rd = operand_crs1q(inst) + 8;
45672c71d02eSWeiwei Li         break;
45682c71d02eSWeiwei Li     case rv_codec_zcb_mul:
45692c71d02eSWeiwei Li         dec->rd = operand_crs1rdq(inst) + 8;
45702c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
45712c71d02eSWeiwei Li         break;
45722c71d02eSWeiwei Li     case rv_codec_zcmp_cm_pushpop:
45732c71d02eSWeiwei Li         dec->imm = operand_zcmp_stack_adj(inst, isa);
45742c71d02eSWeiwei Li         dec->rlist = operand_zcmp_rlist(inst);
45752c71d02eSWeiwei Li         break;
45762c71d02eSWeiwei Li     case rv_codec_zcmp_cm_mv:
45772c71d02eSWeiwei Li         dec->rd = operand_sreg1(inst);
45782c71d02eSWeiwei Li         dec->rs2 = operand_sreg2(inst);
45792c71d02eSWeiwei Li         break;
45802c71d02eSWeiwei Li     case rv_codec_zcmt_jt:
45812c71d02eSWeiwei Li         dec->imm = operand_tbl_index(inst);
45822c71d02eSWeiwei Li 	break;
4583a47842d1SChristoph Müllner     case rv_codec_fli:
4584a47842d1SChristoph Müllner         dec->rd = operand_rd(inst);
4585a47842d1SChristoph Müllner         dec->imm = operand_rs1(inst);
4586a47842d1SChristoph Müllner         break;
4587318df723SChristoph Müllner     case rv_codec_r2_imm5:
4588318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4589318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4590318df723SChristoph Müllner         dec->imm = operand_rs2(inst);
4591318df723SChristoph Müllner         break;
4592318df723SChristoph Müllner     case rv_codec_r2:
4593318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4594318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4595318df723SChristoph Müllner         break;
4596318df723SChristoph Müllner     case rv_codec_r2_imm6:
4597318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4598318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4599318df723SChristoph Müllner         dec->imm = operand_imm6(inst);
4600318df723SChristoph Müllner         break;
4601318df723SChristoph Müllner     case rv_codec_r_imm2:
4602318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4603318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4604318df723SChristoph Müllner         dec->rs2 = operand_rs2(inst);
4605318df723SChristoph Müllner         dec->imm = operand_imm2(inst);
4606318df723SChristoph Müllner         break;
4607318df723SChristoph Müllner     case rv_codec_r2_immhl:
4608318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4609318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4610318df723SChristoph Müllner         dec->imm = operand_immh(inst);
4611318df723SChristoph Müllner         dec->imm1 = operand_imml(inst);
4612318df723SChristoph Müllner         break;
4613318df723SChristoph Müllner     case rv_codec_r2_imm2_imm5:
4614318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4615318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4616318df723SChristoph Müllner         dec->imm = sextract32(operand_rs2(inst), 0, 5);
4617318df723SChristoph Müllner         dec->imm1 = operand_imm2(inst);
4618318df723SChristoph Müllner         break;
4619ea103259SMichael Clark     };
4620ea103259SMichael Clark }
4621ea103259SMichael Clark 
4622ea103259SMichael Clark /* check constraint */
4623ea103259SMichael Clark 
4624ea103259SMichael Clark static bool check_constraints(rv_decode *dec, const rvc_constraint *c)
4625ea103259SMichael Clark {
4626ea103259SMichael Clark     int32_t imm = dec->imm;
4627ea103259SMichael Clark     uint8_t rd = dec->rd, rs1 = dec->rs1, rs2 = dec->rs2;
4628ea103259SMichael Clark     while (*c != rvc_end) {
4629ea103259SMichael Clark         switch (*c) {
4630ea103259SMichael Clark         case rvc_rd_eq_ra:
4631ea103259SMichael Clark             if (!(rd == 1)) {
4632ea103259SMichael Clark                 return false;
4633ea103259SMichael Clark             }
4634ea103259SMichael Clark             break;
4635ea103259SMichael Clark         case rvc_rd_eq_x0:
4636ea103259SMichael Clark             if (!(rd == 0)) {
4637ea103259SMichael Clark                 return false;
4638ea103259SMichael Clark             }
4639ea103259SMichael Clark             break;
4640ea103259SMichael Clark         case rvc_rs1_eq_x0:
4641ea103259SMichael Clark             if (!(rs1 == 0)) {
4642ea103259SMichael Clark                 return false;
4643ea103259SMichael Clark             }
4644ea103259SMichael Clark             break;
4645ea103259SMichael Clark         case rvc_rs2_eq_x0:
4646ea103259SMichael Clark             if (!(rs2 == 0)) {
4647ea103259SMichael Clark                 return false;
4648ea103259SMichael Clark             }
4649ea103259SMichael Clark             break;
4650ea103259SMichael Clark         case rvc_rs2_eq_rs1:
4651ea103259SMichael Clark             if (!(rs2 == rs1)) {
4652ea103259SMichael Clark                 return false;
4653ea103259SMichael Clark             }
4654ea103259SMichael Clark             break;
4655ea103259SMichael Clark         case rvc_rs1_eq_ra:
4656ea103259SMichael Clark             if (!(rs1 == 1)) {
4657ea103259SMichael Clark                 return false;
4658ea103259SMichael Clark             }
4659ea103259SMichael Clark             break;
4660ea103259SMichael Clark         case rvc_imm_eq_zero:
4661ea103259SMichael Clark             if (!(imm == 0)) {
4662ea103259SMichael Clark                 return false;
4663ea103259SMichael Clark             }
4664ea103259SMichael Clark             break;
4665ea103259SMichael Clark         case rvc_imm_eq_n1:
4666ea103259SMichael Clark             if (!(imm == -1)) {
4667ea103259SMichael Clark                 return false;
4668ea103259SMichael Clark             }
4669ea103259SMichael Clark             break;
4670ea103259SMichael Clark         case rvc_imm_eq_p1:
4671ea103259SMichael Clark             if (!(imm == 1)) {
4672ea103259SMichael Clark                 return false;
4673ea103259SMichael Clark             }
4674ea103259SMichael Clark             break;
4675ea103259SMichael Clark         case rvc_csr_eq_0x001:
4676ea103259SMichael Clark             if (!(imm == 0x001)) {
4677ea103259SMichael Clark                 return false;
4678ea103259SMichael Clark             }
4679ea103259SMichael Clark             break;
4680ea103259SMichael Clark         case rvc_csr_eq_0x002:
4681ea103259SMichael Clark             if (!(imm == 0x002)) {
4682ea103259SMichael Clark                 return false;
4683ea103259SMichael Clark             }
4684ea103259SMichael Clark             break;
4685ea103259SMichael Clark         case rvc_csr_eq_0x003:
4686ea103259SMichael Clark             if (!(imm == 0x003)) {
4687ea103259SMichael Clark                 return false;
4688ea103259SMichael Clark             }
4689ea103259SMichael Clark             break;
4690ea103259SMichael Clark         case rvc_csr_eq_0xc00:
4691ea103259SMichael Clark             if (!(imm == 0xc00)) {
4692ea103259SMichael Clark                 return false;
4693ea103259SMichael Clark             }
4694ea103259SMichael Clark             break;
4695ea103259SMichael Clark         case rvc_csr_eq_0xc01:
4696ea103259SMichael Clark             if (!(imm == 0xc01)) {
4697ea103259SMichael Clark                 return false;
4698ea103259SMichael Clark             }
4699ea103259SMichael Clark             break;
4700ea103259SMichael Clark         case rvc_csr_eq_0xc02:
4701ea103259SMichael Clark             if (!(imm == 0xc02)) {
4702ea103259SMichael Clark                 return false;
4703ea103259SMichael Clark             }
4704ea103259SMichael Clark             break;
4705ea103259SMichael Clark         case rvc_csr_eq_0xc80:
4706ea103259SMichael Clark             if (!(imm == 0xc80)) {
4707ea103259SMichael Clark                 return false;
4708ea103259SMichael Clark             }
4709ea103259SMichael Clark             break;
4710ea103259SMichael Clark         case rvc_csr_eq_0xc81:
4711ea103259SMichael Clark             if (!(imm == 0xc81)) {
4712ea103259SMichael Clark                 return false;
4713ea103259SMichael Clark             }
4714ea103259SMichael Clark             break;
4715ea103259SMichael Clark         case rvc_csr_eq_0xc82:
4716ea103259SMichael Clark             if (!(imm == 0xc82)) {
4717ea103259SMichael Clark                 return false;
4718ea103259SMichael Clark             }
4719ea103259SMichael Clark             break;
4720ea103259SMichael Clark         default: break;
4721ea103259SMichael Clark         }
4722ea103259SMichael Clark         c++;
4723ea103259SMichael Clark     }
4724ea103259SMichael Clark     return true;
4725ea103259SMichael Clark }
4726ea103259SMichael Clark 
4727ea103259SMichael Clark /* instruction length */
4728ea103259SMichael Clark 
4729ea103259SMichael Clark static size_t inst_length(rv_inst inst)
4730ea103259SMichael Clark {
4731ea103259SMichael Clark     /* NOTE: supports maximum instruction size of 64-bits */
4732ea103259SMichael Clark 
47333bd87176SWeiwei Li     /*
47343bd87176SWeiwei Li      * instruction length coding
4735ea103259SMichael Clark      *
4736ea103259SMichael Clark      *      aa - 16 bit aa != 11
4737ea103259SMichael Clark      *   bbb11 - 32 bit bbb != 111
4738ea103259SMichael Clark      *  011111 - 48 bit
4739ea103259SMichael Clark      * 0111111 - 64 bit
4740ea103259SMichael Clark      */
4741ea103259SMichael Clark 
4742ea103259SMichael Clark     return (inst &      0b11) != 0b11      ? 2
4743ea103259SMichael Clark          : (inst &   0b11100) != 0b11100   ? 4
4744ea103259SMichael Clark          : (inst &  0b111111) == 0b011111  ? 6
4745ea103259SMichael Clark          : (inst & 0b1111111) == 0b0111111 ? 8
4746ea103259SMichael Clark          : 0;
4747ea103259SMichael Clark }
4748ea103259SMichael Clark 
4749ea103259SMichael Clark /* format instruction */
4750ea103259SMichael Clark 
4751ea103259SMichael Clark static void append(char *s1, const char *s2, size_t n)
4752ea103259SMichael Clark {
4753ea103259SMichael Clark     size_t l1 = strlen(s1);
4754ea103259SMichael Clark     if (n - l1 - 1 > 0) {
4755ea103259SMichael Clark         strncat(s1, s2, n - l1);
4756ea103259SMichael Clark     }
4757ea103259SMichael Clark }
4758ea103259SMichael Clark 
4759ea103259SMichael Clark static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
4760ea103259SMichael Clark {
4761fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
4762ea103259SMichael Clark     char tmp[64];
4763ea103259SMichael Clark     const char *fmt;
4764ea103259SMichael Clark 
4765ea103259SMichael Clark     fmt = opcode_data[dec->op].format;
4766ea103259SMichael Clark     while (*fmt) {
4767ea103259SMichael Clark         switch (*fmt) {
4768ea103259SMichael Clark         case 'O':
4769ea103259SMichael Clark             append(buf, opcode_data[dec->op].name, buflen);
4770ea103259SMichael Clark             break;
4771ea103259SMichael Clark         case '(':
4772ea103259SMichael Clark             append(buf, "(", buflen);
4773ea103259SMichael Clark             break;
4774ea103259SMichael Clark         case ',':
4775ea103259SMichael Clark             append(buf, ",", buflen);
4776ea103259SMichael Clark             break;
4777ea103259SMichael Clark         case ')':
4778ea103259SMichael Clark             append(buf, ")", buflen);
4779ea103259SMichael Clark             break;
47802c71d02eSWeiwei Li         case '-':
47812c71d02eSWeiwei Li             append(buf, "-", buflen);
47822c71d02eSWeiwei Li             break;
47835748c886SWeiwei Li         case 'b':
47845748c886SWeiwei Li             snprintf(tmp, sizeof(tmp), "%d", dec->bs);
47855748c886SWeiwei Li             append(buf, tmp, buflen);
47865748c886SWeiwei Li             break;
47875748c886SWeiwei Li         case 'n':
47885748c886SWeiwei Li             snprintf(tmp, sizeof(tmp), "%d", dec->rnum);
47895748c886SWeiwei Li             append(buf, tmp, buflen);
47905748c886SWeiwei Li             break;
4791ea103259SMichael Clark         case '0':
4792ea103259SMichael Clark             append(buf, rv_ireg_name_sym[dec->rd], buflen);
4793ea103259SMichael Clark             break;
4794ea103259SMichael Clark         case '1':
4795ea103259SMichael Clark             append(buf, rv_ireg_name_sym[dec->rs1], buflen);
4796ea103259SMichael Clark             break;
4797ea103259SMichael Clark         case '2':
4798ea103259SMichael Clark             append(buf, rv_ireg_name_sym[dec->rs2], buflen);
4799ea103259SMichael Clark             break;
4800ea103259SMichael Clark         case '3':
4801c54dab4cSWeiwei Li             append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rd] :
4802c54dab4cSWeiwei Li                                               rv_freg_name_sym[dec->rd],
4803c54dab4cSWeiwei Li                    buflen);
4804ea103259SMichael Clark             break;
4805ea103259SMichael Clark         case '4':
4806c54dab4cSWeiwei Li             append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs1] :
4807c54dab4cSWeiwei Li                                               rv_freg_name_sym[dec->rs1],
4808c54dab4cSWeiwei Li                    buflen);
4809ea103259SMichael Clark             break;
4810ea103259SMichael Clark         case '5':
4811c54dab4cSWeiwei Li             append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs2] :
4812c54dab4cSWeiwei Li                                               rv_freg_name_sym[dec->rs2],
4813c54dab4cSWeiwei Li                    buflen);
4814ea103259SMichael Clark             break;
4815ea103259SMichael Clark         case '6':
4816c54dab4cSWeiwei Li             append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs3] :
4817c54dab4cSWeiwei Li                                               rv_freg_name_sym[dec->rs3],
4818c54dab4cSWeiwei Li                    buflen);
4819ea103259SMichael Clark             break;
4820ea103259SMichael Clark         case '7':
4821ea103259SMichael Clark             snprintf(tmp, sizeof(tmp), "%d", dec->rs1);
4822ea103259SMichael Clark             append(buf, tmp, buflen);
4823ea103259SMichael Clark             break;
4824ea103259SMichael Clark         case 'i':
4825ea103259SMichael Clark             snprintf(tmp, sizeof(tmp), "%d", dec->imm);
4826ea103259SMichael Clark             append(buf, tmp, buflen);
4827ea103259SMichael Clark             break;
482807f4964dSYang Liu         case 'u':
4829434c609bSMax Chou             snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b111111));
483007f4964dSYang Liu             append(buf, tmp, buflen);
483107f4964dSYang Liu             break;
4832318df723SChristoph Müllner         case 'j':
4833318df723SChristoph Müllner             snprintf(tmp, sizeof(tmp), "%d", dec->imm1);
4834318df723SChristoph Müllner             append(buf, tmp, buflen);
4835318df723SChristoph Müllner             break;
4836ea103259SMichael Clark         case 'o':
4837ea103259SMichael Clark             snprintf(tmp, sizeof(tmp), "%d", dec->imm);
4838ea103259SMichael Clark             append(buf, tmp, buflen);
4839ea103259SMichael Clark             while (strlen(buf) < tab * 2) {
4840ea103259SMichael Clark                 append(buf, " ", buflen);
4841ea103259SMichael Clark             }
4842ea103259SMichael Clark             snprintf(tmp, sizeof(tmp), "# 0x%" PRIx64,
4843ea103259SMichael Clark                 dec->pc + dec->imm);
4844ea103259SMichael Clark             append(buf, tmp, buflen);
4845ea103259SMichael Clark             break;
484636df75a0SChristoph Müllner         case 'U':
484736df75a0SChristoph Müllner             fmt++;
484836df75a0SChristoph Müllner             snprintf(tmp, sizeof(tmp), "%d", dec->imm >> 12);
484936df75a0SChristoph Müllner             append(buf, tmp, buflen);
485036df75a0SChristoph Müllner             if (*fmt == 'o') {
485136df75a0SChristoph Müllner                 while (strlen(buf) < tab * 2) {
485236df75a0SChristoph Müllner                     append(buf, " ", buflen);
485336df75a0SChristoph Müllner                 }
485436df75a0SChristoph Müllner                 snprintf(tmp, sizeof(tmp), "# 0x%" PRIx64,
485536df75a0SChristoph Müllner                     dec->pc + dec->imm);
485636df75a0SChristoph Müllner                 append(buf, tmp, buflen);
485736df75a0SChristoph Müllner             }
485836df75a0SChristoph Müllner             break;
4859ea103259SMichael Clark         case 'c': {
4860ea103259SMichael Clark             const char *name = csr_name(dec->imm & 0xfff);
4861ea103259SMichael Clark             if (name) {
4862ea103259SMichael Clark                 append(buf, name, buflen);
4863ea103259SMichael Clark             } else {
4864ea103259SMichael Clark                 snprintf(tmp, sizeof(tmp), "0x%03x", dec->imm & 0xfff);
4865ea103259SMichael Clark                 append(buf, tmp, buflen);
4866ea103259SMichael Clark             }
4867ea103259SMichael Clark             break;
4868ea103259SMichael Clark         }
4869ea103259SMichael Clark         case 'r':
4870ea103259SMichael Clark             switch (dec->rm) {
4871ea103259SMichael Clark             case rv_rm_rne:
4872ea103259SMichael Clark                 append(buf, "rne", buflen);
4873ea103259SMichael Clark                 break;
4874ea103259SMichael Clark             case rv_rm_rtz:
4875ea103259SMichael Clark                 append(buf, "rtz", buflen);
4876ea103259SMichael Clark                 break;
4877ea103259SMichael Clark             case rv_rm_rdn:
4878ea103259SMichael Clark                 append(buf, "rdn", buflen);
4879ea103259SMichael Clark                 break;
4880ea103259SMichael Clark             case rv_rm_rup:
4881ea103259SMichael Clark                 append(buf, "rup", buflen);
4882ea103259SMichael Clark                 break;
4883ea103259SMichael Clark             case rv_rm_rmm:
4884ea103259SMichael Clark                 append(buf, "rmm", buflen);
4885ea103259SMichael Clark                 break;
4886ea103259SMichael Clark             case rv_rm_dyn:
4887ea103259SMichael Clark                 append(buf, "dyn", buflen);
4888ea103259SMichael Clark                 break;
4889ea103259SMichael Clark             default:
4890ea103259SMichael Clark                 append(buf, "inv", buflen);
4891ea103259SMichael Clark                 break;
4892ea103259SMichael Clark             }
4893ea103259SMichael Clark             break;
4894ea103259SMichael Clark         case 'p':
4895ea103259SMichael Clark             if (dec->pred & rv_fence_i) {
4896ea103259SMichael Clark                 append(buf, "i", buflen);
4897ea103259SMichael Clark             }
4898ea103259SMichael Clark             if (dec->pred & rv_fence_o) {
4899ea103259SMichael Clark                 append(buf, "o", buflen);
4900ea103259SMichael Clark             }
4901ea103259SMichael Clark             if (dec->pred & rv_fence_r) {
4902ea103259SMichael Clark                 append(buf, "r", buflen);
4903ea103259SMichael Clark             }
4904ea103259SMichael Clark             if (dec->pred & rv_fence_w) {
4905ea103259SMichael Clark                 append(buf, "w", buflen);
4906ea103259SMichael Clark             }
4907ea103259SMichael Clark             break;
4908ea103259SMichael Clark         case 's':
4909ea103259SMichael Clark             if (dec->succ & rv_fence_i) {
4910ea103259SMichael Clark                 append(buf, "i", buflen);
4911ea103259SMichael Clark             }
4912ea103259SMichael Clark             if (dec->succ & rv_fence_o) {
4913ea103259SMichael Clark                 append(buf, "o", buflen);
4914ea103259SMichael Clark             }
4915ea103259SMichael Clark             if (dec->succ & rv_fence_r) {
4916ea103259SMichael Clark                 append(buf, "r", buflen);
4917ea103259SMichael Clark             }
4918ea103259SMichael Clark             if (dec->succ & rv_fence_w) {
4919ea103259SMichael Clark                 append(buf, "w", buflen);
4920ea103259SMichael Clark             }
4921ea103259SMichael Clark             break;
4922ea103259SMichael Clark         case '\t':
4923ea103259SMichael Clark             while (strlen(buf) < tab) {
4924ea103259SMichael Clark                 append(buf, " ", buflen);
4925ea103259SMichael Clark             }
4926ea103259SMichael Clark             break;
4927ea103259SMichael Clark         case 'A':
4928ea103259SMichael Clark             if (dec->aq) {
4929ea103259SMichael Clark                 append(buf, ".aq", buflen);
4930ea103259SMichael Clark             }
4931ea103259SMichael Clark             break;
4932ea103259SMichael Clark         case 'R':
4933ea103259SMichael Clark             if (dec->rl) {
4934ea103259SMichael Clark                 append(buf, ".rl", buflen);
4935ea103259SMichael Clark             }
4936ea103259SMichael Clark             break;
493707f4964dSYang Liu         case 'l':
493807f4964dSYang Liu             append(buf, ",v0", buflen);
493907f4964dSYang Liu             break;
494007f4964dSYang Liu         case 'm':
494107f4964dSYang Liu             if (dec->vm == 0) {
494207f4964dSYang Liu                 append(buf, ",v0.t", buflen);
494307f4964dSYang Liu             }
494407f4964dSYang Liu             break;
494507f4964dSYang Liu         case 'D':
494607f4964dSYang Liu             append(buf, rv_vreg_name_sym[dec->rd], buflen);
494707f4964dSYang Liu             break;
494807f4964dSYang Liu         case 'E':
494907f4964dSYang Liu             append(buf, rv_vreg_name_sym[dec->rs1], buflen);
495007f4964dSYang Liu             break;
495107f4964dSYang Liu         case 'F':
495207f4964dSYang Liu             append(buf, rv_vreg_name_sym[dec->rs2], buflen);
495307f4964dSYang Liu             break;
495407f4964dSYang Liu         case 'G':
495507f4964dSYang Liu             append(buf, rv_vreg_name_sym[dec->rs3], buflen);
495607f4964dSYang Liu             break;
495707f4964dSYang Liu         case 'v': {
495807f4964dSYang Liu             char nbuf[32] = {0};
495907f4964dSYang Liu             const int sew = 1 << (((dec->vzimm >> 3) & 0b111) + 3);
496007f4964dSYang Liu             sprintf(nbuf, "%d", sew);
496107f4964dSYang Liu             const int lmul = dec->vzimm & 0b11;
496207f4964dSYang Liu             const int flmul = (dec->vzimm >> 2) & 1;
496307f4964dSYang Liu             const char *vta = (dec->vzimm >> 6) & 1 ? "ta" : "tu";
496407f4964dSYang Liu             const char *vma = (dec->vzimm >> 7) & 1 ? "ma" : "mu";
496507f4964dSYang Liu             append(buf, "e", buflen);
496607f4964dSYang Liu             append(buf, nbuf, buflen);
496707f4964dSYang Liu             append(buf, ",m", buflen);
496807f4964dSYang Liu             if (flmul) {
496907f4964dSYang Liu                 switch (lmul) {
497007f4964dSYang Liu                 case 3:
497107f4964dSYang Liu                     sprintf(nbuf, "f2");
497207f4964dSYang Liu                     break;
497307f4964dSYang Liu                 case 2:
497407f4964dSYang Liu                     sprintf(nbuf, "f4");
497507f4964dSYang Liu                     break;
497607f4964dSYang Liu                 case 1:
497707f4964dSYang Liu                     sprintf(nbuf, "f8");
497807f4964dSYang Liu                 break;
497907f4964dSYang Liu                 }
498007f4964dSYang Liu                 append(buf, nbuf, buflen);
498107f4964dSYang Liu             } else {
498207f4964dSYang Liu                 sprintf(nbuf, "%d", 1 << lmul);
498307f4964dSYang Liu                 append(buf, nbuf, buflen);
498407f4964dSYang Liu             }
498507f4964dSYang Liu             append(buf, ",", buflen);
498607f4964dSYang Liu             append(buf, vta, buflen);
498707f4964dSYang Liu             append(buf, ",", buflen);
498807f4964dSYang Liu             append(buf, vma, buflen);
498907f4964dSYang Liu             break;
499007f4964dSYang Liu         }
49912c71d02eSWeiwei Li         case 'x': {
49922c71d02eSWeiwei Li             switch (dec->rlist) {
49932c71d02eSWeiwei Li             case 4:
49942c71d02eSWeiwei Li                 snprintf(tmp, sizeof(tmp), "{ra}");
49952c71d02eSWeiwei Li                 break;
49962c71d02eSWeiwei Li             case 5:
49972c71d02eSWeiwei Li                 snprintf(tmp, sizeof(tmp), "{ra, s0}");
49982c71d02eSWeiwei Li                 break;
49992c71d02eSWeiwei Li             case 15:
50002c71d02eSWeiwei Li                 snprintf(tmp, sizeof(tmp), "{ra, s0-s11}");
50012c71d02eSWeiwei Li                 break;
50022c71d02eSWeiwei Li             default:
50032c71d02eSWeiwei Li                 snprintf(tmp, sizeof(tmp), "{ra, s0-s%d}", dec->rlist - 5);
50042c71d02eSWeiwei Li                 break;
50052c71d02eSWeiwei Li             }
50062c71d02eSWeiwei Li             append(buf, tmp, buflen);
50072c71d02eSWeiwei Li             break;
50082c71d02eSWeiwei Li         }
5009a47842d1SChristoph Müllner         case 'h':
5010a47842d1SChristoph Müllner             append(buf, rv_fli_name_const[dec->imm], buflen);
5011a47842d1SChristoph Müllner             break;
5012ea103259SMichael Clark         default:
5013ea103259SMichael Clark             break;
5014ea103259SMichael Clark         }
5015ea103259SMichael Clark         fmt++;
5016ea103259SMichael Clark     }
5017ea103259SMichael Clark }
5018ea103259SMichael Clark 
5019ea103259SMichael Clark /* lift instruction to pseudo-instruction */
5020ea103259SMichael Clark 
5021ea103259SMichael Clark static void decode_inst_lift_pseudo(rv_decode *dec)
5022ea103259SMichael Clark {
5023fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5024ea103259SMichael Clark     const rv_comp_data *comp_data = opcode_data[dec->op].pseudo;
5025ea103259SMichael Clark     if (!comp_data) {
5026ea103259SMichael Clark         return;
5027ea103259SMichael Clark     }
5028ea103259SMichael Clark     while (comp_data->constraints) {
5029ea103259SMichael Clark         if (check_constraints(dec, comp_data->constraints)) {
5030ea103259SMichael Clark             dec->op = comp_data->op;
5031ea103259SMichael Clark             dec->codec = opcode_data[dec->op].codec;
5032ea103259SMichael Clark             return;
5033ea103259SMichael Clark         }
5034ea103259SMichael Clark         comp_data++;
5035ea103259SMichael Clark     }
5036ea103259SMichael Clark }
5037ea103259SMichael Clark 
5038ea103259SMichael Clark /* decompress instruction */
5039ea103259SMichael Clark 
5040ea103259SMichael Clark static void decode_inst_decompress_rv32(rv_decode *dec)
5041ea103259SMichael Clark {
5042fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5043ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv32;
5044ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5045f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5046f88222daSMichael Clark             && dec->imm == 0) {
5047f88222daSMichael Clark             dec->op = rv_op_illegal;
5048f88222daSMichael Clark         } else {
5049ea103259SMichael Clark             dec->op = decomp_op;
5050ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5051ea103259SMichael Clark         }
5052ea103259SMichael Clark     }
5053f88222daSMichael Clark }
5054ea103259SMichael Clark 
5055ea103259SMichael Clark static void decode_inst_decompress_rv64(rv_decode *dec)
5056ea103259SMichael Clark {
5057fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5058ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv64;
5059ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5060f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5061f88222daSMichael Clark             && dec->imm == 0) {
5062f88222daSMichael Clark             dec->op = rv_op_illegal;
5063f88222daSMichael Clark         } else {
5064ea103259SMichael Clark             dec->op = decomp_op;
5065ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5066ea103259SMichael Clark         }
5067ea103259SMichael Clark     }
5068f88222daSMichael Clark }
5069ea103259SMichael Clark 
5070ea103259SMichael Clark static void decode_inst_decompress_rv128(rv_decode *dec)
5071ea103259SMichael Clark {
5072fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5073ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv128;
5074ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5075f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5076f88222daSMichael Clark             && dec->imm == 0) {
5077f88222daSMichael Clark             dec->op = rv_op_illegal;
5078f88222daSMichael Clark         } else {
5079ea103259SMichael Clark             dec->op = decomp_op;
5080ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5081ea103259SMichael Clark         }
5082ea103259SMichael Clark     }
5083f88222daSMichael Clark }
5084ea103259SMichael Clark 
5085ea103259SMichael Clark static void decode_inst_decompress(rv_decode *dec, rv_isa isa)
5086ea103259SMichael Clark {
5087ea103259SMichael Clark     switch (isa) {
5088ea103259SMichael Clark     case rv32:
5089ea103259SMichael Clark         decode_inst_decompress_rv32(dec);
5090ea103259SMichael Clark         break;
5091ea103259SMichael Clark     case rv64:
5092ea103259SMichael Clark         decode_inst_decompress_rv64(dec);
5093ea103259SMichael Clark         break;
5094ea103259SMichael Clark     case rv128:
5095ea103259SMichael Clark         decode_inst_decompress_rv128(dec);
5096ea103259SMichael Clark         break;
5097ea103259SMichael Clark     }
5098ea103259SMichael Clark }
5099ea103259SMichael Clark 
5100ea103259SMichael Clark /* disassemble instruction */
5101ea103259SMichael Clark 
5102ea103259SMichael Clark static void
5103454c2201SWeiwei Li disasm_inst(char *buf, size_t buflen, rv_isa isa, uint64_t pc, rv_inst inst,
5104454c2201SWeiwei Li             RISCVCPUConfig *cfg)
5105ea103259SMichael Clark {
5106ea103259SMichael Clark     rv_decode dec = { 0 };
5107ea103259SMichael Clark     dec.pc = pc;
5108ea103259SMichael Clark     dec.inst = inst;
5109454c2201SWeiwei Li     dec.cfg = cfg;
5110c859a242SChristoph Müllner 
5111c859a242SChristoph Müllner     static const struct {
5112c859a242SChristoph Müllner         bool (*guard_func)(const RISCVCPUConfig *);
5113c859a242SChristoph Müllner         const rv_opcode_data *opcode_data;
5114c859a242SChristoph Müllner         void (*decode_func)(rv_decode *, rv_isa);
5115c859a242SChristoph Müllner     } decoders[] = {
5116c859a242SChristoph Müllner         { always_true_p, rvi_opcode_data, decode_inst_opcode },
5117318df723SChristoph Müllner         { has_xtheadba_p, xthead_opcode_data, decode_xtheadba },
5118318df723SChristoph Müllner         { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb },
5119318df723SChristoph Müllner         { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs },
5120318df723SChristoph Müllner         { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo },
5121318df723SChristoph Müllner         { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmov },
5122318df723SChristoph Müllner         { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemidx },
5123318df723SChristoph Müllner         { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv },
5124318df723SChristoph Müllner         { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac },
5125318df723SChristoph Müllner         { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx },
5126318df723SChristoph Müllner         { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempair },
5127318df723SChristoph Müllner         { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync },
5128f6f72338SChristoph Müllner         { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops },
5129c859a242SChristoph Müllner     };
5130c859a242SChristoph Müllner 
5131c859a242SChristoph Müllner     for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) {
5132c859a242SChristoph Müllner         bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func;
5133c859a242SChristoph Müllner         const rv_opcode_data *opcode_data = decoders[i].opcode_data;
5134c859a242SChristoph Müllner         void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func;
5135c859a242SChristoph Müllner 
5136c859a242SChristoph Müllner         if (guard_func(cfg)) {
5137c859a242SChristoph Müllner             dec.opcode_data = opcode_data;
5138c859a242SChristoph Müllner             decode_func(&dec, isa);
5139c859a242SChristoph Müllner             if (dec.op != rv_op_illegal)
5140c859a242SChristoph Müllner                 break;
5141c859a242SChristoph Müllner         }
5142c859a242SChristoph Müllner     }
5143c859a242SChristoph Müllner 
5144c859a242SChristoph Müllner     if (dec.op == rv_op_illegal) {
5145c859a242SChristoph Müllner         dec.opcode_data = rvi_opcode_data;
5146c859a242SChristoph Müllner     }
5147c859a242SChristoph Müllner 
514833632775SFrédéric Pétrot     decode_inst_operands(&dec, isa);
5149ea103259SMichael Clark     decode_inst_decompress(&dec, isa);
5150ea103259SMichael Clark     decode_inst_lift_pseudo(&dec);
515107f4964dSYang Liu     format_inst(buf, buflen, 24, &dec);
5152ea103259SMichael Clark }
5153ea103259SMichael Clark 
51546296a799SMichael Clark #define INST_FMT_2 "%04" PRIx64 "              "
51556296a799SMichael Clark #define INST_FMT_4 "%08" PRIx64 "          "
51566296a799SMichael Clark #define INST_FMT_6 "%012" PRIx64 "      "
51576296a799SMichael Clark #define INST_FMT_8 "%016" PRIx64 "  "
51586296a799SMichael Clark 
5159ea103259SMichael Clark static int
5160ea103259SMichael Clark print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
5161ea103259SMichael Clark {
5162ea103259SMichael Clark     char buf[128] = { 0 };
5163ea103259SMichael Clark     bfd_byte packet[2];
5164ea103259SMichael Clark     rv_inst inst = 0;
5165ea103259SMichael Clark     size_t len = 2;
5166ea103259SMichael Clark     bfd_vma n;
5167ea103259SMichael Clark     int status;
5168ea103259SMichael Clark 
5169ea103259SMichael Clark     /* Instructions are made of 2-byte packets in little-endian order */
5170ea103259SMichael Clark     for (n = 0; n < len; n += 2) {
5171ea103259SMichael Clark         status = (*info->read_memory_func)(memaddr + n, packet, 2, info);
5172ea103259SMichael Clark         if (status != 0) {
5173ea103259SMichael Clark             /* Don't fail just because we fell off the end.  */
5174ea103259SMichael Clark             if (n > 0) {
5175ea103259SMichael Clark                 break;
5176ea103259SMichael Clark             }
5177ea103259SMichael Clark             (*info->memory_error_func)(status, memaddr, info);
5178ea103259SMichael Clark             return status;
5179ea103259SMichael Clark         }
5180ea103259SMichael Clark         inst |= ((rv_inst) bfd_getl16(packet)) << (8 * n);
5181ea103259SMichael Clark         if (n == 0) {
5182ea103259SMichael Clark             len = inst_length(inst);
5183ea103259SMichael Clark         }
5184ea103259SMichael Clark     }
5185ea103259SMichael Clark 
51866296a799SMichael Clark     switch (len) {
51876296a799SMichael Clark     case 2:
51886296a799SMichael Clark         (*info->fprintf_func)(info->stream, INST_FMT_2, inst);
51896296a799SMichael Clark         break;
51906296a799SMichael Clark     case 4:
51916296a799SMichael Clark         (*info->fprintf_func)(info->stream, INST_FMT_4, inst);
51926296a799SMichael Clark         break;
51936296a799SMichael Clark     case 6:
51946296a799SMichael Clark         (*info->fprintf_func)(info->stream, INST_FMT_6, inst);
51956296a799SMichael Clark         break;
51966296a799SMichael Clark     default:
51976296a799SMichael Clark         (*info->fprintf_func)(info->stream, INST_FMT_8, inst);
51986296a799SMichael Clark         break;
51996296a799SMichael Clark     }
52006296a799SMichael Clark 
5201454c2201SWeiwei Li     disasm_inst(buf, sizeof(buf), isa, memaddr, inst,
5202454c2201SWeiwei Li                 (RISCVCPUConfig *)info->target_info);
5203ea103259SMichael Clark     (*info->fprintf_func)(info->stream, "%s", buf);
5204ea103259SMichael Clark 
5205ea103259SMichael Clark     return len;
5206ea103259SMichael Clark }
5207ea103259SMichael Clark 
5208ea103259SMichael Clark int print_insn_riscv32(bfd_vma memaddr, struct disassemble_info *info)
5209ea103259SMichael Clark {
5210ea103259SMichael Clark     return print_insn_riscv(memaddr, info, rv32);
5211ea103259SMichael Clark }
5212ea103259SMichael Clark 
5213ea103259SMichael Clark int print_insn_riscv64(bfd_vma memaddr, struct disassemble_info *info)
5214ea103259SMichael Clark {
5215ea103259SMichael Clark     return print_insn_riscv(memaddr, info, rv64);
5216ea103259SMichael Clark }
5217332dab68SFrédéric Pétrot 
5218332dab68SFrédéric Pétrot int print_insn_riscv128(bfd_vma memaddr, struct disassemble_info *info)
5219332dab68SFrédéric Pétrot {
5220332dab68SFrédéric Pétrot     return print_insn_riscv(memaddr, info, rv128);
5221332dab68SFrédéric Pétrot }
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