xref: /qemu/disas/riscv.c (revision 4d46d84ea7fbb694125b95c88e788caf6cd039fa)
1ea103259SMichael Clark /*
2ea103259SMichael Clark  * QEMU RISC-V Disassembler
3ea103259SMichael Clark  *
4ea103259SMichael Clark  * Copyright (c) 2016-2017 Michael Clark <michaeljclark@mac.com>
5ea103259SMichael Clark  * Copyright (c) 2017-2018 SiFive, Inc.
6ea103259SMichael Clark  *
7ea103259SMichael Clark  * This program is free software; you can redistribute it and/or modify it
8ea103259SMichael Clark  * under the terms and conditions of the GNU General Public License,
9ea103259SMichael Clark  * version 2 or later, as published by the Free Software Foundation.
10ea103259SMichael Clark  *
11ea103259SMichael Clark  * This program is distributed in the hope it will be useful, but WITHOUT
12ea103259SMichael Clark  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13ea103259SMichael Clark  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14ea103259SMichael Clark  * more details.
15ea103259SMichael Clark  *
16ea103259SMichael Clark  * You should have received a copy of the GNU General Public License along with
17ea103259SMichael Clark  * this program.  If not, see <http://www.gnu.org/licenses/>.
18ea103259SMichael Clark  */
19ea103259SMichael Clark 
20ea103259SMichael Clark #include "qemu/osdep.h"
21318df723SChristoph Müllner #include "qemu/bitops.h"
223979fca4SMarkus Armbruster #include "disas/dis-asm.h"
23454c2201SWeiwei Li #include "target/riscv/cpu_cfg.h"
245d326db2SChristoph Müllner #include "disas/riscv.h"
25ea103259SMichael Clark 
26f6f72338SChristoph Müllner /* Vendor extensions */
27318df723SChristoph Müllner #include "disas/riscv-xthead.h"
28f6f72338SChristoph Müllner #include "disas/riscv-xventana.h"
29f6f72338SChristoph Müllner 
30ea103259SMichael Clark typedef enum {
3101b1361fSChristoph Müllner     /* 0 is reserved for rv_op_illegal. */
32ea103259SMichael Clark     rv_op_lui = 1,
33ea103259SMichael Clark     rv_op_auipc = 2,
34ea103259SMichael Clark     rv_op_jal = 3,
35ea103259SMichael Clark     rv_op_jalr = 4,
36ea103259SMichael Clark     rv_op_beq = 5,
37ea103259SMichael Clark     rv_op_bne = 6,
38ea103259SMichael Clark     rv_op_blt = 7,
39ea103259SMichael Clark     rv_op_bge = 8,
40ea103259SMichael Clark     rv_op_bltu = 9,
41ea103259SMichael Clark     rv_op_bgeu = 10,
42ea103259SMichael Clark     rv_op_lb = 11,
43ea103259SMichael Clark     rv_op_lh = 12,
44ea103259SMichael Clark     rv_op_lw = 13,
45ea103259SMichael Clark     rv_op_lbu = 14,
46ea103259SMichael Clark     rv_op_lhu = 15,
47ea103259SMichael Clark     rv_op_sb = 16,
48ea103259SMichael Clark     rv_op_sh = 17,
49ea103259SMichael Clark     rv_op_sw = 18,
50ea103259SMichael Clark     rv_op_addi = 19,
51ea103259SMichael Clark     rv_op_slti = 20,
52ea103259SMichael Clark     rv_op_sltiu = 21,
53ea103259SMichael Clark     rv_op_xori = 22,
54ea103259SMichael Clark     rv_op_ori = 23,
55ea103259SMichael Clark     rv_op_andi = 24,
56ea103259SMichael Clark     rv_op_slli = 25,
57ea103259SMichael Clark     rv_op_srli = 26,
58ea103259SMichael Clark     rv_op_srai = 27,
59ea103259SMichael Clark     rv_op_add = 28,
60ea103259SMichael Clark     rv_op_sub = 29,
61ea103259SMichael Clark     rv_op_sll = 30,
62ea103259SMichael Clark     rv_op_slt = 31,
63ea103259SMichael Clark     rv_op_sltu = 32,
64ea103259SMichael Clark     rv_op_xor = 33,
65ea103259SMichael Clark     rv_op_srl = 34,
66ea103259SMichael Clark     rv_op_sra = 35,
67ea103259SMichael Clark     rv_op_or = 36,
68ea103259SMichael Clark     rv_op_and = 37,
69ea103259SMichael Clark     rv_op_fence = 38,
70ea103259SMichael Clark     rv_op_fence_i = 39,
71ea103259SMichael Clark     rv_op_lwu = 40,
72ea103259SMichael Clark     rv_op_ld = 41,
73ea103259SMichael Clark     rv_op_sd = 42,
74ea103259SMichael Clark     rv_op_addiw = 43,
75ea103259SMichael Clark     rv_op_slliw = 44,
76ea103259SMichael Clark     rv_op_srliw = 45,
77ea103259SMichael Clark     rv_op_sraiw = 46,
78ea103259SMichael Clark     rv_op_addw = 47,
79ea103259SMichael Clark     rv_op_subw = 48,
80ea103259SMichael Clark     rv_op_sllw = 49,
81ea103259SMichael Clark     rv_op_srlw = 50,
82ea103259SMichael Clark     rv_op_sraw = 51,
83ea103259SMichael Clark     rv_op_ldu = 52,
84ea103259SMichael Clark     rv_op_lq = 53,
85ea103259SMichael Clark     rv_op_sq = 54,
86ea103259SMichael Clark     rv_op_addid = 55,
87ea103259SMichael Clark     rv_op_sllid = 56,
88ea103259SMichael Clark     rv_op_srlid = 57,
89ea103259SMichael Clark     rv_op_sraid = 58,
90ea103259SMichael Clark     rv_op_addd = 59,
91ea103259SMichael Clark     rv_op_subd = 60,
92ea103259SMichael Clark     rv_op_slld = 61,
93ea103259SMichael Clark     rv_op_srld = 62,
94ea103259SMichael Clark     rv_op_srad = 63,
95ea103259SMichael Clark     rv_op_mul = 64,
96ea103259SMichael Clark     rv_op_mulh = 65,
97ea103259SMichael Clark     rv_op_mulhsu = 66,
98ea103259SMichael Clark     rv_op_mulhu = 67,
99ea103259SMichael Clark     rv_op_div = 68,
100ea103259SMichael Clark     rv_op_divu = 69,
101ea103259SMichael Clark     rv_op_rem = 70,
102ea103259SMichael Clark     rv_op_remu = 71,
103ea103259SMichael Clark     rv_op_mulw = 72,
104ea103259SMichael Clark     rv_op_divw = 73,
105ea103259SMichael Clark     rv_op_divuw = 74,
106ea103259SMichael Clark     rv_op_remw = 75,
107ea103259SMichael Clark     rv_op_remuw = 76,
108ea103259SMichael Clark     rv_op_muld = 77,
109ea103259SMichael Clark     rv_op_divd = 78,
110ea103259SMichael Clark     rv_op_divud = 79,
111ea103259SMichael Clark     rv_op_remd = 80,
112ea103259SMichael Clark     rv_op_remud = 81,
113ea103259SMichael Clark     rv_op_lr_w = 82,
114ea103259SMichael Clark     rv_op_sc_w = 83,
115ea103259SMichael Clark     rv_op_amoswap_w = 84,
116ea103259SMichael Clark     rv_op_amoadd_w = 85,
117ea103259SMichael Clark     rv_op_amoxor_w = 86,
118ea103259SMichael Clark     rv_op_amoor_w = 87,
119ea103259SMichael Clark     rv_op_amoand_w = 88,
120ea103259SMichael Clark     rv_op_amomin_w = 89,
121ea103259SMichael Clark     rv_op_amomax_w = 90,
122ea103259SMichael Clark     rv_op_amominu_w = 91,
123ea103259SMichael Clark     rv_op_amomaxu_w = 92,
124ea103259SMichael Clark     rv_op_lr_d = 93,
125ea103259SMichael Clark     rv_op_sc_d = 94,
126ea103259SMichael Clark     rv_op_amoswap_d = 95,
127ea103259SMichael Clark     rv_op_amoadd_d = 96,
128ea103259SMichael Clark     rv_op_amoxor_d = 97,
129ea103259SMichael Clark     rv_op_amoor_d = 98,
130ea103259SMichael Clark     rv_op_amoand_d = 99,
131ea103259SMichael Clark     rv_op_amomin_d = 100,
132ea103259SMichael Clark     rv_op_amomax_d = 101,
133ea103259SMichael Clark     rv_op_amominu_d = 102,
134ea103259SMichael Clark     rv_op_amomaxu_d = 103,
135ea103259SMichael Clark     rv_op_lr_q = 104,
136ea103259SMichael Clark     rv_op_sc_q = 105,
137ea103259SMichael Clark     rv_op_amoswap_q = 106,
138ea103259SMichael Clark     rv_op_amoadd_q = 107,
139ea103259SMichael Clark     rv_op_amoxor_q = 108,
140ea103259SMichael Clark     rv_op_amoor_q = 109,
141ea103259SMichael Clark     rv_op_amoand_q = 110,
142ea103259SMichael Clark     rv_op_amomin_q = 111,
143ea103259SMichael Clark     rv_op_amomax_q = 112,
144ea103259SMichael Clark     rv_op_amominu_q = 113,
145ea103259SMichael Clark     rv_op_amomaxu_q = 114,
146ea103259SMichael Clark     rv_op_ecall = 115,
147ea103259SMichael Clark     rv_op_ebreak = 116,
148ea103259SMichael Clark     rv_op_uret = 117,
149ea103259SMichael Clark     rv_op_sret = 118,
150ea103259SMichael Clark     rv_op_hret = 119,
151ea103259SMichael Clark     rv_op_mret = 120,
152ea103259SMichael Clark     rv_op_dret = 121,
153ea103259SMichael Clark     rv_op_sfence_vm = 122,
154ea103259SMichael Clark     rv_op_sfence_vma = 123,
155ea103259SMichael Clark     rv_op_wfi = 124,
156ea103259SMichael Clark     rv_op_csrrw = 125,
157ea103259SMichael Clark     rv_op_csrrs = 126,
158ea103259SMichael Clark     rv_op_csrrc = 127,
159ea103259SMichael Clark     rv_op_csrrwi = 128,
160ea103259SMichael Clark     rv_op_csrrsi = 129,
161ea103259SMichael Clark     rv_op_csrrci = 130,
162ea103259SMichael Clark     rv_op_flw = 131,
163ea103259SMichael Clark     rv_op_fsw = 132,
164ea103259SMichael Clark     rv_op_fmadd_s = 133,
165ea103259SMichael Clark     rv_op_fmsub_s = 134,
166ea103259SMichael Clark     rv_op_fnmsub_s = 135,
167ea103259SMichael Clark     rv_op_fnmadd_s = 136,
168ea103259SMichael Clark     rv_op_fadd_s = 137,
169ea103259SMichael Clark     rv_op_fsub_s = 138,
170ea103259SMichael Clark     rv_op_fmul_s = 139,
171ea103259SMichael Clark     rv_op_fdiv_s = 140,
172ea103259SMichael Clark     rv_op_fsgnj_s = 141,
173ea103259SMichael Clark     rv_op_fsgnjn_s = 142,
174ea103259SMichael Clark     rv_op_fsgnjx_s = 143,
175ea103259SMichael Clark     rv_op_fmin_s = 144,
176ea103259SMichael Clark     rv_op_fmax_s = 145,
177ea103259SMichael Clark     rv_op_fsqrt_s = 146,
178ea103259SMichael Clark     rv_op_fle_s = 147,
179ea103259SMichael Clark     rv_op_flt_s = 148,
180ea103259SMichael Clark     rv_op_feq_s = 149,
181ea103259SMichael Clark     rv_op_fcvt_w_s = 150,
182ea103259SMichael Clark     rv_op_fcvt_wu_s = 151,
183ea103259SMichael Clark     rv_op_fcvt_s_w = 152,
184ea103259SMichael Clark     rv_op_fcvt_s_wu = 153,
185ea103259SMichael Clark     rv_op_fmv_x_s = 154,
186ea103259SMichael Clark     rv_op_fclass_s = 155,
187ea103259SMichael Clark     rv_op_fmv_s_x = 156,
188ea103259SMichael Clark     rv_op_fcvt_l_s = 157,
189ea103259SMichael Clark     rv_op_fcvt_lu_s = 158,
190ea103259SMichael Clark     rv_op_fcvt_s_l = 159,
191ea103259SMichael Clark     rv_op_fcvt_s_lu = 160,
192ea103259SMichael Clark     rv_op_fld = 161,
193ea103259SMichael Clark     rv_op_fsd = 162,
194ea103259SMichael Clark     rv_op_fmadd_d = 163,
195ea103259SMichael Clark     rv_op_fmsub_d = 164,
196ea103259SMichael Clark     rv_op_fnmsub_d = 165,
197ea103259SMichael Clark     rv_op_fnmadd_d = 166,
198ea103259SMichael Clark     rv_op_fadd_d = 167,
199ea103259SMichael Clark     rv_op_fsub_d = 168,
200ea103259SMichael Clark     rv_op_fmul_d = 169,
201ea103259SMichael Clark     rv_op_fdiv_d = 170,
202ea103259SMichael Clark     rv_op_fsgnj_d = 171,
203ea103259SMichael Clark     rv_op_fsgnjn_d = 172,
204ea103259SMichael Clark     rv_op_fsgnjx_d = 173,
205ea103259SMichael Clark     rv_op_fmin_d = 174,
206ea103259SMichael Clark     rv_op_fmax_d = 175,
207ea103259SMichael Clark     rv_op_fcvt_s_d = 176,
208ea103259SMichael Clark     rv_op_fcvt_d_s = 177,
209ea103259SMichael Clark     rv_op_fsqrt_d = 178,
210ea103259SMichael Clark     rv_op_fle_d = 179,
211ea103259SMichael Clark     rv_op_flt_d = 180,
212ea103259SMichael Clark     rv_op_feq_d = 181,
213ea103259SMichael Clark     rv_op_fcvt_w_d = 182,
214ea103259SMichael Clark     rv_op_fcvt_wu_d = 183,
215ea103259SMichael Clark     rv_op_fcvt_d_w = 184,
216ea103259SMichael Clark     rv_op_fcvt_d_wu = 185,
217ea103259SMichael Clark     rv_op_fclass_d = 186,
218ea103259SMichael Clark     rv_op_fcvt_l_d = 187,
219ea103259SMichael Clark     rv_op_fcvt_lu_d = 188,
220ea103259SMichael Clark     rv_op_fmv_x_d = 189,
221ea103259SMichael Clark     rv_op_fcvt_d_l = 190,
222ea103259SMichael Clark     rv_op_fcvt_d_lu = 191,
223ea103259SMichael Clark     rv_op_fmv_d_x = 192,
224ea103259SMichael Clark     rv_op_flq = 193,
225ea103259SMichael Clark     rv_op_fsq = 194,
226ea103259SMichael Clark     rv_op_fmadd_q = 195,
227ea103259SMichael Clark     rv_op_fmsub_q = 196,
228ea103259SMichael Clark     rv_op_fnmsub_q = 197,
229ea103259SMichael Clark     rv_op_fnmadd_q = 198,
230ea103259SMichael Clark     rv_op_fadd_q = 199,
231ea103259SMichael Clark     rv_op_fsub_q = 200,
232ea103259SMichael Clark     rv_op_fmul_q = 201,
233ea103259SMichael Clark     rv_op_fdiv_q = 202,
234ea103259SMichael Clark     rv_op_fsgnj_q = 203,
235ea103259SMichael Clark     rv_op_fsgnjn_q = 204,
236ea103259SMichael Clark     rv_op_fsgnjx_q = 205,
237ea103259SMichael Clark     rv_op_fmin_q = 206,
238ea103259SMichael Clark     rv_op_fmax_q = 207,
239ea103259SMichael Clark     rv_op_fcvt_s_q = 208,
240ea103259SMichael Clark     rv_op_fcvt_q_s = 209,
241ea103259SMichael Clark     rv_op_fcvt_d_q = 210,
242ea103259SMichael Clark     rv_op_fcvt_q_d = 211,
243ea103259SMichael Clark     rv_op_fsqrt_q = 212,
244ea103259SMichael Clark     rv_op_fle_q = 213,
245ea103259SMichael Clark     rv_op_flt_q = 214,
246ea103259SMichael Clark     rv_op_feq_q = 215,
247ea103259SMichael Clark     rv_op_fcvt_w_q = 216,
248ea103259SMichael Clark     rv_op_fcvt_wu_q = 217,
249ea103259SMichael Clark     rv_op_fcvt_q_w = 218,
250ea103259SMichael Clark     rv_op_fcvt_q_wu = 219,
251ea103259SMichael Clark     rv_op_fclass_q = 220,
252ea103259SMichael Clark     rv_op_fcvt_l_q = 221,
253ea103259SMichael Clark     rv_op_fcvt_lu_q = 222,
254ea103259SMichael Clark     rv_op_fcvt_q_l = 223,
255ea103259SMichael Clark     rv_op_fcvt_q_lu = 224,
256ea103259SMichael Clark     rv_op_fmv_x_q = 225,
257ea103259SMichael Clark     rv_op_fmv_q_x = 226,
258ea103259SMichael Clark     rv_op_c_addi4spn = 227,
259ea103259SMichael Clark     rv_op_c_fld = 228,
260ea103259SMichael Clark     rv_op_c_lw = 229,
261ea103259SMichael Clark     rv_op_c_flw = 230,
262ea103259SMichael Clark     rv_op_c_fsd = 231,
263ea103259SMichael Clark     rv_op_c_sw = 232,
264ea103259SMichael Clark     rv_op_c_fsw = 233,
265ea103259SMichael Clark     rv_op_c_nop = 234,
266ea103259SMichael Clark     rv_op_c_addi = 235,
267ea103259SMichael Clark     rv_op_c_jal = 236,
268ea103259SMichael Clark     rv_op_c_li = 237,
269ea103259SMichael Clark     rv_op_c_addi16sp = 238,
270ea103259SMichael Clark     rv_op_c_lui = 239,
271ea103259SMichael Clark     rv_op_c_srli = 240,
272ea103259SMichael Clark     rv_op_c_srai = 241,
273ea103259SMichael Clark     rv_op_c_andi = 242,
274ea103259SMichael Clark     rv_op_c_sub = 243,
275ea103259SMichael Clark     rv_op_c_xor = 244,
276ea103259SMichael Clark     rv_op_c_or = 245,
277ea103259SMichael Clark     rv_op_c_and = 246,
278ea103259SMichael Clark     rv_op_c_subw = 247,
279ea103259SMichael Clark     rv_op_c_addw = 248,
280ea103259SMichael Clark     rv_op_c_j = 249,
281ea103259SMichael Clark     rv_op_c_beqz = 250,
282ea103259SMichael Clark     rv_op_c_bnez = 251,
283ea103259SMichael Clark     rv_op_c_slli = 252,
284ea103259SMichael Clark     rv_op_c_fldsp = 253,
285ea103259SMichael Clark     rv_op_c_lwsp = 254,
286ea103259SMichael Clark     rv_op_c_flwsp = 255,
287ea103259SMichael Clark     rv_op_c_jr = 256,
288ea103259SMichael Clark     rv_op_c_mv = 257,
289ea103259SMichael Clark     rv_op_c_ebreak = 258,
290ea103259SMichael Clark     rv_op_c_jalr = 259,
291ea103259SMichael Clark     rv_op_c_add = 260,
292ea103259SMichael Clark     rv_op_c_fsdsp = 261,
293ea103259SMichael Clark     rv_op_c_swsp = 262,
294ea103259SMichael Clark     rv_op_c_fswsp = 263,
295ea103259SMichael Clark     rv_op_c_ld = 264,
296ea103259SMichael Clark     rv_op_c_sd = 265,
297ea103259SMichael Clark     rv_op_c_addiw = 266,
298ea103259SMichael Clark     rv_op_c_ldsp = 267,
299ea103259SMichael Clark     rv_op_c_sdsp = 268,
300ea103259SMichael Clark     rv_op_c_lq = 269,
301ea103259SMichael Clark     rv_op_c_sq = 270,
302ea103259SMichael Clark     rv_op_c_lqsp = 271,
303ea103259SMichael Clark     rv_op_c_sqsp = 272,
304ea103259SMichael Clark     rv_op_nop = 273,
305ea103259SMichael Clark     rv_op_mv = 274,
306ea103259SMichael Clark     rv_op_not = 275,
307ea103259SMichael Clark     rv_op_neg = 276,
308ea103259SMichael Clark     rv_op_negw = 277,
309ea103259SMichael Clark     rv_op_sext_w = 278,
310ea103259SMichael Clark     rv_op_seqz = 279,
311ea103259SMichael Clark     rv_op_snez = 280,
312ea103259SMichael Clark     rv_op_sltz = 281,
313ea103259SMichael Clark     rv_op_sgtz = 282,
314ea103259SMichael Clark     rv_op_fmv_s = 283,
315ea103259SMichael Clark     rv_op_fabs_s = 284,
316ea103259SMichael Clark     rv_op_fneg_s = 285,
317ea103259SMichael Clark     rv_op_fmv_d = 286,
318ea103259SMichael Clark     rv_op_fabs_d = 287,
319ea103259SMichael Clark     rv_op_fneg_d = 288,
320ea103259SMichael Clark     rv_op_fmv_q = 289,
321ea103259SMichael Clark     rv_op_fabs_q = 290,
322ea103259SMichael Clark     rv_op_fneg_q = 291,
323ea103259SMichael Clark     rv_op_beqz = 292,
324ea103259SMichael Clark     rv_op_bnez = 293,
325ea103259SMichael Clark     rv_op_blez = 294,
326ea103259SMichael Clark     rv_op_bgez = 295,
327ea103259SMichael Clark     rv_op_bltz = 296,
328ea103259SMichael Clark     rv_op_bgtz = 297,
329ea103259SMichael Clark     rv_op_ble = 298,
330ea103259SMichael Clark     rv_op_bleu = 299,
331ea103259SMichael Clark     rv_op_bgt = 300,
332ea103259SMichael Clark     rv_op_bgtu = 301,
333ea103259SMichael Clark     rv_op_j = 302,
334ea103259SMichael Clark     rv_op_ret = 303,
335ea103259SMichael Clark     rv_op_jr = 304,
336ea103259SMichael Clark     rv_op_rdcycle = 305,
337ea103259SMichael Clark     rv_op_rdtime = 306,
338ea103259SMichael Clark     rv_op_rdinstret = 307,
339ea103259SMichael Clark     rv_op_rdcycleh = 308,
340ea103259SMichael Clark     rv_op_rdtimeh = 309,
341ea103259SMichael Clark     rv_op_rdinstreth = 310,
342ea103259SMichael Clark     rv_op_frcsr = 311,
343ea103259SMichael Clark     rv_op_frrm = 312,
344ea103259SMichael Clark     rv_op_frflags = 313,
345ea103259SMichael Clark     rv_op_fscsr = 314,
346ea103259SMichael Clark     rv_op_fsrm = 315,
347ea103259SMichael Clark     rv_op_fsflags = 316,
348ea103259SMichael Clark     rv_op_fsrmi = 317,
349ea103259SMichael Clark     rv_op_fsflagsi = 318,
35002c1b569SPhilipp Tomsich     rv_op_bseti = 319,
35102c1b569SPhilipp Tomsich     rv_op_bclri = 320,
35202c1b569SPhilipp Tomsich     rv_op_binvi = 321,
35302c1b569SPhilipp Tomsich     rv_op_bexti = 322,
35402c1b569SPhilipp Tomsich     rv_op_rori = 323,
35502c1b569SPhilipp Tomsich     rv_op_clz = 324,
35602c1b569SPhilipp Tomsich     rv_op_ctz = 325,
35702c1b569SPhilipp Tomsich     rv_op_cpop = 326,
35802c1b569SPhilipp Tomsich     rv_op_sext_h = 327,
35902c1b569SPhilipp Tomsich     rv_op_sext_b = 328,
36002c1b569SPhilipp Tomsich     rv_op_xnor = 329,
36102c1b569SPhilipp Tomsich     rv_op_orn = 330,
36202c1b569SPhilipp Tomsich     rv_op_andn = 331,
36302c1b569SPhilipp Tomsich     rv_op_rol = 332,
36402c1b569SPhilipp Tomsich     rv_op_ror = 333,
36502c1b569SPhilipp Tomsich     rv_op_sh1add = 334,
36602c1b569SPhilipp Tomsich     rv_op_sh2add = 335,
36702c1b569SPhilipp Tomsich     rv_op_sh3add = 336,
36802c1b569SPhilipp Tomsich     rv_op_sh1add_uw = 337,
36902c1b569SPhilipp Tomsich     rv_op_sh2add_uw = 338,
37002c1b569SPhilipp Tomsich     rv_op_sh3add_uw = 339,
37102c1b569SPhilipp Tomsich     rv_op_clmul = 340,
37202c1b569SPhilipp Tomsich     rv_op_clmulr = 341,
37302c1b569SPhilipp Tomsich     rv_op_clmulh = 342,
37402c1b569SPhilipp Tomsich     rv_op_min = 343,
37502c1b569SPhilipp Tomsich     rv_op_minu = 344,
37602c1b569SPhilipp Tomsich     rv_op_max = 345,
37702c1b569SPhilipp Tomsich     rv_op_maxu = 346,
37802c1b569SPhilipp Tomsich     rv_op_clzw = 347,
37902c1b569SPhilipp Tomsich     rv_op_ctzw = 348,
38002c1b569SPhilipp Tomsich     rv_op_cpopw = 349,
38102c1b569SPhilipp Tomsich     rv_op_slli_uw = 350,
38202c1b569SPhilipp Tomsich     rv_op_add_uw = 351,
38302c1b569SPhilipp Tomsich     rv_op_rolw = 352,
38402c1b569SPhilipp Tomsich     rv_op_rorw = 353,
38502c1b569SPhilipp Tomsich     rv_op_rev8 = 354,
38602c1b569SPhilipp Tomsich     rv_op_zext_h = 355,
38702c1b569SPhilipp Tomsich     rv_op_roriw = 356,
38802c1b569SPhilipp Tomsich     rv_op_orc_b = 357,
38902c1b569SPhilipp Tomsich     rv_op_bset = 358,
39002c1b569SPhilipp Tomsich     rv_op_bclr = 359,
39102c1b569SPhilipp Tomsich     rv_op_binv = 360,
39202c1b569SPhilipp Tomsich     rv_op_bext = 361,
3935748c886SWeiwei Li     rv_op_aes32esmi = 362,
3945748c886SWeiwei Li     rv_op_aes32esi = 363,
3955748c886SWeiwei Li     rv_op_aes32dsmi = 364,
3965748c886SWeiwei Li     rv_op_aes32dsi = 365,
3975748c886SWeiwei Li     rv_op_aes64ks1i = 366,
3985748c886SWeiwei Li     rv_op_aes64ks2 = 367,
3995748c886SWeiwei Li     rv_op_aes64im = 368,
4005748c886SWeiwei Li     rv_op_aes64esm = 369,
4015748c886SWeiwei Li     rv_op_aes64es = 370,
4025748c886SWeiwei Li     rv_op_aes64dsm = 371,
4035748c886SWeiwei Li     rv_op_aes64ds = 372,
4045748c886SWeiwei Li     rv_op_sha256sig0 = 373,
4055748c886SWeiwei Li     rv_op_sha256sig1 = 374,
4065748c886SWeiwei Li     rv_op_sha256sum0 = 375,
4075748c886SWeiwei Li     rv_op_sha256sum1 = 376,
4085748c886SWeiwei Li     rv_op_sha512sig0 = 377,
4095748c886SWeiwei Li     rv_op_sha512sig1 = 378,
4105748c886SWeiwei Li     rv_op_sha512sum0 = 379,
4115748c886SWeiwei Li     rv_op_sha512sum1 = 380,
4125748c886SWeiwei Li     rv_op_sha512sum0r = 381,
4135748c886SWeiwei Li     rv_op_sha512sum1r = 382,
4145748c886SWeiwei Li     rv_op_sha512sig0l = 383,
4155748c886SWeiwei Li     rv_op_sha512sig0h = 384,
4165748c886SWeiwei Li     rv_op_sha512sig1l = 385,
4175748c886SWeiwei Li     rv_op_sha512sig1h = 386,
4185748c886SWeiwei Li     rv_op_sm3p0 = 387,
4195748c886SWeiwei Li     rv_op_sm3p1 = 388,
4205748c886SWeiwei Li     rv_op_sm4ed = 389,
4215748c886SWeiwei Li     rv_op_sm4ks = 390,
4225748c886SWeiwei Li     rv_op_brev8 = 391,
4235748c886SWeiwei Li     rv_op_pack = 392,
4245748c886SWeiwei Li     rv_op_packh = 393,
4255748c886SWeiwei Li     rv_op_packw = 394,
4265748c886SWeiwei Li     rv_op_unzip = 395,
4275748c886SWeiwei Li     rv_op_zip = 396,
4285748c886SWeiwei Li     rv_op_xperm4 = 397,
4295748c886SWeiwei Li     rv_op_xperm8 = 398,
43007f4964dSYang Liu     rv_op_vle8_v = 399,
43107f4964dSYang Liu     rv_op_vle16_v = 400,
43207f4964dSYang Liu     rv_op_vle32_v = 401,
43307f4964dSYang Liu     rv_op_vle64_v = 402,
43407f4964dSYang Liu     rv_op_vse8_v = 403,
43507f4964dSYang Liu     rv_op_vse16_v = 404,
43607f4964dSYang Liu     rv_op_vse32_v = 405,
43707f4964dSYang Liu     rv_op_vse64_v = 406,
43807f4964dSYang Liu     rv_op_vlm_v = 407,
43907f4964dSYang Liu     rv_op_vsm_v = 408,
44007f4964dSYang Liu     rv_op_vlse8_v = 409,
44107f4964dSYang Liu     rv_op_vlse16_v = 410,
44207f4964dSYang Liu     rv_op_vlse32_v = 411,
44307f4964dSYang Liu     rv_op_vlse64_v = 412,
44407f4964dSYang Liu     rv_op_vsse8_v = 413,
44507f4964dSYang Liu     rv_op_vsse16_v = 414,
44607f4964dSYang Liu     rv_op_vsse32_v = 415,
44707f4964dSYang Liu     rv_op_vsse64_v = 416,
44807f4964dSYang Liu     rv_op_vluxei8_v = 417,
44907f4964dSYang Liu     rv_op_vluxei16_v = 418,
45007f4964dSYang Liu     rv_op_vluxei32_v = 419,
45107f4964dSYang Liu     rv_op_vluxei64_v = 420,
45207f4964dSYang Liu     rv_op_vloxei8_v = 421,
45307f4964dSYang Liu     rv_op_vloxei16_v = 422,
45407f4964dSYang Liu     rv_op_vloxei32_v = 423,
45507f4964dSYang Liu     rv_op_vloxei64_v = 424,
45607f4964dSYang Liu     rv_op_vsuxei8_v = 425,
45707f4964dSYang Liu     rv_op_vsuxei16_v = 426,
45807f4964dSYang Liu     rv_op_vsuxei32_v = 427,
45907f4964dSYang Liu     rv_op_vsuxei64_v = 428,
46007f4964dSYang Liu     rv_op_vsoxei8_v = 429,
46107f4964dSYang Liu     rv_op_vsoxei16_v = 430,
46207f4964dSYang Liu     rv_op_vsoxei32_v = 431,
46307f4964dSYang Liu     rv_op_vsoxei64_v = 432,
46407f4964dSYang Liu     rv_op_vle8ff_v = 433,
46507f4964dSYang Liu     rv_op_vle16ff_v = 434,
46607f4964dSYang Liu     rv_op_vle32ff_v = 435,
46707f4964dSYang Liu     rv_op_vle64ff_v = 436,
46807f4964dSYang Liu     rv_op_vl1re8_v = 437,
46907f4964dSYang Liu     rv_op_vl1re16_v = 438,
47007f4964dSYang Liu     rv_op_vl1re32_v = 439,
47107f4964dSYang Liu     rv_op_vl1re64_v = 440,
47207f4964dSYang Liu     rv_op_vl2re8_v = 441,
47307f4964dSYang Liu     rv_op_vl2re16_v = 442,
47407f4964dSYang Liu     rv_op_vl2re32_v = 443,
47507f4964dSYang Liu     rv_op_vl2re64_v = 444,
47607f4964dSYang Liu     rv_op_vl4re8_v = 445,
47707f4964dSYang Liu     rv_op_vl4re16_v = 446,
47807f4964dSYang Liu     rv_op_vl4re32_v = 447,
47907f4964dSYang Liu     rv_op_vl4re64_v = 448,
48007f4964dSYang Liu     rv_op_vl8re8_v = 449,
48107f4964dSYang Liu     rv_op_vl8re16_v = 450,
48207f4964dSYang Liu     rv_op_vl8re32_v = 451,
48307f4964dSYang Liu     rv_op_vl8re64_v = 452,
48407f4964dSYang Liu     rv_op_vs1r_v = 453,
48507f4964dSYang Liu     rv_op_vs2r_v = 454,
48607f4964dSYang Liu     rv_op_vs4r_v = 455,
48707f4964dSYang Liu     rv_op_vs8r_v = 456,
48807f4964dSYang Liu     rv_op_vadd_vv = 457,
48907f4964dSYang Liu     rv_op_vadd_vx = 458,
49007f4964dSYang Liu     rv_op_vadd_vi = 459,
49107f4964dSYang Liu     rv_op_vsub_vv = 460,
49207f4964dSYang Liu     rv_op_vsub_vx = 461,
49307f4964dSYang Liu     rv_op_vrsub_vx = 462,
49407f4964dSYang Liu     rv_op_vrsub_vi = 463,
49507f4964dSYang Liu     rv_op_vwaddu_vv = 464,
49607f4964dSYang Liu     rv_op_vwaddu_vx = 465,
49707f4964dSYang Liu     rv_op_vwadd_vv = 466,
49807f4964dSYang Liu     rv_op_vwadd_vx = 467,
49907f4964dSYang Liu     rv_op_vwsubu_vv = 468,
50007f4964dSYang Liu     rv_op_vwsubu_vx = 469,
50107f4964dSYang Liu     rv_op_vwsub_vv = 470,
50207f4964dSYang Liu     rv_op_vwsub_vx = 471,
50307f4964dSYang Liu     rv_op_vwaddu_wv = 472,
50407f4964dSYang Liu     rv_op_vwaddu_wx = 473,
50507f4964dSYang Liu     rv_op_vwadd_wv = 474,
50607f4964dSYang Liu     rv_op_vwadd_wx = 475,
50707f4964dSYang Liu     rv_op_vwsubu_wv = 476,
50807f4964dSYang Liu     rv_op_vwsubu_wx = 477,
50907f4964dSYang Liu     rv_op_vwsub_wv = 478,
51007f4964dSYang Liu     rv_op_vwsub_wx = 479,
51107f4964dSYang Liu     rv_op_vadc_vvm = 480,
51207f4964dSYang Liu     rv_op_vadc_vxm = 481,
51307f4964dSYang Liu     rv_op_vadc_vim = 482,
51407f4964dSYang Liu     rv_op_vmadc_vvm = 483,
51507f4964dSYang Liu     rv_op_vmadc_vxm = 484,
51607f4964dSYang Liu     rv_op_vmadc_vim = 485,
51707f4964dSYang Liu     rv_op_vsbc_vvm = 486,
51807f4964dSYang Liu     rv_op_vsbc_vxm = 487,
51907f4964dSYang Liu     rv_op_vmsbc_vvm = 488,
52007f4964dSYang Liu     rv_op_vmsbc_vxm = 489,
52107f4964dSYang Liu     rv_op_vand_vv = 490,
52207f4964dSYang Liu     rv_op_vand_vx = 491,
52307f4964dSYang Liu     rv_op_vand_vi = 492,
52407f4964dSYang Liu     rv_op_vor_vv = 493,
52507f4964dSYang Liu     rv_op_vor_vx = 494,
52607f4964dSYang Liu     rv_op_vor_vi = 495,
52707f4964dSYang Liu     rv_op_vxor_vv = 496,
52807f4964dSYang Liu     rv_op_vxor_vx = 497,
52907f4964dSYang Liu     rv_op_vxor_vi = 498,
53007f4964dSYang Liu     rv_op_vsll_vv = 499,
53107f4964dSYang Liu     rv_op_vsll_vx = 500,
53207f4964dSYang Liu     rv_op_vsll_vi = 501,
53307f4964dSYang Liu     rv_op_vsrl_vv = 502,
53407f4964dSYang Liu     rv_op_vsrl_vx = 503,
53507f4964dSYang Liu     rv_op_vsrl_vi = 504,
53607f4964dSYang Liu     rv_op_vsra_vv = 505,
53707f4964dSYang Liu     rv_op_vsra_vx = 506,
53807f4964dSYang Liu     rv_op_vsra_vi = 507,
53907f4964dSYang Liu     rv_op_vnsrl_wv = 508,
54007f4964dSYang Liu     rv_op_vnsrl_wx = 509,
54107f4964dSYang Liu     rv_op_vnsrl_wi = 510,
54207f4964dSYang Liu     rv_op_vnsra_wv = 511,
54307f4964dSYang Liu     rv_op_vnsra_wx = 512,
54407f4964dSYang Liu     rv_op_vnsra_wi = 513,
54507f4964dSYang Liu     rv_op_vmseq_vv = 514,
54607f4964dSYang Liu     rv_op_vmseq_vx = 515,
54707f4964dSYang Liu     rv_op_vmseq_vi = 516,
54807f4964dSYang Liu     rv_op_vmsne_vv = 517,
54907f4964dSYang Liu     rv_op_vmsne_vx = 518,
55007f4964dSYang Liu     rv_op_vmsne_vi = 519,
55107f4964dSYang Liu     rv_op_vmsltu_vv = 520,
55207f4964dSYang Liu     rv_op_vmsltu_vx = 521,
55307f4964dSYang Liu     rv_op_vmslt_vv = 522,
55407f4964dSYang Liu     rv_op_vmslt_vx = 523,
55507f4964dSYang Liu     rv_op_vmsleu_vv = 524,
55607f4964dSYang Liu     rv_op_vmsleu_vx = 525,
55707f4964dSYang Liu     rv_op_vmsleu_vi = 526,
55807f4964dSYang Liu     rv_op_vmsle_vv = 527,
55907f4964dSYang Liu     rv_op_vmsle_vx = 528,
56007f4964dSYang Liu     rv_op_vmsle_vi = 529,
56107f4964dSYang Liu     rv_op_vmsgtu_vx = 530,
56207f4964dSYang Liu     rv_op_vmsgtu_vi = 531,
56307f4964dSYang Liu     rv_op_vmsgt_vx = 532,
56407f4964dSYang Liu     rv_op_vmsgt_vi = 533,
56507f4964dSYang Liu     rv_op_vminu_vv = 534,
56607f4964dSYang Liu     rv_op_vminu_vx = 535,
56707f4964dSYang Liu     rv_op_vmin_vv = 536,
56807f4964dSYang Liu     rv_op_vmin_vx = 537,
56907f4964dSYang Liu     rv_op_vmaxu_vv = 538,
57007f4964dSYang Liu     rv_op_vmaxu_vx = 539,
57107f4964dSYang Liu     rv_op_vmax_vv = 540,
57207f4964dSYang Liu     rv_op_vmax_vx = 541,
57307f4964dSYang Liu     rv_op_vmul_vv = 542,
57407f4964dSYang Liu     rv_op_vmul_vx = 543,
57507f4964dSYang Liu     rv_op_vmulh_vv = 544,
57607f4964dSYang Liu     rv_op_vmulh_vx = 545,
57707f4964dSYang Liu     rv_op_vmulhu_vv = 546,
57807f4964dSYang Liu     rv_op_vmulhu_vx = 547,
57907f4964dSYang Liu     rv_op_vmulhsu_vv = 548,
58007f4964dSYang Liu     rv_op_vmulhsu_vx = 549,
58107f4964dSYang Liu     rv_op_vdivu_vv = 550,
58207f4964dSYang Liu     rv_op_vdivu_vx = 551,
58307f4964dSYang Liu     rv_op_vdiv_vv = 552,
58407f4964dSYang Liu     rv_op_vdiv_vx = 553,
58507f4964dSYang Liu     rv_op_vremu_vv = 554,
58607f4964dSYang Liu     rv_op_vremu_vx = 555,
58707f4964dSYang Liu     rv_op_vrem_vv = 556,
58807f4964dSYang Liu     rv_op_vrem_vx = 557,
58907f4964dSYang Liu     rv_op_vwmulu_vv = 558,
59007f4964dSYang Liu     rv_op_vwmulu_vx = 559,
59107f4964dSYang Liu     rv_op_vwmulsu_vv = 560,
59207f4964dSYang Liu     rv_op_vwmulsu_vx = 561,
59307f4964dSYang Liu     rv_op_vwmul_vv = 562,
59407f4964dSYang Liu     rv_op_vwmul_vx = 563,
59507f4964dSYang Liu     rv_op_vmacc_vv = 564,
59607f4964dSYang Liu     rv_op_vmacc_vx = 565,
59707f4964dSYang Liu     rv_op_vnmsac_vv = 566,
59807f4964dSYang Liu     rv_op_vnmsac_vx = 567,
59907f4964dSYang Liu     rv_op_vmadd_vv = 568,
60007f4964dSYang Liu     rv_op_vmadd_vx = 569,
60107f4964dSYang Liu     rv_op_vnmsub_vv = 570,
60207f4964dSYang Liu     rv_op_vnmsub_vx = 571,
60307f4964dSYang Liu     rv_op_vwmaccu_vv = 572,
60407f4964dSYang Liu     rv_op_vwmaccu_vx = 573,
60507f4964dSYang Liu     rv_op_vwmacc_vv = 574,
60607f4964dSYang Liu     rv_op_vwmacc_vx = 575,
60707f4964dSYang Liu     rv_op_vwmaccsu_vv = 576,
60807f4964dSYang Liu     rv_op_vwmaccsu_vx = 577,
60907f4964dSYang Liu     rv_op_vwmaccus_vx = 578,
61007f4964dSYang Liu     rv_op_vmv_v_v = 579,
61107f4964dSYang Liu     rv_op_vmv_v_x = 580,
61207f4964dSYang Liu     rv_op_vmv_v_i = 581,
61307f4964dSYang Liu     rv_op_vmerge_vvm = 582,
61407f4964dSYang Liu     rv_op_vmerge_vxm = 583,
61507f4964dSYang Liu     rv_op_vmerge_vim = 584,
61607f4964dSYang Liu     rv_op_vsaddu_vv = 585,
61707f4964dSYang Liu     rv_op_vsaddu_vx = 586,
61807f4964dSYang Liu     rv_op_vsaddu_vi = 587,
61907f4964dSYang Liu     rv_op_vsadd_vv = 588,
62007f4964dSYang Liu     rv_op_vsadd_vx = 589,
62107f4964dSYang Liu     rv_op_vsadd_vi = 590,
62207f4964dSYang Liu     rv_op_vssubu_vv = 591,
62307f4964dSYang Liu     rv_op_vssubu_vx = 592,
62407f4964dSYang Liu     rv_op_vssub_vv = 593,
62507f4964dSYang Liu     rv_op_vssub_vx = 594,
62607f4964dSYang Liu     rv_op_vaadd_vv = 595,
62707f4964dSYang Liu     rv_op_vaadd_vx = 596,
62807f4964dSYang Liu     rv_op_vaaddu_vv = 597,
62907f4964dSYang Liu     rv_op_vaaddu_vx = 598,
63007f4964dSYang Liu     rv_op_vasub_vv = 599,
63107f4964dSYang Liu     rv_op_vasub_vx = 600,
63207f4964dSYang Liu     rv_op_vasubu_vv = 601,
63307f4964dSYang Liu     rv_op_vasubu_vx = 602,
63407f4964dSYang Liu     rv_op_vsmul_vv = 603,
63507f4964dSYang Liu     rv_op_vsmul_vx = 604,
63607f4964dSYang Liu     rv_op_vssrl_vv = 605,
63707f4964dSYang Liu     rv_op_vssrl_vx = 606,
63807f4964dSYang Liu     rv_op_vssrl_vi = 607,
63907f4964dSYang Liu     rv_op_vssra_vv = 608,
64007f4964dSYang Liu     rv_op_vssra_vx = 609,
64107f4964dSYang Liu     rv_op_vssra_vi = 610,
64207f4964dSYang Liu     rv_op_vnclipu_wv = 611,
64307f4964dSYang Liu     rv_op_vnclipu_wx = 612,
64407f4964dSYang Liu     rv_op_vnclipu_wi = 613,
64507f4964dSYang Liu     rv_op_vnclip_wv = 614,
64607f4964dSYang Liu     rv_op_vnclip_wx = 615,
64707f4964dSYang Liu     rv_op_vnclip_wi = 616,
64807f4964dSYang Liu     rv_op_vfadd_vv = 617,
64907f4964dSYang Liu     rv_op_vfadd_vf = 618,
65007f4964dSYang Liu     rv_op_vfsub_vv = 619,
65107f4964dSYang Liu     rv_op_vfsub_vf = 620,
65207f4964dSYang Liu     rv_op_vfrsub_vf = 621,
65307f4964dSYang Liu     rv_op_vfwadd_vv = 622,
65407f4964dSYang Liu     rv_op_vfwadd_vf = 623,
65507f4964dSYang Liu     rv_op_vfwadd_wv = 624,
65607f4964dSYang Liu     rv_op_vfwadd_wf = 625,
65707f4964dSYang Liu     rv_op_vfwsub_vv = 626,
65807f4964dSYang Liu     rv_op_vfwsub_vf = 627,
65907f4964dSYang Liu     rv_op_vfwsub_wv = 628,
66007f4964dSYang Liu     rv_op_vfwsub_wf = 629,
66107f4964dSYang Liu     rv_op_vfmul_vv = 630,
66207f4964dSYang Liu     rv_op_vfmul_vf = 631,
66307f4964dSYang Liu     rv_op_vfdiv_vv = 632,
66407f4964dSYang Liu     rv_op_vfdiv_vf = 633,
66507f4964dSYang Liu     rv_op_vfrdiv_vf = 634,
66607f4964dSYang Liu     rv_op_vfwmul_vv = 635,
66707f4964dSYang Liu     rv_op_vfwmul_vf = 636,
66807f4964dSYang Liu     rv_op_vfmacc_vv = 637,
66907f4964dSYang Liu     rv_op_vfmacc_vf = 638,
67007f4964dSYang Liu     rv_op_vfnmacc_vv = 639,
67107f4964dSYang Liu     rv_op_vfnmacc_vf = 640,
67207f4964dSYang Liu     rv_op_vfmsac_vv = 641,
67307f4964dSYang Liu     rv_op_vfmsac_vf = 642,
67407f4964dSYang Liu     rv_op_vfnmsac_vv = 643,
67507f4964dSYang Liu     rv_op_vfnmsac_vf = 644,
67607f4964dSYang Liu     rv_op_vfmadd_vv = 645,
67707f4964dSYang Liu     rv_op_vfmadd_vf = 646,
67807f4964dSYang Liu     rv_op_vfnmadd_vv = 647,
67907f4964dSYang Liu     rv_op_vfnmadd_vf = 648,
68007f4964dSYang Liu     rv_op_vfmsub_vv = 649,
68107f4964dSYang Liu     rv_op_vfmsub_vf = 650,
68207f4964dSYang Liu     rv_op_vfnmsub_vv = 651,
68307f4964dSYang Liu     rv_op_vfnmsub_vf = 652,
68407f4964dSYang Liu     rv_op_vfwmacc_vv = 653,
68507f4964dSYang Liu     rv_op_vfwmacc_vf = 654,
68607f4964dSYang Liu     rv_op_vfwnmacc_vv = 655,
68707f4964dSYang Liu     rv_op_vfwnmacc_vf = 656,
68807f4964dSYang Liu     rv_op_vfwmsac_vv = 657,
68907f4964dSYang Liu     rv_op_vfwmsac_vf = 658,
69007f4964dSYang Liu     rv_op_vfwnmsac_vv = 659,
69107f4964dSYang Liu     rv_op_vfwnmsac_vf = 660,
69207f4964dSYang Liu     rv_op_vfsqrt_v = 661,
69307f4964dSYang Liu     rv_op_vfrsqrt7_v = 662,
69407f4964dSYang Liu     rv_op_vfrec7_v = 663,
69507f4964dSYang Liu     rv_op_vfmin_vv = 664,
69607f4964dSYang Liu     rv_op_vfmin_vf = 665,
69707f4964dSYang Liu     rv_op_vfmax_vv = 666,
69807f4964dSYang Liu     rv_op_vfmax_vf = 667,
69907f4964dSYang Liu     rv_op_vfsgnj_vv = 668,
70007f4964dSYang Liu     rv_op_vfsgnj_vf = 669,
70107f4964dSYang Liu     rv_op_vfsgnjn_vv = 670,
70207f4964dSYang Liu     rv_op_vfsgnjn_vf = 671,
70307f4964dSYang Liu     rv_op_vfsgnjx_vv = 672,
70407f4964dSYang Liu     rv_op_vfsgnjx_vf = 673,
70507f4964dSYang Liu     rv_op_vfslide1up_vf = 674,
70607f4964dSYang Liu     rv_op_vfslide1down_vf = 675,
70707f4964dSYang Liu     rv_op_vmfeq_vv = 676,
70807f4964dSYang Liu     rv_op_vmfeq_vf = 677,
70907f4964dSYang Liu     rv_op_vmfne_vv = 678,
71007f4964dSYang Liu     rv_op_vmfne_vf = 679,
71107f4964dSYang Liu     rv_op_vmflt_vv = 680,
71207f4964dSYang Liu     rv_op_vmflt_vf = 681,
71307f4964dSYang Liu     rv_op_vmfle_vv = 682,
71407f4964dSYang Liu     rv_op_vmfle_vf = 683,
71507f4964dSYang Liu     rv_op_vmfgt_vf = 684,
71607f4964dSYang Liu     rv_op_vmfge_vf = 685,
71707f4964dSYang Liu     rv_op_vfclass_v = 686,
71807f4964dSYang Liu     rv_op_vfmerge_vfm = 687,
71907f4964dSYang Liu     rv_op_vfmv_v_f = 688,
72007f4964dSYang Liu     rv_op_vfcvt_xu_f_v = 689,
72107f4964dSYang Liu     rv_op_vfcvt_x_f_v = 690,
72207f4964dSYang Liu     rv_op_vfcvt_f_xu_v = 691,
72307f4964dSYang Liu     rv_op_vfcvt_f_x_v = 692,
72407f4964dSYang Liu     rv_op_vfcvt_rtz_xu_f_v = 693,
72507f4964dSYang Liu     rv_op_vfcvt_rtz_x_f_v = 694,
72607f4964dSYang Liu     rv_op_vfwcvt_xu_f_v = 695,
72707f4964dSYang Liu     rv_op_vfwcvt_x_f_v = 696,
72807f4964dSYang Liu     rv_op_vfwcvt_f_xu_v = 697,
72907f4964dSYang Liu     rv_op_vfwcvt_f_x_v = 698,
73007f4964dSYang Liu     rv_op_vfwcvt_f_f_v = 699,
73107f4964dSYang Liu     rv_op_vfwcvt_rtz_xu_f_v = 700,
73207f4964dSYang Liu     rv_op_vfwcvt_rtz_x_f_v = 701,
73307f4964dSYang Liu     rv_op_vfncvt_xu_f_w = 702,
73407f4964dSYang Liu     rv_op_vfncvt_x_f_w = 703,
73507f4964dSYang Liu     rv_op_vfncvt_f_xu_w = 704,
73607f4964dSYang Liu     rv_op_vfncvt_f_x_w = 705,
73707f4964dSYang Liu     rv_op_vfncvt_f_f_w = 706,
73807f4964dSYang Liu     rv_op_vfncvt_rod_f_f_w = 707,
73907f4964dSYang Liu     rv_op_vfncvt_rtz_xu_f_w = 708,
74007f4964dSYang Liu     rv_op_vfncvt_rtz_x_f_w = 709,
74107f4964dSYang Liu     rv_op_vredsum_vs = 710,
74207f4964dSYang Liu     rv_op_vredand_vs = 711,
74307f4964dSYang Liu     rv_op_vredor_vs = 712,
74407f4964dSYang Liu     rv_op_vredxor_vs = 713,
74507f4964dSYang Liu     rv_op_vredminu_vs = 714,
74607f4964dSYang Liu     rv_op_vredmin_vs = 715,
74707f4964dSYang Liu     rv_op_vredmaxu_vs = 716,
74807f4964dSYang Liu     rv_op_vredmax_vs = 717,
74907f4964dSYang Liu     rv_op_vwredsumu_vs = 718,
75007f4964dSYang Liu     rv_op_vwredsum_vs = 719,
75107f4964dSYang Liu     rv_op_vfredusum_vs = 720,
75207f4964dSYang Liu     rv_op_vfredosum_vs = 721,
75307f4964dSYang Liu     rv_op_vfredmin_vs = 722,
75407f4964dSYang Liu     rv_op_vfredmax_vs = 723,
75507f4964dSYang Liu     rv_op_vfwredusum_vs = 724,
75607f4964dSYang Liu     rv_op_vfwredosum_vs = 725,
75707f4964dSYang Liu     rv_op_vmand_mm = 726,
75807f4964dSYang Liu     rv_op_vmnand_mm = 727,
75907f4964dSYang Liu     rv_op_vmandn_mm = 728,
76007f4964dSYang Liu     rv_op_vmxor_mm = 729,
76107f4964dSYang Liu     rv_op_vmor_mm = 730,
76207f4964dSYang Liu     rv_op_vmnor_mm = 731,
76307f4964dSYang Liu     rv_op_vmorn_mm = 732,
76407f4964dSYang Liu     rv_op_vmxnor_mm = 733,
76507f4964dSYang Liu     rv_op_vcpop_m = 734,
76607f4964dSYang Liu     rv_op_vfirst_m = 735,
76707f4964dSYang Liu     rv_op_vmsbf_m = 736,
76807f4964dSYang Liu     rv_op_vmsif_m = 737,
76907f4964dSYang Liu     rv_op_vmsof_m = 738,
77007f4964dSYang Liu     rv_op_viota_m = 739,
77107f4964dSYang Liu     rv_op_vid_v = 740,
77207f4964dSYang Liu     rv_op_vmv_x_s = 741,
77307f4964dSYang Liu     rv_op_vmv_s_x = 742,
77407f4964dSYang Liu     rv_op_vfmv_f_s = 743,
77507f4964dSYang Liu     rv_op_vfmv_s_f = 744,
77607f4964dSYang Liu     rv_op_vslideup_vx = 745,
77707f4964dSYang Liu     rv_op_vslideup_vi = 746,
77807f4964dSYang Liu     rv_op_vslide1up_vx = 747,
77907f4964dSYang Liu     rv_op_vslidedown_vx = 748,
78007f4964dSYang Liu     rv_op_vslidedown_vi = 749,
78107f4964dSYang Liu     rv_op_vslide1down_vx = 750,
78207f4964dSYang Liu     rv_op_vrgather_vv = 751,
78307f4964dSYang Liu     rv_op_vrgatherei16_vv = 752,
78407f4964dSYang Liu     rv_op_vrgather_vx = 753,
78507f4964dSYang Liu     rv_op_vrgather_vi = 754,
78607f4964dSYang Liu     rv_op_vcompress_vm = 755,
78707f4964dSYang Liu     rv_op_vmv1r_v = 756,
78807f4964dSYang Liu     rv_op_vmv2r_v = 757,
78907f4964dSYang Liu     rv_op_vmv4r_v = 758,
79007f4964dSYang Liu     rv_op_vmv8r_v = 759,
79107f4964dSYang Liu     rv_op_vzext_vf2 = 760,
79207f4964dSYang Liu     rv_op_vzext_vf4 = 761,
79307f4964dSYang Liu     rv_op_vzext_vf8 = 762,
79407f4964dSYang Liu     rv_op_vsext_vf2 = 763,
79507f4964dSYang Liu     rv_op_vsext_vf4 = 764,
79607f4964dSYang Liu     rv_op_vsext_vf8 = 765,
79707f4964dSYang Liu     rv_op_vsetvli = 766,
79807f4964dSYang Liu     rv_op_vsetivli = 767,
79907f4964dSYang Liu     rv_op_vsetvl = 768,
8002c71d02eSWeiwei Li     rv_op_c_zext_b = 769,
8012c71d02eSWeiwei Li     rv_op_c_sext_b = 770,
8022c71d02eSWeiwei Li     rv_op_c_zext_h = 771,
8032c71d02eSWeiwei Li     rv_op_c_sext_h = 772,
8042c71d02eSWeiwei Li     rv_op_c_zext_w = 773,
8052c71d02eSWeiwei Li     rv_op_c_not = 774,
8062c71d02eSWeiwei Li     rv_op_c_mul = 775,
8072c71d02eSWeiwei Li     rv_op_c_lbu = 776,
8082c71d02eSWeiwei Li     rv_op_c_lhu = 777,
8092c71d02eSWeiwei Li     rv_op_c_lh = 778,
8102c71d02eSWeiwei Li     rv_op_c_sb = 779,
8112c71d02eSWeiwei Li     rv_op_c_sh = 780,
8122c71d02eSWeiwei Li     rv_op_cm_push = 781,
8132c71d02eSWeiwei Li     rv_op_cm_pop = 782,
8142c71d02eSWeiwei Li     rv_op_cm_popret = 783,
8152c71d02eSWeiwei Li     rv_op_cm_popretz = 784,
8162c71d02eSWeiwei Li     rv_op_cm_mva01s = 785,
8172c71d02eSWeiwei Li     rv_op_cm_mvsa01 = 786,
8182c71d02eSWeiwei Li     rv_op_cm_jt = 787,
8192c71d02eSWeiwei Li     rv_op_cm_jalt = 788,
820d397be9aSRichard Henderson     rv_op_czero_eqz = 789,
821d397be9aSRichard Henderson     rv_op_czero_nez = 790,
82232b2d75bSWeiwei Li     rv_op_fcvt_bf16_s = 791,
82332b2d75bSWeiwei Li     rv_op_fcvt_s_bf16 = 792,
82432b2d75bSWeiwei Li     rv_op_vfncvtbf16_f_f_w = 793,
82532b2d75bSWeiwei Li     rv_op_vfwcvtbf16_f_f_v = 794,
82632b2d75bSWeiwei Li     rv_op_vfwmaccbf16_vv = 795,
82732b2d75bSWeiwei Li     rv_op_vfwmaccbf16_vf = 796,
82832b2d75bSWeiwei Li     rv_op_flh = 797,
82932b2d75bSWeiwei Li     rv_op_fsh = 798,
83032b2d75bSWeiwei Li     rv_op_fmv_h_x = 799,
83132b2d75bSWeiwei Li     rv_op_fmv_x_h = 800,
832a47842d1SChristoph Müllner     rv_op_fli_s = 801,
833a47842d1SChristoph Müllner     rv_op_fli_d = 802,
834a47842d1SChristoph Müllner     rv_op_fli_q = 803,
835a47842d1SChristoph Müllner     rv_op_fli_h = 804,
836a47842d1SChristoph Müllner     rv_op_fminm_s = 805,
837a47842d1SChristoph Müllner     rv_op_fmaxm_s = 806,
838a47842d1SChristoph Müllner     rv_op_fminm_d = 807,
839a47842d1SChristoph Müllner     rv_op_fmaxm_d = 808,
840a47842d1SChristoph Müllner     rv_op_fminm_q = 809,
841a47842d1SChristoph Müllner     rv_op_fmaxm_q = 810,
842a47842d1SChristoph Müllner     rv_op_fminm_h = 811,
843a47842d1SChristoph Müllner     rv_op_fmaxm_h = 812,
844a47842d1SChristoph Müllner     rv_op_fround_s = 813,
845a47842d1SChristoph Müllner     rv_op_froundnx_s = 814,
846a47842d1SChristoph Müllner     rv_op_fround_d = 815,
847a47842d1SChristoph Müllner     rv_op_froundnx_d = 816,
848a47842d1SChristoph Müllner     rv_op_fround_q = 817,
849a47842d1SChristoph Müllner     rv_op_froundnx_q = 818,
850a47842d1SChristoph Müllner     rv_op_fround_h = 819,
851a47842d1SChristoph Müllner     rv_op_froundnx_h = 820,
852a47842d1SChristoph Müllner     rv_op_fcvtmod_w_d = 821,
853a47842d1SChristoph Müllner     rv_op_fmvh_x_d = 822,
854a47842d1SChristoph Müllner     rv_op_fmvp_d_x = 823,
855a47842d1SChristoph Müllner     rv_op_fmvh_x_q = 824,
856a47842d1SChristoph Müllner     rv_op_fmvp_q_x = 825,
857a47842d1SChristoph Müllner     rv_op_fleq_s = 826,
858a47842d1SChristoph Müllner     rv_op_fltq_s = 827,
859a47842d1SChristoph Müllner     rv_op_fleq_d = 828,
860a47842d1SChristoph Müllner     rv_op_fltq_d = 829,
861a47842d1SChristoph Müllner     rv_op_fleq_q = 830,
862a47842d1SChristoph Müllner     rv_op_fltq_q = 831,
863a47842d1SChristoph Müllner     rv_op_fleq_h = 832,
864a47842d1SChristoph Müllner     rv_op_fltq_h = 833,
8659d92f56dSMax Chou     rv_op_vaesdf_vv = 834,
8669d92f56dSMax Chou     rv_op_vaesdf_vs = 835,
8679d92f56dSMax Chou     rv_op_vaesdm_vv = 836,
8689d92f56dSMax Chou     rv_op_vaesdm_vs = 837,
8699d92f56dSMax Chou     rv_op_vaesef_vv = 838,
8709d92f56dSMax Chou     rv_op_vaesef_vs = 839,
8719d92f56dSMax Chou     rv_op_vaesem_vv = 840,
8729d92f56dSMax Chou     rv_op_vaesem_vs = 841,
8739d92f56dSMax Chou     rv_op_vaeskf1_vi = 842,
8749d92f56dSMax Chou     rv_op_vaeskf2_vi = 843,
8759d92f56dSMax Chou     rv_op_vaesz_vs = 844,
8769d92f56dSMax Chou     rv_op_vandn_vv = 845,
8779d92f56dSMax Chou     rv_op_vandn_vx = 846,
8789d92f56dSMax Chou     rv_op_vbrev_v = 847,
8799d92f56dSMax Chou     rv_op_vbrev8_v = 848,
8809d92f56dSMax Chou     rv_op_vclmul_vv = 849,
8819d92f56dSMax Chou     rv_op_vclmul_vx = 850,
8829d92f56dSMax Chou     rv_op_vclmulh_vv = 851,
8839d92f56dSMax Chou     rv_op_vclmulh_vx = 852,
8849d92f56dSMax Chou     rv_op_vclz_v = 853,
8859d92f56dSMax Chou     rv_op_vcpop_v = 854,
8869d92f56dSMax Chou     rv_op_vctz_v = 855,
8879d92f56dSMax Chou     rv_op_vghsh_vv = 856,
8889d92f56dSMax Chou     rv_op_vgmul_vv = 857,
8899d92f56dSMax Chou     rv_op_vrev8_v = 858,
8909d92f56dSMax Chou     rv_op_vrol_vv = 859,
8919d92f56dSMax Chou     rv_op_vrol_vx = 860,
8929d92f56dSMax Chou     rv_op_vror_vv = 861,
8939d92f56dSMax Chou     rv_op_vror_vx = 862,
8949d92f56dSMax Chou     rv_op_vror_vi = 863,
8959d92f56dSMax Chou     rv_op_vsha2ch_vv = 864,
8969d92f56dSMax Chou     rv_op_vsha2cl_vv = 865,
8979d92f56dSMax Chou     rv_op_vsha2ms_vv = 866,
8989d92f56dSMax Chou     rv_op_vsm3c_vi = 867,
8999d92f56dSMax Chou     rv_op_vsm3me_vv = 868,
9009d92f56dSMax Chou     rv_op_vsm4k_vi = 869,
9019d92f56dSMax Chou     rv_op_vsm4r_vv = 870,
9029d92f56dSMax Chou     rv_op_vsm4r_vs = 871,
9039d92f56dSMax Chou     rv_op_vwsll_vv = 872,
9049d92f56dSMax Chou     rv_op_vwsll_vx = 873,
9059d92f56dSMax Chou     rv_op_vwsll_vi = 874,
9066c848c19SRob Bradford     rv_op_amocas_w = 875,
9076c848c19SRob Bradford     rv_op_amocas_d = 876,
9086c848c19SRob Bradford     rv_op_amocas_q = 877,
909d98883d1SLIU Zhiwei     rv_mop_r_0     = 878,
910d98883d1SLIU Zhiwei     rv_mop_r_1     = 879,
911d98883d1SLIU Zhiwei     rv_mop_r_2     = 880,
912d98883d1SLIU Zhiwei     rv_mop_r_3     = 881,
913d98883d1SLIU Zhiwei     rv_mop_r_4     = 882,
914d98883d1SLIU Zhiwei     rv_mop_r_5     = 883,
915d98883d1SLIU Zhiwei     rv_mop_r_6     = 884,
916d98883d1SLIU Zhiwei     rv_mop_r_7     = 885,
917d98883d1SLIU Zhiwei     rv_mop_r_8     = 886,
918d98883d1SLIU Zhiwei     rv_mop_r_9     = 887,
919d98883d1SLIU Zhiwei     rv_mop_r_10    = 888,
920d98883d1SLIU Zhiwei     rv_mop_r_11    = 889,
921d98883d1SLIU Zhiwei     rv_mop_r_12    = 890,
922d98883d1SLIU Zhiwei     rv_mop_r_13    = 891,
923d98883d1SLIU Zhiwei     rv_mop_r_14    = 892,
924d98883d1SLIU Zhiwei     rv_mop_r_15    = 893,
925d98883d1SLIU Zhiwei     rv_mop_r_16    = 894,
926d98883d1SLIU Zhiwei     rv_mop_r_17    = 895,
927d98883d1SLIU Zhiwei     rv_mop_r_18    = 896,
928d98883d1SLIU Zhiwei     rv_mop_r_19    = 897,
929d98883d1SLIU Zhiwei     rv_mop_r_20    = 898,
930d98883d1SLIU Zhiwei     rv_mop_r_21    = 899,
931d98883d1SLIU Zhiwei     rv_mop_r_22    = 900,
932d98883d1SLIU Zhiwei     rv_mop_r_23    = 901,
933d98883d1SLIU Zhiwei     rv_mop_r_24    = 902,
934d98883d1SLIU Zhiwei     rv_mop_r_25    = 903,
935d98883d1SLIU Zhiwei     rv_mop_r_26    = 904,
936d98883d1SLIU Zhiwei     rv_mop_r_27    = 905,
937d98883d1SLIU Zhiwei     rv_mop_r_28    = 906,
938d98883d1SLIU Zhiwei     rv_mop_r_29    = 907,
939d98883d1SLIU Zhiwei     rv_mop_r_30    = 908,
940d98883d1SLIU Zhiwei     rv_mop_r_31    = 909,
941d98883d1SLIU Zhiwei     rv_mop_rr_0    = 910,
942d98883d1SLIU Zhiwei     rv_mop_rr_1    = 911,
943d98883d1SLIU Zhiwei     rv_mop_rr_2    = 912,
944d98883d1SLIU Zhiwei     rv_mop_rr_3    = 913,
945d98883d1SLIU Zhiwei     rv_mop_rr_4    = 914,
946d98883d1SLIU Zhiwei     rv_mop_rr_5    = 915,
947d98883d1SLIU Zhiwei     rv_mop_rr_6    = 916,
948d98883d1SLIU Zhiwei     rv_mop_rr_7    = 917,
94967e98ebaSLIU Zhiwei     rv_c_mop_1     = 918,
95067e98ebaSLIU Zhiwei     rv_c_mop_3     = 919,
95167e98ebaSLIU Zhiwei     rv_c_mop_5     = 920,
95267e98ebaSLIU Zhiwei     rv_c_mop_7     = 921,
95367e98ebaSLIU Zhiwei     rv_c_mop_9     = 922,
95467e98ebaSLIU Zhiwei     rv_c_mop_11    = 923,
95567e98ebaSLIU Zhiwei     rv_c_mop_13    = 924,
95667e98ebaSLIU Zhiwei     rv_c_mop_15    = 925,
957ae4bdcefSLIU Zhiwei     rv_op_amoswap_b = 926,
958ae4bdcefSLIU Zhiwei     rv_op_amoadd_b  = 927,
959ae4bdcefSLIU Zhiwei     rv_op_amoxor_b  = 928,
960ae4bdcefSLIU Zhiwei     rv_op_amoor_b   = 929,
961ae4bdcefSLIU Zhiwei     rv_op_amoand_b  = 930,
962ae4bdcefSLIU Zhiwei     rv_op_amomin_b  = 931,
963ae4bdcefSLIU Zhiwei     rv_op_amomax_b  = 932,
964ae4bdcefSLIU Zhiwei     rv_op_amominu_b = 933,
965ae4bdcefSLIU Zhiwei     rv_op_amomaxu_b = 934,
966ae4bdcefSLIU Zhiwei     rv_op_amoswap_h = 935,
967ae4bdcefSLIU Zhiwei     rv_op_amoadd_h  = 936,
968ae4bdcefSLIU Zhiwei     rv_op_amoxor_h  = 937,
969ae4bdcefSLIU Zhiwei     rv_op_amoor_h   = 938,
970ae4bdcefSLIU Zhiwei     rv_op_amoand_h  = 939,
971ae4bdcefSLIU Zhiwei     rv_op_amomin_h  = 940,
972ae4bdcefSLIU Zhiwei     rv_op_amomax_h  = 941,
973ae4bdcefSLIU Zhiwei     rv_op_amominu_h = 942,
974ae4bdcefSLIU Zhiwei     rv_op_amomaxu_h = 943,
975ae4bdcefSLIU Zhiwei     rv_op_amocas_b  = 944,
976ae4bdcefSLIU Zhiwei     rv_op_amocas_h  = 945,
977*4d46d84eSBalaji Ravikumar     rv_op_wrs_sto = 946,
978*4d46d84eSBalaji Ravikumar     rv_op_wrs_nto = 947,
979ea103259SMichael Clark } rv_op;
980ea103259SMichael Clark 
981ea103259SMichael Clark /* register names */
982ea103259SMichael Clark 
983ea103259SMichael Clark static const char rv_ireg_name_sym[32][5] = {
984ea103259SMichael Clark     "zero", "ra",   "sp",   "gp",   "tp",   "t0",   "t1",   "t2",
985ea103259SMichael Clark     "s0",   "s1",   "a0",   "a1",   "a2",   "a3",   "a4",   "a5",
986ea103259SMichael Clark     "a6",   "a7",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
987ea103259SMichael Clark     "s8",   "s9",   "s10",  "s11",  "t3",   "t4",   "t5",   "t6",
988ea103259SMichael Clark };
989ea103259SMichael Clark 
990ea103259SMichael Clark static const char rv_freg_name_sym[32][5] = {
991ea103259SMichael Clark     "ft0",  "ft1",  "ft2",  "ft3",  "ft4",  "ft5",  "ft6",  "ft7",
992ea103259SMichael Clark     "fs0",  "fs1",  "fa0",  "fa1",  "fa2",  "fa3",  "fa4",  "fa5",
993ea103259SMichael Clark     "fa6",  "fa7",  "fs2",  "fs3",  "fs4",  "fs5",  "fs6",  "fs7",
994ea103259SMichael Clark     "fs8",  "fs9",  "fs10", "fs11", "ft8",  "ft9",  "ft10", "ft11",
995ea103259SMichael Clark };
996ea103259SMichael Clark 
99707f4964dSYang Liu static const char rv_vreg_name_sym[32][4] = {
99807f4964dSYang Liu     "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",
99907f4964dSYang Liu     "v8",  "v9",  "v10", "v11", "v12", "v13", "v14", "v15",
100007f4964dSYang Liu     "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
100107f4964dSYang Liu     "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
100207f4964dSYang Liu };
100307f4964dSYang Liu 
1004a47842d1SChristoph Müllner /* The FLI.[HSDQ] numeric constants (0.0 for symbolic constants).
1005a47842d1SChristoph Müllner  * The constants use the hex floating-point literal representation
1006a47842d1SChristoph Müllner  * that is printed when using the printf %a format specifier,
1007a47842d1SChristoph Müllner  * which matches the output that is generated by the disassembler.
1008a47842d1SChristoph Müllner  */
1009a47842d1SChristoph Müllner static const char rv_fli_name_const[32][9] =
1010a47842d1SChristoph Müllner {
1011a47842d1SChristoph Müllner     "0x1p+0", "min", "0x1p-16", "0x1p-15",
1012a47842d1SChristoph Müllner     "0x1p-8", "0x1p-7", "0x1p-4", "0x1p-3",
1013a47842d1SChristoph Müllner     "0x1p-2", "0x1.4p-2", "0x1.8p-2", "0x1.cp-2",
1014a47842d1SChristoph Müllner     "0x1p-1", "0x1.4p-1", "0x1.8p-1", "0x1.cp-1",
1015a47842d1SChristoph Müllner     "0x1p+0", "0x1.4p+0", "0x1.8p+0", "0x1.cp+0",
1016a47842d1SChristoph Müllner     "0x1p+1", "0x1.4p+1", "0x1.8p+1", "0x1p+2",
1017a47842d1SChristoph Müllner     "0x1p+3", "0x1p+4", "0x1p+7", "0x1p+8",
1018a47842d1SChristoph Müllner     "0x1p+15", "0x1p+16", "inf", "nan"
1019a47842d1SChristoph Müllner };
1020a47842d1SChristoph Müllner 
1021ea103259SMichael Clark /* pseudo-instruction constraints */
1022ea103259SMichael Clark 
1023ea103259SMichael Clark static const rvc_constraint rvcc_jal[] = { rvc_rd_eq_ra, rvc_end };
102498624d13SWeiwei Li static const rvc_constraint rvcc_jalr[] = { rvc_rd_eq_ra, rvc_imm_eq_zero,
102598624d13SWeiwei Li                                             rvc_end };
102698624d13SWeiwei Li static const rvc_constraint rvcc_nop[] = { rvc_rd_eq_x0, rvc_rs1_eq_x0,
102798624d13SWeiwei Li                                            rvc_imm_eq_zero, rvc_end };
1028ea103259SMichael Clark static const rvc_constraint rvcc_mv[] = { rvc_imm_eq_zero, rvc_end };
1029ea103259SMichael Clark static const rvc_constraint rvcc_not[] = { rvc_imm_eq_n1, rvc_end };
1030ea103259SMichael Clark static const rvc_constraint rvcc_neg[] = { rvc_rs1_eq_x0, rvc_end };
1031ea103259SMichael Clark static const rvc_constraint rvcc_negw[] = { rvc_rs1_eq_x0, rvc_end };
103233b4f859SMichael Clark static const rvc_constraint rvcc_sext_w[] = { rvc_imm_eq_zero, rvc_end };
1033ea103259SMichael Clark static const rvc_constraint rvcc_seqz[] = { rvc_imm_eq_p1, rvc_end };
1034ea103259SMichael Clark static const rvc_constraint rvcc_snez[] = { rvc_rs1_eq_x0, rvc_end };
1035ea103259SMichael Clark static const rvc_constraint rvcc_sltz[] = { rvc_rs2_eq_x0, rvc_end };
1036ea103259SMichael Clark static const rvc_constraint rvcc_sgtz[] = { rvc_rs1_eq_x0, rvc_end };
1037ea103259SMichael Clark static const rvc_constraint rvcc_fmv_s[] = { rvc_rs2_eq_rs1, rvc_end };
1038ea103259SMichael Clark static const rvc_constraint rvcc_fabs_s[] = { rvc_rs2_eq_rs1, rvc_end };
1039ea103259SMichael Clark static const rvc_constraint rvcc_fneg_s[] = { rvc_rs2_eq_rs1, rvc_end };
1040ea103259SMichael Clark static const rvc_constraint rvcc_fmv_d[] = { rvc_rs2_eq_rs1, rvc_end };
1041ea103259SMichael Clark static const rvc_constraint rvcc_fabs_d[] = { rvc_rs2_eq_rs1, rvc_end };
1042ea103259SMichael Clark static const rvc_constraint rvcc_fneg_d[] = { rvc_rs2_eq_rs1, rvc_end };
1043ea103259SMichael Clark static const rvc_constraint rvcc_fmv_q[] = { rvc_rs2_eq_rs1, rvc_end };
1044ea103259SMichael Clark static const rvc_constraint rvcc_fabs_q[] = { rvc_rs2_eq_rs1, rvc_end };
1045ea103259SMichael Clark static const rvc_constraint rvcc_fneg_q[] = { rvc_rs2_eq_rs1, rvc_end };
1046ea103259SMichael Clark static const rvc_constraint rvcc_beqz[] = { rvc_rs2_eq_x0, rvc_end };
1047ea103259SMichael Clark static const rvc_constraint rvcc_bnez[] = { rvc_rs2_eq_x0, rvc_end };
1048ea103259SMichael Clark static const rvc_constraint rvcc_blez[] = { rvc_rs1_eq_x0, rvc_end };
1049ea103259SMichael Clark static const rvc_constraint rvcc_bgez[] = { rvc_rs2_eq_x0, rvc_end };
1050ea103259SMichael Clark static const rvc_constraint rvcc_bltz[] = { rvc_rs2_eq_x0, rvc_end };
1051ea103259SMichael Clark static const rvc_constraint rvcc_bgtz[] = { rvc_rs1_eq_x0, rvc_end };
1052ea103259SMichael Clark static const rvc_constraint rvcc_ble[] = { rvc_end };
1053ea103259SMichael Clark static const rvc_constraint rvcc_bleu[] = { rvc_end };
1054ea103259SMichael Clark static const rvc_constraint rvcc_bgt[] = { rvc_end };
1055ea103259SMichael Clark static const rvc_constraint rvcc_bgtu[] = { rvc_end };
1056ea103259SMichael Clark static const rvc_constraint rvcc_j[] = { rvc_rd_eq_x0, rvc_end };
105798624d13SWeiwei Li static const rvc_constraint rvcc_ret[] = { rvc_rd_eq_x0, rvc_rs1_eq_ra,
105898624d13SWeiwei Li                                            rvc_end };
105998624d13SWeiwei Li static const rvc_constraint rvcc_jr[] = { rvc_rd_eq_x0, rvc_imm_eq_zero,
106098624d13SWeiwei Li                                           rvc_end };
106198624d13SWeiwei Li static const rvc_constraint rvcc_rdcycle[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc00,
106298624d13SWeiwei Li                                                rvc_end };
106398624d13SWeiwei Li static const rvc_constraint rvcc_rdtime[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc01,
106498624d13SWeiwei Li                                               rvc_end };
106598624d13SWeiwei Li static const rvc_constraint rvcc_rdinstret[] = { rvc_rs1_eq_x0,
106698624d13SWeiwei Li                                                  rvc_csr_eq_0xc02, rvc_end };
106798624d13SWeiwei Li static const rvc_constraint rvcc_rdcycleh[] = { rvc_rs1_eq_x0,
106898624d13SWeiwei Li                                                 rvc_csr_eq_0xc80, rvc_end };
106998624d13SWeiwei Li static const rvc_constraint rvcc_rdtimeh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc81,
107098624d13SWeiwei Li                                                rvc_end };
10712e3df911SWladimir J. van der Laan static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0,
10722e3df911SWladimir J. van der Laan                                                   rvc_csr_eq_0xc82, rvc_end };
107398624d13SWeiwei Li static const rvc_constraint rvcc_frcsr[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x003,
107498624d13SWeiwei Li                                              rvc_end };
107598624d13SWeiwei Li static const rvc_constraint rvcc_frrm[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x002,
107698624d13SWeiwei Li                                             rvc_end };
107798624d13SWeiwei Li static const rvc_constraint rvcc_frflags[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x001,
107898624d13SWeiwei Li                                                rvc_end };
1079ea103259SMichael Clark static const rvc_constraint rvcc_fscsr[] = { rvc_csr_eq_0x003, rvc_end };
1080ea103259SMichael Clark static const rvc_constraint rvcc_fsrm[] = { rvc_csr_eq_0x002, rvc_end };
1081ea103259SMichael Clark static const rvc_constraint rvcc_fsflags[] = { rvc_csr_eq_0x001, rvc_end };
1082ea103259SMichael Clark static const rvc_constraint rvcc_fsrmi[] = { rvc_csr_eq_0x002, rvc_end };
1083ea103259SMichael Clark static const rvc_constraint rvcc_fsflagsi[] = { rvc_csr_eq_0x001, rvc_end };
1084ea103259SMichael Clark 
1085ea103259SMichael Clark /* pseudo-instruction metadata */
1086ea103259SMichael Clark 
1087ea103259SMichael Clark static const rv_comp_data rvcp_jal[] = {
1088ea103259SMichael Clark     { rv_op_j, rvcc_j },
1089ea103259SMichael Clark     { rv_op_jal, rvcc_jal },
1090ea103259SMichael Clark     { rv_op_illegal, NULL }
1091ea103259SMichael Clark };
1092ea103259SMichael Clark 
1093ea103259SMichael Clark static const rv_comp_data rvcp_jalr[] = {
1094ea103259SMichael Clark     { rv_op_ret, rvcc_ret },
1095ea103259SMichael Clark     { rv_op_jr, rvcc_jr },
1096ea103259SMichael Clark     { rv_op_jalr, rvcc_jalr },
1097ea103259SMichael Clark     { rv_op_illegal, NULL }
1098ea103259SMichael Clark };
1099ea103259SMichael Clark 
1100ea103259SMichael Clark static const rv_comp_data rvcp_beq[] = {
1101ea103259SMichael Clark     { rv_op_beqz, rvcc_beqz },
1102ea103259SMichael Clark     { rv_op_illegal, NULL }
1103ea103259SMichael Clark };
1104ea103259SMichael Clark 
1105ea103259SMichael Clark static const rv_comp_data rvcp_bne[] = {
1106ea103259SMichael Clark     { rv_op_bnez, rvcc_bnez },
1107ea103259SMichael Clark     { rv_op_illegal, NULL }
1108ea103259SMichael Clark };
1109ea103259SMichael Clark 
1110ea103259SMichael Clark static const rv_comp_data rvcp_blt[] = {
1111ea103259SMichael Clark     { rv_op_bltz, rvcc_bltz },
1112ea103259SMichael Clark     { rv_op_bgtz, rvcc_bgtz },
1113ea103259SMichael Clark     { rv_op_bgt, rvcc_bgt },
1114ea103259SMichael Clark     { rv_op_illegal, NULL }
1115ea103259SMichael Clark };
1116ea103259SMichael Clark 
1117ea103259SMichael Clark static const rv_comp_data rvcp_bge[] = {
1118ea103259SMichael Clark     { rv_op_blez, rvcc_blez },
1119ea103259SMichael Clark     { rv_op_bgez, rvcc_bgez },
1120ea103259SMichael Clark     { rv_op_ble, rvcc_ble },
1121ea103259SMichael Clark     { rv_op_illegal, NULL }
1122ea103259SMichael Clark };
1123ea103259SMichael Clark 
1124ea103259SMichael Clark static const rv_comp_data rvcp_bltu[] = {
1125ea103259SMichael Clark     { rv_op_bgtu, rvcc_bgtu },
1126ea103259SMichael Clark     { rv_op_illegal, NULL }
1127ea103259SMichael Clark };
1128ea103259SMichael Clark 
1129ea103259SMichael Clark static const rv_comp_data rvcp_bgeu[] = {
1130ea103259SMichael Clark     { rv_op_bleu, rvcc_bleu },
1131ea103259SMichael Clark     { rv_op_illegal, NULL }
1132ea103259SMichael Clark };
1133ea103259SMichael Clark 
1134ea103259SMichael Clark static const rv_comp_data rvcp_addi[] = {
1135ea103259SMichael Clark     { rv_op_nop, rvcc_nop },
1136ea103259SMichael Clark     { rv_op_mv, rvcc_mv },
1137ea103259SMichael Clark     { rv_op_illegal, NULL }
1138ea103259SMichael Clark };
1139ea103259SMichael Clark 
1140ea103259SMichael Clark static const rv_comp_data rvcp_sltiu[] = {
1141ea103259SMichael Clark     { rv_op_seqz, rvcc_seqz },
1142ea103259SMichael Clark     { rv_op_illegal, NULL }
1143ea103259SMichael Clark };
1144ea103259SMichael Clark 
1145ea103259SMichael Clark static const rv_comp_data rvcp_xori[] = {
1146ea103259SMichael Clark     { rv_op_not, rvcc_not },
1147ea103259SMichael Clark     { rv_op_illegal, NULL }
1148ea103259SMichael Clark };
1149ea103259SMichael Clark 
1150ea103259SMichael Clark static const rv_comp_data rvcp_sub[] = {
1151ea103259SMichael Clark     { rv_op_neg, rvcc_neg },
1152ea103259SMichael Clark     { rv_op_illegal, NULL }
1153ea103259SMichael Clark };
1154ea103259SMichael Clark 
1155ea103259SMichael Clark static const rv_comp_data rvcp_slt[] = {
1156ea103259SMichael Clark     { rv_op_sltz, rvcc_sltz },
1157ea103259SMichael Clark     { rv_op_sgtz, rvcc_sgtz },
1158ea103259SMichael Clark     { rv_op_illegal, NULL }
1159ea103259SMichael Clark };
1160ea103259SMichael Clark 
1161ea103259SMichael Clark static const rv_comp_data rvcp_sltu[] = {
1162ea103259SMichael Clark     { rv_op_snez, rvcc_snez },
1163ea103259SMichael Clark     { rv_op_illegal, NULL }
1164ea103259SMichael Clark };
1165ea103259SMichael Clark 
1166ea103259SMichael Clark static const rv_comp_data rvcp_addiw[] = {
1167ea103259SMichael Clark     { rv_op_sext_w, rvcc_sext_w },
1168ea103259SMichael Clark     { rv_op_illegal, NULL }
1169ea103259SMichael Clark };
1170ea103259SMichael Clark 
1171ea103259SMichael Clark static const rv_comp_data rvcp_subw[] = {
1172ea103259SMichael Clark     { rv_op_negw, rvcc_negw },
1173ea103259SMichael Clark     { rv_op_illegal, NULL }
1174ea103259SMichael Clark };
1175ea103259SMichael Clark 
1176ea103259SMichael Clark static const rv_comp_data rvcp_csrrw[] = {
1177ea103259SMichael Clark     { rv_op_fscsr, rvcc_fscsr },
1178ea103259SMichael Clark     { rv_op_fsrm, rvcc_fsrm },
1179ea103259SMichael Clark     { rv_op_fsflags, rvcc_fsflags },
1180ea103259SMichael Clark     { rv_op_illegal, NULL }
1181ea103259SMichael Clark };
1182ea103259SMichael Clark 
11835748c886SWeiwei Li 
1184ea103259SMichael Clark static const rv_comp_data rvcp_csrrs[] = {
1185ea103259SMichael Clark     { rv_op_rdcycle, rvcc_rdcycle },
1186ea103259SMichael Clark     { rv_op_rdtime, rvcc_rdtime },
1187ea103259SMichael Clark     { rv_op_rdinstret, rvcc_rdinstret },
1188ea103259SMichael Clark     { rv_op_rdcycleh, rvcc_rdcycleh },
1189ea103259SMichael Clark     { rv_op_rdtimeh, rvcc_rdtimeh },
1190ea103259SMichael Clark     { rv_op_rdinstreth, rvcc_rdinstreth },
1191ea103259SMichael Clark     { rv_op_frcsr, rvcc_frcsr },
1192ea103259SMichael Clark     { rv_op_frrm, rvcc_frrm },
1193ea103259SMichael Clark     { rv_op_frflags, rvcc_frflags },
1194ea103259SMichael Clark     { rv_op_illegal, NULL }
1195ea103259SMichael Clark };
1196ea103259SMichael Clark 
1197ea103259SMichael Clark static const rv_comp_data rvcp_csrrwi[] = {
1198ea103259SMichael Clark     { rv_op_fsrmi, rvcc_fsrmi },
1199ea103259SMichael Clark     { rv_op_fsflagsi, rvcc_fsflagsi },
1200ea103259SMichael Clark     { rv_op_illegal, NULL }
1201ea103259SMichael Clark };
1202ea103259SMichael Clark 
1203ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_s[] = {
1204ea103259SMichael Clark     { rv_op_fmv_s, rvcc_fmv_s },
1205ea103259SMichael Clark     { rv_op_illegal, NULL }
1206ea103259SMichael Clark };
1207ea103259SMichael Clark 
1208ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_s[] = {
1209ea103259SMichael Clark     { rv_op_fneg_s, rvcc_fneg_s },
1210ea103259SMichael Clark     { rv_op_illegal, NULL }
1211ea103259SMichael Clark };
1212ea103259SMichael Clark 
1213ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_s[] = {
1214ea103259SMichael Clark     { rv_op_fabs_s, rvcc_fabs_s },
1215ea103259SMichael Clark     { rv_op_illegal, NULL }
1216ea103259SMichael Clark };
1217ea103259SMichael Clark 
1218ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_d[] = {
1219ea103259SMichael Clark     { rv_op_fmv_d, rvcc_fmv_d },
1220ea103259SMichael Clark     { rv_op_illegal, NULL }
1221ea103259SMichael Clark };
1222ea103259SMichael Clark 
1223ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_d[] = {
1224ea103259SMichael Clark     { rv_op_fneg_d, rvcc_fneg_d },
1225ea103259SMichael Clark     { rv_op_illegal, NULL }
1226ea103259SMichael Clark };
1227ea103259SMichael Clark 
1228ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_d[] = {
1229ea103259SMichael Clark     { rv_op_fabs_d, rvcc_fabs_d },
1230ea103259SMichael Clark     { rv_op_illegal, NULL }
1231ea103259SMichael Clark };
1232ea103259SMichael Clark 
1233ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_q[] = {
1234ea103259SMichael Clark     { rv_op_fmv_q, rvcc_fmv_q },
1235ea103259SMichael Clark     { rv_op_illegal, NULL }
1236ea103259SMichael Clark };
1237ea103259SMichael Clark 
1238ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_q[] = {
1239ea103259SMichael Clark     { rv_op_fneg_q, rvcc_fneg_q },
1240ea103259SMichael Clark     { rv_op_illegal, NULL }
1241ea103259SMichael Clark };
1242ea103259SMichael Clark 
1243ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_q[] = {
1244ea103259SMichael Clark     { rv_op_fabs_q, rvcc_fabs_q },
1245ea103259SMichael Clark     { rv_op_illegal, NULL }
1246ea103259SMichael Clark };
1247ea103259SMichael Clark 
1248ea103259SMichael Clark /* instruction metadata */
1249ea103259SMichael Clark 
1250fd7c64f6SChristoph Müllner const rv_opcode_data rvi_opcode_data[] = {
1251ea103259SMichael Clark     { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 },
125236df75a0SChristoph Müllner     { "lui", rv_codec_u, rv_fmt_rd_uimm, NULL, 0, 0, 0 },
125336df75a0SChristoph Müllner     { "auipc", rv_codec_u, rv_fmt_rd_uoffset, NULL, 0, 0, 0 },
1254ea103259SMichael Clark     { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal, 0, 0, 0 },
1255ea103259SMichael Clark     { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr, 0, 0, 0 },
1256ea103259SMichael Clark     { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq, 0, 0, 0 },
1257ea103259SMichael Clark     { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne, 0, 0, 0 },
1258ea103259SMichael Clark     { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt, 0, 0, 0 },
1259ea103259SMichael Clark     { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge, 0, 0, 0 },
1260ea103259SMichael Clark     { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu, 0, 0, 0 },
1261ea103259SMichael Clark     { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu, 0, 0, 0 },
1262ea103259SMichael Clark     { "lb", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1263ea103259SMichael Clark     { "lh", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1264ea103259SMichael Clark     { "lw", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1265ea103259SMichael Clark     { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1266ea103259SMichael Clark     { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1267ea103259SMichael Clark     { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1268ea103259SMichael Clark     { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1269ea103259SMichael Clark     { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1270ea103259SMichael Clark     { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi, 0, 0, 0 },
1271ea103259SMichael Clark     { "slti", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1272ea103259SMichael Clark     { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu, 0, 0, 0 },
1273ea103259SMichael Clark     { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori, 0, 0, 0 },
1274ea103259SMichael Clark     { "ori", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1275ea103259SMichael Clark     { "andi", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1276ea103259SMichael Clark     { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1277ea103259SMichael Clark     { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1278ea103259SMichael Clark     { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1279ea103259SMichael Clark     { "add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1280ea103259SMichael Clark     { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub, 0, 0, 0 },
1281ea103259SMichael Clark     { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1282ea103259SMichael Clark     { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt, 0, 0, 0 },
1283ea103259SMichael Clark     { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu, 0, 0, 0 },
1284ea103259SMichael Clark     { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1285ea103259SMichael Clark     { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1286ea103259SMichael Clark     { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1287ea103259SMichael Clark     { "or", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1288ea103259SMichael Clark     { "and", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1289ea103259SMichael Clark     { "fence", rv_codec_r_f, rv_fmt_pred_succ, NULL, 0, 0, 0 },
1290ea103259SMichael Clark     { "fence.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1291ea103259SMichael Clark     { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1292ea103259SMichael Clark     { "ld", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1293ea103259SMichael Clark     { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1294ea103259SMichael Clark     { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw, 0, 0, 0 },
1295ea103259SMichael Clark     { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1296ea103259SMichael Clark     { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1297ea103259SMichael Clark     { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1298ea103259SMichael Clark     { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1299ea103259SMichael Clark     { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw, 0, 0, 0 },
1300ea103259SMichael Clark     { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1301ea103259SMichael Clark     { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1302ea103259SMichael Clark     { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1303ea103259SMichael Clark     { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1304ea103259SMichael Clark     { "lq", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 },
1305ea103259SMichael Clark     { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 },
1306ea103259SMichael Clark     { "addid", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1307ea103259SMichael Clark     { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1308ea103259SMichael Clark     { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1309ea103259SMichael Clark     { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
1310ea103259SMichael Clark     { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1311ea103259SMichael Clark     { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1312ea103259SMichael Clark     { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1313ea103259SMichael Clark     { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1314ea103259SMichael Clark     { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1315ea103259SMichael Clark     { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1316ea103259SMichael Clark     { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1317ea103259SMichael Clark     { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1318ea103259SMichael Clark     { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1319ea103259SMichael Clark     { "div", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1320ea103259SMichael Clark     { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1321ea103259SMichael Clark     { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1322ea103259SMichael Clark     { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1323ea103259SMichael Clark     { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1324ea103259SMichael Clark     { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1325ea103259SMichael Clark     { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1326ea103259SMichael Clark     { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1327ea103259SMichael Clark     { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1328ea103259SMichael Clark     { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1329ea103259SMichael Clark     { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1330ea103259SMichael Clark     { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1331ea103259SMichael Clark     { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1332ea103259SMichael Clark     { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
1333ea103259SMichael Clark     { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1334ea103259SMichael Clark     { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1335ea103259SMichael Clark     { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1336ea103259SMichael Clark     { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1337ea103259SMichael Clark     { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1338ea103259SMichael Clark     { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1339ea103259SMichael Clark     { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1340ea103259SMichael Clark     { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1341ea103259SMichael Clark     { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1342ea103259SMichael Clark     { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1343ea103259SMichael Clark     { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1344ea103259SMichael Clark     { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1345ea103259SMichael Clark     { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1346ea103259SMichael Clark     { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1347ea103259SMichael Clark     { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1348ea103259SMichael Clark     { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1349ea103259SMichael Clark     { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1350ea103259SMichael Clark     { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1351ea103259SMichael Clark     { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1352ea103259SMichael Clark     { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1353ea103259SMichael Clark     { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1354ea103259SMichael Clark     { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1355ea103259SMichael Clark     { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 },
1356ea103259SMichael Clark     { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1357ea103259SMichael Clark     { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1358ea103259SMichael Clark     { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1359ea103259SMichael Clark     { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1360ea103259SMichael Clark     { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1361ea103259SMichael Clark     { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1362ea103259SMichael Clark     { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1363ea103259SMichael Clark     { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1364ea103259SMichael Clark     { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1365ea103259SMichael Clark     { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
1366ea103259SMichael Clark     { "ecall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1367ea103259SMichael Clark     { "ebreak", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1368ea103259SMichael Clark     { "uret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1369ea103259SMichael Clark     { "sret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1370ea103259SMichael Clark     { "hret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1371ea103259SMichael Clark     { "mret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1372ea103259SMichael Clark     { "dret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1373ea103259SMichael Clark     { "sfence.vm", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 },
1374ea103259SMichael Clark     { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 },
1375ea103259SMichael Clark     { "wfi", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
1376ea103259SMichael Clark     { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw, 0, 0, 0 },
1377ea103259SMichael Clark     { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs, 0, 0, 0 },
1378ea103259SMichael Clark     { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1, NULL, 0, 0, 0 },
1379ea103259SMichael Clark     { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi, 0, 0, 0 },
1380ea103259SMichael Clark     { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 },
1381ea103259SMichael Clark     { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 },
1382ea103259SMichael Clark     { "flw", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1383ea103259SMichael Clark     { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1384ea103259SMichael Clark     { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1385ea103259SMichael Clark     { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1386ea103259SMichael Clark     { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1387ea103259SMichael Clark     { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1388ea103259SMichael Clark     { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1389ea103259SMichael Clark     { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1390ea103259SMichael Clark     { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1391ea103259SMichael Clark     { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1392ea103259SMichael Clark     { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s, 0, 0, 0 },
1393ea103259SMichael Clark     { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s, 0, 0, 0 },
1394ea103259SMichael Clark     { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s, 0, 0, 0 },
1395ea103259SMichael Clark     { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1396ea103259SMichael Clark     { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1397ea103259SMichael Clark     { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1398ea103259SMichael Clark     { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1399ea103259SMichael Clark     { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1400ea103259SMichael Clark     { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1401ea103259SMichael Clark     { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1402ea103259SMichael Clark     { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1403ea103259SMichael Clark     { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1404ea103259SMichael Clark     { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1405ea103259SMichael Clark     { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1406ea103259SMichael Clark     { "fclass.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1407ea103259SMichael Clark     { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1408ea103259SMichael Clark     { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1409ea103259SMichael Clark     { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1410ea103259SMichael Clark     { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1411ea103259SMichael Clark     { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1412ea103259SMichael Clark     { "fld", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1413ea103259SMichael Clark     { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1414ea103259SMichael Clark     { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1415ea103259SMichael Clark     { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1416ea103259SMichael Clark     { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1417ea103259SMichael Clark     { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1418ea103259SMichael Clark     { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1419ea103259SMichael Clark     { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1420ea103259SMichael Clark     { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1421ea103259SMichael Clark     { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1422ea103259SMichael Clark     { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d, 0, 0, 0 },
1423ea103259SMichael Clark     { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d, 0, 0, 0 },
1424ea103259SMichael Clark     { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d, 0, 0, 0 },
1425ea103259SMichael Clark     { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1426ea103259SMichael Clark     { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1427ea103259SMichael Clark     { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1428ea103259SMichael Clark     { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1429ea103259SMichael Clark     { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1430ea103259SMichael Clark     { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1431ea103259SMichael Clark     { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1432ea103259SMichael Clark     { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1433ea103259SMichael Clark     { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1434ea103259SMichael Clark     { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1435ea103259SMichael Clark     { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1436ea103259SMichael Clark     { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1437ea103259SMichael Clark     { "fclass.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1438ea103259SMichael Clark     { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1439ea103259SMichael Clark     { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1440ea103259SMichael Clark     { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1441ea103259SMichael Clark     { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1442ea103259SMichael Clark     { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1443ea103259SMichael Clark     { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1444ea103259SMichael Clark     { "flq", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
1445ea103259SMichael Clark     { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
1446ea103259SMichael Clark     { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1447ea103259SMichael Clark     { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1448ea103259SMichael Clark     { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1449ea103259SMichael Clark     { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 },
1450ea103259SMichael Clark     { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1451ea103259SMichael Clark     { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1452ea103259SMichael Clark     { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1453ea103259SMichael Clark     { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 },
1454ea103259SMichael Clark     { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q, 0, 0, 0 },
1455ea103259SMichael Clark     { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q, 0, 0, 0 },
1456ea103259SMichael Clark     { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q, 0, 0, 0 },
1457ea103259SMichael Clark     { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1458ea103259SMichael Clark     { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
1459ea103259SMichael Clark     { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1460ea103259SMichael Clark     { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1461ea103259SMichael Clark     { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1462ea103259SMichael Clark     { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1463ea103259SMichael Clark     { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
1464ea103259SMichael Clark     { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1465ea103259SMichael Clark     { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1466ea103259SMichael Clark     { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
1467ea103259SMichael Clark     { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1468ea103259SMichael Clark     { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1469ea103259SMichael Clark     { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1470ea103259SMichael Clark     { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1471ea103259SMichael Clark     { "fclass.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1472ea103259SMichael Clark     { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1473ea103259SMichael Clark     { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
1474ea103259SMichael Clark     { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1475ea103259SMichael Clark     { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 },
1476ea103259SMichael Clark     { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
1477ea103259SMichael Clark     { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
1478f88222daSMichael Clark     { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi,
1479f88222daSMichael Clark       rv_op_addi, rv_op_addi, rvcd_imm_nz },
148098624d13SWeiwei Li     { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld,
148198624d13SWeiwei Li       rv_op_fld, 0 },
148298624d13SWeiwei Li     { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_lw,
148398624d13SWeiwei Li       rv_op_lw },
1484ea103259SMichael Clark     { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 0 },
148598624d13SWeiwei Li     { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd,
148698624d13SWeiwei Li       rv_op_fsd, 0 },
148798624d13SWeiwei Li     { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op_sw,
148898624d13SWeiwei Li       rv_op_sw },
1489ea103259SMichael Clark     { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 0 },
149098624d13SWeiwei Li     { "c.nop", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_addi, rv_op_addi,
149198624d13SWeiwei Li       rv_op_addi },
1492f88222daSMichael Clark     { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi,
1493f88222daSMichael Clark       rv_op_addi, rvcd_imm_nz },
1494ea103259SMichael Clark     { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 },
149598624d13SWeiwei Li     { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi,
149698624d13SWeiwei Li       rv_op_addi },
1497f88222daSMichael Clark     { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi,
1498f88222daSMichael Clark       rv_op_addi, rv_op_addi, rvcd_imm_nz },
149936df75a0SChristoph Müllner     { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui, rv_op_lui,
1500f88222daSMichael Clark       rv_op_lui, rvcd_imm_nz },
1501f88222daSMichael Clark     { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli,
1502f88222daSMichael Clark       rv_op_srli, rv_op_srli, rvcd_imm_nz },
1503f88222daSMichael Clark     { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai,
1504f88222daSMichael Clark       rv_op_srai, rv_op_srai, rvcd_imm_nz },
1505f88222daSMichael Clark     { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi,
15062e3df911SWladimir J. van der Laan       rv_op_andi, rv_op_andi },
150798624d13SWeiwei Li     { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub,
150898624d13SWeiwei Li       rv_op_sub },
150998624d13SWeiwei Li     { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor, rv_op_xor,
151098624d13SWeiwei Li       rv_op_xor },
151198624d13SWeiwei Li     { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or, rv_op_or,
151298624d13SWeiwei Li       rv_op_or },
151398624d13SWeiwei Li     { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and, rv_op_and,
151498624d13SWeiwei Li       rv_op_and },
151598624d13SWeiwei Li     { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw, rv_op_subw,
151698624d13SWeiwei Li       rv_op_subw },
151798624d13SWeiwei Li     { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw, rv_op_addw,
151898624d13SWeiwei Li       rv_op_addw },
151998624d13SWeiwei Li     { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal, rv_op_jal,
152098624d13SWeiwei Li       rv_op_jal },
152198624d13SWeiwei Li     { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq, rv_op_beq,
152298624d13SWeiwei Li       rv_op_beq },
152398624d13SWeiwei Li     { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op_bne,
152498624d13SWeiwei Li       rv_op_bne },
1525f88222daSMichael Clark     { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli,
1526f88222daSMichael Clark       rv_op_slli, rv_op_slli, rvcd_imm_nz },
152798624d13SWeiwei Li     { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld,
152898624d13SWeiwei Li       rv_op_fld, rv_op_fld },
152998624d13SWeiwei Li     { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw,
153098624d13SWeiwei Li       rv_op_lw, rv_op_lw },
153198624d13SWeiwei Li     { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0,
153298624d13SWeiwei Li       0 },
153398624d13SWeiwei Li     { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr,
153498624d13SWeiwei Li       rv_op_jalr, rv_op_jalr },
153598624d13SWeiwei Li     { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi, rv_op_addi,
153698624d13SWeiwei Li       rv_op_addi },
153798624d13SWeiwei Li     { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak,
153898624d13SWeiwei Li       rv_op_ebreak, rv_op_ebreak },
153998624d13SWeiwei Li     { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr,
154098624d13SWeiwei Li       rv_op_jalr, rv_op_jalr },
154198624d13SWeiwei Li     { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add, rv_op_add,
154298624d13SWeiwei Li       rv_op_add },
154398624d13SWeiwei Li     { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd,
154498624d13SWeiwei Li       rv_op_fsd, rv_op_fsd },
154598624d13SWeiwei Li     { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw,
154698624d13SWeiwei Li       rv_op_sw, rv_op_sw },
154798624d13SWeiwei Li     { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0,
154898624d13SWeiwei Li       0 },
154998624d13SWeiwei Li     { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld,
155098624d13SWeiwei Li       rv_op_ld },
155198624d13SWeiwei Li     { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd,
155298624d13SWeiwei Li       rv_op_sd },
155398624d13SWeiwei Li     { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, 0, rv_op_addiw,
155498624d13SWeiwei Li       rv_op_addiw },
155598624d13SWeiwei Li     { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld,
155698624d13SWeiwei Li       rv_op_ld },
155798624d13SWeiwei Li     { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd,
155898624d13SWeiwei Li       rv_op_sd },
1559ea103259SMichael Clark     { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq },
1560ea103259SMichael Clark     { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq },
1561ea103259SMichael Clark     { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq },
156298624d13SWeiwei Li     { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0,
156398624d13SWeiwei Li       rv_op_sq },
1564ea103259SMichael Clark     { "nop", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 },
1565ea103259SMichael Clark     { "mv", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1566ea103259SMichael Clark     { "not", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1567ea103259SMichael Clark     { "neg", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1568ea103259SMichael Clark     { "negw", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1569ea103259SMichael Clark     { "sext.w", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1570ea103259SMichael Clark     { "seqz", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1571ea103259SMichael Clark     { "snez", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
1572ea103259SMichael Clark     { "sltz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1573ea103259SMichael Clark     { "sgtz", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
15740d581506SMikhail Tyutin     { "fmv.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15750d581506SMikhail Tyutin     { "fabs.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15760d581506SMikhail Tyutin     { "fneg.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15770d581506SMikhail Tyutin     { "fmv.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15780d581506SMikhail Tyutin     { "fabs.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15790d581506SMikhail Tyutin     { "fneg.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15800d581506SMikhail Tyutin     { "fmv.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15810d581506SMikhail Tyutin     { "fabs.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
15820d581506SMikhail Tyutin     { "fneg.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 },
1583ea103259SMichael Clark     { "beqz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1584ea103259SMichael Clark     { "bnez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1585ea103259SMichael Clark     { "blez", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 },
1586ea103259SMichael Clark     { "bgez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1587ea103259SMichael Clark     { "bltz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 },
1588ea103259SMichael Clark     { "bgtz", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 },
1589ea103259SMichael Clark     { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1590ea103259SMichael Clark     { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1591ea103259SMichael Clark     { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1592ea103259SMichael Clark     { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 },
1593ea103259SMichael Clark     { "j", rv_codec_uj, rv_fmt_offset, NULL, 0, 0, 0 },
1594ea103259SMichael Clark     { "ret", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 },
1595ea103259SMichael Clark     { "jr", rv_codec_i, rv_fmt_rs1, NULL, 0, 0, 0 },
1596ea103259SMichael Clark     { "rdcycle", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1597ea103259SMichael Clark     { "rdtime", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1598ea103259SMichael Clark     { "rdinstret", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1599ea103259SMichael Clark     { "rdcycleh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1600ea103259SMichael Clark     { "rdtimeh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1601ea103259SMichael Clark     { "rdinstreth", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1602ea103259SMichael Clark     { "frcsr", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1603ea103259SMichael Clark     { "frrm", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1604ea103259SMichael Clark     { "frflags", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 },
1605ea103259SMichael Clark     { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1606ea103259SMichael Clark     { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1607ea103259SMichael Clark     { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
1608ea103259SMichael Clark     { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 },
1609ea103259SMichael Clark     { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 },
161002c1b569SPhilipp Tomsich     { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
161102c1b569SPhilipp Tomsich     { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
161202c1b569SPhilipp Tomsich     { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
161302c1b569SPhilipp Tomsich     { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
161402c1b569SPhilipp Tomsich     { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
161502c1b569SPhilipp Tomsich     { "clz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
161602c1b569SPhilipp Tomsich     { "ctz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
161702c1b569SPhilipp Tomsich     { "cpop", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
161802c1b569SPhilipp Tomsich     { "sext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
161902c1b569SPhilipp Tomsich     { "sext.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16203de1fb71SPhilipp Tomsich     { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16213de1fb71SPhilipp Tomsich     { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16223de1fb71SPhilipp Tomsich     { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162302c1b569SPhilipp Tomsich     { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162402c1b569SPhilipp Tomsich     { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162502c1b569SPhilipp Tomsich     { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162602c1b569SPhilipp Tomsich     { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162702c1b569SPhilipp Tomsich     { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162802c1b569SPhilipp Tomsich     { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
162902c1b569SPhilipp Tomsich     { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163002c1b569SPhilipp Tomsich     { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163102c1b569SPhilipp Tomsich     { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163202c1b569SPhilipp Tomsich     { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163302c1b569SPhilipp Tomsich     { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163402c1b569SPhilipp Tomsich     { "min", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163502c1b569SPhilipp Tomsich     { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163602c1b569SPhilipp Tomsich     { "max", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163702c1b569SPhilipp Tomsich     { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
163802c1b569SPhilipp Tomsich     { "clzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
163927062902SIvan Klokov     { "ctzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
164002c1b569SPhilipp Tomsich     { "cpopw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
164113e269f6SIvan Klokov     { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
164202c1b569SPhilipp Tomsich     { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
164302c1b569SPhilipp Tomsich     { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
164402c1b569SPhilipp Tomsich     { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
164502c1b569SPhilipp Tomsich     { "rev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
164602c1b569SPhilipp Tomsich     { "zext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
164702c1b569SPhilipp Tomsich     { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 },
164802c1b569SPhilipp Tomsich     { "orc.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
164902c1b569SPhilipp Tomsich     { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
165002c1b569SPhilipp Tomsich     { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
165102c1b569SPhilipp Tomsich     { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
165202c1b569SPhilipp Tomsich     { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16535748c886SWeiwei Li     { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16545748c886SWeiwei Li     { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16555748c886SWeiwei Li     { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16565748c886SWeiwei Li     { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16575748c886SWeiwei Li     { "aes64ks1i", rv_codec_k_rnum,  rv_fmt_rd_rs1_rnum, NULL, 0, 0, 0 },
16585748c886SWeiwei Li     { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16595748c886SWeiwei Li     { "aes64im", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16605748c886SWeiwei Li     { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16615748c886SWeiwei Li     { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16625748c886SWeiwei Li     { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16635748c886SWeiwei Li     { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16645748c886SWeiwei Li     { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16655748c886SWeiwei Li     { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16665748c886SWeiwei Li     { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16675748c886SWeiwei Li     { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16685748c886SWeiwei Li     { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16695748c886SWeiwei Li     { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16705748c886SWeiwei Li     { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16715748c886SWeiwei Li     { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16725748c886SWeiwei Li     { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16735748c886SWeiwei Li     { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16745748c886SWeiwei Li     { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16755748c886SWeiwei Li     { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16765748c886SWeiwei Li     { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16775748c886SWeiwei Li     { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16785748c886SWeiwei Li     { "sm3p0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16795748c886SWeiwei Li     { "sm3p1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
16805748c886SWeiwei Li     { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16815748c886SWeiwei Li     { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 },
16825748c886SWeiwei Li     { "brev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16835748c886SWeiwei Li     { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16845748c886SWeiwei Li     { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16855748c886SWeiwei Li     { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
16865748c886SWeiwei Li     { "unzip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16875748c886SWeiwei Li     { "zip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16885748c886SWeiwei Li     { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
168907f4964dSYang Liu     { "xperm8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 },
16908deb4756SWeiwei Li     { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16918deb4756SWeiwei Li     { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16928deb4756SWeiwei Li     { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16938deb4756SWeiwei Li     { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16948deb4756SWeiwei Li     { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16958deb4756SWeiwei Li     { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16968deb4756SWeiwei Li     { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16978deb4756SWeiwei Li     { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16988deb4756SWeiwei Li     { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
16998deb4756SWeiwei Li     { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17008deb4756SWeiwei Li     { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17018deb4756SWeiwei Li     { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17028deb4756SWeiwei Li     { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17038deb4756SWeiwei Li     { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17048deb4756SWeiwei Li     { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17058deb4756SWeiwei Li     { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17068deb4756SWeiwei Li     { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17078deb4756SWeiwei Li     { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 },
17088deb4756SWeiwei Li     { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17098deb4756SWeiwei Li     { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17108deb4756SWeiwei Li     { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17118deb4756SWeiwei Li     { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17128deb4756SWeiwei Li     { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17138deb4756SWeiwei Li     { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17148deb4756SWeiwei Li     { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17158deb4756SWeiwei Li     { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17168deb4756SWeiwei Li     { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17178deb4756SWeiwei Li     { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17188deb4756SWeiwei Li     { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17198deb4756SWeiwei Li     { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17208deb4756SWeiwei Li     { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17218deb4756SWeiwei Li     { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17228deb4756SWeiwei Li     { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17238deb4756SWeiwei Li     { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
17248deb4756SWeiwei Li     { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17258deb4756SWeiwei Li     { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17268deb4756SWeiwei Li     { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17278deb4756SWeiwei Li     { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17288deb4756SWeiwei Li     { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17298deb4756SWeiwei Li     { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17308deb4756SWeiwei Li     { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17318deb4756SWeiwei Li     { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17328deb4756SWeiwei Li     { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17338deb4756SWeiwei Li     { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17348deb4756SWeiwei Li     { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17358deb4756SWeiwei Li     { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17368deb4756SWeiwei Li     { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17378deb4756SWeiwei Li     { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17388deb4756SWeiwei Li     { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17398deb4756SWeiwei Li     { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17408deb4756SWeiwei Li     { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17418deb4756SWeiwei Li     { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17428deb4756SWeiwei Li     { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17438deb4756SWeiwei Li     { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17448deb4756SWeiwei Li     { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17458deb4756SWeiwei Li     { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17468deb4756SWeiwei Li     { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17478deb4756SWeiwei Li     { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 },
17488deb4756SWeiwei Li     { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17498deb4756SWeiwei Li     { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17508deb4756SWeiwei Li     { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17518deb4756SWeiwei Li     { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17528deb4756SWeiwei Li     { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17538deb4756SWeiwei Li     { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17548deb4756SWeiwei Li     { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17558deb4756SWeiwei Li     { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17568deb4756SWeiwei Li     { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17578deb4756SWeiwei Li     { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17588deb4756SWeiwei Li     { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17598deb4756SWeiwei Li     { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17608deb4756SWeiwei Li     { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17618deb4756SWeiwei Li     { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17628deb4756SWeiwei Li     { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17638deb4756SWeiwei Li     { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17648deb4756SWeiwei Li     { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17658deb4756SWeiwei Li     { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17668deb4756SWeiwei Li     { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17678deb4756SWeiwei Li     { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17688deb4756SWeiwei Li     { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17698deb4756SWeiwei Li     { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17708deb4756SWeiwei Li     { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17718deb4756SWeiwei Li     { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17728deb4756SWeiwei Li     { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17738deb4756SWeiwei Li     { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
17748deb4756SWeiwei Li     { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17758deb4756SWeiwei Li     { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17768deb4756SWeiwei Li     { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
17778deb4756SWeiwei Li     { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17788deb4756SWeiwei Li     { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17798deb4756SWeiwei Li     { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
17808deb4756SWeiwei Li     { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
17818deb4756SWeiwei Li     { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17828deb4756SWeiwei Li     { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17838deb4756SWeiwei Li     { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17848deb4756SWeiwei Li     { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17858deb4756SWeiwei Li     { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17868deb4756SWeiwei Li     { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17878deb4756SWeiwei Li     { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17888deb4756SWeiwei Li     { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17898deb4756SWeiwei Li     { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
17908deb4756SWeiwei Li     { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17918deb4756SWeiwei Li     { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17928deb4756SWeiwei Li     { "vsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17938deb4756SWeiwei Li     { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17948deb4756SWeiwei Li     { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17958deb4756SWeiwei Li     { "vsrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17968deb4756SWeiwei Li     { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
17978deb4756SWeiwei Li     { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
17988deb4756SWeiwei Li     { "vsra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
17998deb4756SWeiwei Li     { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18008deb4756SWeiwei Li     { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18018deb4756SWeiwei Li     { "vnsrl.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18028deb4756SWeiwei Li     { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18038deb4756SWeiwei Li     { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18048deb4756SWeiwei Li     { "vnsra.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18058deb4756SWeiwei Li     { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18068deb4756SWeiwei Li     { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18078deb4756SWeiwei Li     { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18088deb4756SWeiwei Li     { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18098deb4756SWeiwei Li     { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18108deb4756SWeiwei Li     { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18118deb4756SWeiwei Li     { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18128deb4756SWeiwei Li     { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18138deb4756SWeiwei Li     { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18148deb4756SWeiwei Li     { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18158deb4756SWeiwei Li     { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18168deb4756SWeiwei Li     { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18178deb4756SWeiwei Li     { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18188deb4756SWeiwei Li     { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18198deb4756SWeiwei Li     { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18208deb4756SWeiwei Li     { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18218deb4756SWeiwei Li     { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18228deb4756SWeiwei Li     { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18238deb4756SWeiwei Li     { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18248deb4756SWeiwei Li     { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18258deb4756SWeiwei Li     { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18268deb4756SWeiwei Li     { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18278deb4756SWeiwei Li     { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18288deb4756SWeiwei Li     { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18298deb4756SWeiwei Li     { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18308deb4756SWeiwei Li     { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18318deb4756SWeiwei Li     { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18328deb4756SWeiwei Li     { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18338deb4756SWeiwei Li     { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18348deb4756SWeiwei Li     { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18358deb4756SWeiwei Li     { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18368deb4756SWeiwei Li     { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18378deb4756SWeiwei Li     { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18388deb4756SWeiwei Li     { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18398deb4756SWeiwei Li     { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18408deb4756SWeiwei Li     { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18418deb4756SWeiwei Li     { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18428deb4756SWeiwei Li     { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18438deb4756SWeiwei Li     { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18448deb4756SWeiwei Li     { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18458deb4756SWeiwei Li     { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18468deb4756SWeiwei Li     { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18478deb4756SWeiwei Li     { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18488deb4756SWeiwei Li     { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18498deb4756SWeiwei Li     { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18508deb4756SWeiwei Li     { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18518deb4756SWeiwei Li     { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18528deb4756SWeiwei Li     { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18538deb4756SWeiwei Li     { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18548deb4756SWeiwei Li     { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18558deb4756SWeiwei Li     { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18568deb4756SWeiwei Li     { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18578deb4756SWeiwei Li     { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18588deb4756SWeiwei Li     { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18598deb4756SWeiwei Li     { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18608deb4756SWeiwei Li     { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18618deb4756SWeiwei Li     { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18628deb4756SWeiwei Li     { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18638deb4756SWeiwei Li     { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18648deb4756SWeiwei Li     { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18658deb4756SWeiwei Li     { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18668deb4756SWeiwei Li     { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18678deb4756SWeiwei Li     { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
18688deb4756SWeiwei Li     { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18698deb4756SWeiwei Li     { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 },
18708deb4756SWeiwei Li     { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1, NULL, 0, 0, 0 },
18718deb4756SWeiwei Li     { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 },
18728deb4756SWeiwei Li     { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm, NULL, 0, 0, 0 },
18738deb4756SWeiwei Li     { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 },
18748deb4756SWeiwei Li     { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 },
18758deb4756SWeiwei Li     { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 },
18768deb4756SWeiwei Li     { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18778deb4756SWeiwei Li     { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18788deb4756SWeiwei Li     { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18798deb4756SWeiwei Li     { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18808deb4756SWeiwei Li     { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18818deb4756SWeiwei Li     { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 },
18828deb4756SWeiwei Li     { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18838deb4756SWeiwei Li     { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18848deb4756SWeiwei Li     { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18858deb4756SWeiwei Li     { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18868deb4756SWeiwei Li     { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18878deb4756SWeiwei Li     { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18888deb4756SWeiwei Li     { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18898deb4756SWeiwei Li     { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18908deb4756SWeiwei Li     { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18918deb4756SWeiwei Li     { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18928deb4756SWeiwei Li     { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18938deb4756SWeiwei Li     { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18948deb4756SWeiwei Li     { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18958deb4756SWeiwei Li     { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18968deb4756SWeiwei Li     { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
18978deb4756SWeiwei Li     { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
18988deb4756SWeiwei Li     { "vssrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
18998deb4756SWeiwei Li     { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19008deb4756SWeiwei Li     { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19018deb4756SWeiwei Li     { "vssra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19028deb4756SWeiwei Li     { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19038deb4756SWeiwei Li     { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19048deb4756SWeiwei Li     { "vnclipu.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19058deb4756SWeiwei Li     { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19068deb4756SWeiwei Li     { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
19078deb4756SWeiwei Li     { "vnclip.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
19088deb4756SWeiwei Li     { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19098deb4756SWeiwei Li     { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19108deb4756SWeiwei Li     { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19118deb4756SWeiwei Li     { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19128deb4756SWeiwei Li     { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19138deb4756SWeiwei Li     { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19148deb4756SWeiwei Li     { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19158deb4756SWeiwei Li     { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19168deb4756SWeiwei Li     { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19178deb4756SWeiwei Li     { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19188deb4756SWeiwei Li     { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19198deb4756SWeiwei Li     { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19208deb4756SWeiwei Li     { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19218deb4756SWeiwei Li     { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19228deb4756SWeiwei Li     { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19238deb4756SWeiwei Li     { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19248deb4756SWeiwei Li     { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19258deb4756SWeiwei Li     { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19268deb4756SWeiwei Li     { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19278deb4756SWeiwei Li     { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19288deb4756SWeiwei Li     { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19298deb4756SWeiwei Li     { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19308deb4756SWeiwei Li     { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19318deb4756SWeiwei Li     { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19328deb4756SWeiwei Li     { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19338deb4756SWeiwei Li     { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19348deb4756SWeiwei Li     { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19358deb4756SWeiwei Li     { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19368deb4756SWeiwei Li     { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19378deb4756SWeiwei Li     { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19388deb4756SWeiwei Li     { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19398deb4756SWeiwei Li     { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19408deb4756SWeiwei Li     { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19418deb4756SWeiwei Li     { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19428deb4756SWeiwei Li     { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19438deb4756SWeiwei Li     { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19448deb4756SWeiwei Li     { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19458deb4756SWeiwei Li     { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19468deb4756SWeiwei Li     { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19478deb4756SWeiwei Li     { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19488deb4756SWeiwei Li     { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19498deb4756SWeiwei Li     { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19508deb4756SWeiwei Li     { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
19518deb4756SWeiwei Li     { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
19528deb4756SWeiwei Li     { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19538deb4756SWeiwei Li     { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19548deb4756SWeiwei Li     { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
19558deb4756SWeiwei Li     { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19568deb4756SWeiwei Li     { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19578deb4756SWeiwei Li     { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19588deb4756SWeiwei Li     { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19598deb4756SWeiwei Li     { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19608deb4756SWeiwei Li     { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19618deb4756SWeiwei Li     { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19628deb4756SWeiwei Li     { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19638deb4756SWeiwei Li     { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19648deb4756SWeiwei Li     { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19658deb4756SWeiwei Li     { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19668deb4756SWeiwei Li     { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19678deb4756SWeiwei Li     { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19688deb4756SWeiwei Li     { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19698deb4756SWeiwei Li     { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19708deb4756SWeiwei Li     { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19718deb4756SWeiwei Li     { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19728deb4756SWeiwei Li     { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19738deb4756SWeiwei Li     { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
19748deb4756SWeiwei Li     { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19758deb4756SWeiwei Li     { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19768deb4756SWeiwei Li     { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 },
19778deb4756SWeiwei Li     { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19788deb4756SWeiwei Li     { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl, NULL, 0, 0, 0 },
19798deb4756SWeiwei Li     { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 },
19808deb4756SWeiwei Li     { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19818deb4756SWeiwei Li     { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19828deb4756SWeiwei Li     { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19838deb4756SWeiwei Li     { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19848deb4756SWeiwei Li     { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19858deb4756SWeiwei Li     { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19868deb4756SWeiwei Li     { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19878deb4756SWeiwei Li     { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19888deb4756SWeiwei Li     { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19898deb4756SWeiwei Li     { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19908deb4756SWeiwei Li     { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19918deb4756SWeiwei Li     { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19928deb4756SWeiwei Li     { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19938deb4756SWeiwei Li     { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19948deb4756SWeiwei Li     { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19958deb4756SWeiwei Li     { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19968deb4756SWeiwei Li     { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19978deb4756SWeiwei Li     { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19988deb4756SWeiwei Li     { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
19998deb4756SWeiwei Li     { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20008deb4756SWeiwei Li     { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20018deb4756SWeiwei Li     { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20028deb4756SWeiwei Li     { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20038deb4756SWeiwei Li     { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20048deb4756SWeiwei Li     { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20058deb4756SWeiwei Li     { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20068deb4756SWeiwei Li     { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20078deb4756SWeiwei Li     { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20088deb4756SWeiwei Li     { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20098deb4756SWeiwei Li     { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20108deb4756SWeiwei Li     { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20118deb4756SWeiwei Li     { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20128deb4756SWeiwei Li     { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20138deb4756SWeiwei Li     { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20148deb4756SWeiwei Li     { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20158deb4756SWeiwei Li     { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20168deb4756SWeiwei Li     { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20178deb4756SWeiwei Li     { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20188deb4756SWeiwei Li     { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20198deb4756SWeiwei Li     { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20208deb4756SWeiwei Li     { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20218deb4756SWeiwei Li     { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20228deb4756SWeiwei Li     { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20238deb4756SWeiwei Li     { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20248deb4756SWeiwei Li     { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20258deb4756SWeiwei Li     { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 },
20268deb4756SWeiwei Li     { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 },
20278deb4756SWeiwei Li     { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20288deb4756SWeiwei Li     { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20298deb4756SWeiwei Li     { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20308deb4756SWeiwei Li     { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20318deb4756SWeiwei Li     { "vid.v", rv_codec_v_r, rv_fmt_vd_vm, NULL, 0, 0, 0 },
20328deb4756SWeiwei Li     { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2, NULL, 0, 0, 0 },
20338deb4756SWeiwei Li     { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 },
20348deb4756SWeiwei Li     { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 },
20358deb4756SWeiwei Li     { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 },
20368deb4756SWeiwei Li     { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
20378deb4756SWeiwei Li     { "vslideup.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
20388deb4756SWeiwei Li     { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
20398deb4756SWeiwei Li     { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
20408deb4756SWeiwei Li     { "vslidedown.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
20418deb4756SWeiwei Li     { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
20428deb4756SWeiwei Li     { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20438deb4756SWeiwei Li     { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
20448deb4756SWeiwei Li     { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
20458deb4756SWeiwei Li     { "vrgather.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
20468deb4756SWeiwei Li     { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
20478deb4756SWeiwei Li     { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
20488deb4756SWeiwei Li     { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
20498deb4756SWeiwei Li     { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
20508deb4756SWeiwei Li     { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
20518deb4756SWeiwei Li     { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20528deb4756SWeiwei Li     { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20538deb4756SWeiwei Li     { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20548deb4756SWeiwei Li     { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20558deb4756SWeiwei Li     { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20568deb4756SWeiwei Li     { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
20578deb4756SWeiwei Li     { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli, NULL, 0, 0, 0 },
20588deb4756SWeiwei Li     { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli, NULL, 0, 0, 0 },
20598deb4756SWeiwei Li     { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
20602c71d02eSWeiwei Li     { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20612c71d02eSWeiwei Li     { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20622c71d02eSWeiwei Li     { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20632c71d02eSWeiwei Li     { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20642c71d02eSWeiwei Li     { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20652c71d02eSWeiwei Li     { "c.not", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 },
20662c71d02eSWeiwei Li     { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2, NULL, 0, 0 },
20672c71d02eSWeiwei Li     { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
20682c71d02eSWeiwei Li     { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
20692c71d02eSWeiwei Li     { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
20702c71d02eSWeiwei Li     { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
20712c71d02eSWeiwei Li     { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 },
20722c71d02eSWeiwei Li     { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist, NULL, 0, 0 },
20732c71d02eSWeiwei Li     { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 },
20742c71d02eSWeiwei Li     { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0, 0 },
20752c71d02eSWeiwei Li     { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 },
20762c71d02eSWeiwei Li     { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
20772c71d02eSWeiwei Li     { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 },
20782c71d02eSWeiwei Li     { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 },
20792c71d02eSWeiwei Li     { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 },
2080d397be9aSRichard Henderson     { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2081d397be9aSRichard Henderson     { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
208232b2d75bSWeiwei Li     { "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
208332b2d75bSWeiwei Li     { "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
208432b2d75bSWeiwei Li     { "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
208532b2d75bSWeiwei Li     { "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
208632b2d75bSWeiwei Li     { "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 },
208732b2d75bSWeiwei Li     { "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 },
208832b2d75bSWeiwei Li     { "flh", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 },
208932b2d75bSWeiwei Li     { "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 },
209032b2d75bSWeiwei Li     { "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 },
209132b2d75bSWeiwei Li     { "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2092a47842d1SChristoph Müllner     { "fli.s", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2093a47842d1SChristoph Müllner     { "fli.d", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2094a47842d1SChristoph Müllner     { "fli.q", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2095a47842d1SChristoph Müllner     { "fli.h", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 },
2096a47842d1SChristoph Müllner     { "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2097a47842d1SChristoph Müllner     { "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2098a47842d1SChristoph Müllner     { "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2099a47842d1SChristoph Müllner     { "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2100a47842d1SChristoph Müllner     { "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2101a47842d1SChristoph Müllner     { "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2102a47842d1SChristoph Müllner     { "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2103a47842d1SChristoph Müllner     { "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 },
2104a47842d1SChristoph Müllner     { "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2105a47842d1SChristoph Müllner     { "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2106a47842d1SChristoph Müllner     { "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2107a47842d1SChristoph Müllner     { "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2108a47842d1SChristoph Müllner     { "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2109a47842d1SChristoph Müllner     { "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2110a47842d1SChristoph Müllner     { "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2111a47842d1SChristoph Müllner     { "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 },
2112a47842d1SChristoph Müllner     { "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 },
2113a47842d1SChristoph Müllner     { "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2114a47842d1SChristoph Müllner     { "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 },
2115a47842d1SChristoph Müllner     { "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 },
2116a47842d1SChristoph Müllner     { "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 },
2117a47842d1SChristoph Müllner     { "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2118a47842d1SChristoph Müllner     { "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2119a47842d1SChristoph Müllner     { "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2120a47842d1SChristoph Müllner     { "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2121a47842d1SChristoph Müllner     { "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2122a47842d1SChristoph Müllner     { "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2123a47842d1SChristoph Müllner     { "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
2124a47842d1SChristoph Müllner     { "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 },
21259d92f56dSMax Chou     { "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21269d92f56dSMax Chou     { "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21279d92f56dSMax Chou     { "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21289d92f56dSMax Chou     { "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21299d92f56dSMax Chou     { "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21309d92f56dSMax Chou     { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21319d92f56dSMax Chou     { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21329d92f56dSMax Chou     { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21339d92f56dSMax Chou     { "vaeskf1.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
21349d92f56dSMax Chou     { "vaeskf2.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
21359d92f56dSMax Chou     { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21369d92f56dSMax Chou     { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21379d92f56dSMax Chou     { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21389d92f56dSMax Chou     { "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21399d92f56dSMax Chou     { "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21409d92f56dSMax Chou     { "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21419d92f56dSMax Chou     { "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21429d92f56dSMax Chou     { "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21439d92f56dSMax Chou     { "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21449d92f56dSMax Chou     { "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21459d92f56dSMax Chou     { "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21469d92f56dSMax Chou     { "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21479d92f56dSMax Chou     { "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
21489d92f56dSMax Chou     { "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21499d92f56dSMax Chou     { "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 },
21509d92f56dSMax Chou     { "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21519d92f56dSMax Chou     { "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21529d92f56dSMax Chou     { "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21539d92f56dSMax Chou     { "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21549d92f56dSMax Chou     { "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
21559d92f56dSMax Chou     { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
21569d92f56dSMax Chou     { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
21579d92f56dSMax Chou     { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
21589d92f56dSMax Chou     { "vsm3c.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
21599d92f56dSMax Chou     { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 },
21609d92f56dSMax Chou     { "vsm4k.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 },
21619d92f56dSMax Chou     { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21629d92f56dSMax Chou     { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 },
21639d92f56dSMax Chou     { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 },
21649d92f56dSMax Chou     { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 },
21659d92f56dSMax Chou     { "vwsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 },
21666c848c19SRob Bradford     { "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
21676c848c19SRob Bradford     { "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
21686c848c19SRob Bradford     { "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2169d98883d1SLIU Zhiwei     { "mop.r.0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2170d98883d1SLIU Zhiwei     { "mop.r.1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2171d98883d1SLIU Zhiwei     { "mop.r.2", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2172d98883d1SLIU Zhiwei     { "mop.r.3", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2173d98883d1SLIU Zhiwei     { "mop.r.4", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2174d98883d1SLIU Zhiwei     { "mop.r.5", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2175d98883d1SLIU Zhiwei     { "mop.r.6", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2176d98883d1SLIU Zhiwei     { "mop.r.7", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2177d98883d1SLIU Zhiwei     { "mop.r.8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2178d98883d1SLIU Zhiwei     { "mop.r.9", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2179d98883d1SLIU Zhiwei     { "mop.r.10", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2180d98883d1SLIU Zhiwei     { "mop.r.11", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2181d98883d1SLIU Zhiwei     { "mop.r.12", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2182d98883d1SLIU Zhiwei     { "mop.r.13", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2183d98883d1SLIU Zhiwei     { "mop.r.14", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2184d98883d1SLIU Zhiwei     { "mop.r.15", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2185d98883d1SLIU Zhiwei     { "mop.r.16", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2186d98883d1SLIU Zhiwei     { "mop.r.17", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2187d98883d1SLIU Zhiwei     { "mop.r.18", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2188d98883d1SLIU Zhiwei     { "mop.r.19", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2189d98883d1SLIU Zhiwei     { "mop.r.20", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2190d98883d1SLIU Zhiwei     { "mop.r.21", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2191d98883d1SLIU Zhiwei     { "mop.r.22", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2192d98883d1SLIU Zhiwei     { "mop.r.23", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2193d98883d1SLIU Zhiwei     { "mop.r.24", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2194d98883d1SLIU Zhiwei     { "mop.r.25", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2195d98883d1SLIU Zhiwei     { "mop.r.26", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2196d98883d1SLIU Zhiwei     { "mop.r.27", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2197d98883d1SLIU Zhiwei     { "mop.r.28", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2198d98883d1SLIU Zhiwei     { "mop.r.29", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2199d98883d1SLIU Zhiwei     { "mop.r.30", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2200d98883d1SLIU Zhiwei     { "mop.r.31", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 },
2201d98883d1SLIU Zhiwei     { "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2202d98883d1SLIU Zhiwei     { "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2203d98883d1SLIU Zhiwei     { "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2204d98883d1SLIU Zhiwei     { "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2205d98883d1SLIU Zhiwei     { "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2206d98883d1SLIU Zhiwei     { "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2207d98883d1SLIU Zhiwei     { "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
2208d98883d1SLIU Zhiwei     { "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
220967e98ebaSLIU Zhiwei     { "c.mop.1",  rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221067e98ebaSLIU Zhiwei     { "c.mop.3",  rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221167e98ebaSLIU Zhiwei     { "c.mop.5",  rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221267e98ebaSLIU Zhiwei     { "c.mop.7",  rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221367e98ebaSLIU Zhiwei     { "c.mop.9",  rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221467e98ebaSLIU Zhiwei     { "c.mop.11", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221567e98ebaSLIU Zhiwei     { "c.mop.13", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
221667e98ebaSLIU Zhiwei     { "c.mop.15", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 },
2217ae4bdcefSLIU Zhiwei     { "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2218ae4bdcefSLIU Zhiwei     { "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2219ae4bdcefSLIU Zhiwei     { "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2220ae4bdcefSLIU Zhiwei     { "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2221ae4bdcefSLIU Zhiwei     { "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2222ae4bdcefSLIU Zhiwei     { "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2223ae4bdcefSLIU Zhiwei     { "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2224ae4bdcefSLIU Zhiwei     { "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2225ae4bdcefSLIU Zhiwei     { "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2226ae4bdcefSLIU Zhiwei     { "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2227ae4bdcefSLIU Zhiwei     { "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2228ae4bdcefSLIU Zhiwei     { "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2229ae4bdcefSLIU Zhiwei     { "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2230ae4bdcefSLIU Zhiwei     { "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2231ae4bdcefSLIU Zhiwei     { "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2232ae4bdcefSLIU Zhiwei     { "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2233ae4bdcefSLIU Zhiwei     { "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2234ae4bdcefSLIU Zhiwei     { "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2235ae4bdcefSLIU Zhiwei     { "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2236ae4bdcefSLIU Zhiwei     { "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 },
2237*4d46d84eSBalaji Ravikumar     { "wrs.sto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
2238*4d46d84eSBalaji Ravikumar     { "wrs.nto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 },
2239ea103259SMichael Clark };
2240ea103259SMichael Clark 
2241ea103259SMichael Clark /* CSR names */
2242ea103259SMichael Clark 
2243ea103259SMichael Clark static const char *csr_name(int csrno)
2244ea103259SMichael Clark {
2245ea103259SMichael Clark     switch (csrno) {
2246ea103259SMichael Clark     case 0x0000: return "ustatus";
2247ea103259SMichael Clark     case 0x0001: return "fflags";
2248ea103259SMichael Clark     case 0x0002: return "frm";
2249ea103259SMichael Clark     case 0x0003: return "fcsr";
2250ea103259SMichael Clark     case 0x0004: return "uie";
2251ea103259SMichael Clark     case 0x0005: return "utvec";
225207f4964dSYang Liu     case 0x0008: return "vstart";
225307f4964dSYang Liu     case 0x0009: return "vxsat";
225407f4964dSYang Liu     case 0x000a: return "vxrm";
225507f4964dSYang Liu     case 0x000f: return "vcsr";
22565748c886SWeiwei Li     case 0x0015: return "seed";
22572c71d02eSWeiwei Li     case 0x0017: return "jvt";
2258ea103259SMichael Clark     case 0x0040: return "uscratch";
2259ea103259SMichael Clark     case 0x0041: return "uepc";
2260ea103259SMichael Clark     case 0x0042: return "ucause";
2261ea103259SMichael Clark     case 0x0043: return "utval";
2262ea103259SMichael Clark     case 0x0044: return "uip";
2263ea103259SMichael Clark     case 0x0100: return "sstatus";
2264ea103259SMichael Clark     case 0x0104: return "sie";
2265ea103259SMichael Clark     case 0x0105: return "stvec";
2266ea103259SMichael Clark     case 0x0106: return "scounteren";
2267ea103259SMichael Clark     case 0x0140: return "sscratch";
2268ea103259SMichael Clark     case 0x0141: return "sepc";
2269ea103259SMichael Clark     case 0x0142: return "scause";
2270ea103259SMichael Clark     case 0x0143: return "stval";
2271ea103259SMichael Clark     case 0x0144: return "sip";
2272ea103259SMichael Clark     case 0x0180: return "satp";
2273ea103259SMichael Clark     case 0x0200: return "hstatus";
2274ea103259SMichael Clark     case 0x0202: return "hedeleg";
2275ea103259SMichael Clark     case 0x0203: return "hideleg";
2276ea103259SMichael Clark     case 0x0204: return "hie";
2277ea103259SMichael Clark     case 0x0205: return "htvec";
2278ea103259SMichael Clark     case 0x0240: return "hscratch";
2279ea103259SMichael Clark     case 0x0241: return "hepc";
2280ea103259SMichael Clark     case 0x0242: return "hcause";
2281ea103259SMichael Clark     case 0x0243: return "hbadaddr";
2282ea103259SMichael Clark     case 0x0244: return "hip";
2283ea103259SMichael Clark     case 0x0300: return "mstatus";
2284ea103259SMichael Clark     case 0x0301: return "misa";
2285ea103259SMichael Clark     case 0x0302: return "medeleg";
2286ea103259SMichael Clark     case 0x0303: return "mideleg";
2287ea103259SMichael Clark     case 0x0304: return "mie";
2288ea103259SMichael Clark     case 0x0305: return "mtvec";
2289ea103259SMichael Clark     case 0x0306: return "mcounteren";
2290ea103259SMichael Clark     case 0x0320: return "mucounteren";
2291ea103259SMichael Clark     case 0x0321: return "mscounteren";
2292ea103259SMichael Clark     case 0x0322: return "mhcounteren";
2293ea103259SMichael Clark     case 0x0323: return "mhpmevent3";
2294ea103259SMichael Clark     case 0x0324: return "mhpmevent4";
2295ea103259SMichael Clark     case 0x0325: return "mhpmevent5";
2296ea103259SMichael Clark     case 0x0326: return "mhpmevent6";
2297ea103259SMichael Clark     case 0x0327: return "mhpmevent7";
2298ea103259SMichael Clark     case 0x0328: return "mhpmevent8";
2299ea103259SMichael Clark     case 0x0329: return "mhpmevent9";
2300ea103259SMichael Clark     case 0x032a: return "mhpmevent10";
2301ea103259SMichael Clark     case 0x032b: return "mhpmevent11";
2302ea103259SMichael Clark     case 0x032c: return "mhpmevent12";
2303ea103259SMichael Clark     case 0x032d: return "mhpmevent13";
2304ea103259SMichael Clark     case 0x032e: return "mhpmevent14";
2305ea103259SMichael Clark     case 0x032f: return "mhpmevent15";
2306ea103259SMichael Clark     case 0x0330: return "mhpmevent16";
2307ea103259SMichael Clark     case 0x0331: return "mhpmevent17";
2308ea103259SMichael Clark     case 0x0332: return "mhpmevent18";
2309ea103259SMichael Clark     case 0x0333: return "mhpmevent19";
2310ea103259SMichael Clark     case 0x0334: return "mhpmevent20";
2311ea103259SMichael Clark     case 0x0335: return "mhpmevent21";
2312ea103259SMichael Clark     case 0x0336: return "mhpmevent22";
2313ea103259SMichael Clark     case 0x0337: return "mhpmevent23";
2314ea103259SMichael Clark     case 0x0338: return "mhpmevent24";
2315ea103259SMichael Clark     case 0x0339: return "mhpmevent25";
2316ea103259SMichael Clark     case 0x033a: return "mhpmevent26";
2317ea103259SMichael Clark     case 0x033b: return "mhpmevent27";
2318ea103259SMichael Clark     case 0x033c: return "mhpmevent28";
2319ea103259SMichael Clark     case 0x033d: return "mhpmevent29";
2320ea103259SMichael Clark     case 0x033e: return "mhpmevent30";
2321ea103259SMichael Clark     case 0x033f: return "mhpmevent31";
2322ea103259SMichael Clark     case 0x0340: return "mscratch";
2323ea103259SMichael Clark     case 0x0341: return "mepc";
2324ea103259SMichael Clark     case 0x0342: return "mcause";
2325ea103259SMichael Clark     case 0x0343: return "mtval";
2326ea103259SMichael Clark     case 0x0344: return "mip";
2327ea103259SMichael Clark     case 0x0380: return "mbase";
2328ea103259SMichael Clark     case 0x0381: return "mbound";
2329ea103259SMichael Clark     case 0x0382: return "mibase";
2330ea103259SMichael Clark     case 0x0383: return "mibound";
2331ea103259SMichael Clark     case 0x0384: return "mdbase";
2332ea103259SMichael Clark     case 0x0385: return "mdbound";
2333915758c5SAlistair Francis     case 0x03a0: return "pmpcfg0";
2334915758c5SAlistair Francis     case 0x03a1: return "pmpcfg1";
2335915758c5SAlistair Francis     case 0x03a2: return "pmpcfg2";
2336915758c5SAlistair Francis     case 0x03a3: return "pmpcfg3";
2337915758c5SAlistair Francis     case 0x03a4: return "pmpcfg4";
2338915758c5SAlistair Francis     case 0x03a5: return "pmpcfg5";
2339915758c5SAlistair Francis     case 0x03a6: return "pmpcfg6";
2340915758c5SAlistair Francis     case 0x03a7: return "pmpcfg7";
2341915758c5SAlistair Francis     case 0x03a8: return "pmpcfg8";
2342915758c5SAlistair Francis     case 0x03a9: return "pmpcfg9";
2343915758c5SAlistair Francis     case 0x03aa: return "pmpcfg10";
2344915758c5SAlistair Francis     case 0x03ab: return "pmpcfg11";
2345915758c5SAlistair Francis     case 0x03ac: return "pmpcfg12";
2346915758c5SAlistair Francis     case 0x03ad: return "pmpcfg13";
2347915758c5SAlistair Francis     case 0x03ae: return "pmpcfg14";
2348915758c5SAlistair Francis     case 0x03af: return "pmpcfg15";
2349ea103259SMichael Clark     case 0x03b0: return "pmpaddr0";
2350ea103259SMichael Clark     case 0x03b1: return "pmpaddr1";
2351ea103259SMichael Clark     case 0x03b2: return "pmpaddr2";
2352ea103259SMichael Clark     case 0x03b3: return "pmpaddr3";
2353ea103259SMichael Clark     case 0x03b4: return "pmpaddr4";
2354ea103259SMichael Clark     case 0x03b5: return "pmpaddr5";
2355ea103259SMichael Clark     case 0x03b6: return "pmpaddr6";
2356ea103259SMichael Clark     case 0x03b7: return "pmpaddr7";
2357ea103259SMichael Clark     case 0x03b8: return "pmpaddr8";
2358ea103259SMichael Clark     case 0x03b9: return "pmpaddr9";
2359ea103259SMichael Clark     case 0x03ba: return "pmpaddr10";
2360ea103259SMichael Clark     case 0x03bb: return "pmpaddr11";
2361ea103259SMichael Clark     case 0x03bc: return "pmpaddr12";
2362cffa9954SAlvin Chang     case 0x03bd: return "pmpaddr13";
2363cffa9954SAlvin Chang     case 0x03be: return "pmpaddr14";
2364ea103259SMichael Clark     case 0x03bf: return "pmpaddr15";
2365915758c5SAlistair Francis     case 0x03c0: return "pmpaddr16";
2366915758c5SAlistair Francis     case 0x03c1: return "pmpaddr17";
2367915758c5SAlistair Francis     case 0x03c2: return "pmpaddr18";
2368915758c5SAlistair Francis     case 0x03c3: return "pmpaddr19";
2369915758c5SAlistair Francis     case 0x03c4: return "pmpaddr20";
2370915758c5SAlistair Francis     case 0x03c5: return "pmpaddr21";
2371915758c5SAlistair Francis     case 0x03c6: return "pmpaddr22";
2372915758c5SAlistair Francis     case 0x03c7: return "pmpaddr23";
2373915758c5SAlistair Francis     case 0x03c8: return "pmpaddr24";
2374915758c5SAlistair Francis     case 0x03c9: return "pmpaddr25";
2375915758c5SAlistair Francis     case 0x03ca: return "pmpaddr26";
2376915758c5SAlistair Francis     case 0x03cb: return "pmpaddr27";
2377915758c5SAlistair Francis     case 0x03cc: return "pmpaddr28";
2378915758c5SAlistair Francis     case 0x03cd: return "pmpaddr29";
2379915758c5SAlistair Francis     case 0x03ce: return "pmpaddr30";
2380915758c5SAlistair Francis     case 0x03cf: return "pmpaddr31";
2381915758c5SAlistair Francis     case 0x03d0: return "pmpaddr32";
2382915758c5SAlistair Francis     case 0x03d1: return "pmpaddr33";
2383915758c5SAlistair Francis     case 0x03d2: return "pmpaddr34";
2384915758c5SAlistair Francis     case 0x03d3: return "pmpaddr35";
2385915758c5SAlistair Francis     case 0x03d4: return "pmpaddr36";
2386915758c5SAlistair Francis     case 0x03d5: return "pmpaddr37";
2387915758c5SAlistair Francis     case 0x03d6: return "pmpaddr38";
2388915758c5SAlistair Francis     case 0x03d7: return "pmpaddr39";
2389915758c5SAlistair Francis     case 0x03d8: return "pmpaddr40";
2390915758c5SAlistair Francis     case 0x03d9: return "pmpaddr41";
2391915758c5SAlistair Francis     case 0x03da: return "pmpaddr42";
2392915758c5SAlistair Francis     case 0x03db: return "pmpaddr43";
2393915758c5SAlistair Francis     case 0x03dc: return "pmpaddr44";
2394915758c5SAlistair Francis     case 0x03dd: return "pmpaddr45";
2395915758c5SAlistair Francis     case 0x03de: return "pmpaddr46";
2396915758c5SAlistair Francis     case 0x03df: return "pmpaddr47";
2397915758c5SAlistair Francis     case 0x03e0: return "pmpaddr48";
2398915758c5SAlistair Francis     case 0x03e1: return "pmpaddr49";
2399915758c5SAlistair Francis     case 0x03e2: return "pmpaddr50";
2400915758c5SAlistair Francis     case 0x03e3: return "pmpaddr51";
2401915758c5SAlistair Francis     case 0x03e4: return "pmpaddr52";
2402915758c5SAlistair Francis     case 0x03e5: return "pmpaddr53";
2403915758c5SAlistair Francis     case 0x03e6: return "pmpaddr54";
2404915758c5SAlistair Francis     case 0x03e7: return "pmpaddr55";
2405915758c5SAlistair Francis     case 0x03e8: return "pmpaddr56";
2406915758c5SAlistair Francis     case 0x03e9: return "pmpaddr57";
2407915758c5SAlistair Francis     case 0x03ea: return "pmpaddr58";
2408915758c5SAlistair Francis     case 0x03eb: return "pmpaddr59";
2409915758c5SAlistair Francis     case 0x03ec: return "pmpaddr60";
2410915758c5SAlistair Francis     case 0x03ed: return "pmpaddr61";
2411915758c5SAlistair Francis     case 0x03ee: return "pmpaddr62";
2412915758c5SAlistair Francis     case 0x03ef: return "pmpaddr63";
2413ea103259SMichael Clark     case 0x0780: return "mtohost";
2414ea103259SMichael Clark     case 0x0781: return "mfromhost";
2415ea103259SMichael Clark     case 0x0782: return "mreset";
2416ea103259SMichael Clark     case 0x0783: return "mipi";
2417ea103259SMichael Clark     case 0x0784: return "miobase";
2418ea103259SMichael Clark     case 0x07a0: return "tselect";
2419ea103259SMichael Clark     case 0x07a1: return "tdata1";
2420ea103259SMichael Clark     case 0x07a2: return "tdata2";
2421ea103259SMichael Clark     case 0x07a3: return "tdata3";
2422ea103259SMichael Clark     case 0x07b0: return "dcsr";
2423ea103259SMichael Clark     case 0x07b1: return "dpc";
2424ea103259SMichael Clark     case 0x07b2: return "dscratch";
2425ea103259SMichael Clark     case 0x0b00: return "mcycle";
2426ea103259SMichael Clark     case 0x0b01: return "mtime";
2427ea103259SMichael Clark     case 0x0b02: return "minstret";
2428ea103259SMichael Clark     case 0x0b03: return "mhpmcounter3";
2429ea103259SMichael Clark     case 0x0b04: return "mhpmcounter4";
2430ea103259SMichael Clark     case 0x0b05: return "mhpmcounter5";
2431ea103259SMichael Clark     case 0x0b06: return "mhpmcounter6";
2432ea103259SMichael Clark     case 0x0b07: return "mhpmcounter7";
2433ea103259SMichael Clark     case 0x0b08: return "mhpmcounter8";
2434ea103259SMichael Clark     case 0x0b09: return "mhpmcounter9";
2435ea103259SMichael Clark     case 0x0b0a: return "mhpmcounter10";
2436ea103259SMichael Clark     case 0x0b0b: return "mhpmcounter11";
2437ea103259SMichael Clark     case 0x0b0c: return "mhpmcounter12";
2438ea103259SMichael Clark     case 0x0b0d: return "mhpmcounter13";
2439ea103259SMichael Clark     case 0x0b0e: return "mhpmcounter14";
2440ea103259SMichael Clark     case 0x0b0f: return "mhpmcounter15";
2441ea103259SMichael Clark     case 0x0b10: return "mhpmcounter16";
2442ea103259SMichael Clark     case 0x0b11: return "mhpmcounter17";
2443ea103259SMichael Clark     case 0x0b12: return "mhpmcounter18";
2444ea103259SMichael Clark     case 0x0b13: return "mhpmcounter19";
2445ea103259SMichael Clark     case 0x0b14: return "mhpmcounter20";
2446ea103259SMichael Clark     case 0x0b15: return "mhpmcounter21";
2447ea103259SMichael Clark     case 0x0b16: return "mhpmcounter22";
2448ea103259SMichael Clark     case 0x0b17: return "mhpmcounter23";
2449ea103259SMichael Clark     case 0x0b18: return "mhpmcounter24";
2450ea103259SMichael Clark     case 0x0b19: return "mhpmcounter25";
2451ea103259SMichael Clark     case 0x0b1a: return "mhpmcounter26";
2452ea103259SMichael Clark     case 0x0b1b: return "mhpmcounter27";
2453ea103259SMichael Clark     case 0x0b1c: return "mhpmcounter28";
2454ea103259SMichael Clark     case 0x0b1d: return "mhpmcounter29";
2455ea103259SMichael Clark     case 0x0b1e: return "mhpmcounter30";
2456ea103259SMichael Clark     case 0x0b1f: return "mhpmcounter31";
2457ea103259SMichael Clark     case 0x0b80: return "mcycleh";
2458ea103259SMichael Clark     case 0x0b81: return "mtimeh";
2459ea103259SMichael Clark     case 0x0b82: return "minstreth";
2460ea103259SMichael Clark     case 0x0b83: return "mhpmcounter3h";
2461ea103259SMichael Clark     case 0x0b84: return "mhpmcounter4h";
2462ea103259SMichael Clark     case 0x0b85: return "mhpmcounter5h";
2463ea103259SMichael Clark     case 0x0b86: return "mhpmcounter6h";
2464ea103259SMichael Clark     case 0x0b87: return "mhpmcounter7h";
2465ea103259SMichael Clark     case 0x0b88: return "mhpmcounter8h";
2466ea103259SMichael Clark     case 0x0b89: return "mhpmcounter9h";
2467ea103259SMichael Clark     case 0x0b8a: return "mhpmcounter10h";
2468ea103259SMichael Clark     case 0x0b8b: return "mhpmcounter11h";
2469ea103259SMichael Clark     case 0x0b8c: return "mhpmcounter12h";
2470ea103259SMichael Clark     case 0x0b8d: return "mhpmcounter13h";
2471ea103259SMichael Clark     case 0x0b8e: return "mhpmcounter14h";
2472ea103259SMichael Clark     case 0x0b8f: return "mhpmcounter15h";
2473ea103259SMichael Clark     case 0x0b90: return "mhpmcounter16h";
2474ea103259SMichael Clark     case 0x0b91: return "mhpmcounter17h";
2475ea103259SMichael Clark     case 0x0b92: return "mhpmcounter18h";
2476ea103259SMichael Clark     case 0x0b93: return "mhpmcounter19h";
2477ea103259SMichael Clark     case 0x0b94: return "mhpmcounter20h";
2478ea103259SMichael Clark     case 0x0b95: return "mhpmcounter21h";
2479ea103259SMichael Clark     case 0x0b96: return "mhpmcounter22h";
2480ea103259SMichael Clark     case 0x0b97: return "mhpmcounter23h";
2481ea103259SMichael Clark     case 0x0b98: return "mhpmcounter24h";
2482ea103259SMichael Clark     case 0x0b99: return "mhpmcounter25h";
2483ea103259SMichael Clark     case 0x0b9a: return "mhpmcounter26h";
2484ea103259SMichael Clark     case 0x0b9b: return "mhpmcounter27h";
2485ea103259SMichael Clark     case 0x0b9c: return "mhpmcounter28h";
2486ea103259SMichael Clark     case 0x0b9d: return "mhpmcounter29h";
2487ea103259SMichael Clark     case 0x0b9e: return "mhpmcounter30h";
2488ea103259SMichael Clark     case 0x0b9f: return "mhpmcounter31h";
2489ea103259SMichael Clark     case 0x0c00: return "cycle";
2490ea103259SMichael Clark     case 0x0c01: return "time";
2491ea103259SMichael Clark     case 0x0c02: return "instret";
249207f4964dSYang Liu     case 0x0c20: return "vl";
249307f4964dSYang Liu     case 0x0c21: return "vtype";
249407f4964dSYang Liu     case 0x0c22: return "vlenb";
2495ea103259SMichael Clark     case 0x0c80: return "cycleh";
2496ea103259SMichael Clark     case 0x0c81: return "timeh";
2497ea103259SMichael Clark     case 0x0c82: return "instreth";
2498ea103259SMichael Clark     case 0x0d00: return "scycle";
2499ea103259SMichael Clark     case 0x0d01: return "stime";
2500ea103259SMichael Clark     case 0x0d02: return "sinstret";
2501ea103259SMichael Clark     case 0x0d80: return "scycleh";
2502ea103259SMichael Clark     case 0x0d81: return "stimeh";
2503ea103259SMichael Clark     case 0x0d82: return "sinstreth";
2504ea103259SMichael Clark     case 0x0e00: return "hcycle";
2505ea103259SMichael Clark     case 0x0e01: return "htime";
2506ea103259SMichael Clark     case 0x0e02: return "hinstret";
2507ea103259SMichael Clark     case 0x0e80: return "hcycleh";
2508ea103259SMichael Clark     case 0x0e81: return "htimeh";
2509ea103259SMichael Clark     case 0x0e82: return "hinstreth";
2510ea103259SMichael Clark     case 0x0f11: return "mvendorid";
2511ea103259SMichael Clark     case 0x0f12: return "marchid";
2512ea103259SMichael Clark     case 0x0f13: return "mimpid";
2513ea103259SMichael Clark     case 0x0f14: return "mhartid";
2514ea103259SMichael Clark     default: return NULL;
2515ea103259SMichael Clark     }
2516ea103259SMichael Clark }
2517ea103259SMichael Clark 
2518ea103259SMichael Clark /* decode opcode */
2519ea103259SMichael Clark 
2520ea103259SMichael Clark static void decode_inst_opcode(rv_decode *dec, rv_isa isa)
2521ea103259SMichael Clark {
2522ea103259SMichael Clark     rv_inst inst = dec->inst;
2523ea103259SMichael Clark     rv_opcode op = rv_op_illegal;
25243bd87176SWeiwei Li     switch ((inst >> 0) & 0b11) {
2525ea103259SMichael Clark     case 0:
25263bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2527ea103259SMichael Clark         case 0: op = rv_op_c_addi4spn; break;
2528ea103259SMichael Clark         case 1:
2529ea103259SMichael Clark             if (isa == rv128) {
2530ea103259SMichael Clark                 op = rv_op_c_lq;
2531ea103259SMichael Clark             } else {
2532ea103259SMichael Clark                 op = rv_op_c_fld;
2533ea103259SMichael Clark             }
2534ea103259SMichael Clark             break;
2535ea103259SMichael Clark         case 2: op = rv_op_c_lw; break;
2536ea103259SMichael Clark         case 3:
2537ea103259SMichael Clark             if (isa == rv32) {
2538ea103259SMichael Clark                 op = rv_op_c_flw;
2539ea103259SMichael Clark             } else {
2540ea103259SMichael Clark                 op = rv_op_c_ld;
2541ea103259SMichael Clark             }
2542ea103259SMichael Clark             break;
25432c71d02eSWeiwei Li         case 4:
25442c71d02eSWeiwei Li             switch ((inst >> 10) & 0b111) {
25452c71d02eSWeiwei Li             case 0: op = rv_op_c_lbu; break;
25462c71d02eSWeiwei Li             case 1:
25472c71d02eSWeiwei Li                 if (((inst >> 6) & 1) == 0) {
25482c71d02eSWeiwei Li                     op = rv_op_c_lhu;
25492c71d02eSWeiwei Li                 } else {
25502c71d02eSWeiwei Li                     op = rv_op_c_lh;
25512c71d02eSWeiwei Li                 }
25522c71d02eSWeiwei Li                 break;
25532c71d02eSWeiwei Li             case 2: op = rv_op_c_sb; break;
25542c71d02eSWeiwei Li             case 3:
25552c71d02eSWeiwei Li                 if (((inst >> 6) & 1) == 0) {
25562c71d02eSWeiwei Li                     op = rv_op_c_sh;
25572c71d02eSWeiwei Li                 }
25582c71d02eSWeiwei Li                 break;
25592c71d02eSWeiwei Li             }
25602c71d02eSWeiwei Li             break;
2561ea103259SMichael Clark         case 5:
2562ea103259SMichael Clark             if (isa == rv128) {
2563ea103259SMichael Clark                 op = rv_op_c_sq;
2564ea103259SMichael Clark             } else {
2565ea103259SMichael Clark                 op = rv_op_c_fsd;
2566ea103259SMichael Clark             }
2567ea103259SMichael Clark             break;
2568ea103259SMichael Clark         case 6: op = rv_op_c_sw; break;
2569ea103259SMichael Clark         case 7:
2570ea103259SMichael Clark             if (isa == rv32) {
2571ea103259SMichael Clark                 op = rv_op_c_fsw;
2572ea103259SMichael Clark             } else {
2573ea103259SMichael Clark                 op = rv_op_c_sd;
2574ea103259SMichael Clark             }
2575ea103259SMichael Clark             break;
2576ea103259SMichael Clark         }
2577ea103259SMichael Clark         break;
2578ea103259SMichael Clark     case 1:
25793bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2580ea103259SMichael Clark         case 0:
25813bd87176SWeiwei Li             switch ((inst >> 2) & 0b11111111111) {
2582ea103259SMichael Clark             case 0: op = rv_op_c_nop; break;
2583ea103259SMichael Clark             default: op = rv_op_c_addi; break;
2584ea103259SMichael Clark             }
2585ea103259SMichael Clark             break;
2586ea103259SMichael Clark         case 1:
2587ea103259SMichael Clark             if (isa == rv32) {
2588ea103259SMichael Clark                 op = rv_op_c_jal;
2589ea103259SMichael Clark             } else {
2590ea103259SMichael Clark                 op = rv_op_c_addiw;
2591ea103259SMichael Clark             }
2592ea103259SMichael Clark             break;
2593ea103259SMichael Clark         case 2: op = rv_op_c_li; break;
2594ea103259SMichael Clark         case 3:
259567e98ebaSLIU Zhiwei             if (dec->cfg->ext_zcmop) {
259667e98ebaSLIU Zhiwei                 if ((((inst >> 2) & 0b111111) == 0b100000) &&
259767e98ebaSLIU Zhiwei                     (((inst >> 11) & 0b11) == 0b0)) {
259867e98ebaSLIU Zhiwei                     op = rv_c_mop_1 + ((inst >> 8) & 0b111);
259967e98ebaSLIU Zhiwei                     break;
260067e98ebaSLIU Zhiwei                 }
260167e98ebaSLIU Zhiwei             }
26023bd87176SWeiwei Li             switch ((inst >> 7) & 0b11111) {
2603ea103259SMichael Clark             case 2: op = rv_op_c_addi16sp; break;
2604ea103259SMichael Clark             default: op = rv_op_c_lui; break;
2605ea103259SMichael Clark             }
2606ea103259SMichael Clark             break;
2607ea103259SMichael Clark         case 4:
26083bd87176SWeiwei Li             switch ((inst >> 10) & 0b11) {
2609ea103259SMichael Clark             case 0:
2610ea103259SMichael Clark                 op = rv_op_c_srli;
2611ea103259SMichael Clark                 break;
2612ea103259SMichael Clark             case 1:
2613ea103259SMichael Clark                 op = rv_op_c_srai;
2614ea103259SMichael Clark                 break;
2615ea103259SMichael Clark             case 2: op = rv_op_c_andi; break;
2616ea103259SMichael Clark             case 3:
2617ea103259SMichael Clark                 switch (((inst >> 10) & 0b100) | ((inst >> 5) & 0b011)) {
2618ea103259SMichael Clark                 case 0: op = rv_op_c_sub; break;
2619ea103259SMichael Clark                 case 1: op = rv_op_c_xor; break;
2620ea103259SMichael Clark                 case 2: op = rv_op_c_or; break;
2621ea103259SMichael Clark                 case 3: op = rv_op_c_and; break;
2622ea103259SMichael Clark                 case 4: op = rv_op_c_subw; break;
2623ea103259SMichael Clark                 case 5: op = rv_op_c_addw; break;
26242c71d02eSWeiwei Li                 case 6: op = rv_op_c_mul; break;
26252c71d02eSWeiwei Li                 case 7:
26262c71d02eSWeiwei Li                     switch ((inst >> 2) & 0b111) {
26272c71d02eSWeiwei Li                     case 0: op = rv_op_c_zext_b; break;
26282c71d02eSWeiwei Li                     case 1: op = rv_op_c_sext_b; break;
26292c71d02eSWeiwei Li                     case 2: op = rv_op_c_zext_h; break;
26302c71d02eSWeiwei Li                     case 3: op = rv_op_c_sext_h; break;
26312c71d02eSWeiwei Li                     case 4: op = rv_op_c_zext_w; break;
26322c71d02eSWeiwei Li                     case 5: op = rv_op_c_not; break;
26332c71d02eSWeiwei Li                     }
26342c71d02eSWeiwei Li                     break;
2635ea103259SMichael Clark                 }
2636ea103259SMichael Clark                 break;
2637ea103259SMichael Clark             }
2638ea103259SMichael Clark             break;
2639ea103259SMichael Clark         case 5: op = rv_op_c_j; break;
2640ea103259SMichael Clark         case 6: op = rv_op_c_beqz; break;
2641ea103259SMichael Clark         case 7: op = rv_op_c_bnez; break;
2642ea103259SMichael Clark         }
2643ea103259SMichael Clark         break;
2644ea103259SMichael Clark     case 2:
26453bd87176SWeiwei Li         switch ((inst >> 13) & 0b111) {
2646ea103259SMichael Clark         case 0:
2647ea103259SMichael Clark             op = rv_op_c_slli;
2648ea103259SMichael Clark             break;
2649ea103259SMichael Clark         case 1:
2650ea103259SMichael Clark             if (isa == rv128) {
2651ea103259SMichael Clark                 op = rv_op_c_lqsp;
2652ea103259SMichael Clark             } else {
2653ea103259SMichael Clark                 op = rv_op_c_fldsp;
2654ea103259SMichael Clark             }
2655ea103259SMichael Clark             break;
2656ea103259SMichael Clark         case 2: op = rv_op_c_lwsp; break;
2657ea103259SMichael Clark         case 3:
2658ea103259SMichael Clark             if (isa == rv32) {
2659ea103259SMichael Clark                 op = rv_op_c_flwsp;
2660ea103259SMichael Clark             } else {
2661ea103259SMichael Clark                 op = rv_op_c_ldsp;
2662ea103259SMichael Clark             }
2663ea103259SMichael Clark             break;
2664ea103259SMichael Clark         case 4:
26653bd87176SWeiwei Li             switch ((inst >> 12) & 0b1) {
2666ea103259SMichael Clark             case 0:
26673bd87176SWeiwei Li                 switch ((inst >> 2) & 0b11111) {
2668ea103259SMichael Clark                 case 0: op = rv_op_c_jr; break;
2669ea103259SMichael Clark                 default: op = rv_op_c_mv; break;
2670ea103259SMichael Clark                 }
2671ea103259SMichael Clark                 break;
2672ea103259SMichael Clark             case 1:
26733bd87176SWeiwei Li                 switch ((inst >> 2) & 0b11111) {
2674ea103259SMichael Clark                 case 0:
26753bd87176SWeiwei Li                     switch ((inst >> 7) & 0b11111) {
2676ea103259SMichael Clark                     case 0: op = rv_op_c_ebreak; break;
2677ea103259SMichael Clark                     default: op = rv_op_c_jalr; break;
2678ea103259SMichael Clark                     }
2679ea103259SMichael Clark                     break;
2680ea103259SMichael Clark                 default: op = rv_op_c_add; break;
2681ea103259SMichael Clark                 }
2682ea103259SMichael Clark                 break;
2683ea103259SMichael Clark             }
2684ea103259SMichael Clark             break;
2685ea103259SMichael Clark         case 5:
2686ea103259SMichael Clark             if (isa == rv128) {
2687ea103259SMichael Clark                 op = rv_op_c_sqsp;
2688ea103259SMichael Clark             } else {
26891dc34be1SMichael Clark                 op = rv_op_c_fsdsp;
26902a2b221bSWeiwei Li                 if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) {
26912c71d02eSWeiwei Li                     switch ((inst >> 8) & 0b01111) {
26922c71d02eSWeiwei Li                     case 8:
26932c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
26942c71d02eSWeiwei Li                             op = rv_op_cm_push;
26952c71d02eSWeiwei Li                         }
26962c71d02eSWeiwei Li                         break;
26972c71d02eSWeiwei Li                     case 10:
26982c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
26992c71d02eSWeiwei Li                             op = rv_op_cm_pop;
27002c71d02eSWeiwei Li                         }
27012c71d02eSWeiwei Li                         break;
27022c71d02eSWeiwei Li                     case 12:
27032c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
27042c71d02eSWeiwei Li                             op = rv_op_cm_popretz;
27052c71d02eSWeiwei Li                         }
27062c71d02eSWeiwei Li                         break;
27072c71d02eSWeiwei Li                     case 14:
27082c71d02eSWeiwei Li                         if (((inst >> 4) & 0b01111) >= 4) {
27092c71d02eSWeiwei Li                             op = rv_op_cm_popret;
27102c71d02eSWeiwei Li                         }
27112c71d02eSWeiwei Li                         break;
27122c71d02eSWeiwei Li                     }
27132c71d02eSWeiwei Li                 } else {
27142c71d02eSWeiwei Li                     switch ((inst >> 10) & 0b011) {
27152c71d02eSWeiwei Li                     case 0:
27162a2b221bSWeiwei Li                         if (!dec->cfg->ext_zcmt) {
27172a2b221bSWeiwei Li                             break;
27182a2b221bSWeiwei Li                         }
27192c71d02eSWeiwei Li                         if (((inst >> 2) & 0xFF) >= 32) {
27202c71d02eSWeiwei Li                             op = rv_op_cm_jalt;
27212c71d02eSWeiwei Li                         } else {
27222c71d02eSWeiwei Li                             op = rv_op_cm_jt;
27232c71d02eSWeiwei Li                         }
27242c71d02eSWeiwei Li                         break;
27252c71d02eSWeiwei Li                     case 3:
27262a2b221bSWeiwei Li                         if (!dec->cfg->ext_zcmp) {
27272a2b221bSWeiwei Li                             break;
27282a2b221bSWeiwei Li                         }
27292c71d02eSWeiwei Li                         switch ((inst >> 5) & 0b011) {
27302c71d02eSWeiwei Li                         case 1: op = rv_op_cm_mvsa01; break;
27312c71d02eSWeiwei Li                         case 3: op = rv_op_cm_mva01s; break;
27322c71d02eSWeiwei Li                         }
27332c71d02eSWeiwei Li                         break;
27342c71d02eSWeiwei Li                     }
27352c71d02eSWeiwei Li                 }
2736ea103259SMichael Clark             }
27371dc34be1SMichael Clark             break;
2738ea103259SMichael Clark         case 6: op = rv_op_c_swsp; break;
2739ea103259SMichael Clark         case 7:
2740ea103259SMichael Clark             if (isa == rv32) {
2741ea103259SMichael Clark                 op = rv_op_c_fswsp;
2742ea103259SMichael Clark             } else {
2743ea103259SMichael Clark                 op = rv_op_c_sdsp;
2744ea103259SMichael Clark             }
2745ea103259SMichael Clark             break;
2746ea103259SMichael Clark         }
2747ea103259SMichael Clark         break;
2748ea103259SMichael Clark     case 3:
27493bd87176SWeiwei Li         switch ((inst >> 2) & 0b11111) {
2750ea103259SMichael Clark         case 0:
27513bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2752ea103259SMichael Clark             case 0: op = rv_op_lb; break;
2753ea103259SMichael Clark             case 1: op = rv_op_lh; break;
2754ea103259SMichael Clark             case 2: op = rv_op_lw; break;
2755ea103259SMichael Clark             case 3: op = rv_op_ld; break;
2756ea103259SMichael Clark             case 4: op = rv_op_lbu; break;
2757ea103259SMichael Clark             case 5: op = rv_op_lhu; break;
2758ea103259SMichael Clark             case 6: op = rv_op_lwu; break;
2759ea103259SMichael Clark             case 7: op = rv_op_ldu; break;
2760ea103259SMichael Clark             }
2761ea103259SMichael Clark             break;
2762ea103259SMichael Clark         case 1:
27633bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
276407f4964dSYang Liu             case 0:
27653bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
276607f4964dSYang Liu                 case 40: op = rv_op_vl1re8_v; break;
276707f4964dSYang Liu                 case 552: op = rv_op_vl2re8_v; break;
276807f4964dSYang Liu                 case 1576: op = rv_op_vl4re8_v; break;
276907f4964dSYang Liu                 case 3624: op = rv_op_vl8re8_v; break;
277007f4964dSYang Liu                 }
27713bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
277207f4964dSYang Liu                 case 0:
27733bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
277407f4964dSYang Liu                     case 0: op = rv_op_vle8_v; break;
277507f4964dSYang Liu                     case 11: op = rv_op_vlm_v; break;
277607f4964dSYang Liu                     case 16: op = rv_op_vle8ff_v; break;
277707f4964dSYang Liu                     }
277807f4964dSYang Liu                     break;
277907f4964dSYang Liu                 case 1: op = rv_op_vluxei8_v; break;
278007f4964dSYang Liu                 case 2: op = rv_op_vlse8_v; break;
278107f4964dSYang Liu                 case 3: op = rv_op_vloxei8_v; break;
278207f4964dSYang Liu                 }
278307f4964dSYang Liu                 break;
278432b2d75bSWeiwei Li             case 1: op = rv_op_flh; break;
2785ea103259SMichael Clark             case 2: op = rv_op_flw; break;
2786ea103259SMichael Clark             case 3: op = rv_op_fld; break;
2787ea103259SMichael Clark             case 4: op = rv_op_flq; break;
278807f4964dSYang Liu             case 5:
27893bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
279007f4964dSYang Liu                 case 40: op = rv_op_vl1re16_v; break;
279107f4964dSYang Liu                 case 552: op = rv_op_vl2re16_v; break;
279207f4964dSYang Liu                 case 1576: op = rv_op_vl4re16_v; break;
279307f4964dSYang Liu                 case 3624: op = rv_op_vl8re16_v; break;
279407f4964dSYang Liu                 }
27953bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
279607f4964dSYang Liu                 case 0:
27973bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
279807f4964dSYang Liu                     case 0: op = rv_op_vle16_v; break;
279907f4964dSYang Liu                     case 16: op = rv_op_vle16ff_v; break;
280007f4964dSYang Liu                     }
280107f4964dSYang Liu                     break;
280207f4964dSYang Liu                 case 1: op = rv_op_vluxei16_v; break;
280307f4964dSYang Liu                 case 2: op = rv_op_vlse16_v; break;
280407f4964dSYang Liu                 case 3: op = rv_op_vloxei16_v; break;
280507f4964dSYang Liu                 }
280607f4964dSYang Liu                 break;
280707f4964dSYang Liu             case 6:
28083bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
280907f4964dSYang Liu                 case 40: op = rv_op_vl1re32_v; break;
281007f4964dSYang Liu                 case 552: op = rv_op_vl2re32_v; break;
281107f4964dSYang Liu                 case 1576: op = rv_op_vl4re32_v; break;
281207f4964dSYang Liu                 case 3624: op = rv_op_vl8re32_v; break;
281307f4964dSYang Liu                 }
28143bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
281507f4964dSYang Liu                 case 0:
28163bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
281707f4964dSYang Liu                     case 0: op = rv_op_vle32_v; break;
281807f4964dSYang Liu                     case 16: op = rv_op_vle32ff_v; break;
281907f4964dSYang Liu                     }
282007f4964dSYang Liu                     break;
282107f4964dSYang Liu                 case 1: op = rv_op_vluxei32_v; break;
282207f4964dSYang Liu                 case 2: op = rv_op_vlse32_v; break;
282307f4964dSYang Liu                 case 3: op = rv_op_vloxei32_v; break;
282407f4964dSYang Liu                 }
282507f4964dSYang Liu                 break;
282607f4964dSYang Liu             case 7:
28273bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
282807f4964dSYang Liu                 case 40: op = rv_op_vl1re64_v; break;
282907f4964dSYang Liu                 case 552: op = rv_op_vl2re64_v; break;
283007f4964dSYang Liu                 case 1576: op = rv_op_vl4re64_v; break;
283107f4964dSYang Liu                 case 3624: op = rv_op_vl8re64_v; break;
283207f4964dSYang Liu                 }
28333bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
283407f4964dSYang Liu                 case 0:
28353bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
283607f4964dSYang Liu                     case 0: op = rv_op_vle64_v; break;
283707f4964dSYang Liu                     case 16: op = rv_op_vle64ff_v; break;
283807f4964dSYang Liu                     }
283907f4964dSYang Liu                     break;
284007f4964dSYang Liu                 case 1: op = rv_op_vluxei64_v; break;
284107f4964dSYang Liu                 case 2: op = rv_op_vlse64_v; break;
284207f4964dSYang Liu                 case 3: op = rv_op_vloxei64_v; break;
284307f4964dSYang Liu                 }
284407f4964dSYang Liu                 break;
2845ea103259SMichael Clark             }
2846ea103259SMichael Clark             break;
2847ea103259SMichael Clark         case 3:
28483bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2849ea103259SMichael Clark             case 0: op = rv_op_fence; break;
2850ea103259SMichael Clark             case 1: op = rv_op_fence_i; break;
2851ea103259SMichael Clark             case 2: op = rv_op_lq; break;
2852ea103259SMichael Clark             }
2853ea103259SMichael Clark             break;
2854ea103259SMichael Clark         case 4:
28553bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2856ea103259SMichael Clark             case 0: op = rv_op_addi; break;
2857ea103259SMichael Clark             case 1:
28583bd87176SWeiwei Li                 switch ((inst >> 27) & 0b11111) {
285902c1b569SPhilipp Tomsich                 case 0b00000: op = rv_op_slli; break;
28605748c886SWeiwei Li                 case 0b00001:
28613bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
28625748c886SWeiwei Li                     case 0b0001111: op = rv_op_zip; break;
28635748c886SWeiwei Li                     }
28645748c886SWeiwei Li                     break;
28655748c886SWeiwei Li                 case 0b00010:
28663bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
28675748c886SWeiwei Li                     case 0b0000000: op = rv_op_sha256sum0; break;
28685748c886SWeiwei Li                     case 0b0000001: op = rv_op_sha256sum1; break;
28695748c886SWeiwei Li                     case 0b0000010: op = rv_op_sha256sig0; break;
28705748c886SWeiwei Li                     case 0b0000011: op = rv_op_sha256sig1; break;
28715748c886SWeiwei Li                     case 0b0000100: op = rv_op_sha512sum0; break;
28725748c886SWeiwei Li                     case 0b0000101: op = rv_op_sha512sum1; break;
28735748c886SWeiwei Li                     case 0b0000110: op = rv_op_sha512sig0; break;
28745748c886SWeiwei Li                     case 0b0000111: op = rv_op_sha512sig1; break;
28755748c886SWeiwei Li                     case 0b0001000: op = rv_op_sm3p0; break;
28765748c886SWeiwei Li                     case 0b0001001: op = rv_op_sm3p1; break;
28775748c886SWeiwei Li                     }
28785748c886SWeiwei Li                     break;
287902c1b569SPhilipp Tomsich                 case 0b00101: op = rv_op_bseti; break;
28805748c886SWeiwei Li                 case 0b00110:
28813bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
28825748c886SWeiwei Li                     case 0b0000000: op = rv_op_aes64im; break;
28835748c886SWeiwei Li                     default:
28845748c886SWeiwei Li                         if (((inst >> 24) & 0b0111) == 0b001) {
28855748c886SWeiwei Li                             op = rv_op_aes64ks1i;
28865748c886SWeiwei Li                         }
28875748c886SWeiwei Li                         break;
28885748c886SWeiwei Li                      }
28895748c886SWeiwei Li                      break;
289002c1b569SPhilipp Tomsich                 case 0b01001: op = rv_op_bclri; break;
289102c1b569SPhilipp Tomsich                 case 0b01101: op = rv_op_binvi; break;
289202c1b569SPhilipp Tomsich                 case 0b01100:
28933bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
289402c1b569SPhilipp Tomsich                     case 0b0000000: op = rv_op_clz; break;
289502c1b569SPhilipp Tomsich                     case 0b0000001: op = rv_op_ctz; break;
289602c1b569SPhilipp Tomsich                     case 0b0000010: op = rv_op_cpop; break;
289702c1b569SPhilipp Tomsich                       /* 0b0000011 */
289802c1b569SPhilipp Tomsich                     case 0b0000100: op = rv_op_sext_b; break;
289902c1b569SPhilipp Tomsich                     case 0b0000101: op = rv_op_sext_h; break;
290002c1b569SPhilipp Tomsich                     }
290102c1b569SPhilipp Tomsich                     break;
2902ea103259SMichael Clark                 }
2903ea103259SMichael Clark                 break;
2904ea103259SMichael Clark             case 2: op = rv_op_slti; break;
2905ea103259SMichael Clark             case 3: op = rv_op_sltiu; break;
2906ea103259SMichael Clark             case 4: op = rv_op_xori; break;
2907ea103259SMichael Clark             case 5:
29083bd87176SWeiwei Li                 switch ((inst >> 27) & 0b11111) {
290902c1b569SPhilipp Tomsich                 case 0b00000: op = rv_op_srli; break;
29105748c886SWeiwei Li                 case 0b00001:
29113bd87176SWeiwei Li                     switch ((inst >> 20) & 0b1111111) {
29125748c886SWeiwei Li                     case 0b0001111: op = rv_op_unzip; break;
29135748c886SWeiwei Li                     }
29145748c886SWeiwei Li                     break;
291502c1b569SPhilipp Tomsich                 case 0b00101: op = rv_op_orc_b; break;
291602c1b569SPhilipp Tomsich                 case 0b01000: op = rv_op_srai; break;
291702c1b569SPhilipp Tomsich                 case 0b01001: op = rv_op_bexti; break;
291802c1b569SPhilipp Tomsich                 case 0b01100: op = rv_op_rori; break;
291902c1b569SPhilipp Tomsich                 case 0b01101:
292002c1b569SPhilipp Tomsich                     switch ((inst >> 20) & 0b1111111) {
29215748c886SWeiwei Li                     case 0b0011000: op = rv_op_rev8; break;
292202c1b569SPhilipp Tomsich                     case 0b0111000: op = rv_op_rev8; break;
29235748c886SWeiwei Li                     case 0b0000111: op = rv_op_brev8; break;
292402c1b569SPhilipp Tomsich                     }
292502c1b569SPhilipp Tomsich                     break;
2926ea103259SMichael Clark                 }
2927ea103259SMichael Clark                 break;
2928ea103259SMichael Clark             case 6: op = rv_op_ori; break;
2929ea103259SMichael Clark             case 7: op = rv_op_andi; break;
2930ea103259SMichael Clark             }
2931ea103259SMichael Clark             break;
2932ea103259SMichael Clark         case 5: op = rv_op_auipc; break;
2933ea103259SMichael Clark         case 6:
29343bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2935ea103259SMichael Clark             case 0: op = rv_op_addiw; break;
2936ea103259SMichael Clark             case 1:
29373bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
2938ea103259SMichael Clark                 case 0: op = rv_op_slliw; break;
293913e269f6SIvan Klokov                 case 2: op = rv_op_slli_uw; break;
294013e269f6SIvan Klokov                 case 24:
294102c1b569SPhilipp Tomsich                     switch ((inst >> 20) & 0b11111) {
294202c1b569SPhilipp Tomsich                     case 0b00000: op = rv_op_clzw; break;
294302c1b569SPhilipp Tomsich                     case 0b00001: op = rv_op_ctzw; break;
294402c1b569SPhilipp Tomsich                     case 0b00010: op = rv_op_cpopw; break;
294502c1b569SPhilipp Tomsich                     }
294602c1b569SPhilipp Tomsich                     break;
2947ea103259SMichael Clark                 }
2948ea103259SMichael Clark                 break;
2949ea103259SMichael Clark             case 5:
29503bd87176SWeiwei Li                 switch ((inst >> 25) & 0b1111111) {
2951ea103259SMichael Clark                 case 0: op = rv_op_srliw; break;
2952ea103259SMichael Clark                 case 32: op = rv_op_sraiw; break;
295302c1b569SPhilipp Tomsich                 case 48: op = rv_op_roriw; break;
2954ea103259SMichael Clark                 }
2955ea103259SMichael Clark                 break;
2956ea103259SMichael Clark             }
2957ea103259SMichael Clark             break;
2958ea103259SMichael Clark         case 8:
29593bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
2960ea103259SMichael Clark             case 0: op = rv_op_sb; break;
2961ea103259SMichael Clark             case 1: op = rv_op_sh; break;
2962ea103259SMichael Clark             case 2: op = rv_op_sw; break;
2963ea103259SMichael Clark             case 3: op = rv_op_sd; break;
2964ea103259SMichael Clark             case 4: op = rv_op_sq; break;
2965ea103259SMichael Clark             }
2966ea103259SMichael Clark             break;
2967ea103259SMichael Clark         case 9:
29683bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
296907f4964dSYang Liu             case 0:
29703bd87176SWeiwei Li                 switch ((inst >> 20) & 0b111111111111) {
297107f4964dSYang Liu                 case 40: op = rv_op_vs1r_v; break;
297207f4964dSYang Liu                 case 552: op = rv_op_vs2r_v; break;
297307f4964dSYang Liu                 case 1576: op = rv_op_vs4r_v; break;
297407f4964dSYang Liu                 case 3624: op = rv_op_vs8r_v; break;
297507f4964dSYang Liu                 }
29763bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
297707f4964dSYang Liu                 case 0:
29783bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
297907f4964dSYang Liu                     case 0: op = rv_op_vse8_v; break;
298007f4964dSYang Liu                     case 11: op = rv_op_vsm_v; break;
298107f4964dSYang Liu                     }
298207f4964dSYang Liu                     break;
298307f4964dSYang Liu                 case 1: op = rv_op_vsuxei8_v; break;
298407f4964dSYang Liu                 case 2: op = rv_op_vsse8_v; break;
298507f4964dSYang Liu                 case 3: op = rv_op_vsoxei8_v; break;
298607f4964dSYang Liu                 }
298707f4964dSYang Liu                 break;
298832b2d75bSWeiwei Li             case 1: op = rv_op_fsh; break;
2989ea103259SMichael Clark             case 2: op = rv_op_fsw; break;
2990ea103259SMichael Clark             case 3: op = rv_op_fsd; break;
2991ea103259SMichael Clark             case 4: op = rv_op_fsq; break;
299207f4964dSYang Liu             case 5:
29933bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
299407f4964dSYang Liu                 case 0:
29953bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
299607f4964dSYang Liu                     case 0: op = rv_op_vse16_v; break;
299707f4964dSYang Liu                     }
299807f4964dSYang Liu                     break;
299907f4964dSYang Liu                 case 1: op = rv_op_vsuxei16_v; break;
300007f4964dSYang Liu                 case 2: op = rv_op_vsse16_v; break;
300107f4964dSYang Liu                 case 3: op = rv_op_vsoxei16_v; break;
300207f4964dSYang Liu                 }
300307f4964dSYang Liu                 break;
300407f4964dSYang Liu             case 6:
30053bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
300607f4964dSYang Liu                 case 0:
30073bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
300807f4964dSYang Liu                     case 0: op = rv_op_vse32_v; break;
300907f4964dSYang Liu                     }
301007f4964dSYang Liu                     break;
301107f4964dSYang Liu                 case 1: op = rv_op_vsuxei32_v; break;
301207f4964dSYang Liu                 case 2: op = rv_op_vsse32_v; break;
301307f4964dSYang Liu                 case 3: op = rv_op_vsoxei32_v; break;
301407f4964dSYang Liu                 }
301507f4964dSYang Liu                 break;
301607f4964dSYang Liu             case 7:
30173bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111) {
301807f4964dSYang Liu                 case 0:
30193bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
302007f4964dSYang Liu                     case 0: op = rv_op_vse64_v; break;
302107f4964dSYang Liu                     }
302207f4964dSYang Liu                     break;
302307f4964dSYang Liu                 case 1: op = rv_op_vsuxei64_v; break;
302407f4964dSYang Liu                 case 2: op = rv_op_vsse64_v; break;
302507f4964dSYang Liu                 case 3: op = rv_op_vsoxei64_v; break;
302607f4964dSYang Liu                 }
302707f4964dSYang Liu                 break;
3028ea103259SMichael Clark             }
3029ea103259SMichael Clark             break;
3030ea103259SMichael Clark         case 11:
303198624d13SWeiwei Li             switch (((inst >> 24) & 0b11111000) |
303298624d13SWeiwei Li                     ((inst >> 12) & 0b00000111)) {
3033ae4bdcefSLIU Zhiwei             case 0: op = rv_op_amoadd_b; break;
3034ae4bdcefSLIU Zhiwei             case 1: op = rv_op_amoadd_h; break;
3035ea103259SMichael Clark             case 2: op = rv_op_amoadd_w; break;
3036ea103259SMichael Clark             case 3: op = rv_op_amoadd_d; break;
3037ea103259SMichael Clark             case 4: op = rv_op_amoadd_q; break;
3038ae4bdcefSLIU Zhiwei             case 8: op = rv_op_amoswap_b; break;
3039ae4bdcefSLIU Zhiwei             case 9: op = rv_op_amoswap_h; break;
3040ea103259SMichael Clark             case 10: op = rv_op_amoswap_w; break;
3041ea103259SMichael Clark             case 11: op = rv_op_amoswap_d; break;
3042ea103259SMichael Clark             case 12: op = rv_op_amoswap_q; break;
3043ea103259SMichael Clark             case 18:
30443bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3045ea103259SMichael Clark                 case 0: op = rv_op_lr_w; break;
3046ea103259SMichael Clark                 }
3047ea103259SMichael Clark                 break;
3048ea103259SMichael Clark             case 19:
30493bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3050ea103259SMichael Clark                 case 0: op = rv_op_lr_d; break;
3051ea103259SMichael Clark                 }
3052ea103259SMichael Clark                 break;
3053ea103259SMichael Clark             case 20:
30543bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3055ea103259SMichael Clark                 case 0: op = rv_op_lr_q; break;
3056ea103259SMichael Clark                 }
3057ea103259SMichael Clark                 break;
3058ea103259SMichael Clark             case 26: op = rv_op_sc_w; break;
3059ea103259SMichael Clark             case 27: op = rv_op_sc_d; break;
3060ea103259SMichael Clark             case 28: op = rv_op_sc_q; break;
3061ae4bdcefSLIU Zhiwei             case 32: op = rv_op_amoxor_b; break;
3062ae4bdcefSLIU Zhiwei             case 33: op = rv_op_amoxor_h; break;
3063ea103259SMichael Clark             case 34: op = rv_op_amoxor_w; break;
3064ea103259SMichael Clark             case 35: op = rv_op_amoxor_d; break;
3065ea103259SMichael Clark             case 36: op = rv_op_amoxor_q; break;
3066ae4bdcefSLIU Zhiwei             case 40: op = rv_op_amocas_b; break;
3067ae4bdcefSLIU Zhiwei             case 41: op = rv_op_amocas_h; break;
30686c848c19SRob Bradford             case 42: op = rv_op_amocas_w; break;
30696c848c19SRob Bradford             case 43: op = rv_op_amocas_d; break;
30706c848c19SRob Bradford             case 44: op = rv_op_amocas_q; break;
3071ae4bdcefSLIU Zhiwei             case 64: op = rv_op_amoor_b; break;
3072ae4bdcefSLIU Zhiwei             case 65: op = rv_op_amoor_h; break;
3073ea103259SMichael Clark             case 66: op = rv_op_amoor_w; break;
3074ea103259SMichael Clark             case 67: op = rv_op_amoor_d; break;
3075ea103259SMichael Clark             case 68: op = rv_op_amoor_q; break;
3076ae4bdcefSLIU Zhiwei             case 96: op = rv_op_amoand_b; break;
3077ae4bdcefSLIU Zhiwei             case 97: op = rv_op_amoand_h; break;
3078ea103259SMichael Clark             case 98: op = rv_op_amoand_w; break;
3079ea103259SMichael Clark             case 99: op = rv_op_amoand_d; break;
3080ea103259SMichael Clark             case 100: op = rv_op_amoand_q; break;
3081ae4bdcefSLIU Zhiwei             case 128: op = rv_op_amomin_b; break;
3082ae4bdcefSLIU Zhiwei             case 129: op = rv_op_amomin_h; break;
3083ea103259SMichael Clark             case 130: op = rv_op_amomin_w; break;
3084ea103259SMichael Clark             case 131: op = rv_op_amomin_d; break;
3085ea103259SMichael Clark             case 132: op = rv_op_amomin_q; break;
3086ae4bdcefSLIU Zhiwei             case 160: op = rv_op_amomax_b; break;
3087ae4bdcefSLIU Zhiwei             case 161: op = rv_op_amomax_h; break;
3088ea103259SMichael Clark             case 162: op = rv_op_amomax_w; break;
3089ea103259SMichael Clark             case 163: op = rv_op_amomax_d; break;
3090ea103259SMichael Clark             case 164: op = rv_op_amomax_q; break;
3091ae4bdcefSLIU Zhiwei             case 192: op = rv_op_amominu_b; break;
3092ae4bdcefSLIU Zhiwei             case 193: op = rv_op_amominu_h; break;
3093ea103259SMichael Clark             case 194: op = rv_op_amominu_w; break;
3094ea103259SMichael Clark             case 195: op = rv_op_amominu_d; break;
3095ea103259SMichael Clark             case 196: op = rv_op_amominu_q; break;
3096ae4bdcefSLIU Zhiwei             case 224: op = rv_op_amomaxu_b; break;
3097ae4bdcefSLIU Zhiwei             case 225: op = rv_op_amomaxu_h; break;
3098ea103259SMichael Clark             case 226: op = rv_op_amomaxu_w; break;
3099ea103259SMichael Clark             case 227: op = rv_op_amomaxu_d; break;
3100ea103259SMichael Clark             case 228: op = rv_op_amomaxu_q; break;
3101ea103259SMichael Clark             }
3102ea103259SMichael Clark             break;
3103ea103259SMichael Clark         case 12:
310498624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
310598624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
3106ea103259SMichael Clark             case 0: op = rv_op_add; break;
3107ea103259SMichael Clark             case 1: op = rv_op_sll; break;
3108ea103259SMichael Clark             case 2: op = rv_op_slt; break;
3109ea103259SMichael Clark             case 3: op = rv_op_sltu; break;
3110ea103259SMichael Clark             case 4: op = rv_op_xor; break;
3111ea103259SMichael Clark             case 5: op = rv_op_srl; break;
3112ea103259SMichael Clark             case 6: op = rv_op_or; break;
3113ea103259SMichael Clark             case 7: op = rv_op_and; break;
3114ea103259SMichael Clark             case 8: op = rv_op_mul; break;
3115ea103259SMichael Clark             case 9: op = rv_op_mulh; break;
3116ea103259SMichael Clark             case 10: op = rv_op_mulhsu; break;
3117ea103259SMichael Clark             case 11: op = rv_op_mulhu; break;
3118ea103259SMichael Clark             case 12: op = rv_op_div; break;
3119ea103259SMichael Clark             case 13: op = rv_op_divu; break;
3120ea103259SMichael Clark             case 14: op = rv_op_rem; break;
3121ea103259SMichael Clark             case 15: op = rv_op_remu; break;
312202c1b569SPhilipp Tomsich             case 36:
312302c1b569SPhilipp Tomsich                 switch ((inst >> 20) & 0b11111) {
312402c1b569SPhilipp Tomsich                 case 0: op = rv_op_zext_h; break;
31255748c886SWeiwei Li                 default: op = rv_op_pack; break;
312602c1b569SPhilipp Tomsich                 }
312702c1b569SPhilipp Tomsich                 break;
31285748c886SWeiwei Li             case 39: op = rv_op_packh; break;
31295748c886SWeiwei Li 
313002c1b569SPhilipp Tomsich             case 41: op = rv_op_clmul; break;
313102c1b569SPhilipp Tomsich             case 42: op = rv_op_clmulr; break;
313202c1b569SPhilipp Tomsich             case 43: op = rv_op_clmulh; break;
313302c1b569SPhilipp Tomsich             case 44: op = rv_op_min; break;
313402c1b569SPhilipp Tomsich             case 45: op = rv_op_minu; break;
313502c1b569SPhilipp Tomsich             case 46: op = rv_op_max; break;
313602c1b569SPhilipp Tomsich             case 47: op = rv_op_maxu; break;
3137d397be9aSRichard Henderson             case 075: op = rv_op_czero_eqz; break;
3138d397be9aSRichard Henderson             case 077: op = rv_op_czero_nez; break;
313902c1b569SPhilipp Tomsich             case 130: op = rv_op_sh1add; break;
314002c1b569SPhilipp Tomsich             case 132: op = rv_op_sh2add; break;
314102c1b569SPhilipp Tomsich             case 134: op = rv_op_sh3add; break;
314202c1b569SPhilipp Tomsich             case 161: op = rv_op_bset; break;
31435748c886SWeiwei Li             case 162: op = rv_op_xperm4; break;
31445748c886SWeiwei Li             case 164: op = rv_op_xperm8; break;
31455748c886SWeiwei Li             case 200: op = rv_op_aes64es; break;
31465748c886SWeiwei Li             case 216: op = rv_op_aes64esm; break;
31475748c886SWeiwei Li             case 232: op = rv_op_aes64ds; break;
31485748c886SWeiwei Li             case 248: op = rv_op_aes64dsm; break;
3149ea103259SMichael Clark             case 256: op = rv_op_sub; break;
315002c1b569SPhilipp Tomsich             case 260: op = rv_op_xnor; break;
3151ea103259SMichael Clark             case 261: op = rv_op_sra; break;
315202c1b569SPhilipp Tomsich             case 262: op = rv_op_orn; break;
315302c1b569SPhilipp Tomsich             case 263: op = rv_op_andn; break;
315402c1b569SPhilipp Tomsich             case 289: op = rv_op_bclr; break;
315502c1b569SPhilipp Tomsich             case 293: op = rv_op_bext; break;
31565748c886SWeiwei Li             case 320: op = rv_op_sha512sum0r; break;
31575748c886SWeiwei Li             case 328: op = rv_op_sha512sum1r; break;
31585748c886SWeiwei Li             case 336: op = rv_op_sha512sig0l; break;
31595748c886SWeiwei Li             case 344: op = rv_op_sha512sig1l; break;
31605748c886SWeiwei Li             case 368: op = rv_op_sha512sig0h; break;
31615748c886SWeiwei Li             case 376: op = rv_op_sha512sig1h; break;
316202c1b569SPhilipp Tomsich             case 385: op = rv_op_rol; break;
31635748c886SWeiwei Li             case 389: op = rv_op_ror; break;
316402c1b569SPhilipp Tomsich             case 417: op = rv_op_binv; break;
31655748c886SWeiwei Li             case 504: op = rv_op_aes64ks2; break;
31665748c886SWeiwei Li             }
31675748c886SWeiwei Li             switch ((inst >> 25) & 0b0011111) {
31685748c886SWeiwei Li             case 17: op = rv_op_aes32esi; break;
31695748c886SWeiwei Li             case 19: op = rv_op_aes32esmi; break;
31705748c886SWeiwei Li             case 21: op = rv_op_aes32dsi; break;
31715748c886SWeiwei Li             case 23: op = rv_op_aes32dsmi; break;
31725748c886SWeiwei Li             case 24: op = rv_op_sm4ed; break;
31735748c886SWeiwei Li             case 26: op = rv_op_sm4ks; break;
3174ea103259SMichael Clark             }
3175ea103259SMichael Clark             break;
3176ea103259SMichael Clark         case 13: op = rv_op_lui; break;
3177ea103259SMichael Clark         case 14:
317898624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
317998624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
3180ea103259SMichael Clark             case 0: op = rv_op_addw; break;
3181ea103259SMichael Clark             case 1: op = rv_op_sllw; break;
3182ea103259SMichael Clark             case 5: op = rv_op_srlw; break;
3183ea103259SMichael Clark             case 8: op = rv_op_mulw; break;
3184ea103259SMichael Clark             case 12: op = rv_op_divw; break;
3185ea103259SMichael Clark             case 13: op = rv_op_divuw; break;
3186ea103259SMichael Clark             case 14: op = rv_op_remw; break;
3187ea103259SMichael Clark             case 15: op = rv_op_remuw; break;
318802c1b569SPhilipp Tomsich             case 32: op = rv_op_add_uw; break;
318902c1b569SPhilipp Tomsich             case 36:
319002c1b569SPhilipp Tomsich                 switch ((inst >> 20) & 0b11111) {
319102c1b569SPhilipp Tomsich                 case 0: op = rv_op_zext_h; break;
31925748c886SWeiwei Li                 default: op = rv_op_packw; break;
319302c1b569SPhilipp Tomsich                 }
319402c1b569SPhilipp Tomsich                 break;
319502c1b569SPhilipp Tomsich             case 130: op = rv_op_sh1add_uw; break;
319602c1b569SPhilipp Tomsich             case 132: op = rv_op_sh2add_uw; break;
319702c1b569SPhilipp Tomsich             case 134: op = rv_op_sh3add_uw; break;
3198ea103259SMichael Clark             case 256: op = rv_op_subw; break;
3199ea103259SMichael Clark             case 261: op = rv_op_sraw; break;
320002c1b569SPhilipp Tomsich             case 385: op = rv_op_rolw; break;
320102c1b569SPhilipp Tomsich             case 389: op = rv_op_rorw; break;
3202ea103259SMichael Clark             }
3203ea103259SMichael Clark             break;
3204ea103259SMichael Clark         case 16:
32053bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
3206ea103259SMichael Clark             case 0: op = rv_op_fmadd_s; break;
3207ea103259SMichael Clark             case 1: op = rv_op_fmadd_d; break;
3208ea103259SMichael Clark             case 3: op = rv_op_fmadd_q; break;
3209ea103259SMichael Clark             }
3210ea103259SMichael Clark             break;
3211ea103259SMichael Clark         case 17:
32123bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
3213ea103259SMichael Clark             case 0: op = rv_op_fmsub_s; break;
3214ea103259SMichael Clark             case 1: op = rv_op_fmsub_d; break;
3215ea103259SMichael Clark             case 3: op = rv_op_fmsub_q; break;
3216ea103259SMichael Clark             }
3217ea103259SMichael Clark             break;
3218ea103259SMichael Clark         case 18:
32193bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
3220ea103259SMichael Clark             case 0: op = rv_op_fnmsub_s; break;
3221ea103259SMichael Clark             case 1: op = rv_op_fnmsub_d; break;
3222ea103259SMichael Clark             case 3: op = rv_op_fnmsub_q; break;
3223ea103259SMichael Clark             }
3224ea103259SMichael Clark             break;
3225ea103259SMichael Clark         case 19:
32263bd87176SWeiwei Li             switch ((inst >> 25) & 0b11) {
3227ea103259SMichael Clark             case 0: op = rv_op_fnmadd_s; break;
3228ea103259SMichael Clark             case 1: op = rv_op_fnmadd_d; break;
3229ea103259SMichael Clark             case 3: op = rv_op_fnmadd_q; break;
3230ea103259SMichael Clark             }
3231ea103259SMichael Clark             break;
3232ea103259SMichael Clark         case 20:
32333bd87176SWeiwei Li             switch ((inst >> 25) & 0b1111111) {
3234ea103259SMichael Clark             case 0: op = rv_op_fadd_s; break;
3235ea103259SMichael Clark             case 1: op = rv_op_fadd_d; break;
3236ea103259SMichael Clark             case 3: op = rv_op_fadd_q; break;
3237ea103259SMichael Clark             case 4: op = rv_op_fsub_s; break;
3238ea103259SMichael Clark             case 5: op = rv_op_fsub_d; break;
3239ea103259SMichael Clark             case 7: op = rv_op_fsub_q; break;
3240ea103259SMichael Clark             case 8: op = rv_op_fmul_s; break;
3241ea103259SMichael Clark             case 9: op = rv_op_fmul_d; break;
3242ea103259SMichael Clark             case 11: op = rv_op_fmul_q; break;
3243ea103259SMichael Clark             case 12: op = rv_op_fdiv_s; break;
3244ea103259SMichael Clark             case 13: op = rv_op_fdiv_d; break;
3245ea103259SMichael Clark             case 15: op = rv_op_fdiv_q; break;
3246ea103259SMichael Clark             case 16:
32473bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3248ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_s; break;
3249ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_s; break;
3250ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_s; break;
3251ea103259SMichael Clark                 }
3252ea103259SMichael Clark                 break;
3253ea103259SMichael Clark             case 17:
32543bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3255ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_d; break;
3256ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_d; break;
3257ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_d; break;
3258ea103259SMichael Clark                 }
3259ea103259SMichael Clark                 break;
3260ea103259SMichael Clark             case 19:
32613bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3262ea103259SMichael Clark                 case 0: op = rv_op_fsgnj_q; break;
3263ea103259SMichael Clark                 case 1: op = rv_op_fsgnjn_q; break;
3264ea103259SMichael Clark                 case 2: op = rv_op_fsgnjx_q; break;
3265ea103259SMichael Clark                 }
3266ea103259SMichael Clark                 break;
3267ea103259SMichael Clark             case 20:
32683bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3269ea103259SMichael Clark                 case 0: op = rv_op_fmin_s; break;
3270ea103259SMichael Clark                 case 1: op = rv_op_fmax_s; break;
3271a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_s; break;
3272a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_s; break;
3273ea103259SMichael Clark                 }
3274ea103259SMichael Clark                 break;
3275ea103259SMichael Clark             case 21:
32763bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3277ea103259SMichael Clark                 case 0: op = rv_op_fmin_d; break;
3278ea103259SMichael Clark                 case 1: op = rv_op_fmax_d; break;
3279a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_d; break;
3280a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_d; break;
3281a47842d1SChristoph Müllner                 }
3282a47842d1SChristoph Müllner                 break;
3283a47842d1SChristoph Müllner             case 22:
3284a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3285a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_h; break;
3286a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_h; break;
3287ea103259SMichael Clark                 }
3288ea103259SMichael Clark                 break;
3289ea103259SMichael Clark             case 23:
32903bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3291ea103259SMichael Clark                 case 0: op = rv_op_fmin_q; break;
3292ea103259SMichael Clark                 case 1: op = rv_op_fmax_q; break;
3293a47842d1SChristoph Müllner                 case 2: op = rv_op_fminm_q; break;
3294a47842d1SChristoph Müllner                 case 3: op = rv_op_fmaxm_q; break;
3295ea103259SMichael Clark                 }
3296ea103259SMichael Clark                 break;
3297ea103259SMichael Clark             case 32:
32983bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3299ea103259SMichael Clark                 case 1: op = rv_op_fcvt_s_d; break;
3300ea103259SMichael Clark                 case 3: op = rv_op_fcvt_s_q; break;
3301a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_s; break;
3302a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_s; break;
330332b2d75bSWeiwei Li                 case 6: op = rv_op_fcvt_s_bf16; break;
3304ea103259SMichael Clark                 }
3305ea103259SMichael Clark                 break;
3306ea103259SMichael Clark             case 33:
33073bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3308ea103259SMichael Clark                 case 0: op = rv_op_fcvt_d_s; break;
3309ea103259SMichael Clark                 case 3: op = rv_op_fcvt_d_q; break;
3310a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_d; break;
3311a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_d; break;
3312ea103259SMichael Clark                 }
3313ea103259SMichael Clark                 break;
331432b2d75bSWeiwei Li             case 34:
331532b2d75bSWeiwei Li                 switch (((inst >> 20) & 0b11111)) {
3316a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_h; break;
3317a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_h; break;
331832b2d75bSWeiwei Li                 case 8: op = rv_op_fcvt_bf16_s; break;
331932b2d75bSWeiwei Li                 }
332032b2d75bSWeiwei Li                 break;
3321ea103259SMichael Clark             case 35:
33223bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3323ea103259SMichael Clark                 case 0: op = rv_op_fcvt_q_s; break;
3324ea103259SMichael Clark                 case 1: op = rv_op_fcvt_q_d; break;
3325a47842d1SChristoph Müllner                 case 4: op = rv_op_fround_q; break;
3326a47842d1SChristoph Müllner                 case 5: op = rv_op_froundnx_q; break;
3327ea103259SMichael Clark                 }
3328ea103259SMichael Clark                 break;
3329ea103259SMichael Clark             case 44:
33303bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3331ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_s; break;
3332ea103259SMichael Clark                 }
3333ea103259SMichael Clark                 break;
3334ea103259SMichael Clark             case 45:
33353bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3336ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_d; break;
3337ea103259SMichael Clark                 }
3338ea103259SMichael Clark                 break;
3339ea103259SMichael Clark             case 47:
33403bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3341ea103259SMichael Clark                 case 0: op = rv_op_fsqrt_q; break;
3342ea103259SMichael Clark                 }
3343ea103259SMichael Clark                 break;
3344ea103259SMichael Clark             case 80:
33453bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3346ea103259SMichael Clark                 case 0: op = rv_op_fle_s; break;
3347ea103259SMichael Clark                 case 1: op = rv_op_flt_s; break;
3348ea103259SMichael Clark                 case 2: op = rv_op_feq_s; break;
3349a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_s; break;
3350a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_s; break;
3351ea103259SMichael Clark                 }
3352ea103259SMichael Clark                 break;
3353ea103259SMichael Clark             case 81:
33543bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3355ea103259SMichael Clark                 case 0: op = rv_op_fle_d; break;
3356ea103259SMichael Clark                 case 1: op = rv_op_flt_d; break;
3357ea103259SMichael Clark                 case 2: op = rv_op_feq_d; break;
3358a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_d; break;
3359a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_d; break;
3360a47842d1SChristoph Müllner                 }
3361a47842d1SChristoph Müllner                 break;
3362a47842d1SChristoph Müllner             case 82:
3363a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3364a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_h; break;
3365a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_h; break;
3366ea103259SMichael Clark                 }
3367ea103259SMichael Clark                 break;
3368ea103259SMichael Clark             case 83:
33693bd87176SWeiwei Li                 switch ((inst >> 12) & 0b111) {
3370ea103259SMichael Clark                 case 0: op = rv_op_fle_q; break;
3371ea103259SMichael Clark                 case 1: op = rv_op_flt_q; break;
3372ea103259SMichael Clark                 case 2: op = rv_op_feq_q; break;
3373a47842d1SChristoph Müllner                 case 4: op = rv_op_fleq_q; break;
3374a47842d1SChristoph Müllner                 case 5: op = rv_op_fltq_q; break;
3375a47842d1SChristoph Müllner                 }
3376a47842d1SChristoph Müllner                 break;
3377a47842d1SChristoph Müllner             case 89:
3378a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3379a47842d1SChristoph Müllner                 case 0: op = rv_op_fmvp_d_x; break;
3380a47842d1SChristoph Müllner                 }
3381a47842d1SChristoph Müllner                 break;
3382a47842d1SChristoph Müllner             case 91:
3383a47842d1SChristoph Müllner                 switch (((inst >> 12) & 0b111)) {
3384a47842d1SChristoph Müllner                 case 0: op = rv_op_fmvp_q_x; break;
3385ea103259SMichael Clark                 }
3386ea103259SMichael Clark                 break;
3387ea103259SMichael Clark             case 96:
33883bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3389ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_s; break;
3390ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_s; break;
3391ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_s; break;
3392ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_s; break;
3393ea103259SMichael Clark                 }
3394ea103259SMichael Clark                 break;
3395ea103259SMichael Clark             case 97:
33963bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3397ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_d; break;
3398ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_d; break;
3399ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_d; break;
3400ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_d; break;
3401a47842d1SChristoph Müllner                 case 8: op = rv_op_fcvtmod_w_d; break;
3402ea103259SMichael Clark                 }
3403ea103259SMichael Clark                 break;
3404ea103259SMichael Clark             case 99:
34053bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3406ea103259SMichael Clark                 case 0: op = rv_op_fcvt_w_q; break;
3407ea103259SMichael Clark                 case 1: op = rv_op_fcvt_wu_q; break;
3408ea103259SMichael Clark                 case 2: op = rv_op_fcvt_l_q; break;
3409ea103259SMichael Clark                 case 3: op = rv_op_fcvt_lu_q; break;
3410ea103259SMichael Clark                 }
3411ea103259SMichael Clark                 break;
3412ea103259SMichael Clark             case 104:
34133bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3414ea103259SMichael Clark                 case 0: op = rv_op_fcvt_s_w; break;
3415ea103259SMichael Clark                 case 1: op = rv_op_fcvt_s_wu; break;
3416ea103259SMichael Clark                 case 2: op = rv_op_fcvt_s_l; break;
3417ea103259SMichael Clark                 case 3: op = rv_op_fcvt_s_lu; break;
3418ea103259SMichael Clark                 }
3419ea103259SMichael Clark                 break;
3420ea103259SMichael Clark             case 105:
34213bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3422ea103259SMichael Clark                 case 0: op = rv_op_fcvt_d_w; break;
3423ea103259SMichael Clark                 case 1: op = rv_op_fcvt_d_wu; break;
3424ea103259SMichael Clark                 case 2: op = rv_op_fcvt_d_l; break;
3425ea103259SMichael Clark                 case 3: op = rv_op_fcvt_d_lu; break;
3426ea103259SMichael Clark                 }
3427ea103259SMichael Clark                 break;
3428ea103259SMichael Clark             case 107:
34293bd87176SWeiwei Li                 switch ((inst >> 20) & 0b11111) {
3430ea103259SMichael Clark                 case 0: op = rv_op_fcvt_q_w; break;
3431ea103259SMichael Clark                 case 1: op = rv_op_fcvt_q_wu; break;
3432ea103259SMichael Clark                 case 2: op = rv_op_fcvt_q_l; break;
3433ea103259SMichael Clark                 case 3: op = rv_op_fcvt_q_lu; break;
3434ea103259SMichael Clark                 }
3435ea103259SMichael Clark                 break;
3436ea103259SMichael Clark             case 112:
343798624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
343898624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3439ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_s; break;
3440ea103259SMichael Clark                 case 1: op = rv_op_fclass_s; break;
3441ea103259SMichael Clark                 }
3442ea103259SMichael Clark                 break;
3443ea103259SMichael Clark             case 113:
344498624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
344598624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3446ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_d; break;
3447ea103259SMichael Clark                 case 1: op = rv_op_fclass_d; break;
3448a47842d1SChristoph Müllner                 case 8: op = rv_op_fmvh_x_d; break;
3449ea103259SMichael Clark                 }
3450ea103259SMichael Clark                 break;
345132b2d75bSWeiwei Li             case 114:
345232b2d75bSWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
345332b2d75bSWeiwei Li                         ((inst >> 12) & 0b00000111)) {
345432b2d75bSWeiwei Li                 case 0: op = rv_op_fmv_x_h; break;
345532b2d75bSWeiwei Li                 }
345632b2d75bSWeiwei Li                 break;
3457ea103259SMichael Clark             case 115:
345898624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
345998624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3460ea103259SMichael Clark                 case 0: op = rv_op_fmv_x_q; break;
3461ea103259SMichael Clark                 case 1: op = rv_op_fclass_q; break;
3462a47842d1SChristoph Müllner                 case 8: op = rv_op_fmvh_x_q; break;
3463ea103259SMichael Clark                 }
3464ea103259SMichael Clark                 break;
3465ea103259SMichael Clark             case 120:
346698624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
346798624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3468ea103259SMichael Clark                 case 0: op = rv_op_fmv_s_x; break;
3469a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_s; break;
3470ea103259SMichael Clark                 }
3471ea103259SMichael Clark                 break;
3472ea103259SMichael Clark             case 121:
347398624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
347498624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3475ea103259SMichael Clark                 case 0: op = rv_op_fmv_d_x; break;
3476a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_d; break;
3477ea103259SMichael Clark                 }
3478ea103259SMichael Clark                 break;
347932b2d75bSWeiwei Li             case 122:
348032b2d75bSWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
348132b2d75bSWeiwei Li                         ((inst >> 12) & 0b00000111)) {
348232b2d75bSWeiwei Li                 case 0: op = rv_op_fmv_h_x; break;
3483a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_h; break;
348432b2d75bSWeiwei Li                 }
348532b2d75bSWeiwei Li                 break;
3486ea103259SMichael Clark             case 123:
348798624d13SWeiwei Li                 switch (((inst >> 17) & 0b11111000) |
348898624d13SWeiwei Li                         ((inst >> 12) & 0b00000111)) {
3489ea103259SMichael Clark                 case 0: op = rv_op_fmv_q_x; break;
3490a47842d1SChristoph Müllner                 case 8: op = rv_op_fli_q; break;
3491ea103259SMichael Clark                 }
3492ea103259SMichael Clark                 break;
3493ea103259SMichael Clark             }
3494ea103259SMichael Clark             break;
349507f4964dSYang Liu         case 21:
34963bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
349707f4964dSYang Liu             case 0:
34983bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
349907f4964dSYang Liu                 case 0: op = rv_op_vadd_vv; break;
35009d92f56dSMax Chou                 case 1: op = rv_op_vandn_vv; break;
350107f4964dSYang Liu                 case 2: op = rv_op_vsub_vv; break;
350207f4964dSYang Liu                 case 4: op = rv_op_vminu_vv; break;
350307f4964dSYang Liu                 case 5: op = rv_op_vmin_vv; break;
350407f4964dSYang Liu                 case 6: op = rv_op_vmaxu_vv; break;
350507f4964dSYang Liu                 case 7: op = rv_op_vmax_vv; break;
350607f4964dSYang Liu                 case 9: op = rv_op_vand_vv; break;
350707f4964dSYang Liu                 case 10: op = rv_op_vor_vv; break;
350807f4964dSYang Liu                 case 11: op = rv_op_vxor_vv; break;
350907f4964dSYang Liu                 case 12: op = rv_op_vrgather_vv; break;
351007f4964dSYang Liu                 case 14: op = rv_op_vrgatherei16_vv; break;
351198624d13SWeiwei Li                 case 16:
351298624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
351398624d13SWeiwei Li                         op = rv_op_vadc_vvm;
351498624d13SWeiwei Li                     }
351598624d13SWeiwei Li                     break;
351607f4964dSYang Liu                 case 17: op = rv_op_vmadc_vvm; break;
351798624d13SWeiwei Li                 case 18:
351898624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
351998624d13SWeiwei Li                         op = rv_op_vsbc_vvm;
352098624d13SWeiwei Li                     }
352198624d13SWeiwei Li                     break;
352207f4964dSYang Liu                 case 19: op = rv_op_vmsbc_vvm; break;
35239d92f56dSMax Chou                 case 20: op = rv_op_vror_vv; break;
35249d92f56dSMax Chou                 case 21: op = rv_op_vrol_vv; break;
352507f4964dSYang Liu                 case 23:
352607f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
352707f4964dSYang Liu                         op = rv_op_vmv_v_v;
352807f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
352907f4964dSYang Liu                         op = rv_op_vmerge_vvm;
353007f4964dSYang Liu                     break;
353107f4964dSYang Liu                 case 24: op = rv_op_vmseq_vv; break;
353207f4964dSYang Liu                 case 25: op = rv_op_vmsne_vv; break;
353307f4964dSYang Liu                 case 26: op = rv_op_vmsltu_vv; break;
353407f4964dSYang Liu                 case 27: op = rv_op_vmslt_vv; break;
353507f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vv; break;
353607f4964dSYang Liu                 case 29: op = rv_op_vmsle_vv; break;
353707f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vv; break;
353807f4964dSYang Liu                 case 33: op = rv_op_vsadd_vv; break;
353907f4964dSYang Liu                 case 34: op = rv_op_vssubu_vv; break;
354007f4964dSYang Liu                 case 35: op = rv_op_vssub_vv; break;
354107f4964dSYang Liu                 case 37: op = rv_op_vsll_vv; break;
354207f4964dSYang Liu                 case 39: op = rv_op_vsmul_vv; break;
354307f4964dSYang Liu                 case 40: op = rv_op_vsrl_vv; break;
354407f4964dSYang Liu                 case 41: op = rv_op_vsra_vv; break;
354507f4964dSYang Liu                 case 42: op = rv_op_vssrl_vv; break;
354607f4964dSYang Liu                 case 43: op = rv_op_vssra_vv; break;
354707f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wv; break;
354807f4964dSYang Liu                 case 45: op = rv_op_vnsra_wv; break;
354907f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wv; break;
355007f4964dSYang Liu                 case 47: op = rv_op_vnclip_wv; break;
355107f4964dSYang Liu                 case 48: op = rv_op_vwredsumu_vs; break;
355207f4964dSYang Liu                 case 49: op = rv_op_vwredsum_vs; break;
35539d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vv; break;
355407f4964dSYang Liu                 }
355507f4964dSYang Liu                 break;
355607f4964dSYang Liu             case 1:
35573bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
355807f4964dSYang Liu                 case 0: op = rv_op_vfadd_vv; break;
355907f4964dSYang Liu                 case 1: op = rv_op_vfredusum_vs; break;
356007f4964dSYang Liu                 case 2: op = rv_op_vfsub_vv; break;
356107f4964dSYang Liu                 case 3: op = rv_op_vfredosum_vs; break;
356207f4964dSYang Liu                 case 4: op = rv_op_vfmin_vv; break;
356307f4964dSYang Liu                 case 5: op = rv_op_vfredmin_vs; break;
356407f4964dSYang Liu                 case 6: op = rv_op_vfmax_vv; break;
356507f4964dSYang Liu                 case 7: op = rv_op_vfredmax_vs; break;
356607f4964dSYang Liu                 case 8: op = rv_op_vfsgnj_vv; break;
356707f4964dSYang Liu                 case 9: op = rv_op_vfsgnjn_vv; break;
356807f4964dSYang Liu                 case 10: op = rv_op_vfsgnjx_vv; break;
356907f4964dSYang Liu                 case 16:
35703bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
357107f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_f_s; break;
357207f4964dSYang Liu                     }
357307f4964dSYang Liu                     break;
357407f4964dSYang Liu                 case 18:
35753bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
357607f4964dSYang Liu                     case 0: op = rv_op_vfcvt_xu_f_v; break;
357707f4964dSYang Liu                     case 1: op = rv_op_vfcvt_x_f_v; break;
357807f4964dSYang Liu                     case 2: op = rv_op_vfcvt_f_xu_v; break;
357907f4964dSYang Liu                     case 3: op = rv_op_vfcvt_f_x_v; break;
358007f4964dSYang Liu                     case 6: op = rv_op_vfcvt_rtz_xu_f_v; break;
358107f4964dSYang Liu                     case 7: op = rv_op_vfcvt_rtz_x_f_v; break;
358207f4964dSYang Liu                     case 8: op = rv_op_vfwcvt_xu_f_v; break;
358307f4964dSYang Liu                     case 9: op = rv_op_vfwcvt_x_f_v; break;
358407f4964dSYang Liu                     case 10: op = rv_op_vfwcvt_f_xu_v; break;
358507f4964dSYang Liu                     case 11: op = rv_op_vfwcvt_f_x_v; break;
358607f4964dSYang Liu                     case 12: op = rv_op_vfwcvt_f_f_v; break;
358732b2d75bSWeiwei Li                     case 13: op = rv_op_vfwcvtbf16_f_f_v; break;
358807f4964dSYang Liu                     case 14: op = rv_op_vfwcvt_rtz_xu_f_v; break;
358907f4964dSYang Liu                     case 15: op = rv_op_vfwcvt_rtz_x_f_v; break;
359007f4964dSYang Liu                     case 16: op = rv_op_vfncvt_xu_f_w; break;
359107f4964dSYang Liu                     case 17: op = rv_op_vfncvt_x_f_w; break;
359207f4964dSYang Liu                     case 18: op = rv_op_vfncvt_f_xu_w; break;
359307f4964dSYang Liu                     case 19: op = rv_op_vfncvt_f_x_w; break;
359407f4964dSYang Liu                     case 20: op = rv_op_vfncvt_f_f_w; break;
359507f4964dSYang Liu                     case 21: op = rv_op_vfncvt_rod_f_f_w; break;
359607f4964dSYang Liu                     case 22: op = rv_op_vfncvt_rtz_xu_f_w; break;
359707f4964dSYang Liu                     case 23: op = rv_op_vfncvt_rtz_x_f_w; break;
359832b2d75bSWeiwei Li                     case 29: op = rv_op_vfncvtbf16_f_f_w; break;
359907f4964dSYang Liu                     }
360007f4964dSYang Liu                     break;
360107f4964dSYang Liu                 case 19:
36023bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
360307f4964dSYang Liu                     case 0: op = rv_op_vfsqrt_v; break;
360407f4964dSYang Liu                     case 4: op = rv_op_vfrsqrt7_v; break;
360507f4964dSYang Liu                     case 5: op = rv_op_vfrec7_v; break;
360607f4964dSYang Liu                     case 16: op = rv_op_vfclass_v; break;
360707f4964dSYang Liu                     }
360807f4964dSYang Liu                     break;
360907f4964dSYang Liu                 case 24: op = rv_op_vmfeq_vv; break;
361007f4964dSYang Liu                 case 25: op = rv_op_vmfle_vv; break;
361107f4964dSYang Liu                 case 27: op = rv_op_vmflt_vv; break;
361207f4964dSYang Liu                 case 28: op = rv_op_vmfne_vv; break;
361307f4964dSYang Liu                 case 32: op = rv_op_vfdiv_vv; break;
361407f4964dSYang Liu                 case 36: op = rv_op_vfmul_vv; break;
361507f4964dSYang Liu                 case 40: op = rv_op_vfmadd_vv; break;
361607f4964dSYang Liu                 case 41: op = rv_op_vfnmadd_vv; break;
361707f4964dSYang Liu                 case 42: op = rv_op_vfmsub_vv; break;
361807f4964dSYang Liu                 case 43: op = rv_op_vfnmsub_vv; break;
361907f4964dSYang Liu                 case 44: op = rv_op_vfmacc_vv; break;
362007f4964dSYang Liu                 case 45: op = rv_op_vfnmacc_vv; break;
362107f4964dSYang Liu                 case 46: op = rv_op_vfmsac_vv; break;
362207f4964dSYang Liu                 case 47: op = rv_op_vfnmsac_vv; break;
362307f4964dSYang Liu                 case 48: op = rv_op_vfwadd_vv; break;
362407f4964dSYang Liu                 case 49: op = rv_op_vfwredusum_vs; break;
362507f4964dSYang Liu                 case 50: op = rv_op_vfwsub_vv; break;
362607f4964dSYang Liu                 case 51: op = rv_op_vfwredosum_vs; break;
362707f4964dSYang Liu                 case 52: op = rv_op_vfwadd_wv; break;
362807f4964dSYang Liu                 case 54: op = rv_op_vfwsub_wv; break;
362907f4964dSYang Liu                 case 56: op = rv_op_vfwmul_vv; break;
363032b2d75bSWeiwei Li                 case 59: op = rv_op_vfwmaccbf16_vv; break;
363107f4964dSYang Liu                 case 60: op = rv_op_vfwmacc_vv; break;
363207f4964dSYang Liu                 case 61: op = rv_op_vfwnmacc_vv; break;
363307f4964dSYang Liu                 case 62: op = rv_op_vfwmsac_vv; break;
363407f4964dSYang Liu                 case 63: op = rv_op_vfwnmsac_vv; break;
363507f4964dSYang Liu                 }
363607f4964dSYang Liu                 break;
363707f4964dSYang Liu             case 2:
36383bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
363907f4964dSYang Liu                 case 0: op = rv_op_vredsum_vs; break;
364007f4964dSYang Liu                 case 1: op = rv_op_vredand_vs; break;
364107f4964dSYang Liu                 case 2: op = rv_op_vredor_vs; break;
364207f4964dSYang Liu                 case 3: op = rv_op_vredxor_vs; break;
364307f4964dSYang Liu                 case 4: op = rv_op_vredminu_vs; break;
364407f4964dSYang Liu                 case 5: op = rv_op_vredmin_vs; break;
364507f4964dSYang Liu                 case 6: op = rv_op_vredmaxu_vs; break;
364607f4964dSYang Liu                 case 7: op = rv_op_vredmax_vs; break;
364707f4964dSYang Liu                 case 8: op = rv_op_vaaddu_vv; break;
364807f4964dSYang Liu                 case 9: op = rv_op_vaadd_vv; break;
364907f4964dSYang Liu                 case 10: op = rv_op_vasubu_vv; break;
365007f4964dSYang Liu                 case 11: op = rv_op_vasub_vv; break;
36519d92f56dSMax Chou                 case 12: op = rv_op_vclmul_vv; break;
36529d92f56dSMax Chou                 case 13: op = rv_op_vclmulh_vv; break;
365307f4964dSYang Liu                 case 16:
36543bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
365507f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vmv_x_s; break;
365607f4964dSYang Liu                     case 16: op = rv_op_vcpop_m; break;
365707f4964dSYang Liu                     case 17: op = rv_op_vfirst_m; break;
365807f4964dSYang Liu                     }
365907f4964dSYang Liu                     break;
366007f4964dSYang Liu                 case 18:
36613bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
366207f4964dSYang Liu                     case 2: op = rv_op_vzext_vf8; break;
366307f4964dSYang Liu                     case 3: op = rv_op_vsext_vf8; break;
366407f4964dSYang Liu                     case 4: op = rv_op_vzext_vf4; break;
366507f4964dSYang Liu                     case 5: op = rv_op_vsext_vf4; break;
366607f4964dSYang Liu                     case 6: op = rv_op_vzext_vf2; break;
366707f4964dSYang Liu                     case 7: op = rv_op_vsext_vf2; break;
36689d92f56dSMax Chou                     case 8: op = rv_op_vbrev8_v; break;
36699d92f56dSMax Chou                     case 9: op = rv_op_vrev8_v; break;
36709d92f56dSMax Chou                     case 10: op = rv_op_vbrev_v; break;
36719d92f56dSMax Chou                     case 12: op = rv_op_vclz_v; break;
36729d92f56dSMax Chou                     case 13: op = rv_op_vctz_v; break;
36739d92f56dSMax Chou                     case 14: op = rv_op_vcpop_v; break;
367407f4964dSYang Liu                     }
367507f4964dSYang Liu                     break;
367607f4964dSYang Liu                 case 20:
36773bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
367807f4964dSYang Liu                     case 1: op = rv_op_vmsbf_m;  break;
367907f4964dSYang Liu                     case 2: op = rv_op_vmsof_m; break;
368007f4964dSYang Liu                     case 3: op = rv_op_vmsif_m; break;
368107f4964dSYang Liu                     case 16: op = rv_op_viota_m; break;
368298624d13SWeiwei Li                     case 17:
368398624d13SWeiwei Li                         if (((inst >> 20) & 0b11111) == 0) {
368498624d13SWeiwei Li                             op = rv_op_vid_v;
368598624d13SWeiwei Li                         }
368698624d13SWeiwei Li                         break;
368707f4964dSYang Liu                     }
368807f4964dSYang Liu                     break;
368907f4964dSYang Liu                 case 23: if ((inst >> 25) & 1) op = rv_op_vcompress_vm; break;
369007f4964dSYang Liu                 case 24: if ((inst >> 25) & 1) op = rv_op_vmandn_mm; break;
369107f4964dSYang Liu                 case 25: if ((inst >> 25) & 1) op = rv_op_vmand_mm; break;
369207f4964dSYang Liu                 case 26: if ((inst >> 25) & 1) op = rv_op_vmor_mm; break;
369307f4964dSYang Liu                 case 27: if ((inst >> 25) & 1) op = rv_op_vmxor_mm; break;
369407f4964dSYang Liu                 case 28: if ((inst >> 25) & 1) op = rv_op_vmorn_mm; break;
369507f4964dSYang Liu                 case 29: if ((inst >> 25) & 1) op = rv_op_vmnand_mm; break;
369607f4964dSYang Liu                 case 30: if ((inst >> 25) & 1) op = rv_op_vmnor_mm; break;
369707f4964dSYang Liu                 case 31: if ((inst >> 25) & 1) op = rv_op_vmxnor_mm; break;
369807f4964dSYang Liu                 case 32: op = rv_op_vdivu_vv; break;
369907f4964dSYang Liu                 case 33: op = rv_op_vdiv_vv; break;
370007f4964dSYang Liu                 case 34: op = rv_op_vremu_vv; break;
370107f4964dSYang Liu                 case 35: op = rv_op_vrem_vv; break;
370207f4964dSYang Liu                 case 36: op = rv_op_vmulhu_vv; break;
370307f4964dSYang Liu                 case 37: op = rv_op_vmul_vv; break;
370407f4964dSYang Liu                 case 38: op = rv_op_vmulhsu_vv; break;
370507f4964dSYang Liu                 case 39: op = rv_op_vmulh_vv; break;
370607f4964dSYang Liu                 case 41: op = rv_op_vmadd_vv; break;
370707f4964dSYang Liu                 case 43: op = rv_op_vnmsub_vv; break;
370807f4964dSYang Liu                 case 45: op = rv_op_vmacc_vv; break;
370907f4964dSYang Liu                 case 47: op = rv_op_vnmsac_vv; break;
371007f4964dSYang Liu                 case 48: op = rv_op_vwaddu_vv; break;
371107f4964dSYang Liu                 case 49: op = rv_op_vwadd_vv; break;
371207f4964dSYang Liu                 case 50: op = rv_op_vwsubu_vv; break;
371307f4964dSYang Liu                 case 51: op = rv_op_vwsub_vv; break;
371407f4964dSYang Liu                 case 52: op = rv_op_vwaddu_wv; break;
371507f4964dSYang Liu                 case 53: op = rv_op_vwadd_wv; break;
371607f4964dSYang Liu                 case 54: op = rv_op_vwsubu_wv; break;
371707f4964dSYang Liu                 case 55: op = rv_op_vwsub_wv; break;
371807f4964dSYang Liu                 case 56: op = rv_op_vwmulu_vv; break;
371907f4964dSYang Liu                 case 58: op = rv_op_vwmulsu_vv; break;
372007f4964dSYang Liu                 case 59: op = rv_op_vwmul_vv; break;
372107f4964dSYang Liu                 case 60: op = rv_op_vwmaccu_vv; break;
372207f4964dSYang Liu                 case 61: op = rv_op_vwmacc_vv; break;
372307f4964dSYang Liu                 case 63: op = rv_op_vwmaccsu_vv; break;
372407f4964dSYang Liu                 }
372507f4964dSYang Liu                 break;
372607f4964dSYang Liu             case 3:
37273bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
372807f4964dSYang Liu                 case 0: op = rv_op_vadd_vi; break;
372907f4964dSYang Liu                 case 3: op = rv_op_vrsub_vi; break;
373007f4964dSYang Liu                 case 9: op = rv_op_vand_vi; break;
373107f4964dSYang Liu                 case 10: op = rv_op_vor_vi; break;
373207f4964dSYang Liu                 case 11: op = rv_op_vxor_vi; break;
373307f4964dSYang Liu                 case 12: op = rv_op_vrgather_vi; break;
373407f4964dSYang Liu                 case 14: op = rv_op_vslideup_vi; break;
373507f4964dSYang Liu                 case 15: op = rv_op_vslidedown_vi; break;
373698624d13SWeiwei Li                 case 16:
373798624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
373898624d13SWeiwei Li                         op = rv_op_vadc_vim;
373998624d13SWeiwei Li                     }
374098624d13SWeiwei Li                     break;
374107f4964dSYang Liu                 case 17: op = rv_op_vmadc_vim; break;
37429d92f56dSMax Chou                 case 20: case 21: op = rv_op_vror_vi; break;
374307f4964dSYang Liu                 case 23:
374407f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
374507f4964dSYang Liu                         op = rv_op_vmv_v_i;
374607f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
374707f4964dSYang Liu                         op = rv_op_vmerge_vim;
374807f4964dSYang Liu                     break;
374907f4964dSYang Liu                 case 24: op = rv_op_vmseq_vi; break;
375007f4964dSYang Liu                 case 25: op = rv_op_vmsne_vi; break;
375107f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vi; break;
375207f4964dSYang Liu                 case 29: op = rv_op_vmsle_vi; break;
375307f4964dSYang Liu                 case 30: op = rv_op_vmsgtu_vi; break;
375407f4964dSYang Liu                 case 31: op = rv_op_vmsgt_vi; break;
375507f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vi; break;
375607f4964dSYang Liu                 case 33: op = rv_op_vsadd_vi; break;
375707f4964dSYang Liu                 case 37: op = rv_op_vsll_vi; break;
375807f4964dSYang Liu                 case 39:
37593bd87176SWeiwei Li                     switch ((inst >> 15) & 0b11111) {
376007f4964dSYang Liu                     case 0: op = rv_op_vmv1r_v; break;
376107f4964dSYang Liu                     case 1: op = rv_op_vmv2r_v; break;
376207f4964dSYang Liu                     case 3: op = rv_op_vmv4r_v; break;
376307f4964dSYang Liu                     case 7: op = rv_op_vmv8r_v; break;
376407f4964dSYang Liu                     }
376507f4964dSYang Liu                     break;
376607f4964dSYang Liu                 case 40: op = rv_op_vsrl_vi; break;
376707f4964dSYang Liu                 case 41: op = rv_op_vsra_vi; break;
376807f4964dSYang Liu                 case 42: op = rv_op_vssrl_vi; break;
376907f4964dSYang Liu                 case 43: op = rv_op_vssra_vi; break;
377007f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wi; break;
377107f4964dSYang Liu                 case 45: op = rv_op_vnsra_wi; break;
377207f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wi; break;
377307f4964dSYang Liu                 case 47: op = rv_op_vnclip_wi; break;
37749d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vi; break;
377507f4964dSYang Liu                 }
377607f4964dSYang Liu                 break;
377707f4964dSYang Liu             case 4:
37783bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
377907f4964dSYang Liu                 case 0: op = rv_op_vadd_vx; break;
37809d92f56dSMax Chou                 case 1: op = rv_op_vandn_vx; break;
378107f4964dSYang Liu                 case 2: op = rv_op_vsub_vx; break;
378207f4964dSYang Liu                 case 3: op = rv_op_vrsub_vx; break;
378307f4964dSYang Liu                 case 4: op = rv_op_vminu_vx; break;
378407f4964dSYang Liu                 case 5: op = rv_op_vmin_vx; break;
378507f4964dSYang Liu                 case 6: op = rv_op_vmaxu_vx; break;
378607f4964dSYang Liu                 case 7: op = rv_op_vmax_vx; break;
378707f4964dSYang Liu                 case 9: op = rv_op_vand_vx; break;
378807f4964dSYang Liu                 case 10: op = rv_op_vor_vx; break;
378907f4964dSYang Liu                 case 11: op = rv_op_vxor_vx; break;
379007f4964dSYang Liu                 case 12: op = rv_op_vrgather_vx; break;
379107f4964dSYang Liu                 case 14: op = rv_op_vslideup_vx; break;
379207f4964dSYang Liu                 case 15: op = rv_op_vslidedown_vx; break;
379398624d13SWeiwei Li                 case 16:
379498624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
379598624d13SWeiwei Li                         op = rv_op_vadc_vxm;
379698624d13SWeiwei Li                     }
379798624d13SWeiwei Li                     break;
379807f4964dSYang Liu                 case 17: op = rv_op_vmadc_vxm; break;
379998624d13SWeiwei Li                 case 18:
380098624d13SWeiwei Li                     if (((inst >> 25) & 1) == 0) {
380198624d13SWeiwei Li                         op = rv_op_vsbc_vxm;
380298624d13SWeiwei Li                     }
380398624d13SWeiwei Li                     break;
380407f4964dSYang Liu                 case 19: op = rv_op_vmsbc_vxm; break;
38059d92f56dSMax Chou                 case 20: op = rv_op_vror_vx; break;
38069d92f56dSMax Chou                 case 21: op = rv_op_vrol_vx; break;
380707f4964dSYang Liu                 case 23:
380807f4964dSYang Liu                     if (((inst >> 20) & 0b111111) == 32)
380907f4964dSYang Liu                         op = rv_op_vmv_v_x;
381007f4964dSYang Liu                     else if (((inst >> 25) & 1) == 0)
381107f4964dSYang Liu                         op = rv_op_vmerge_vxm;
381207f4964dSYang Liu                     break;
381307f4964dSYang Liu                 case 24: op = rv_op_vmseq_vx; break;
381407f4964dSYang Liu                 case 25: op = rv_op_vmsne_vx; break;
381507f4964dSYang Liu                 case 26: op = rv_op_vmsltu_vx; break;
381607f4964dSYang Liu                 case 27: op = rv_op_vmslt_vx; break;
381707f4964dSYang Liu                 case 28: op = rv_op_vmsleu_vx; break;
381807f4964dSYang Liu                 case 29: op = rv_op_vmsle_vx; break;
381907f4964dSYang Liu                 case 30: op = rv_op_vmsgtu_vx; break;
382007f4964dSYang Liu                 case 31: op = rv_op_vmsgt_vx; break;
382107f4964dSYang Liu                 case 32: op = rv_op_vsaddu_vx; break;
382207f4964dSYang Liu                 case 33: op = rv_op_vsadd_vx; break;
382307f4964dSYang Liu                 case 34: op = rv_op_vssubu_vx; break;
382407f4964dSYang Liu                 case 35: op = rv_op_vssub_vx; break;
382507f4964dSYang Liu                 case 37: op = rv_op_vsll_vx; break;
382607f4964dSYang Liu                 case 39: op = rv_op_vsmul_vx; break;
382707f4964dSYang Liu                 case 40: op = rv_op_vsrl_vx; break;
382807f4964dSYang Liu                 case 41: op = rv_op_vsra_vx; break;
382907f4964dSYang Liu                 case 42: op = rv_op_vssrl_vx; break;
383007f4964dSYang Liu                 case 43: op = rv_op_vssra_vx; break;
383107f4964dSYang Liu                 case 44: op = rv_op_vnsrl_wx; break;
383207f4964dSYang Liu                 case 45: op = rv_op_vnsra_wx; break;
383307f4964dSYang Liu                 case 46: op = rv_op_vnclipu_wx; break;
383407f4964dSYang Liu                 case 47: op = rv_op_vnclip_wx; break;
38359d92f56dSMax Chou                 case 53: op = rv_op_vwsll_vx; break;
383607f4964dSYang Liu                 }
383707f4964dSYang Liu                 break;
383807f4964dSYang Liu             case 5:
38393bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
384007f4964dSYang Liu                 case 0: op = rv_op_vfadd_vf; break;
384107f4964dSYang Liu                 case 2: op = rv_op_vfsub_vf; break;
384207f4964dSYang Liu                 case 4: op = rv_op_vfmin_vf; break;
384307f4964dSYang Liu                 case 6: op = rv_op_vfmax_vf; break;
384407f4964dSYang Liu                 case 8: op = rv_op_vfsgnj_vf; break;
384507f4964dSYang Liu                 case 9: op = rv_op_vfsgnjn_vf; break;
384607f4964dSYang Liu                 case 10: op = rv_op_vfsgnjx_vf; break;
384707f4964dSYang Liu                 case 14: op = rv_op_vfslide1up_vf; break;
384807f4964dSYang Liu                 case 15: op = rv_op_vfslide1down_vf; break;
384907f4964dSYang Liu                 case 16:
38503bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
385107f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_s_f; break;
385207f4964dSYang Liu                     }
385307f4964dSYang Liu                     break;
385407f4964dSYang Liu                 case 23:
385507f4964dSYang Liu                     if (((inst >> 25) & 1) == 0)
385607f4964dSYang Liu                         op = rv_op_vfmerge_vfm;
385707f4964dSYang Liu                     else if (((inst >> 20) & 0b111111) == 32)
385807f4964dSYang Liu                         op = rv_op_vfmv_v_f;
385907f4964dSYang Liu                     break;
386007f4964dSYang Liu                 case 24: op = rv_op_vmfeq_vf; break;
386107f4964dSYang Liu                 case 25: op = rv_op_vmfle_vf; break;
386207f4964dSYang Liu                 case 27: op = rv_op_vmflt_vf; break;
386307f4964dSYang Liu                 case 28: op = rv_op_vmfne_vf; break;
386407f4964dSYang Liu                 case 29: op = rv_op_vmfgt_vf; break;
386507f4964dSYang Liu                 case 31: op = rv_op_vmfge_vf; break;
386607f4964dSYang Liu                 case 32: op = rv_op_vfdiv_vf; break;
386707f4964dSYang Liu                 case 33: op = rv_op_vfrdiv_vf; break;
386807f4964dSYang Liu                 case 36: op = rv_op_vfmul_vf; break;
386907f4964dSYang Liu                 case 39: op = rv_op_vfrsub_vf; break;
387007f4964dSYang Liu                 case 40: op = rv_op_vfmadd_vf; break;
387107f4964dSYang Liu                 case 41: op = rv_op_vfnmadd_vf; break;
387207f4964dSYang Liu                 case 42: op = rv_op_vfmsub_vf; break;
387307f4964dSYang Liu                 case 43: op = rv_op_vfnmsub_vf; break;
387407f4964dSYang Liu                 case 44: op = rv_op_vfmacc_vf; break;
387507f4964dSYang Liu                 case 45: op = rv_op_vfnmacc_vf; break;
387607f4964dSYang Liu                 case 46: op = rv_op_vfmsac_vf; break;
387707f4964dSYang Liu                 case 47: op = rv_op_vfnmsac_vf; break;
387807f4964dSYang Liu                 case 48: op = rv_op_vfwadd_vf; break;
387907f4964dSYang Liu                 case 50: op = rv_op_vfwsub_vf; break;
388007f4964dSYang Liu                 case 52: op = rv_op_vfwadd_wf; break;
388107f4964dSYang Liu                 case 54: op = rv_op_vfwsub_wf; break;
388207f4964dSYang Liu                 case 56: op = rv_op_vfwmul_vf; break;
388332b2d75bSWeiwei Li                 case 59: op = rv_op_vfwmaccbf16_vf; break;
388407f4964dSYang Liu                 case 60: op = rv_op_vfwmacc_vf; break;
388507f4964dSYang Liu                 case 61: op = rv_op_vfwnmacc_vf; break;
388607f4964dSYang Liu                 case 62: op = rv_op_vfwmsac_vf; break;
388707f4964dSYang Liu                 case 63: op = rv_op_vfwnmsac_vf; break;
388807f4964dSYang Liu                 }
388907f4964dSYang Liu                 break;
389007f4964dSYang Liu             case 6:
38913bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
389207f4964dSYang Liu                 case 8: op = rv_op_vaaddu_vx; break;
389307f4964dSYang Liu                 case 9: op = rv_op_vaadd_vx; break;
389407f4964dSYang Liu                 case 10: op = rv_op_vasubu_vx; break;
389507f4964dSYang Liu                 case 11: op = rv_op_vasub_vx; break;
38969d92f56dSMax Chou                 case 12: op = rv_op_vclmul_vx; break;
38979d92f56dSMax Chou                 case 13: op = rv_op_vclmulh_vx; break;
389807f4964dSYang Liu                 case 14: op = rv_op_vslide1up_vx; break;
389907f4964dSYang Liu                 case 15: op = rv_op_vslide1down_vx; break;
390007f4964dSYang Liu                 case 16:
39013bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
390207f4964dSYang Liu                     case 0: if ((inst >> 25) & 1) op = rv_op_vmv_s_x; break;
390307f4964dSYang Liu                     }
390407f4964dSYang Liu                     break;
390507f4964dSYang Liu                 case 32: op = rv_op_vdivu_vx; break;
390607f4964dSYang Liu                 case 33: op = rv_op_vdiv_vx; break;
390707f4964dSYang Liu                 case 34: op = rv_op_vremu_vx; break;
390807f4964dSYang Liu                 case 35: op = rv_op_vrem_vx; break;
390907f4964dSYang Liu                 case 36: op = rv_op_vmulhu_vx; break;
391007f4964dSYang Liu                 case 37: op = rv_op_vmul_vx; break;
391107f4964dSYang Liu                 case 38: op = rv_op_vmulhsu_vx; break;
391207f4964dSYang Liu                 case 39: op = rv_op_vmulh_vx; break;
391307f4964dSYang Liu                 case 41: op = rv_op_vmadd_vx; break;
391407f4964dSYang Liu                 case 43: op = rv_op_vnmsub_vx; break;
391507f4964dSYang Liu                 case 45: op = rv_op_vmacc_vx; break;
391607f4964dSYang Liu                 case 47: op = rv_op_vnmsac_vx; break;
391707f4964dSYang Liu                 case 48: op = rv_op_vwaddu_vx; break;
391807f4964dSYang Liu                 case 49: op = rv_op_vwadd_vx; break;
391907f4964dSYang Liu                 case 50: op = rv_op_vwsubu_vx; break;
392007f4964dSYang Liu                 case 51: op = rv_op_vwsub_vx; break;
392107f4964dSYang Liu                 case 52: op = rv_op_vwaddu_wx; break;
392207f4964dSYang Liu                 case 53: op = rv_op_vwadd_wx; break;
392307f4964dSYang Liu                 case 54: op = rv_op_vwsubu_wx; break;
392407f4964dSYang Liu                 case 55: op = rv_op_vwsub_wx; break;
392507f4964dSYang Liu                 case 56: op = rv_op_vwmulu_vx; break;
392607f4964dSYang Liu                 case 58: op = rv_op_vwmulsu_vx; break;
392707f4964dSYang Liu                 case 59: op = rv_op_vwmul_vx; break;
392807f4964dSYang Liu                 case 60: op = rv_op_vwmaccu_vx; break;
392907f4964dSYang Liu                 case 61: op = rv_op_vwmacc_vx; break;
393007f4964dSYang Liu                 case 62: op = rv_op_vwmaccus_vx; break;
393107f4964dSYang Liu                 case 63: op = rv_op_vwmaccsu_vx; break;
393207f4964dSYang Liu                 }
393307f4964dSYang Liu                 break;
393407f4964dSYang Liu             case 7:
393507f4964dSYang Liu                 if (((inst >> 31) & 1) == 0) {
393607f4964dSYang Liu                     op = rv_op_vsetvli;
393707f4964dSYang Liu                 } else if ((inst >> 30) & 1) {
393807f4964dSYang Liu                     op = rv_op_vsetivli;
393907f4964dSYang Liu                 } else if (((inst >> 25) & 0b11111) == 0) {
394007f4964dSYang Liu                     op = rv_op_vsetvl;
394107f4964dSYang Liu                 }
394207f4964dSYang Liu                 break;
394307f4964dSYang Liu             }
394407f4964dSYang Liu             break;
3945ea103259SMichael Clark         case 22:
39463bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3947ea103259SMichael Clark             case 0: op = rv_op_addid; break;
3948ea103259SMichael Clark             case 1:
39493bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
3950ea103259SMichael Clark                 case 0: op = rv_op_sllid; break;
3951ea103259SMichael Clark                 }
3952ea103259SMichael Clark                 break;
3953ea103259SMichael Clark             case 5:
39543bd87176SWeiwei Li                 switch ((inst >> 26) & 0b111111) {
3955ea103259SMichael Clark                 case 0: op = rv_op_srlid; break;
3956ea103259SMichael Clark                 case 16: op = rv_op_sraid; break;
3957ea103259SMichael Clark                 }
3958ea103259SMichael Clark                 break;
3959ea103259SMichael Clark             }
3960ea103259SMichael Clark             break;
3961ea103259SMichael Clark         case 24:
39623bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3963ea103259SMichael Clark             case 0: op = rv_op_beq; break;
3964ea103259SMichael Clark             case 1: op = rv_op_bne; break;
3965ea103259SMichael Clark             case 4: op = rv_op_blt; break;
3966ea103259SMichael Clark             case 5: op = rv_op_bge; break;
3967ea103259SMichael Clark             case 6: op = rv_op_bltu; break;
3968ea103259SMichael Clark             case 7: op = rv_op_bgeu; break;
3969ea103259SMichael Clark             }
3970ea103259SMichael Clark             break;
3971ea103259SMichael Clark         case 25:
39723bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3973ea103259SMichael Clark             case 0: op = rv_op_jalr; break;
3974ea103259SMichael Clark             }
3975ea103259SMichael Clark             break;
3976ea103259SMichael Clark         case 27: op = rv_op_jal; break;
3977ea103259SMichael Clark         case 28:
39783bd87176SWeiwei Li             switch ((inst >> 12) & 0b111) {
3979ea103259SMichael Clark             case 0:
398098624d13SWeiwei Li                 switch (((inst >> 20) & 0b111111100000) |
398198624d13SWeiwei Li                         ((inst >> 7) & 0b000000011111)) {
3982ea103259SMichael Clark                 case 0:
39833bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
3984ea103259SMichael Clark                     case 0: op = rv_op_ecall; break;
3985ea103259SMichael Clark                     case 32: op = rv_op_ebreak; break;
3986ea103259SMichael Clark                     case 64: op = rv_op_uret; break;
3987*4d46d84eSBalaji Ravikumar                     case 416: op = rv_op_wrs_nto; break;
3988*4d46d84eSBalaji Ravikumar                     case 928: op = rv_op_wrs_sto; break;
3989ea103259SMichael Clark                     }
3990ea103259SMichael Clark                     break;
3991ea103259SMichael Clark                 case 256:
39923bd87176SWeiwei Li                     switch ((inst >> 20) & 0b11111) {
3993ea103259SMichael Clark                     case 2:
39943bd87176SWeiwei Li                         switch ((inst >> 15) & 0b11111) {
3995ea103259SMichael Clark                         case 0: op = rv_op_sret; break;
3996ea103259SMichael Clark                         }
3997ea103259SMichael Clark                         break;
3998ea103259SMichael Clark                     case 4: op = rv_op_sfence_vm; break;
3999ea103259SMichael Clark                     case 5:
40003bd87176SWeiwei Li                         switch ((inst >> 15) & 0b11111) {
4001ea103259SMichael Clark                         case 0: op = rv_op_wfi; break;
4002ea103259SMichael Clark                         }
4003ea103259SMichael Clark                         break;
4004ea103259SMichael Clark                     }
4005ea103259SMichael Clark                     break;
4006ea103259SMichael Clark                 case 288: op = rv_op_sfence_vma; break;
4007ea103259SMichael Clark                 case 512:
40083bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
4009ea103259SMichael Clark                     case 64: op = rv_op_hret; break;
4010ea103259SMichael Clark                     }
4011ea103259SMichael Clark                     break;
4012ea103259SMichael Clark                 case 768:
40133bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
4014ea103259SMichael Clark                     case 64: op = rv_op_mret; break;
4015ea103259SMichael Clark                     }
4016ea103259SMichael Clark                     break;
4017ea103259SMichael Clark                 case 1952:
40183bd87176SWeiwei Li                     switch ((inst >> 15) & 0b1111111111) {
4019ea103259SMichael Clark                     case 576: op = rv_op_dret; break;
4020ea103259SMichael Clark                     }
4021ea103259SMichael Clark                     break;
4022ea103259SMichael Clark                 }
4023ea103259SMichael Clark                 break;
4024ea103259SMichael Clark             case 1: op = rv_op_csrrw; break;
4025ea103259SMichael Clark             case 2: op = rv_op_csrrs; break;
4026ea103259SMichael Clark             case 3: op = rv_op_csrrc; break;
4027d98883d1SLIU Zhiwei             case 4:
4028d98883d1SLIU Zhiwei                 if (dec->cfg->ext_zimop) {
4029d98883d1SLIU Zhiwei                     int imm_mop5, imm_mop3;
4030d98883d1SLIU Zhiwei                     if ((extract32(inst, 22, 10) & 0b1011001111)
4031d98883d1SLIU Zhiwei                         == 0b1000000111) {
4032d98883d1SLIU Zhiwei                         imm_mop5 = deposit32(deposit32(extract32(inst, 20, 2),
4033d98883d1SLIU Zhiwei                                                        2, 2,
4034d98883d1SLIU Zhiwei                                                        extract32(inst, 26, 2)),
4035d98883d1SLIU Zhiwei                                              4, 1, extract32(inst, 30, 1));
4036d98883d1SLIU Zhiwei                         op = rv_mop_r_0 + imm_mop5;
4037d98883d1SLIU Zhiwei                     } else if ((extract32(inst, 25, 7) & 0b1011001)
4038d98883d1SLIU Zhiwei                                == 0b1000001) {
4039d98883d1SLIU Zhiwei                         imm_mop3 = deposit32(extract32(inst, 26, 2),
4040d98883d1SLIU Zhiwei                                              2, 1, extract32(inst, 30, 1));
4041d98883d1SLIU Zhiwei                         op = rv_mop_rr_0 + imm_mop3;
4042d98883d1SLIU Zhiwei                     }
4043d98883d1SLIU Zhiwei                 }
4044d98883d1SLIU Zhiwei                 break;
4045ea103259SMichael Clark             case 5: op = rv_op_csrrwi; break;
4046ea103259SMichael Clark             case 6: op = rv_op_csrrsi; break;
4047ea103259SMichael Clark             case 7: op = rv_op_csrrci; break;
4048ea103259SMichael Clark             }
4049ea103259SMichael Clark             break;
40509d92f56dSMax Chou         case 29:
40519d92f56dSMax Chou             if (((inst >> 25) & 1) == 1 && ((inst >> 12) & 0b111) == 2) {
40529d92f56dSMax Chou                 switch ((inst >> 26) & 0b111111) {
40539d92f56dSMax Chou                 case 32: op = rv_op_vsm3me_vv; break;
40549d92f56dSMax Chou                 case 33: op = rv_op_vsm4k_vi; break;
40559d92f56dSMax Chou                 case 34: op = rv_op_vaeskf1_vi; break;
40569d92f56dSMax Chou                 case 40:
40579d92f56dSMax Chou                     switch ((inst >> 15) & 0b11111) {
40589d92f56dSMax Chou                     case 0: op = rv_op_vaesdm_vv; break;
40599d92f56dSMax Chou                     case 1: op = rv_op_vaesdf_vv; break;
40609d92f56dSMax Chou                     case 2: op = rv_op_vaesem_vv; break;
40619d92f56dSMax Chou                     case 3: op = rv_op_vaesef_vv; break;
40629d92f56dSMax Chou                     case 16: op = rv_op_vsm4r_vv; break;
40639d92f56dSMax Chou                     case 17: op = rv_op_vgmul_vv; break;
40649d92f56dSMax Chou                     }
40659d92f56dSMax Chou                     break;
40669d92f56dSMax Chou                 case 41:
40679d92f56dSMax Chou                     switch ((inst >> 15) & 0b11111) {
40689d92f56dSMax Chou                     case 0: op = rv_op_vaesdm_vs; break;
40699d92f56dSMax Chou                     case 1: op = rv_op_vaesdf_vs; break;
40709d92f56dSMax Chou                     case 2: op = rv_op_vaesem_vs; break;
40719d92f56dSMax Chou                     case 3: op = rv_op_vaesef_vs; break;
40729d92f56dSMax Chou                     case 7: op = rv_op_vaesz_vs; break;
40739d92f56dSMax Chou                     case 16: op = rv_op_vsm4r_vs; break;
40749d92f56dSMax Chou                     }
40759d92f56dSMax Chou                     break;
40769d92f56dSMax Chou                 case 42: op = rv_op_vaeskf2_vi; break;
40779d92f56dSMax Chou                 case 43: op = rv_op_vsm3c_vi; break;
40789d92f56dSMax Chou                 case 44: op = rv_op_vghsh_vv; break;
40799d92f56dSMax Chou                 case 45: op = rv_op_vsha2ms_vv; break;
40809d92f56dSMax Chou                 case 46: op = rv_op_vsha2ch_vv; break;
40819d92f56dSMax Chou                 case 47: op = rv_op_vsha2cl_vv; break;
40829d92f56dSMax Chou                 }
40839d92f56dSMax Chou             }
40849d92f56dSMax Chou             break;
4085ea103259SMichael Clark         case 30:
408698624d13SWeiwei Li             switch (((inst >> 22) & 0b1111111000) |
408798624d13SWeiwei Li                     ((inst >> 12) & 0b0000000111)) {
4088ea103259SMichael Clark             case 0: op = rv_op_addd; break;
4089ea103259SMichael Clark             case 1: op = rv_op_slld; break;
4090ea103259SMichael Clark             case 5: op = rv_op_srld; break;
4091ea103259SMichael Clark             case 8: op = rv_op_muld; break;
4092ea103259SMichael Clark             case 12: op = rv_op_divd; break;
4093ea103259SMichael Clark             case 13: op = rv_op_divud; break;
4094ea103259SMichael Clark             case 14: op = rv_op_remd; break;
4095ea103259SMichael Clark             case 15: op = rv_op_remud; break;
4096ea103259SMichael Clark             case 256: op = rv_op_subd; break;
4097ea103259SMichael Clark             case 261: op = rv_op_srad; break;
4098ea103259SMichael Clark             }
4099ea103259SMichael Clark             break;
4100ea103259SMichael Clark         }
4101ea103259SMichael Clark         break;
4102ea103259SMichael Clark     }
4103ea103259SMichael Clark     dec->op = op;
4104ea103259SMichael Clark }
4105ea103259SMichael Clark 
4106ea103259SMichael Clark /* operand extractors */
4107ea103259SMichael Clark 
4108ea103259SMichael Clark static uint32_t operand_rd(rv_inst inst)
4109ea103259SMichael Clark {
4110ea103259SMichael Clark     return (inst << 52) >> 59;
4111ea103259SMichael Clark }
4112ea103259SMichael Clark 
4113ea103259SMichael Clark static uint32_t operand_rs1(rv_inst inst)
4114ea103259SMichael Clark {
4115ea103259SMichael Clark     return (inst << 44) >> 59;
4116ea103259SMichael Clark }
4117ea103259SMichael Clark 
4118ea103259SMichael Clark static uint32_t operand_rs2(rv_inst inst)
4119ea103259SMichael Clark {
4120ea103259SMichael Clark     return (inst << 39) >> 59;
4121ea103259SMichael Clark }
4122ea103259SMichael Clark 
4123ea103259SMichael Clark static uint32_t operand_rs3(rv_inst inst)
4124ea103259SMichael Clark {
4125ea103259SMichael Clark     return (inst << 32) >> 59;
4126ea103259SMichael Clark }
4127ea103259SMichael Clark 
4128ea103259SMichael Clark static uint32_t operand_aq(rv_inst inst)
4129ea103259SMichael Clark {
4130ea103259SMichael Clark     return (inst << 37) >> 63;
4131ea103259SMichael Clark }
4132ea103259SMichael Clark 
4133ea103259SMichael Clark static uint32_t operand_rl(rv_inst inst)
4134ea103259SMichael Clark {
4135ea103259SMichael Clark     return (inst << 38) >> 63;
4136ea103259SMichael Clark }
4137ea103259SMichael Clark 
4138ea103259SMichael Clark static uint32_t operand_pred(rv_inst inst)
4139ea103259SMichael Clark {
4140ea103259SMichael Clark     return (inst << 36) >> 60;
4141ea103259SMichael Clark }
4142ea103259SMichael Clark 
4143ea103259SMichael Clark static uint32_t operand_succ(rv_inst inst)
4144ea103259SMichael Clark {
4145ea103259SMichael Clark     return (inst << 40) >> 60;
4146ea103259SMichael Clark }
4147ea103259SMichael Clark 
4148ea103259SMichael Clark static uint32_t operand_rm(rv_inst inst)
4149ea103259SMichael Clark {
4150ea103259SMichael Clark     return (inst << 49) >> 61;
4151ea103259SMichael Clark }
4152ea103259SMichael Clark 
4153ea103259SMichael Clark static uint32_t operand_shamt5(rv_inst inst)
4154ea103259SMichael Clark {
4155ea103259SMichael Clark     return (inst << 39) >> 59;
4156ea103259SMichael Clark }
4157ea103259SMichael Clark 
4158ea103259SMichael Clark static uint32_t operand_shamt6(rv_inst inst)
4159ea103259SMichael Clark {
4160ea103259SMichael Clark     return (inst << 38) >> 58;
4161ea103259SMichael Clark }
4162ea103259SMichael Clark 
4163ea103259SMichael Clark static uint32_t operand_shamt7(rv_inst inst)
4164ea103259SMichael Clark {
4165ea103259SMichael Clark     return (inst << 37) >> 57;
4166ea103259SMichael Clark }
4167ea103259SMichael Clark 
4168ea103259SMichael Clark static uint32_t operand_crdq(rv_inst inst)
4169ea103259SMichael Clark {
4170ea103259SMichael Clark     return (inst << 59) >> 61;
4171ea103259SMichael Clark }
4172ea103259SMichael Clark 
4173ea103259SMichael Clark static uint32_t operand_crs1q(rv_inst inst)
4174ea103259SMichael Clark {
4175ea103259SMichael Clark     return (inst << 54) >> 61;
4176ea103259SMichael Clark }
4177ea103259SMichael Clark 
4178ea103259SMichael Clark static uint32_t operand_crs1rdq(rv_inst inst)
4179ea103259SMichael Clark {
4180ea103259SMichael Clark     return (inst << 54) >> 61;
4181ea103259SMichael Clark }
4182ea103259SMichael Clark 
4183ea103259SMichael Clark static uint32_t operand_crs2q(rv_inst inst)
4184ea103259SMichael Clark {
4185ea103259SMichael Clark     return (inst << 59) >> 61;
4186ea103259SMichael Clark }
4187ea103259SMichael Clark 
41882c71d02eSWeiwei Li static uint32_t calculate_xreg(uint32_t sreg)
41892c71d02eSWeiwei Li {
41902c71d02eSWeiwei Li     return sreg < 2 ? sreg + 8 : sreg + 16;
41912c71d02eSWeiwei Li }
41922c71d02eSWeiwei Li 
41932c71d02eSWeiwei Li static uint32_t operand_sreg1(rv_inst inst)
41942c71d02eSWeiwei Li {
41952c71d02eSWeiwei Li     return calculate_xreg((inst << 54) >> 61);
41962c71d02eSWeiwei Li }
41972c71d02eSWeiwei Li 
41982c71d02eSWeiwei Li static uint32_t operand_sreg2(rv_inst inst)
41992c71d02eSWeiwei Li {
42002c71d02eSWeiwei Li     return calculate_xreg((inst << 59) >> 61);
42012c71d02eSWeiwei Li }
42022c71d02eSWeiwei Li 
4203ea103259SMichael Clark static uint32_t operand_crd(rv_inst inst)
4204ea103259SMichael Clark {
4205ea103259SMichael Clark     return (inst << 52) >> 59;
4206ea103259SMichael Clark }
4207ea103259SMichael Clark 
4208ea103259SMichael Clark static uint32_t operand_crs1(rv_inst inst)
4209ea103259SMichael Clark {
4210ea103259SMichael Clark     return (inst << 52) >> 59;
4211ea103259SMichael Clark }
4212ea103259SMichael Clark 
4213ea103259SMichael Clark static uint32_t operand_crs1rd(rv_inst inst)
4214ea103259SMichael Clark {
4215ea103259SMichael Clark     return (inst << 52) >> 59;
4216ea103259SMichael Clark }
4217ea103259SMichael Clark 
4218ea103259SMichael Clark static uint32_t operand_crs2(rv_inst inst)
4219ea103259SMichael Clark {
4220ea103259SMichael Clark     return (inst << 57) >> 59;
4221ea103259SMichael Clark }
4222ea103259SMichael Clark 
4223ea103259SMichael Clark static uint32_t operand_cimmsh5(rv_inst inst)
4224ea103259SMichael Clark {
4225ea103259SMichael Clark     return (inst << 57) >> 59;
4226ea103259SMichael Clark }
4227ea103259SMichael Clark 
4228ea103259SMichael Clark static uint32_t operand_csr12(rv_inst inst)
4229ea103259SMichael Clark {
4230ea103259SMichael Clark     return (inst << 32) >> 52;
4231ea103259SMichael Clark }
4232ea103259SMichael Clark 
4233ea103259SMichael Clark static int32_t operand_imm12(rv_inst inst)
4234ea103259SMichael Clark {
4235ea103259SMichael Clark     return ((int64_t)inst << 32) >> 52;
4236ea103259SMichael Clark }
4237ea103259SMichael Clark 
4238ea103259SMichael Clark static int32_t operand_imm20(rv_inst inst)
4239ea103259SMichael Clark {
4240ea103259SMichael Clark     return (((int64_t)inst << 32) >> 44) << 12;
4241ea103259SMichael Clark }
4242ea103259SMichael Clark 
4243ea103259SMichael Clark static int32_t operand_jimm20(rv_inst inst)
4244ea103259SMichael Clark {
4245ea103259SMichael Clark     return (((int64_t)inst << 32) >> 63) << 20 |
4246ea103259SMichael Clark         ((inst << 33) >> 54) << 1 |
4247ea103259SMichael Clark         ((inst << 43) >> 63) << 11 |
4248ea103259SMichael Clark         ((inst << 44) >> 56) << 12;
4249ea103259SMichael Clark }
4250ea103259SMichael Clark 
4251ea103259SMichael Clark static int32_t operand_simm12(rv_inst inst)
4252ea103259SMichael Clark {
4253ea103259SMichael Clark     return (((int64_t)inst << 32) >> 57) << 5 |
4254ea103259SMichael Clark         (inst << 52) >> 59;
4255ea103259SMichael Clark }
4256ea103259SMichael Clark 
4257ea103259SMichael Clark static int32_t operand_sbimm12(rv_inst inst)
4258ea103259SMichael Clark {
4259ea103259SMichael Clark     return (((int64_t)inst << 32) >> 63) << 12 |
4260ea103259SMichael Clark         ((inst << 33) >> 58) << 5 |
4261ea103259SMichael Clark         ((inst << 52) >> 60) << 1 |
4262ea103259SMichael Clark         ((inst << 56) >> 63) << 11;
4263ea103259SMichael Clark }
4264ea103259SMichael Clark 
426533632775SFrédéric Pétrot static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa)
4266ea103259SMichael Clark {
426733632775SFrédéric Pétrot     int imm = ((inst << 51) >> 63) << 5 |
4268ea103259SMichael Clark         (inst << 57) >> 59;
426933632775SFrédéric Pétrot     if (isa == rv128) {
427033632775SFrédéric Pétrot         imm = imm ? imm : 64;
427133632775SFrédéric Pétrot     }
427233632775SFrédéric Pétrot     return imm;
427333632775SFrédéric Pétrot }
427433632775SFrédéric Pétrot 
427533632775SFrédéric Pétrot static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa)
427633632775SFrédéric Pétrot {
427733632775SFrédéric Pétrot     int imm = ((inst << 51) >> 63) << 5 |
427833632775SFrédéric Pétrot         (inst << 57) >> 59;
427933632775SFrédéric Pétrot     if (isa == rv128) {
428033632775SFrédéric Pétrot         imm = imm | (imm & 32) << 1;
428133632775SFrédéric Pétrot         imm = imm ? imm : 64;
428233632775SFrédéric Pétrot     }
428333632775SFrédéric Pétrot     return imm;
4284ea103259SMichael Clark }
4285ea103259SMichael Clark 
4286ea103259SMichael Clark static int32_t operand_cimmi(rv_inst inst)
4287ea103259SMichael Clark {
4288ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 5 |
4289ea103259SMichael Clark         (inst << 57) >> 59;
4290ea103259SMichael Clark }
4291ea103259SMichael Clark 
4292ea103259SMichael Clark static int32_t operand_cimmui(rv_inst inst)
4293ea103259SMichael Clark {
4294ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 17 |
4295ea103259SMichael Clark         ((inst << 57) >> 59) << 12;
4296ea103259SMichael Clark }
4297ea103259SMichael Clark 
4298ea103259SMichael Clark static uint32_t operand_cimmlwsp(rv_inst inst)
4299ea103259SMichael Clark {
4300ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4301ea103259SMichael Clark         ((inst << 57) >> 61) << 2 |
4302ea103259SMichael Clark         ((inst << 60) >> 62) << 6;
4303ea103259SMichael Clark }
4304ea103259SMichael Clark 
4305ea103259SMichael Clark static uint32_t operand_cimmldsp(rv_inst inst)
4306ea103259SMichael Clark {
4307ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4308ea103259SMichael Clark         ((inst << 57) >> 62) << 3 |
4309ea103259SMichael Clark         ((inst << 59) >> 61) << 6;
4310ea103259SMichael Clark }
4311ea103259SMichael Clark 
4312ea103259SMichael Clark static uint32_t operand_cimmlqsp(rv_inst inst)
4313ea103259SMichael Clark {
4314ea103259SMichael Clark     return ((inst << 51) >> 63) << 5 |
4315ea103259SMichael Clark         ((inst << 57) >> 63) << 4 |
4316ea103259SMichael Clark         ((inst << 58) >> 60) << 6;
4317ea103259SMichael Clark }
4318ea103259SMichael Clark 
4319ea103259SMichael Clark static int32_t operand_cimm16sp(rv_inst inst)
4320ea103259SMichael Clark {
4321ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 9 |
4322ea103259SMichael Clark         ((inst << 57) >> 63) << 4 |
4323ea103259SMichael Clark         ((inst << 58) >> 63) << 6 |
4324ea103259SMichael Clark         ((inst << 59) >> 62) << 7 |
4325ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4326ea103259SMichael Clark }
4327ea103259SMichael Clark 
4328ea103259SMichael Clark static int32_t operand_cimmj(rv_inst inst)
4329ea103259SMichael Clark {
4330ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 11 |
4331ea103259SMichael Clark         ((inst << 52) >> 63) << 4 |
4332ea103259SMichael Clark         ((inst << 53) >> 62) << 8 |
4333ea103259SMichael Clark         ((inst << 55) >> 63) << 10 |
4334ea103259SMichael Clark         ((inst << 56) >> 63) << 6 |
4335ea103259SMichael Clark         ((inst << 57) >> 63) << 7 |
4336ea103259SMichael Clark         ((inst << 58) >> 61) << 1 |
4337ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4338ea103259SMichael Clark }
4339ea103259SMichael Clark 
4340ea103259SMichael Clark static int32_t operand_cimmb(rv_inst inst)
4341ea103259SMichael Clark {
4342ea103259SMichael Clark     return (((int64_t)inst << 51) >> 63) << 8 |
4343ea103259SMichael Clark         ((inst << 52) >> 62) << 3 |
4344ea103259SMichael Clark         ((inst << 57) >> 62) << 6 |
4345ea103259SMichael Clark         ((inst << 59) >> 62) << 1 |
4346ea103259SMichael Clark         ((inst << 61) >> 63) << 5;
4347ea103259SMichael Clark }
4348ea103259SMichael Clark 
4349ea103259SMichael Clark static uint32_t operand_cimmswsp(rv_inst inst)
4350ea103259SMichael Clark {
4351ea103259SMichael Clark     return ((inst << 51) >> 60) << 2 |
4352ea103259SMichael Clark         ((inst << 55) >> 62) << 6;
4353ea103259SMichael Clark }
4354ea103259SMichael Clark 
4355ea103259SMichael Clark static uint32_t operand_cimmsdsp(rv_inst inst)
4356ea103259SMichael Clark {
4357ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4358ea103259SMichael Clark         ((inst << 54) >> 61) << 6;
4359ea103259SMichael Clark }
4360ea103259SMichael Clark 
4361ea103259SMichael Clark static uint32_t operand_cimmsqsp(rv_inst inst)
4362ea103259SMichael Clark {
4363ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4364ea103259SMichael Clark         ((inst << 53) >> 60) << 6;
4365ea103259SMichael Clark }
4366ea103259SMichael Clark 
4367ea103259SMichael Clark static uint32_t operand_cimm4spn(rv_inst inst)
4368ea103259SMichael Clark {
4369ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4370ea103259SMichael Clark         ((inst << 53) >> 60) << 6 |
4371ea103259SMichael Clark         ((inst << 57) >> 63) << 2 |
4372ea103259SMichael Clark         ((inst << 58) >> 63) << 3;
4373ea103259SMichael Clark }
4374ea103259SMichael Clark 
4375ea103259SMichael Clark static uint32_t operand_cimmw(rv_inst inst)
4376ea103259SMichael Clark {
4377ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4378ea103259SMichael Clark         ((inst << 57) >> 63) << 2 |
4379ea103259SMichael Clark         ((inst << 58) >> 63) << 6;
4380ea103259SMichael Clark }
4381ea103259SMichael Clark 
4382ea103259SMichael Clark static uint32_t operand_cimmd(rv_inst inst)
4383ea103259SMichael Clark {
4384ea103259SMichael Clark     return ((inst << 51) >> 61) << 3 |
4385ea103259SMichael Clark         ((inst << 57) >> 62) << 6;
4386ea103259SMichael Clark }
4387ea103259SMichael Clark 
4388ea103259SMichael Clark static uint32_t operand_cimmq(rv_inst inst)
4389ea103259SMichael Clark {
4390ea103259SMichael Clark     return ((inst << 51) >> 62) << 4 |
4391ea103259SMichael Clark         ((inst << 53) >> 63) << 8 |
4392ea103259SMichael Clark         ((inst << 57) >> 62) << 6;
4393ea103259SMichael Clark }
4394ea103259SMichael Clark 
439507f4964dSYang Liu static uint32_t operand_vimm(rv_inst inst)
439607f4964dSYang Liu {
439707f4964dSYang Liu     return (int64_t)(inst << 44) >> 59;
439807f4964dSYang Liu }
439907f4964dSYang Liu 
440007f4964dSYang Liu static uint32_t operand_vzimm11(rv_inst inst)
440107f4964dSYang Liu {
440207f4964dSYang Liu     return (inst << 33) >> 53;
440307f4964dSYang Liu }
440407f4964dSYang Liu 
440507f4964dSYang Liu static uint32_t operand_vzimm10(rv_inst inst)
440607f4964dSYang Liu {
440707f4964dSYang Liu     return (inst << 34) >> 54;
440807f4964dSYang Liu }
440907f4964dSYang Liu 
4410434c609bSMax Chou static uint32_t operand_vzimm6(rv_inst inst)
4411434c609bSMax Chou {
4412434c609bSMax Chou     return ((inst << 37) >> 63) << 5 |
4413434c609bSMax Chou         ((inst << 44) >> 59);
4414434c609bSMax Chou }
4415434c609bSMax Chou 
44165748c886SWeiwei Li static uint32_t operand_bs(rv_inst inst)
44175748c886SWeiwei Li {
44185748c886SWeiwei Li     return (inst << 32) >> 62;
44195748c886SWeiwei Li }
44205748c886SWeiwei Li 
44215748c886SWeiwei Li static uint32_t operand_rnum(rv_inst inst)
44225748c886SWeiwei Li {
44235748c886SWeiwei Li     return (inst << 40) >> 60;
44245748c886SWeiwei Li }
44255748c886SWeiwei Li 
442607f4964dSYang Liu static uint32_t operand_vm(rv_inst inst)
442707f4964dSYang Liu {
442807f4964dSYang Liu     return (inst << 38) >> 63;
442907f4964dSYang Liu }
443007f4964dSYang Liu 
44312c71d02eSWeiwei Li static uint32_t operand_uimm_c_lb(rv_inst inst)
44322c71d02eSWeiwei Li {
44332c71d02eSWeiwei Li     return (((inst << 58) >> 63) << 1) |
44342c71d02eSWeiwei Li         ((inst << 57) >> 63);
44352c71d02eSWeiwei Li }
44362c71d02eSWeiwei Li 
44372c71d02eSWeiwei Li static uint32_t operand_uimm_c_lh(rv_inst inst)
44382c71d02eSWeiwei Li {
44392c71d02eSWeiwei Li     return (((inst << 58) >> 63) << 1);
44402c71d02eSWeiwei Li }
44412c71d02eSWeiwei Li 
44422c71d02eSWeiwei Li static uint32_t operand_zcmp_spimm(rv_inst inst)
44432c71d02eSWeiwei Li {
44442c71d02eSWeiwei Li     return ((inst << 60) >> 62) << 4;
44452c71d02eSWeiwei Li }
44462c71d02eSWeiwei Li 
44472c71d02eSWeiwei Li static uint32_t operand_zcmp_rlist(rv_inst inst)
44482c71d02eSWeiwei Li {
44492c71d02eSWeiwei Li     return ((inst << 56) >> 60);
44502c71d02eSWeiwei Li }
44512c71d02eSWeiwei Li 
4452318df723SChristoph Müllner static uint32_t operand_imm6(rv_inst inst)
4453318df723SChristoph Müllner {
4454318df723SChristoph Müllner     return (inst << 38) >> 60;
4455318df723SChristoph Müllner }
4456318df723SChristoph Müllner 
4457318df723SChristoph Müllner static uint32_t operand_imm2(rv_inst inst)
4458318df723SChristoph Müllner {
4459318df723SChristoph Müllner     return (inst << 37) >> 62;
4460318df723SChristoph Müllner }
4461318df723SChristoph Müllner 
4462318df723SChristoph Müllner static uint32_t operand_immh(rv_inst inst)
4463318df723SChristoph Müllner {
4464318df723SChristoph Müllner     return (inst << 32) >> 58;
4465318df723SChristoph Müllner }
4466318df723SChristoph Müllner 
4467318df723SChristoph Müllner static uint32_t operand_imml(rv_inst inst)
4468318df723SChristoph Müllner {
4469318df723SChristoph Müllner     return (inst << 38) >> 58;
4470318df723SChristoph Müllner }
4471318df723SChristoph Müllner 
44722c71d02eSWeiwei Li static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t spimm)
44732c71d02eSWeiwei Li {
44742c71d02eSWeiwei Li     int xlen_bytes_log2 = isa == rv64 ? 3 : 2;
44752c71d02eSWeiwei Li     int regs = rlist == 15 ? 13 : rlist - 3;
44762c71d02eSWeiwei Li     uint32_t stack_adj_base = ROUND_UP(regs << xlen_bytes_log2, 16);
44772c71d02eSWeiwei Li     return stack_adj_base + spimm;
44782c71d02eSWeiwei Li }
44792c71d02eSWeiwei Li 
44802c71d02eSWeiwei Li static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa)
44812c71d02eSWeiwei Li {
44822c71d02eSWeiwei Li     return calculate_stack_adj(isa, operand_zcmp_rlist(inst),
44832c71d02eSWeiwei Li                                operand_zcmp_spimm(inst));
44842c71d02eSWeiwei Li }
44852c71d02eSWeiwei Li 
44862c71d02eSWeiwei Li static uint32_t operand_tbl_index(rv_inst inst)
44872c71d02eSWeiwei Li {
44882c71d02eSWeiwei Li     return ((inst << 54) >> 56);
44892c71d02eSWeiwei Li }
44902c71d02eSWeiwei Li 
4491ea103259SMichael Clark /* decode operands */
4492ea103259SMichael Clark 
449333632775SFrédéric Pétrot static void decode_inst_operands(rv_decode *dec, rv_isa isa)
4494ea103259SMichael Clark {
4495fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
4496ea103259SMichael Clark     rv_inst inst = dec->inst;
4497ea103259SMichael Clark     dec->codec = opcode_data[dec->op].codec;
4498ea103259SMichael Clark     switch (dec->codec) {
4499ea103259SMichael Clark     case rv_codec_none:
4500ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4501ea103259SMichael Clark         dec->imm = 0;
4502ea103259SMichael Clark         break;
4503ea103259SMichael Clark     case rv_codec_u:
4504ea103259SMichael Clark         dec->rd = operand_rd(inst);
4505ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4506ea103259SMichael Clark         dec->imm = operand_imm20(inst);
4507ea103259SMichael Clark         break;
4508ea103259SMichael Clark     case rv_codec_uj:
4509ea103259SMichael Clark         dec->rd = operand_rd(inst);
4510ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4511ea103259SMichael Clark         dec->imm = operand_jimm20(inst);
4512ea103259SMichael Clark         break;
4513ea103259SMichael Clark     case rv_codec_i:
4514ea103259SMichael Clark         dec->rd = operand_rd(inst);
4515ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4516ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4517ea103259SMichael Clark         dec->imm = operand_imm12(inst);
4518ea103259SMichael Clark         break;
4519ea103259SMichael Clark     case rv_codec_i_sh5:
4520ea103259SMichael Clark         dec->rd = operand_rd(inst);
4521ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4522ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4523ea103259SMichael Clark         dec->imm = operand_shamt5(inst);
4524ea103259SMichael Clark         break;
4525ea103259SMichael Clark     case rv_codec_i_sh6:
4526ea103259SMichael Clark         dec->rd = operand_rd(inst);
4527ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4528ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4529ea103259SMichael Clark         dec->imm = operand_shamt6(inst);
4530ea103259SMichael Clark         break;
4531ea103259SMichael Clark     case rv_codec_i_sh7:
4532ea103259SMichael Clark         dec->rd = operand_rd(inst);
4533ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4534ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4535ea103259SMichael Clark         dec->imm = operand_shamt7(inst);
4536ea103259SMichael Clark         break;
4537ea103259SMichael Clark     case rv_codec_i_csr:
4538ea103259SMichael Clark         dec->rd = operand_rd(inst);
4539ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4540ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4541ea103259SMichael Clark         dec->imm = operand_csr12(inst);
4542ea103259SMichael Clark         break;
4543ea103259SMichael Clark     case rv_codec_s:
4544ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4545ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4546ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4547ea103259SMichael Clark         dec->imm = operand_simm12(inst);
4548ea103259SMichael Clark         break;
4549ea103259SMichael Clark     case rv_codec_sb:
4550ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4551ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4552ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4553ea103259SMichael Clark         dec->imm = operand_sbimm12(inst);
4554ea103259SMichael Clark         break;
4555ea103259SMichael Clark     case rv_codec_r:
4556ea103259SMichael Clark         dec->rd = operand_rd(inst);
4557ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4558ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4559ea103259SMichael Clark         dec->imm = 0;
4560ea103259SMichael Clark         break;
4561ea103259SMichael Clark     case rv_codec_r_m:
4562ea103259SMichael Clark         dec->rd = operand_rd(inst);
4563ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4564ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4565ea103259SMichael Clark         dec->imm = 0;
4566ea103259SMichael Clark         dec->rm = operand_rm(inst);
4567ea103259SMichael Clark         break;
4568ea103259SMichael Clark     case rv_codec_r4_m:
4569ea103259SMichael Clark         dec->rd = operand_rd(inst);
4570ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4571ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4572ea103259SMichael Clark         dec->rs3 = operand_rs3(inst);
4573ea103259SMichael Clark         dec->imm = 0;
4574ea103259SMichael Clark         dec->rm = operand_rm(inst);
4575ea103259SMichael Clark         break;
4576ea103259SMichael Clark     case rv_codec_r_a:
4577ea103259SMichael Clark         dec->rd = operand_rd(inst);
4578ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4579ea103259SMichael Clark         dec->rs2 = operand_rs2(inst);
4580ea103259SMichael Clark         dec->imm = 0;
4581ea103259SMichael Clark         dec->aq = operand_aq(inst);
4582ea103259SMichael Clark         dec->rl = operand_rl(inst);
4583ea103259SMichael Clark         break;
4584ea103259SMichael Clark     case rv_codec_r_l:
4585ea103259SMichael Clark         dec->rd = operand_rd(inst);
4586ea103259SMichael Clark         dec->rs1 = operand_rs1(inst);
4587ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4588ea103259SMichael Clark         dec->imm = 0;
4589ea103259SMichael Clark         dec->aq = operand_aq(inst);
4590ea103259SMichael Clark         dec->rl = operand_rl(inst);
4591ea103259SMichael Clark         break;
4592ea103259SMichael Clark     case rv_codec_r_f:
4593ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4594ea103259SMichael Clark         dec->pred = operand_pred(inst);
4595ea103259SMichael Clark         dec->succ = operand_succ(inst);
4596ea103259SMichael Clark         dec->imm = 0;
4597ea103259SMichael Clark         break;
4598ea103259SMichael Clark     case rv_codec_cb:
4599ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4600ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4601ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4602ea103259SMichael Clark         dec->imm = operand_cimmb(inst);
4603ea103259SMichael Clark         break;
4604ea103259SMichael Clark     case rv_codec_cb_imm:
4605ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4606ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4607ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4608ea103259SMichael Clark         break;
4609ea103259SMichael Clark     case rv_codec_cb_sh5:
4610ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4611ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4612ea103259SMichael Clark         dec->imm = operand_cimmsh5(inst);
4613ea103259SMichael Clark         break;
4614ea103259SMichael Clark     case rv_codec_cb_sh6:
4615ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4616ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
461733632775SFrédéric Pétrot         dec->imm = operand_cimmshr6(inst, isa);
4618ea103259SMichael Clark         break;
4619ea103259SMichael Clark     case rv_codec_ci:
4620ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4621ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4622ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4623ea103259SMichael Clark         break;
4624ea103259SMichael Clark     case rv_codec_ci_sh5:
4625ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4626ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4627ea103259SMichael Clark         dec->imm = operand_cimmsh5(inst);
4628ea103259SMichael Clark         break;
4629ea103259SMichael Clark     case rv_codec_ci_sh6:
4630ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4631ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
463233632775SFrédéric Pétrot         dec->imm = operand_cimmshl6(inst, isa);
4633ea103259SMichael Clark         break;
4634ea103259SMichael Clark     case rv_codec_ci_16sp:
4635ea103259SMichael Clark         dec->rd = rv_ireg_sp;
4636ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4637ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4638ea103259SMichael Clark         dec->imm = operand_cimm16sp(inst);
4639ea103259SMichael Clark         break;
4640ea103259SMichael Clark     case rv_codec_ci_lwsp:
4641ea103259SMichael Clark         dec->rd = operand_crd(inst);
4642ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4643ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4644ea103259SMichael Clark         dec->imm = operand_cimmlwsp(inst);
4645ea103259SMichael Clark         break;
4646ea103259SMichael Clark     case rv_codec_ci_ldsp:
4647ea103259SMichael Clark         dec->rd = operand_crd(inst);
4648ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4649ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4650ea103259SMichael Clark         dec->imm = operand_cimmldsp(inst);
4651ea103259SMichael Clark         break;
4652ea103259SMichael Clark     case rv_codec_ci_lqsp:
4653ea103259SMichael Clark         dec->rd = operand_crd(inst);
4654ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4655ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4656ea103259SMichael Clark         dec->imm = operand_cimmlqsp(inst);
4657ea103259SMichael Clark         break;
4658ea103259SMichael Clark     case rv_codec_ci_li:
4659ea103259SMichael Clark         dec->rd = operand_crd(inst);
4660ea103259SMichael Clark         dec->rs1 = rv_ireg_zero;
4661ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4662ea103259SMichael Clark         dec->imm = operand_cimmi(inst);
4663ea103259SMichael Clark         break;
4664ea103259SMichael Clark     case rv_codec_ci_lui:
4665ea103259SMichael Clark         dec->rd = operand_crd(inst);
4666ea103259SMichael Clark         dec->rs1 = rv_ireg_zero;
4667ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4668ea103259SMichael Clark         dec->imm = operand_cimmui(inst);
4669ea103259SMichael Clark         break;
4670ea103259SMichael Clark     case rv_codec_ci_none:
4671ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4672ea103259SMichael Clark         dec->imm = 0;
4673ea103259SMichael Clark         break;
4674ea103259SMichael Clark     case rv_codec_ciw_4spn:
4675ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4676ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4677ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4678ea103259SMichael Clark         dec->imm = operand_cimm4spn(inst);
4679ea103259SMichael Clark         break;
4680ea103259SMichael Clark     case rv_codec_cj:
4681ea103259SMichael Clark         dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
4682ea103259SMichael Clark         dec->imm = operand_cimmj(inst);
4683ea103259SMichael Clark         break;
4684ea103259SMichael Clark     case rv_codec_cj_jal:
4685ea103259SMichael Clark         dec->rd = rv_ireg_ra;
4686ea103259SMichael Clark         dec->rs1 = dec->rs2 = rv_ireg_zero;
4687ea103259SMichael Clark         dec->imm = operand_cimmj(inst);
4688ea103259SMichael Clark         break;
4689ea103259SMichael Clark     case rv_codec_cl_lw:
4690ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4691ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4692ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4693ea103259SMichael Clark         dec->imm = operand_cimmw(inst);
4694ea103259SMichael Clark         break;
4695ea103259SMichael Clark     case rv_codec_cl_ld:
4696ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4697ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4698ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4699ea103259SMichael Clark         dec->imm = operand_cimmd(inst);
4700ea103259SMichael Clark         break;
4701ea103259SMichael Clark     case rv_codec_cl_lq:
4702ea103259SMichael Clark         dec->rd = operand_crdq(inst) + 8;
4703ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4704ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4705ea103259SMichael Clark         dec->imm = operand_cimmq(inst);
4706ea103259SMichael Clark         break;
4707ea103259SMichael Clark     case rv_codec_cr:
4708ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rd(inst);
4709ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4710ea103259SMichael Clark         dec->imm = 0;
4711ea103259SMichael Clark         break;
4712ea103259SMichael Clark     case rv_codec_cr_mv:
4713ea103259SMichael Clark         dec->rd = operand_crd(inst);
4714ea103259SMichael Clark         dec->rs1 = operand_crs2(inst);
4715ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4716ea103259SMichael Clark         dec->imm = 0;
4717ea103259SMichael Clark         break;
4718ea103259SMichael Clark     case rv_codec_cr_jalr:
4719ea103259SMichael Clark         dec->rd = rv_ireg_ra;
4720ea103259SMichael Clark         dec->rs1 = operand_crs1(inst);
4721ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4722ea103259SMichael Clark         dec->imm = 0;
4723ea103259SMichael Clark         break;
4724ea103259SMichael Clark     case rv_codec_cr_jr:
4725ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4726ea103259SMichael Clark         dec->rs1 = operand_crs1(inst);
4727ea103259SMichael Clark         dec->rs2 = rv_ireg_zero;
4728ea103259SMichael Clark         dec->imm = 0;
4729ea103259SMichael Clark         break;
4730ea103259SMichael Clark     case rv_codec_cs:
4731ea103259SMichael Clark         dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
4732ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4733ea103259SMichael Clark         dec->imm = 0;
4734ea103259SMichael Clark         break;
4735ea103259SMichael Clark     case rv_codec_cs_sw:
4736ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4737ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4738ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4739ea103259SMichael Clark         dec->imm = operand_cimmw(inst);
4740ea103259SMichael Clark         break;
4741ea103259SMichael Clark     case rv_codec_cs_sd:
4742ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4743ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4744ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4745ea103259SMichael Clark         dec->imm = operand_cimmd(inst);
4746ea103259SMichael Clark         break;
4747ea103259SMichael Clark     case rv_codec_cs_sq:
4748ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4749ea103259SMichael Clark         dec->rs1 = operand_crs1q(inst) + 8;
4750ea103259SMichael Clark         dec->rs2 = operand_crs2q(inst) + 8;
4751ea103259SMichael Clark         dec->imm = operand_cimmq(inst);
4752ea103259SMichael Clark         break;
4753ea103259SMichael Clark     case rv_codec_css_swsp:
4754ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4755ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4756ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4757ea103259SMichael Clark         dec->imm = operand_cimmswsp(inst);
4758ea103259SMichael Clark         break;
4759ea103259SMichael Clark     case rv_codec_css_sdsp:
4760ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4761ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4762ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4763ea103259SMichael Clark         dec->imm = operand_cimmsdsp(inst);
4764ea103259SMichael Clark         break;
4765ea103259SMichael Clark     case rv_codec_css_sqsp:
4766ea103259SMichael Clark         dec->rd = rv_ireg_zero;
4767ea103259SMichael Clark         dec->rs1 = rv_ireg_sp;
4768ea103259SMichael Clark         dec->rs2 = operand_crs2(inst);
4769ea103259SMichael Clark         dec->imm = operand_cimmsqsp(inst);
4770ea103259SMichael Clark         break;
47715748c886SWeiwei Li     case rv_codec_k_bs:
47725748c886SWeiwei Li         dec->rs1 = operand_rs1(inst);
47735748c886SWeiwei Li         dec->rs2 = operand_rs2(inst);
47745748c886SWeiwei Li         dec->bs = operand_bs(inst);
47755748c886SWeiwei Li         break;
47765748c886SWeiwei Li     case rv_codec_k_rnum:
47775748c886SWeiwei Li         dec->rd = operand_rd(inst);
47785748c886SWeiwei Li         dec->rs1 = operand_rs1(inst);
47795748c886SWeiwei Li         dec->rnum = operand_rnum(inst);
47805748c886SWeiwei Li         break;
478107f4964dSYang Liu     case rv_codec_v_r:
478207f4964dSYang Liu         dec->rd = operand_rd(inst);
478307f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
478407f4964dSYang Liu         dec->rs2 = operand_rs2(inst);
478507f4964dSYang Liu         dec->vm = operand_vm(inst);
478607f4964dSYang Liu         break;
478707f4964dSYang Liu     case rv_codec_v_ldst:
478807f4964dSYang Liu         dec->rd = operand_rd(inst);
478907f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
479007f4964dSYang Liu         dec->vm = operand_vm(inst);
479107f4964dSYang Liu         break;
479207f4964dSYang Liu     case rv_codec_v_i:
479307f4964dSYang Liu         dec->rd = operand_rd(inst);
479407f4964dSYang Liu         dec->rs2 = operand_rs2(inst);
479507f4964dSYang Liu         dec->imm = operand_vimm(inst);
479607f4964dSYang Liu         dec->vm = operand_vm(inst);
479707f4964dSYang Liu         break;
4798434c609bSMax Chou     case rv_codec_vror_vi:
4799434c609bSMax Chou         dec->rd = operand_rd(inst);
4800434c609bSMax Chou         dec->rs2 = operand_rs2(inst);
4801434c609bSMax Chou         dec->imm = operand_vzimm6(inst);
4802434c609bSMax Chou         dec->vm = operand_vm(inst);
4803434c609bSMax Chou         break;
480407f4964dSYang Liu     case rv_codec_vsetvli:
480507f4964dSYang Liu         dec->rd = operand_rd(inst);
480607f4964dSYang Liu         dec->rs1 = operand_rs1(inst);
480707f4964dSYang Liu         dec->vzimm = operand_vzimm11(inst);
480807f4964dSYang Liu         break;
480907f4964dSYang Liu     case rv_codec_vsetivli:
481007f4964dSYang Liu         dec->rd = operand_rd(inst);
481107f4964dSYang Liu         dec->imm = operand_vimm(inst);
481207f4964dSYang Liu         dec->vzimm = operand_vzimm10(inst);
481307f4964dSYang Liu         break;
48142c71d02eSWeiwei Li     case rv_codec_zcb_lb:
48152c71d02eSWeiwei Li         dec->rs1 = operand_crs1q(inst) + 8;
48162c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
48172c71d02eSWeiwei Li         dec->imm = operand_uimm_c_lb(inst);
48182c71d02eSWeiwei Li         break;
48192c71d02eSWeiwei Li     case rv_codec_zcb_lh:
48202c71d02eSWeiwei Li         dec->rs1 = operand_crs1q(inst) + 8;
48212c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
48222c71d02eSWeiwei Li         dec->imm = operand_uimm_c_lh(inst);
48232c71d02eSWeiwei Li         break;
48242c71d02eSWeiwei Li     case rv_codec_zcb_ext:
48252c71d02eSWeiwei Li         dec->rd = operand_crs1q(inst) + 8;
48262c71d02eSWeiwei Li         break;
48272c71d02eSWeiwei Li     case rv_codec_zcb_mul:
48282c71d02eSWeiwei Li         dec->rd = operand_crs1rdq(inst) + 8;
48292c71d02eSWeiwei Li         dec->rs2 = operand_crs2q(inst) + 8;
48302c71d02eSWeiwei Li         break;
48312c71d02eSWeiwei Li     case rv_codec_zcmp_cm_pushpop:
48322c71d02eSWeiwei Li         dec->imm = operand_zcmp_stack_adj(inst, isa);
48332c71d02eSWeiwei Li         dec->rlist = operand_zcmp_rlist(inst);
48342c71d02eSWeiwei Li         break;
48352c71d02eSWeiwei Li     case rv_codec_zcmp_cm_mv:
48362c71d02eSWeiwei Li         dec->rd = operand_sreg1(inst);
48372c71d02eSWeiwei Li         dec->rs2 = operand_sreg2(inst);
48382c71d02eSWeiwei Li         break;
48392c71d02eSWeiwei Li     case rv_codec_zcmt_jt:
48402c71d02eSWeiwei Li         dec->imm = operand_tbl_index(inst);
48412c71d02eSWeiwei Li         break;
4842a47842d1SChristoph Müllner     case rv_codec_fli:
4843a47842d1SChristoph Müllner         dec->rd = operand_rd(inst);
4844a47842d1SChristoph Müllner         dec->imm = operand_rs1(inst);
4845a47842d1SChristoph Müllner         break;
4846318df723SChristoph Müllner     case rv_codec_r2_imm5:
4847318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4848318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4849318df723SChristoph Müllner         dec->imm = operand_rs2(inst);
4850318df723SChristoph Müllner         break;
4851318df723SChristoph Müllner     case rv_codec_r2:
4852318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4853318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4854318df723SChristoph Müllner         break;
4855318df723SChristoph Müllner     case rv_codec_r2_imm6:
4856318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4857318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4858318df723SChristoph Müllner         dec->imm = operand_imm6(inst);
4859318df723SChristoph Müllner         break;
4860318df723SChristoph Müllner     case rv_codec_r_imm2:
4861318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4862318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4863318df723SChristoph Müllner         dec->rs2 = operand_rs2(inst);
4864318df723SChristoph Müllner         dec->imm = operand_imm2(inst);
4865318df723SChristoph Müllner         break;
4866318df723SChristoph Müllner     case rv_codec_r2_immhl:
4867318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4868318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4869318df723SChristoph Müllner         dec->imm = operand_immh(inst);
4870318df723SChristoph Müllner         dec->imm1 = operand_imml(inst);
4871318df723SChristoph Müllner         break;
4872318df723SChristoph Müllner     case rv_codec_r2_imm2_imm5:
4873318df723SChristoph Müllner         dec->rd = operand_rd(inst);
4874318df723SChristoph Müllner         dec->rs1 = operand_rs1(inst);
4875318df723SChristoph Müllner         dec->imm = sextract32(operand_rs2(inst), 0, 5);
4876318df723SChristoph Müllner         dec->imm1 = operand_imm2(inst);
4877318df723SChristoph Müllner         break;
4878ea103259SMichael Clark     };
4879ea103259SMichael Clark }
4880ea103259SMichael Clark 
4881ea103259SMichael Clark /* check constraint */
4882ea103259SMichael Clark 
4883ea103259SMichael Clark static bool check_constraints(rv_decode *dec, const rvc_constraint *c)
4884ea103259SMichael Clark {
4885ea103259SMichael Clark     int32_t imm = dec->imm;
4886ea103259SMichael Clark     uint8_t rd = dec->rd, rs1 = dec->rs1, rs2 = dec->rs2;
4887ea103259SMichael Clark     while (*c != rvc_end) {
4888ea103259SMichael Clark         switch (*c) {
4889ea103259SMichael Clark         case rvc_rd_eq_ra:
4890ea103259SMichael Clark             if (!(rd == 1)) {
4891ea103259SMichael Clark                 return false;
4892ea103259SMichael Clark             }
4893ea103259SMichael Clark             break;
4894ea103259SMichael Clark         case rvc_rd_eq_x0:
4895ea103259SMichael Clark             if (!(rd == 0)) {
4896ea103259SMichael Clark                 return false;
4897ea103259SMichael Clark             }
4898ea103259SMichael Clark             break;
4899ea103259SMichael Clark         case rvc_rs1_eq_x0:
4900ea103259SMichael Clark             if (!(rs1 == 0)) {
4901ea103259SMichael Clark                 return false;
4902ea103259SMichael Clark             }
4903ea103259SMichael Clark             break;
4904ea103259SMichael Clark         case rvc_rs2_eq_x0:
4905ea103259SMichael Clark             if (!(rs2 == 0)) {
4906ea103259SMichael Clark                 return false;
4907ea103259SMichael Clark             }
4908ea103259SMichael Clark             break;
4909ea103259SMichael Clark         case rvc_rs2_eq_rs1:
4910ea103259SMichael Clark             if (!(rs2 == rs1)) {
4911ea103259SMichael Clark                 return false;
4912ea103259SMichael Clark             }
4913ea103259SMichael Clark             break;
4914ea103259SMichael Clark         case rvc_rs1_eq_ra:
4915ea103259SMichael Clark             if (!(rs1 == 1)) {
4916ea103259SMichael Clark                 return false;
4917ea103259SMichael Clark             }
4918ea103259SMichael Clark             break;
4919ea103259SMichael Clark         case rvc_imm_eq_zero:
4920ea103259SMichael Clark             if (!(imm == 0)) {
4921ea103259SMichael Clark                 return false;
4922ea103259SMichael Clark             }
4923ea103259SMichael Clark             break;
4924ea103259SMichael Clark         case rvc_imm_eq_n1:
4925ea103259SMichael Clark             if (!(imm == -1)) {
4926ea103259SMichael Clark                 return false;
4927ea103259SMichael Clark             }
4928ea103259SMichael Clark             break;
4929ea103259SMichael Clark         case rvc_imm_eq_p1:
4930ea103259SMichael Clark             if (!(imm == 1)) {
4931ea103259SMichael Clark                 return false;
4932ea103259SMichael Clark             }
4933ea103259SMichael Clark             break;
4934ea103259SMichael Clark         case rvc_csr_eq_0x001:
4935ea103259SMichael Clark             if (!(imm == 0x001)) {
4936ea103259SMichael Clark                 return false;
4937ea103259SMichael Clark             }
4938ea103259SMichael Clark             break;
4939ea103259SMichael Clark         case rvc_csr_eq_0x002:
4940ea103259SMichael Clark             if (!(imm == 0x002)) {
4941ea103259SMichael Clark                 return false;
4942ea103259SMichael Clark             }
4943ea103259SMichael Clark             break;
4944ea103259SMichael Clark         case rvc_csr_eq_0x003:
4945ea103259SMichael Clark             if (!(imm == 0x003)) {
4946ea103259SMichael Clark                 return false;
4947ea103259SMichael Clark             }
4948ea103259SMichael Clark             break;
4949ea103259SMichael Clark         case rvc_csr_eq_0xc00:
4950ea103259SMichael Clark             if (!(imm == 0xc00)) {
4951ea103259SMichael Clark                 return false;
4952ea103259SMichael Clark             }
4953ea103259SMichael Clark             break;
4954ea103259SMichael Clark         case rvc_csr_eq_0xc01:
4955ea103259SMichael Clark             if (!(imm == 0xc01)) {
4956ea103259SMichael Clark                 return false;
4957ea103259SMichael Clark             }
4958ea103259SMichael Clark             break;
4959ea103259SMichael Clark         case rvc_csr_eq_0xc02:
4960ea103259SMichael Clark             if (!(imm == 0xc02)) {
4961ea103259SMichael Clark                 return false;
4962ea103259SMichael Clark             }
4963ea103259SMichael Clark             break;
4964ea103259SMichael Clark         case rvc_csr_eq_0xc80:
4965ea103259SMichael Clark             if (!(imm == 0xc80)) {
4966ea103259SMichael Clark                 return false;
4967ea103259SMichael Clark             }
4968ea103259SMichael Clark             break;
4969ea103259SMichael Clark         case rvc_csr_eq_0xc81:
4970ea103259SMichael Clark             if (!(imm == 0xc81)) {
4971ea103259SMichael Clark                 return false;
4972ea103259SMichael Clark             }
4973ea103259SMichael Clark             break;
4974ea103259SMichael Clark         case rvc_csr_eq_0xc82:
4975ea103259SMichael Clark             if (!(imm == 0xc82)) {
4976ea103259SMichael Clark                 return false;
4977ea103259SMichael Clark             }
4978ea103259SMichael Clark             break;
4979ea103259SMichael Clark         default: break;
4980ea103259SMichael Clark         }
4981ea103259SMichael Clark         c++;
4982ea103259SMichael Clark     }
4983ea103259SMichael Clark     return true;
4984ea103259SMichael Clark }
4985ea103259SMichael Clark 
4986ea103259SMichael Clark /* instruction length */
4987ea103259SMichael Clark 
4988ea103259SMichael Clark static size_t inst_length(rv_inst inst)
4989ea103259SMichael Clark {
4990ea103259SMichael Clark     /* NOTE: supports maximum instruction size of 64-bits */
4991ea103259SMichael Clark 
49923bd87176SWeiwei Li     /*
49933bd87176SWeiwei Li      * instruction length coding
4994ea103259SMichael Clark      *
4995ea103259SMichael Clark      *      aa - 16 bit aa != 11
4996ea103259SMichael Clark      *   bbb11 - 32 bit bbb != 111
4997ea103259SMichael Clark      *  011111 - 48 bit
4998ea103259SMichael Clark      * 0111111 - 64 bit
4999ea103259SMichael Clark      */
5000ea103259SMichael Clark 
5001ea103259SMichael Clark     return (inst &      0b11) != 0b11      ? 2
5002ea103259SMichael Clark          : (inst &   0b11100) != 0b11100   ? 4
5003ea103259SMichael Clark          : (inst &  0b111111) == 0b011111  ? 6
5004ea103259SMichael Clark          : (inst & 0b1111111) == 0b0111111 ? 8
5005ea103259SMichael Clark          : 0;
5006ea103259SMichael Clark }
5007ea103259SMichael Clark 
5008ea103259SMichael Clark /* format instruction */
5009ea103259SMichael Clark 
5010b89fb575SRichard Henderson static GString *format_inst(size_t tab, rv_decode *dec)
5011ea103259SMichael Clark {
5012fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5013b89fb575SRichard Henderson     GString *buf = g_string_sized_new(64);
5014ea103259SMichael Clark     const char *fmt;
5015ea103259SMichael Clark 
5016ea103259SMichael Clark     fmt = opcode_data[dec->op].format;
5017ea103259SMichael Clark     while (*fmt) {
5018ea103259SMichael Clark         switch (*fmt) {
5019ea103259SMichael Clark         case 'O':
5020b89fb575SRichard Henderson             g_string_append(buf, opcode_data[dec->op].name);
5021ea103259SMichael Clark             break;
5022ea103259SMichael Clark         case '(':
5023ea103259SMichael Clark         case ',':
5024ea103259SMichael Clark         case ')':
50252c71d02eSWeiwei Li         case '-':
5026b89fb575SRichard Henderson             g_string_append_c(buf, *fmt);
50272c71d02eSWeiwei Li             break;
50285748c886SWeiwei Li         case 'b':
5029b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->bs);
50305748c886SWeiwei Li             break;
50315748c886SWeiwei Li         case 'n':
5032b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->rnum);
50335748c886SWeiwei Li             break;
5034ea103259SMichael Clark         case '0':
5035b89fb575SRichard Henderson             g_string_append(buf, rv_ireg_name_sym[dec->rd]);
5036ea103259SMichael Clark             break;
5037ea103259SMichael Clark         case '1':
5038b89fb575SRichard Henderson             g_string_append(buf, rv_ireg_name_sym[dec->rs1]);
5039ea103259SMichael Clark             break;
5040ea103259SMichael Clark         case '2':
5041b89fb575SRichard Henderson             g_string_append(buf, rv_ireg_name_sym[dec->rs2]);
5042ea103259SMichael Clark             break;
5043ea103259SMichael Clark         case '3':
5044b89fb575SRichard Henderson             if (dec->cfg->ext_zfinx) {
5045b89fb575SRichard Henderson                 g_string_append(buf, rv_ireg_name_sym[dec->rd]);
5046b89fb575SRichard Henderson             } else {
5047b89fb575SRichard Henderson                 g_string_append(buf, rv_freg_name_sym[dec->rd]);
5048b89fb575SRichard Henderson             }
5049ea103259SMichael Clark             break;
5050ea103259SMichael Clark         case '4':
5051b89fb575SRichard Henderson             if (dec->cfg->ext_zfinx) {
5052b89fb575SRichard Henderson                 g_string_append(buf, rv_ireg_name_sym[dec->rs1]);
5053b89fb575SRichard Henderson             } else {
5054b89fb575SRichard Henderson                 g_string_append(buf, rv_freg_name_sym[dec->rs1]);
5055b89fb575SRichard Henderson             }
5056ea103259SMichael Clark             break;
5057ea103259SMichael Clark         case '5':
5058b89fb575SRichard Henderson             if (dec->cfg->ext_zfinx) {
5059b89fb575SRichard Henderson                 g_string_append(buf, rv_ireg_name_sym[dec->rs2]);
5060b89fb575SRichard Henderson             } else {
5061b89fb575SRichard Henderson                 g_string_append(buf, rv_freg_name_sym[dec->rs2]);
5062b89fb575SRichard Henderson             }
5063ea103259SMichael Clark             break;
5064ea103259SMichael Clark         case '6':
5065b89fb575SRichard Henderson             if (dec->cfg->ext_zfinx) {
5066b89fb575SRichard Henderson                 g_string_append(buf, rv_ireg_name_sym[dec->rs3]);
5067b89fb575SRichard Henderson             } else {
5068b89fb575SRichard Henderson                 g_string_append(buf, rv_freg_name_sym[dec->rs3]);
5069b89fb575SRichard Henderson             }
5070ea103259SMichael Clark             break;
5071ea103259SMichael Clark         case '7':
5072b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->rs1);
5073ea103259SMichael Clark             break;
5074ea103259SMichael Clark         case 'i':
5075b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->imm);
5076ea103259SMichael Clark             break;
507707f4964dSYang Liu         case 'u':
5078b89fb575SRichard Henderson             g_string_append_printf(buf, "%u", ((uint32_t)dec->imm & 0b111111));
507907f4964dSYang Liu             break;
5080318df723SChristoph Müllner         case 'j':
5081b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->imm1);
5082318df723SChristoph Müllner             break;
5083ea103259SMichael Clark         case 'o':
5084b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->imm);
5085b89fb575SRichard Henderson             while (buf->len < tab * 2) {
5086b89fb575SRichard Henderson                 g_string_append_c(buf, ' ');
5087ea103259SMichael Clark             }
5088b89fb575SRichard Henderson             g_string_append_printf(buf, "# 0x%" PRIx64, dec->pc + dec->imm);
5089ea103259SMichael Clark             break;
509036df75a0SChristoph Müllner         case 'U':
509136df75a0SChristoph Müllner             fmt++;
5092b89fb575SRichard Henderson             g_string_append_printf(buf, "%d", dec->imm >> 12);
509336df75a0SChristoph Müllner             if (*fmt == 'o') {
5094b89fb575SRichard Henderson                 while (buf->len < tab * 2) {
5095b89fb575SRichard Henderson                     g_string_append_c(buf, ' ');
509636df75a0SChristoph Müllner                 }
5097b89fb575SRichard Henderson                 g_string_append_printf(buf, "# 0x%" PRIx64, dec->pc + dec->imm);
509836df75a0SChristoph Müllner             }
509936df75a0SChristoph Müllner             break;
5100ea103259SMichael Clark         case 'c': {
5101ea103259SMichael Clark             const char *name = csr_name(dec->imm & 0xfff);
5102ea103259SMichael Clark             if (name) {
5103b89fb575SRichard Henderson                 g_string_append(buf, name);
5104ea103259SMichael Clark             } else {
5105b89fb575SRichard Henderson                 g_string_append_printf(buf, "0x%03x", dec->imm & 0xfff);
5106ea103259SMichael Clark             }
5107ea103259SMichael Clark             break;
5108ea103259SMichael Clark         }
5109ea103259SMichael Clark         case 'r':
5110ea103259SMichael Clark             switch (dec->rm) {
5111ea103259SMichael Clark             case rv_rm_rne:
5112b89fb575SRichard Henderson                 g_string_append(buf, "rne");
5113ea103259SMichael Clark                 break;
5114ea103259SMichael Clark             case rv_rm_rtz:
5115b89fb575SRichard Henderson                 g_string_append(buf, "rtz");
5116ea103259SMichael Clark                 break;
5117ea103259SMichael Clark             case rv_rm_rdn:
5118b89fb575SRichard Henderson                 g_string_append(buf, "rdn");
5119ea103259SMichael Clark                 break;
5120ea103259SMichael Clark             case rv_rm_rup:
5121b89fb575SRichard Henderson                 g_string_append(buf, "rup");
5122ea103259SMichael Clark                 break;
5123ea103259SMichael Clark             case rv_rm_rmm:
5124b89fb575SRichard Henderson                 g_string_append(buf, "rmm");
5125ea103259SMichael Clark                 break;
5126ea103259SMichael Clark             case rv_rm_dyn:
5127b89fb575SRichard Henderson                 g_string_append(buf, "dyn");
5128ea103259SMichael Clark                 break;
5129ea103259SMichael Clark             default:
5130b89fb575SRichard Henderson                 g_string_append(buf, "inv");
5131ea103259SMichael Clark                 break;
5132ea103259SMichael Clark             }
5133ea103259SMichael Clark             break;
5134ea103259SMichael Clark         case 'p':
5135ea103259SMichael Clark             if (dec->pred & rv_fence_i) {
5136b89fb575SRichard Henderson                 g_string_append_c(buf, 'i');
5137ea103259SMichael Clark             }
5138ea103259SMichael Clark             if (dec->pred & rv_fence_o) {
5139b89fb575SRichard Henderson                 g_string_append_c(buf, 'o');
5140ea103259SMichael Clark             }
5141ea103259SMichael Clark             if (dec->pred & rv_fence_r) {
5142b89fb575SRichard Henderson                 g_string_append_c(buf, 'r');
5143ea103259SMichael Clark             }
5144ea103259SMichael Clark             if (dec->pred & rv_fence_w) {
5145b89fb575SRichard Henderson                 g_string_append_c(buf, 'w');
5146ea103259SMichael Clark             }
5147ea103259SMichael Clark             break;
5148ea103259SMichael Clark         case 's':
5149ea103259SMichael Clark             if (dec->succ & rv_fence_i) {
5150b89fb575SRichard Henderson                 g_string_append_c(buf, 'i');
5151ea103259SMichael Clark             }
5152ea103259SMichael Clark             if (dec->succ & rv_fence_o) {
5153b89fb575SRichard Henderson                 g_string_append_c(buf, 'o');
5154ea103259SMichael Clark             }
5155ea103259SMichael Clark             if (dec->succ & rv_fence_r) {
5156b89fb575SRichard Henderson                 g_string_append_c(buf, 'r');
5157ea103259SMichael Clark             }
5158ea103259SMichael Clark             if (dec->succ & rv_fence_w) {
5159b89fb575SRichard Henderson                 g_string_append_c(buf, 'w');
5160ea103259SMichael Clark             }
5161ea103259SMichael Clark             break;
5162ea103259SMichael Clark         case '\t':
5163b89fb575SRichard Henderson             while (buf->len < tab) {
5164b89fb575SRichard Henderson                 g_string_append_c(buf, ' ');
5165ea103259SMichael Clark             }
5166ea103259SMichael Clark             break;
5167ea103259SMichael Clark         case 'A':
5168ea103259SMichael Clark             if (dec->aq) {
5169b89fb575SRichard Henderson                 g_string_append(buf, ".aq");
5170ea103259SMichael Clark             }
5171ea103259SMichael Clark             break;
5172ea103259SMichael Clark         case 'R':
5173ea103259SMichael Clark             if (dec->rl) {
5174b89fb575SRichard Henderson                 g_string_append(buf, ".rl");
5175ea103259SMichael Clark             }
5176ea103259SMichael Clark             break;
517707f4964dSYang Liu         case 'l':
5178b89fb575SRichard Henderson             g_string_append(buf, ",v0");
517907f4964dSYang Liu             break;
518007f4964dSYang Liu         case 'm':
518107f4964dSYang Liu             if (dec->vm == 0) {
5182b89fb575SRichard Henderson                 g_string_append(buf, ",v0.t");
518307f4964dSYang Liu             }
518407f4964dSYang Liu             break;
518507f4964dSYang Liu         case 'D':
5186b89fb575SRichard Henderson             g_string_append(buf, rv_vreg_name_sym[dec->rd]);
518707f4964dSYang Liu             break;
518807f4964dSYang Liu         case 'E':
5189b89fb575SRichard Henderson             g_string_append(buf, rv_vreg_name_sym[dec->rs1]);
519007f4964dSYang Liu             break;
519107f4964dSYang Liu         case 'F':
5192b89fb575SRichard Henderson             g_string_append(buf, rv_vreg_name_sym[dec->rs2]);
519307f4964dSYang Liu             break;
519407f4964dSYang Liu         case 'G':
5195b89fb575SRichard Henderson             g_string_append(buf, rv_vreg_name_sym[dec->rs3]);
519607f4964dSYang Liu             break;
519707f4964dSYang Liu         case 'v': {
519807f4964dSYang Liu             const int sew = 1 << (((dec->vzimm >> 3) & 0b111) + 3);
519907f4964dSYang Liu             const int lmul = dec->vzimm & 0b11;
520007f4964dSYang Liu             const int flmul = (dec->vzimm >> 2) & 1;
520107f4964dSYang Liu             const char *vta = (dec->vzimm >> 6) & 1 ? "ta" : "tu";
520207f4964dSYang Liu             const char *vma = (dec->vzimm >> 7) & 1 ? "ma" : "mu";
5203b89fb575SRichard Henderson 
5204b89fb575SRichard Henderson             g_string_append_printf(buf, "e%d,m", sew);
520507f4964dSYang Liu             if (flmul) {
520607f4964dSYang Liu                 switch (lmul) {
520707f4964dSYang Liu                 case 3:
5208b89fb575SRichard Henderson                     g_string_append(buf, "f2");
520907f4964dSYang Liu                     break;
521007f4964dSYang Liu                 case 2:
5211b89fb575SRichard Henderson                     g_string_append(buf, "f4");
521207f4964dSYang Liu                     break;
521307f4964dSYang Liu                 case 1:
5214b89fb575SRichard Henderson                     g_string_append(buf, "f8");
521507f4964dSYang Liu                     break;
521607f4964dSYang Liu                 }
521707f4964dSYang Liu             } else {
5218b89fb575SRichard Henderson                 g_string_append_printf(buf, "%d", 1 << lmul);
521907f4964dSYang Liu             }
5220b89fb575SRichard Henderson             g_string_append_c(buf, ',');
5221b89fb575SRichard Henderson             g_string_append(buf, vta);
5222b89fb575SRichard Henderson             g_string_append_c(buf, ',');
5223b89fb575SRichard Henderson             g_string_append(buf, vma);
522407f4964dSYang Liu             break;
522507f4964dSYang Liu         }
52262c71d02eSWeiwei Li         case 'x': {
52272c71d02eSWeiwei Li             switch (dec->rlist) {
52282c71d02eSWeiwei Li             case 4:
5229b89fb575SRichard Henderson                 g_string_append(buf, "{ra}");
52302c71d02eSWeiwei Li                 break;
52312c71d02eSWeiwei Li             case 5:
5232b89fb575SRichard Henderson                 g_string_append(buf, "{ra, s0}");
52332c71d02eSWeiwei Li                 break;
52342c71d02eSWeiwei Li             case 15:
5235b89fb575SRichard Henderson                 g_string_append(buf, "{ra, s0-s11}");
52362c71d02eSWeiwei Li                 break;
52372c71d02eSWeiwei Li             default:
5238b89fb575SRichard Henderson                 g_string_append_printf(buf, "{ra, s0-s%d}", dec->rlist - 5);
52392c71d02eSWeiwei Li                 break;
52402c71d02eSWeiwei Li             }
52412c71d02eSWeiwei Li             break;
52422c71d02eSWeiwei Li         }
5243a47842d1SChristoph Müllner         case 'h':
5244b89fb575SRichard Henderson             g_string_append(buf, rv_fli_name_const[dec->imm]);
5245a47842d1SChristoph Müllner             break;
5246ea103259SMichael Clark         default:
5247ea103259SMichael Clark             break;
5248ea103259SMichael Clark         }
5249ea103259SMichael Clark         fmt++;
5250ea103259SMichael Clark     }
5251b89fb575SRichard Henderson 
5252b89fb575SRichard Henderson     return buf;
5253ea103259SMichael Clark }
5254ea103259SMichael Clark 
5255ea103259SMichael Clark /* lift instruction to pseudo-instruction */
5256ea103259SMichael Clark 
5257ea103259SMichael Clark static void decode_inst_lift_pseudo(rv_decode *dec)
5258ea103259SMichael Clark {
5259fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5260ea103259SMichael Clark     const rv_comp_data *comp_data = opcode_data[dec->op].pseudo;
5261ea103259SMichael Clark     if (!comp_data) {
5262ea103259SMichael Clark         return;
5263ea103259SMichael Clark     }
5264ea103259SMichael Clark     while (comp_data->constraints) {
5265ea103259SMichael Clark         if (check_constraints(dec, comp_data->constraints)) {
5266ea103259SMichael Clark             dec->op = comp_data->op;
5267ea103259SMichael Clark             dec->codec = opcode_data[dec->op].codec;
5268ea103259SMichael Clark             return;
5269ea103259SMichael Clark         }
5270ea103259SMichael Clark         comp_data++;
5271ea103259SMichael Clark     }
5272ea103259SMichael Clark }
5273ea103259SMichael Clark 
5274ea103259SMichael Clark /* decompress instruction */
5275ea103259SMichael Clark 
5276ea103259SMichael Clark static void decode_inst_decompress_rv32(rv_decode *dec)
5277ea103259SMichael Clark {
5278fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5279ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv32;
5280ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5281f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5282f88222daSMichael Clark             && dec->imm == 0) {
5283f88222daSMichael Clark             dec->op = rv_op_illegal;
5284f88222daSMichael Clark         } else {
5285ea103259SMichael Clark             dec->op = decomp_op;
5286ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5287ea103259SMichael Clark         }
5288ea103259SMichael Clark     }
5289f88222daSMichael Clark }
5290ea103259SMichael Clark 
5291ea103259SMichael Clark static void decode_inst_decompress_rv64(rv_decode *dec)
5292ea103259SMichael Clark {
5293fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5294ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv64;
5295ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5296f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5297f88222daSMichael Clark             && dec->imm == 0) {
5298f88222daSMichael Clark             dec->op = rv_op_illegal;
5299f88222daSMichael Clark         } else {
5300ea103259SMichael Clark             dec->op = decomp_op;
5301ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5302ea103259SMichael Clark         }
5303ea103259SMichael Clark     }
5304f88222daSMichael Clark }
5305ea103259SMichael Clark 
5306ea103259SMichael Clark static void decode_inst_decompress_rv128(rv_decode *dec)
5307ea103259SMichael Clark {
5308fd7c64f6SChristoph Müllner     const rv_opcode_data *opcode_data = dec->opcode_data;
5309ea103259SMichael Clark     int decomp_op = opcode_data[dec->op].decomp_rv128;
5310ea103259SMichael Clark     if (decomp_op != rv_op_illegal) {
5311f88222daSMichael Clark         if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz)
5312f88222daSMichael Clark             && dec->imm == 0) {
5313f88222daSMichael Clark             dec->op = rv_op_illegal;
5314f88222daSMichael Clark         } else {
5315ea103259SMichael Clark             dec->op = decomp_op;
5316ea103259SMichael Clark             dec->codec = opcode_data[decomp_op].codec;
5317ea103259SMichael Clark         }
5318ea103259SMichael Clark     }
5319f88222daSMichael Clark }
5320ea103259SMichael Clark 
5321ea103259SMichael Clark static void decode_inst_decompress(rv_decode *dec, rv_isa isa)
5322ea103259SMichael Clark {
5323ea103259SMichael Clark     switch (isa) {
5324ea103259SMichael Clark     case rv32:
5325ea103259SMichael Clark         decode_inst_decompress_rv32(dec);
5326ea103259SMichael Clark         break;
5327ea103259SMichael Clark     case rv64:
5328ea103259SMichael Clark         decode_inst_decompress_rv64(dec);
5329ea103259SMichael Clark         break;
5330ea103259SMichael Clark     case rv128:
5331ea103259SMichael Clark         decode_inst_decompress_rv128(dec);
5332ea103259SMichael Clark         break;
5333ea103259SMichael Clark     }
5334ea103259SMichael Clark }
5335ea103259SMichael Clark 
5336ea103259SMichael Clark /* disassemble instruction */
5337ea103259SMichael Clark 
5338b89fb575SRichard Henderson static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
5339454c2201SWeiwei Li                             RISCVCPUConfig *cfg)
5340ea103259SMichael Clark {
5341ea103259SMichael Clark     rv_decode dec = { 0 };
5342ea103259SMichael Clark     dec.pc = pc;
5343ea103259SMichael Clark     dec.inst = inst;
5344454c2201SWeiwei Li     dec.cfg = cfg;
5345c859a242SChristoph Müllner 
5346c859a242SChristoph Müllner     static const struct {
5347c859a242SChristoph Müllner         bool (*guard_func)(const RISCVCPUConfig *);
5348c859a242SChristoph Müllner         const rv_opcode_data *opcode_data;
5349c859a242SChristoph Müllner         void (*decode_func)(rv_decode *, rv_isa);
5350c859a242SChristoph Müllner     } decoders[] = {
5351c859a242SChristoph Müllner         { always_true_p, rvi_opcode_data, decode_inst_opcode },
5352318df723SChristoph Müllner         { has_xtheadba_p, xthead_opcode_data, decode_xtheadba },
5353318df723SChristoph Müllner         { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb },
5354318df723SChristoph Müllner         { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs },
5355318df723SChristoph Müllner         { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo },
5356318df723SChristoph Müllner         { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmov },
5357318df723SChristoph Müllner         { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemidx },
5358318df723SChristoph Müllner         { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv },
5359318df723SChristoph Müllner         { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac },
5360318df723SChristoph Müllner         { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx },
5361318df723SChristoph Müllner         { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempair },
5362318df723SChristoph Müllner         { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync },
5363f6f72338SChristoph Müllner         { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops },
5364c859a242SChristoph Müllner     };
5365c859a242SChristoph Müllner 
5366c859a242SChristoph Müllner     for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) {
5367c859a242SChristoph Müllner         bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func;
5368c859a242SChristoph Müllner         const rv_opcode_data *opcode_data = decoders[i].opcode_data;
5369c859a242SChristoph Müllner         void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func;
5370c859a242SChristoph Müllner 
5371c859a242SChristoph Müllner         if (guard_func(cfg)) {
5372c859a242SChristoph Müllner             dec.opcode_data = opcode_data;
5373c859a242SChristoph Müllner             decode_func(&dec, isa);
5374c859a242SChristoph Müllner             if (dec.op != rv_op_illegal)
5375c859a242SChristoph Müllner                 break;
5376c859a242SChristoph Müllner         }
5377c859a242SChristoph Müllner     }
5378c859a242SChristoph Müllner 
5379c859a242SChristoph Müllner     if (dec.op == rv_op_illegal) {
5380c859a242SChristoph Müllner         dec.opcode_data = rvi_opcode_data;
5381c859a242SChristoph Müllner     }
5382c859a242SChristoph Müllner 
538333632775SFrédéric Pétrot     decode_inst_operands(&dec, isa);
5384ea103259SMichael Clark     decode_inst_decompress(&dec, isa);
5385ea103259SMichael Clark     decode_inst_lift_pseudo(&dec);
5386b89fb575SRichard Henderson     return format_inst(24, &dec);
5387ea103259SMichael Clark }
5388ea103259SMichael Clark 
53896296a799SMichael Clark #define INST_FMT_2 "%04" PRIx64 "              "
53906296a799SMichael Clark #define INST_FMT_4 "%08" PRIx64 "          "
53916296a799SMichael Clark #define INST_FMT_6 "%012" PRIx64 "      "
53926296a799SMichael Clark #define INST_FMT_8 "%016" PRIx64 "  "
53936296a799SMichael Clark 
5394ea103259SMichael Clark static int
5395ea103259SMichael Clark print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
5396ea103259SMichael Clark {
5397ea103259SMichael Clark     bfd_byte packet[2];
5398ea103259SMichael Clark     rv_inst inst = 0;
5399ea103259SMichael Clark     size_t len = 2;
5400ea103259SMichael Clark     bfd_vma n;
5401ea103259SMichael Clark     int status;
5402ea103259SMichael Clark 
5403ea103259SMichael Clark     /* Instructions are made of 2-byte packets in little-endian order */
5404ea103259SMichael Clark     for (n = 0; n < len; n += 2) {
5405ea103259SMichael Clark         status = (*info->read_memory_func)(memaddr + n, packet, 2, info);
5406ea103259SMichael Clark         if (status != 0) {
5407ea103259SMichael Clark             /* Don't fail just because we fell off the end.  */
5408ea103259SMichael Clark             if (n > 0) {
5409ea103259SMichael Clark                 break;
5410ea103259SMichael Clark             }
5411ea103259SMichael Clark             (*info->memory_error_func)(status, memaddr, info);
5412ea103259SMichael Clark             return status;
5413ea103259SMichael Clark         }
5414ea103259SMichael Clark         inst |= ((rv_inst) bfd_getl16(packet)) << (8 * n);
5415ea103259SMichael Clark         if (n == 0) {
5416ea103259SMichael Clark             len = inst_length(inst);
5417ea103259SMichael Clark         }
5418ea103259SMichael Clark     }
5419ea103259SMichael Clark 
5420db7e8b1fSAlex Bennée     if (info->show_opcodes) {
54216296a799SMichael Clark         switch (len) {
54226296a799SMichael Clark         case 2:
54236296a799SMichael Clark             (*info->fprintf_func)(info->stream, INST_FMT_2, inst);
54246296a799SMichael Clark             break;
54256296a799SMichael Clark         case 4:
54266296a799SMichael Clark             (*info->fprintf_func)(info->stream, INST_FMT_4, inst);
54276296a799SMichael Clark             break;
54286296a799SMichael Clark         case 6:
54296296a799SMichael Clark             (*info->fprintf_func)(info->stream, INST_FMT_6, inst);
54306296a799SMichael Clark             break;
54316296a799SMichael Clark         default:
54326296a799SMichael Clark             (*info->fprintf_func)(info->stream, INST_FMT_8, inst);
54336296a799SMichael Clark             break;
54346296a799SMichael Clark         }
5435db7e8b1fSAlex Bennée     }
54366296a799SMichael Clark 
5437b89fb575SRichard Henderson     g_autoptr(GString) str =
5438b89fb575SRichard Henderson         disasm_inst(isa, memaddr, inst, (RISCVCPUConfig *)info->target_info);
5439b89fb575SRichard Henderson     (*info->fprintf_func)(info->stream, "%s", str->str);
5440ea103259SMichael Clark 
5441ea103259SMichael Clark     return len;
5442ea103259SMichael Clark }
5443ea103259SMichael Clark 
5444ea103259SMichael Clark int print_insn_riscv32(bfd_vma memaddr, struct disassemble_info *info)
5445ea103259SMichael Clark {
5446ea103259SMichael Clark     return print_insn_riscv(memaddr, info, rv32);
5447ea103259SMichael Clark }
5448ea103259SMichael Clark 
5449ea103259SMichael Clark int print_insn_riscv64(bfd_vma memaddr, struct disassemble_info *info)
5450ea103259SMichael Clark {
5451ea103259SMichael Clark     return print_insn_riscv(memaddr, info, rv64);
5452ea103259SMichael Clark }
5453332dab68SFrédéric Pétrot 
5454332dab68SFrédéric Pétrot int print_insn_riscv128(bfd_vma memaddr, struct disassemble_info *info)
5455332dab68SFrédéric Pétrot {
5456332dab68SFrédéric Pétrot     return print_insn_riscv(memaddr, info, rv128);
5457332dab68SFrédéric Pétrot }
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