1ea103259SMichael Clark /* 2ea103259SMichael Clark * QEMU RISC-V Disassembler 3ea103259SMichael Clark * 4ea103259SMichael Clark * Copyright (c) 2016-2017 Michael Clark <michaeljclark@mac.com> 5ea103259SMichael Clark * Copyright (c) 2017-2018 SiFive, Inc. 6ea103259SMichael Clark * 7ea103259SMichael Clark * This program is free software; you can redistribute it and/or modify it 8ea103259SMichael Clark * under the terms and conditions of the GNU General Public License, 9ea103259SMichael Clark * version 2 or later, as published by the Free Software Foundation. 10ea103259SMichael Clark * 11ea103259SMichael Clark * This program is distributed in the hope it will be useful, but WITHOUT 12ea103259SMichael Clark * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13ea103259SMichael Clark * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14ea103259SMichael Clark * more details. 15ea103259SMichael Clark * 16ea103259SMichael Clark * You should have received a copy of the GNU General Public License along with 17ea103259SMichael Clark * this program. If not, see <http://www.gnu.org/licenses/>. 18ea103259SMichael Clark */ 19ea103259SMichael Clark 20ea103259SMichael Clark #include "qemu/osdep.h" 21*318df723SChristoph Müllner #include "qemu/bitops.h" 223979fca4SMarkus Armbruster #include "disas/dis-asm.h" 23454c2201SWeiwei Li #include "target/riscv/cpu_cfg.h" 245d326db2SChristoph Müllner #include "disas/riscv.h" 25ea103259SMichael Clark 26f6f72338SChristoph Müllner /* Vendor extensions */ 27*318df723SChristoph Müllner #include "disas/riscv-xthead.h" 28f6f72338SChristoph Müllner #include "disas/riscv-xventana.h" 29f6f72338SChristoph Müllner 30ea103259SMichael Clark typedef enum { 3101b1361fSChristoph Müllner /* 0 is reserved for rv_op_illegal. */ 32ea103259SMichael Clark rv_op_lui = 1, 33ea103259SMichael Clark rv_op_auipc = 2, 34ea103259SMichael Clark rv_op_jal = 3, 35ea103259SMichael Clark rv_op_jalr = 4, 36ea103259SMichael Clark rv_op_beq = 5, 37ea103259SMichael Clark rv_op_bne = 6, 38ea103259SMichael Clark rv_op_blt = 7, 39ea103259SMichael Clark rv_op_bge = 8, 40ea103259SMichael Clark rv_op_bltu = 9, 41ea103259SMichael Clark rv_op_bgeu = 10, 42ea103259SMichael Clark rv_op_lb = 11, 43ea103259SMichael Clark rv_op_lh = 12, 44ea103259SMichael Clark rv_op_lw = 13, 45ea103259SMichael Clark rv_op_lbu = 14, 46ea103259SMichael Clark rv_op_lhu = 15, 47ea103259SMichael Clark rv_op_sb = 16, 48ea103259SMichael Clark rv_op_sh = 17, 49ea103259SMichael Clark rv_op_sw = 18, 50ea103259SMichael Clark rv_op_addi = 19, 51ea103259SMichael Clark rv_op_slti = 20, 52ea103259SMichael Clark rv_op_sltiu = 21, 53ea103259SMichael Clark rv_op_xori = 22, 54ea103259SMichael Clark rv_op_ori = 23, 55ea103259SMichael Clark rv_op_andi = 24, 56ea103259SMichael Clark rv_op_slli = 25, 57ea103259SMichael Clark rv_op_srli = 26, 58ea103259SMichael Clark rv_op_srai = 27, 59ea103259SMichael Clark rv_op_add = 28, 60ea103259SMichael Clark rv_op_sub = 29, 61ea103259SMichael Clark rv_op_sll = 30, 62ea103259SMichael Clark rv_op_slt = 31, 63ea103259SMichael Clark rv_op_sltu = 32, 64ea103259SMichael Clark rv_op_xor = 33, 65ea103259SMichael Clark rv_op_srl = 34, 66ea103259SMichael Clark rv_op_sra = 35, 67ea103259SMichael Clark rv_op_or = 36, 68ea103259SMichael Clark rv_op_and = 37, 69ea103259SMichael Clark rv_op_fence = 38, 70ea103259SMichael Clark rv_op_fence_i = 39, 71ea103259SMichael Clark rv_op_lwu = 40, 72ea103259SMichael Clark rv_op_ld = 41, 73ea103259SMichael Clark rv_op_sd = 42, 74ea103259SMichael Clark rv_op_addiw = 43, 75ea103259SMichael Clark rv_op_slliw = 44, 76ea103259SMichael Clark rv_op_srliw = 45, 77ea103259SMichael Clark rv_op_sraiw = 46, 78ea103259SMichael Clark rv_op_addw = 47, 79ea103259SMichael Clark rv_op_subw = 48, 80ea103259SMichael Clark rv_op_sllw = 49, 81ea103259SMichael Clark rv_op_srlw = 50, 82ea103259SMichael Clark rv_op_sraw = 51, 83ea103259SMichael Clark rv_op_ldu = 52, 84ea103259SMichael Clark rv_op_lq = 53, 85ea103259SMichael Clark rv_op_sq = 54, 86ea103259SMichael Clark rv_op_addid = 55, 87ea103259SMichael Clark rv_op_sllid = 56, 88ea103259SMichael Clark rv_op_srlid = 57, 89ea103259SMichael Clark rv_op_sraid = 58, 90ea103259SMichael Clark rv_op_addd = 59, 91ea103259SMichael Clark rv_op_subd = 60, 92ea103259SMichael Clark rv_op_slld = 61, 93ea103259SMichael Clark rv_op_srld = 62, 94ea103259SMichael Clark rv_op_srad = 63, 95ea103259SMichael Clark rv_op_mul = 64, 96ea103259SMichael Clark rv_op_mulh = 65, 97ea103259SMichael Clark rv_op_mulhsu = 66, 98ea103259SMichael Clark rv_op_mulhu = 67, 99ea103259SMichael Clark rv_op_div = 68, 100ea103259SMichael Clark rv_op_divu = 69, 101ea103259SMichael Clark rv_op_rem = 70, 102ea103259SMichael Clark rv_op_remu = 71, 103ea103259SMichael Clark rv_op_mulw = 72, 104ea103259SMichael Clark rv_op_divw = 73, 105ea103259SMichael Clark rv_op_divuw = 74, 106ea103259SMichael Clark rv_op_remw = 75, 107ea103259SMichael Clark rv_op_remuw = 76, 108ea103259SMichael Clark rv_op_muld = 77, 109ea103259SMichael Clark rv_op_divd = 78, 110ea103259SMichael Clark rv_op_divud = 79, 111ea103259SMichael Clark rv_op_remd = 80, 112ea103259SMichael Clark rv_op_remud = 81, 113ea103259SMichael Clark rv_op_lr_w = 82, 114ea103259SMichael Clark rv_op_sc_w = 83, 115ea103259SMichael Clark rv_op_amoswap_w = 84, 116ea103259SMichael Clark rv_op_amoadd_w = 85, 117ea103259SMichael Clark rv_op_amoxor_w = 86, 118ea103259SMichael Clark rv_op_amoor_w = 87, 119ea103259SMichael Clark rv_op_amoand_w = 88, 120ea103259SMichael Clark rv_op_amomin_w = 89, 121ea103259SMichael Clark rv_op_amomax_w = 90, 122ea103259SMichael Clark rv_op_amominu_w = 91, 123ea103259SMichael Clark rv_op_amomaxu_w = 92, 124ea103259SMichael Clark rv_op_lr_d = 93, 125ea103259SMichael Clark rv_op_sc_d = 94, 126ea103259SMichael Clark rv_op_amoswap_d = 95, 127ea103259SMichael Clark rv_op_amoadd_d = 96, 128ea103259SMichael Clark rv_op_amoxor_d = 97, 129ea103259SMichael Clark rv_op_amoor_d = 98, 130ea103259SMichael Clark rv_op_amoand_d = 99, 131ea103259SMichael Clark rv_op_amomin_d = 100, 132ea103259SMichael Clark rv_op_amomax_d = 101, 133ea103259SMichael Clark rv_op_amominu_d = 102, 134ea103259SMichael Clark rv_op_amomaxu_d = 103, 135ea103259SMichael Clark rv_op_lr_q = 104, 136ea103259SMichael Clark rv_op_sc_q = 105, 137ea103259SMichael Clark rv_op_amoswap_q = 106, 138ea103259SMichael Clark rv_op_amoadd_q = 107, 139ea103259SMichael Clark rv_op_amoxor_q = 108, 140ea103259SMichael Clark rv_op_amoor_q = 109, 141ea103259SMichael Clark rv_op_amoand_q = 110, 142ea103259SMichael Clark rv_op_amomin_q = 111, 143ea103259SMichael Clark rv_op_amomax_q = 112, 144ea103259SMichael Clark rv_op_amominu_q = 113, 145ea103259SMichael Clark rv_op_amomaxu_q = 114, 146ea103259SMichael Clark rv_op_ecall = 115, 147ea103259SMichael Clark rv_op_ebreak = 116, 148ea103259SMichael Clark rv_op_uret = 117, 149ea103259SMichael Clark rv_op_sret = 118, 150ea103259SMichael Clark rv_op_hret = 119, 151ea103259SMichael Clark rv_op_mret = 120, 152ea103259SMichael Clark rv_op_dret = 121, 153ea103259SMichael Clark rv_op_sfence_vm = 122, 154ea103259SMichael Clark rv_op_sfence_vma = 123, 155ea103259SMichael Clark rv_op_wfi = 124, 156ea103259SMichael Clark rv_op_csrrw = 125, 157ea103259SMichael Clark rv_op_csrrs = 126, 158ea103259SMichael Clark rv_op_csrrc = 127, 159ea103259SMichael Clark rv_op_csrrwi = 128, 160ea103259SMichael Clark rv_op_csrrsi = 129, 161ea103259SMichael Clark rv_op_csrrci = 130, 162ea103259SMichael Clark rv_op_flw = 131, 163ea103259SMichael Clark rv_op_fsw = 132, 164ea103259SMichael Clark rv_op_fmadd_s = 133, 165ea103259SMichael Clark rv_op_fmsub_s = 134, 166ea103259SMichael Clark rv_op_fnmsub_s = 135, 167ea103259SMichael Clark rv_op_fnmadd_s = 136, 168ea103259SMichael Clark rv_op_fadd_s = 137, 169ea103259SMichael Clark rv_op_fsub_s = 138, 170ea103259SMichael Clark rv_op_fmul_s = 139, 171ea103259SMichael Clark rv_op_fdiv_s = 140, 172ea103259SMichael Clark rv_op_fsgnj_s = 141, 173ea103259SMichael Clark rv_op_fsgnjn_s = 142, 174ea103259SMichael Clark rv_op_fsgnjx_s = 143, 175ea103259SMichael Clark rv_op_fmin_s = 144, 176ea103259SMichael Clark rv_op_fmax_s = 145, 177ea103259SMichael Clark rv_op_fsqrt_s = 146, 178ea103259SMichael Clark rv_op_fle_s = 147, 179ea103259SMichael Clark rv_op_flt_s = 148, 180ea103259SMichael Clark rv_op_feq_s = 149, 181ea103259SMichael Clark rv_op_fcvt_w_s = 150, 182ea103259SMichael Clark rv_op_fcvt_wu_s = 151, 183ea103259SMichael Clark rv_op_fcvt_s_w = 152, 184ea103259SMichael Clark rv_op_fcvt_s_wu = 153, 185ea103259SMichael Clark rv_op_fmv_x_s = 154, 186ea103259SMichael Clark rv_op_fclass_s = 155, 187ea103259SMichael Clark rv_op_fmv_s_x = 156, 188ea103259SMichael Clark rv_op_fcvt_l_s = 157, 189ea103259SMichael Clark rv_op_fcvt_lu_s = 158, 190ea103259SMichael Clark rv_op_fcvt_s_l = 159, 191ea103259SMichael Clark rv_op_fcvt_s_lu = 160, 192ea103259SMichael Clark rv_op_fld = 161, 193ea103259SMichael Clark rv_op_fsd = 162, 194ea103259SMichael Clark rv_op_fmadd_d = 163, 195ea103259SMichael Clark rv_op_fmsub_d = 164, 196ea103259SMichael Clark rv_op_fnmsub_d = 165, 197ea103259SMichael Clark rv_op_fnmadd_d = 166, 198ea103259SMichael Clark rv_op_fadd_d = 167, 199ea103259SMichael Clark rv_op_fsub_d = 168, 200ea103259SMichael Clark rv_op_fmul_d = 169, 201ea103259SMichael Clark rv_op_fdiv_d = 170, 202ea103259SMichael Clark rv_op_fsgnj_d = 171, 203ea103259SMichael Clark rv_op_fsgnjn_d = 172, 204ea103259SMichael Clark rv_op_fsgnjx_d = 173, 205ea103259SMichael Clark rv_op_fmin_d = 174, 206ea103259SMichael Clark rv_op_fmax_d = 175, 207ea103259SMichael Clark rv_op_fcvt_s_d = 176, 208ea103259SMichael Clark rv_op_fcvt_d_s = 177, 209ea103259SMichael Clark rv_op_fsqrt_d = 178, 210ea103259SMichael Clark rv_op_fle_d = 179, 211ea103259SMichael Clark rv_op_flt_d = 180, 212ea103259SMichael Clark rv_op_feq_d = 181, 213ea103259SMichael Clark rv_op_fcvt_w_d = 182, 214ea103259SMichael Clark rv_op_fcvt_wu_d = 183, 215ea103259SMichael Clark rv_op_fcvt_d_w = 184, 216ea103259SMichael Clark rv_op_fcvt_d_wu = 185, 217ea103259SMichael Clark rv_op_fclass_d = 186, 218ea103259SMichael Clark rv_op_fcvt_l_d = 187, 219ea103259SMichael Clark rv_op_fcvt_lu_d = 188, 220ea103259SMichael Clark rv_op_fmv_x_d = 189, 221ea103259SMichael Clark rv_op_fcvt_d_l = 190, 222ea103259SMichael Clark rv_op_fcvt_d_lu = 191, 223ea103259SMichael Clark rv_op_fmv_d_x = 192, 224ea103259SMichael Clark rv_op_flq = 193, 225ea103259SMichael Clark rv_op_fsq = 194, 226ea103259SMichael Clark rv_op_fmadd_q = 195, 227ea103259SMichael Clark rv_op_fmsub_q = 196, 228ea103259SMichael Clark rv_op_fnmsub_q = 197, 229ea103259SMichael Clark rv_op_fnmadd_q = 198, 230ea103259SMichael Clark rv_op_fadd_q = 199, 231ea103259SMichael Clark rv_op_fsub_q = 200, 232ea103259SMichael Clark rv_op_fmul_q = 201, 233ea103259SMichael Clark rv_op_fdiv_q = 202, 234ea103259SMichael Clark rv_op_fsgnj_q = 203, 235ea103259SMichael Clark rv_op_fsgnjn_q = 204, 236ea103259SMichael Clark rv_op_fsgnjx_q = 205, 237ea103259SMichael Clark rv_op_fmin_q = 206, 238ea103259SMichael Clark rv_op_fmax_q = 207, 239ea103259SMichael Clark rv_op_fcvt_s_q = 208, 240ea103259SMichael Clark rv_op_fcvt_q_s = 209, 241ea103259SMichael Clark rv_op_fcvt_d_q = 210, 242ea103259SMichael Clark rv_op_fcvt_q_d = 211, 243ea103259SMichael Clark rv_op_fsqrt_q = 212, 244ea103259SMichael Clark rv_op_fle_q = 213, 245ea103259SMichael Clark rv_op_flt_q = 214, 246ea103259SMichael Clark rv_op_feq_q = 215, 247ea103259SMichael Clark rv_op_fcvt_w_q = 216, 248ea103259SMichael Clark rv_op_fcvt_wu_q = 217, 249ea103259SMichael Clark rv_op_fcvt_q_w = 218, 250ea103259SMichael Clark rv_op_fcvt_q_wu = 219, 251ea103259SMichael Clark rv_op_fclass_q = 220, 252ea103259SMichael Clark rv_op_fcvt_l_q = 221, 253ea103259SMichael Clark rv_op_fcvt_lu_q = 222, 254ea103259SMichael Clark rv_op_fcvt_q_l = 223, 255ea103259SMichael Clark rv_op_fcvt_q_lu = 224, 256ea103259SMichael Clark rv_op_fmv_x_q = 225, 257ea103259SMichael Clark rv_op_fmv_q_x = 226, 258ea103259SMichael Clark rv_op_c_addi4spn = 227, 259ea103259SMichael Clark rv_op_c_fld = 228, 260ea103259SMichael Clark rv_op_c_lw = 229, 261ea103259SMichael Clark rv_op_c_flw = 230, 262ea103259SMichael Clark rv_op_c_fsd = 231, 263ea103259SMichael Clark rv_op_c_sw = 232, 264ea103259SMichael Clark rv_op_c_fsw = 233, 265ea103259SMichael Clark rv_op_c_nop = 234, 266ea103259SMichael Clark rv_op_c_addi = 235, 267ea103259SMichael Clark rv_op_c_jal = 236, 268ea103259SMichael Clark rv_op_c_li = 237, 269ea103259SMichael Clark rv_op_c_addi16sp = 238, 270ea103259SMichael Clark rv_op_c_lui = 239, 271ea103259SMichael Clark rv_op_c_srli = 240, 272ea103259SMichael Clark rv_op_c_srai = 241, 273ea103259SMichael Clark rv_op_c_andi = 242, 274ea103259SMichael Clark rv_op_c_sub = 243, 275ea103259SMichael Clark rv_op_c_xor = 244, 276ea103259SMichael Clark rv_op_c_or = 245, 277ea103259SMichael Clark rv_op_c_and = 246, 278ea103259SMichael Clark rv_op_c_subw = 247, 279ea103259SMichael Clark rv_op_c_addw = 248, 280ea103259SMichael Clark rv_op_c_j = 249, 281ea103259SMichael Clark rv_op_c_beqz = 250, 282ea103259SMichael Clark rv_op_c_bnez = 251, 283ea103259SMichael Clark rv_op_c_slli = 252, 284ea103259SMichael Clark rv_op_c_fldsp = 253, 285ea103259SMichael Clark rv_op_c_lwsp = 254, 286ea103259SMichael Clark rv_op_c_flwsp = 255, 287ea103259SMichael Clark rv_op_c_jr = 256, 288ea103259SMichael Clark rv_op_c_mv = 257, 289ea103259SMichael Clark rv_op_c_ebreak = 258, 290ea103259SMichael Clark rv_op_c_jalr = 259, 291ea103259SMichael Clark rv_op_c_add = 260, 292ea103259SMichael Clark rv_op_c_fsdsp = 261, 293ea103259SMichael Clark rv_op_c_swsp = 262, 294ea103259SMichael Clark rv_op_c_fswsp = 263, 295ea103259SMichael Clark rv_op_c_ld = 264, 296ea103259SMichael Clark rv_op_c_sd = 265, 297ea103259SMichael Clark rv_op_c_addiw = 266, 298ea103259SMichael Clark rv_op_c_ldsp = 267, 299ea103259SMichael Clark rv_op_c_sdsp = 268, 300ea103259SMichael Clark rv_op_c_lq = 269, 301ea103259SMichael Clark rv_op_c_sq = 270, 302ea103259SMichael Clark rv_op_c_lqsp = 271, 303ea103259SMichael Clark rv_op_c_sqsp = 272, 304ea103259SMichael Clark rv_op_nop = 273, 305ea103259SMichael Clark rv_op_mv = 274, 306ea103259SMichael Clark rv_op_not = 275, 307ea103259SMichael Clark rv_op_neg = 276, 308ea103259SMichael Clark rv_op_negw = 277, 309ea103259SMichael Clark rv_op_sext_w = 278, 310ea103259SMichael Clark rv_op_seqz = 279, 311ea103259SMichael Clark rv_op_snez = 280, 312ea103259SMichael Clark rv_op_sltz = 281, 313ea103259SMichael Clark rv_op_sgtz = 282, 314ea103259SMichael Clark rv_op_fmv_s = 283, 315ea103259SMichael Clark rv_op_fabs_s = 284, 316ea103259SMichael Clark rv_op_fneg_s = 285, 317ea103259SMichael Clark rv_op_fmv_d = 286, 318ea103259SMichael Clark rv_op_fabs_d = 287, 319ea103259SMichael Clark rv_op_fneg_d = 288, 320ea103259SMichael Clark rv_op_fmv_q = 289, 321ea103259SMichael Clark rv_op_fabs_q = 290, 322ea103259SMichael Clark rv_op_fneg_q = 291, 323ea103259SMichael Clark rv_op_beqz = 292, 324ea103259SMichael Clark rv_op_bnez = 293, 325ea103259SMichael Clark rv_op_blez = 294, 326ea103259SMichael Clark rv_op_bgez = 295, 327ea103259SMichael Clark rv_op_bltz = 296, 328ea103259SMichael Clark rv_op_bgtz = 297, 329ea103259SMichael Clark rv_op_ble = 298, 330ea103259SMichael Clark rv_op_bleu = 299, 331ea103259SMichael Clark rv_op_bgt = 300, 332ea103259SMichael Clark rv_op_bgtu = 301, 333ea103259SMichael Clark rv_op_j = 302, 334ea103259SMichael Clark rv_op_ret = 303, 335ea103259SMichael Clark rv_op_jr = 304, 336ea103259SMichael Clark rv_op_rdcycle = 305, 337ea103259SMichael Clark rv_op_rdtime = 306, 338ea103259SMichael Clark rv_op_rdinstret = 307, 339ea103259SMichael Clark rv_op_rdcycleh = 308, 340ea103259SMichael Clark rv_op_rdtimeh = 309, 341ea103259SMichael Clark rv_op_rdinstreth = 310, 342ea103259SMichael Clark rv_op_frcsr = 311, 343ea103259SMichael Clark rv_op_frrm = 312, 344ea103259SMichael Clark rv_op_frflags = 313, 345ea103259SMichael Clark rv_op_fscsr = 314, 346ea103259SMichael Clark rv_op_fsrm = 315, 347ea103259SMichael Clark rv_op_fsflags = 316, 348ea103259SMichael Clark rv_op_fsrmi = 317, 349ea103259SMichael Clark rv_op_fsflagsi = 318, 35002c1b569SPhilipp Tomsich rv_op_bseti = 319, 35102c1b569SPhilipp Tomsich rv_op_bclri = 320, 35202c1b569SPhilipp Tomsich rv_op_binvi = 321, 35302c1b569SPhilipp Tomsich rv_op_bexti = 322, 35402c1b569SPhilipp Tomsich rv_op_rori = 323, 35502c1b569SPhilipp Tomsich rv_op_clz = 324, 35602c1b569SPhilipp Tomsich rv_op_ctz = 325, 35702c1b569SPhilipp Tomsich rv_op_cpop = 326, 35802c1b569SPhilipp Tomsich rv_op_sext_h = 327, 35902c1b569SPhilipp Tomsich rv_op_sext_b = 328, 36002c1b569SPhilipp Tomsich rv_op_xnor = 329, 36102c1b569SPhilipp Tomsich rv_op_orn = 330, 36202c1b569SPhilipp Tomsich rv_op_andn = 331, 36302c1b569SPhilipp Tomsich rv_op_rol = 332, 36402c1b569SPhilipp Tomsich rv_op_ror = 333, 36502c1b569SPhilipp Tomsich rv_op_sh1add = 334, 36602c1b569SPhilipp Tomsich rv_op_sh2add = 335, 36702c1b569SPhilipp Tomsich rv_op_sh3add = 336, 36802c1b569SPhilipp Tomsich rv_op_sh1add_uw = 337, 36902c1b569SPhilipp Tomsich rv_op_sh2add_uw = 338, 37002c1b569SPhilipp Tomsich rv_op_sh3add_uw = 339, 37102c1b569SPhilipp Tomsich rv_op_clmul = 340, 37202c1b569SPhilipp Tomsich rv_op_clmulr = 341, 37302c1b569SPhilipp Tomsich rv_op_clmulh = 342, 37402c1b569SPhilipp Tomsich rv_op_min = 343, 37502c1b569SPhilipp Tomsich rv_op_minu = 344, 37602c1b569SPhilipp Tomsich rv_op_max = 345, 37702c1b569SPhilipp Tomsich rv_op_maxu = 346, 37802c1b569SPhilipp Tomsich rv_op_clzw = 347, 37902c1b569SPhilipp Tomsich rv_op_ctzw = 348, 38002c1b569SPhilipp Tomsich rv_op_cpopw = 349, 38102c1b569SPhilipp Tomsich rv_op_slli_uw = 350, 38202c1b569SPhilipp Tomsich rv_op_add_uw = 351, 38302c1b569SPhilipp Tomsich rv_op_rolw = 352, 38402c1b569SPhilipp Tomsich rv_op_rorw = 353, 38502c1b569SPhilipp Tomsich rv_op_rev8 = 354, 38602c1b569SPhilipp Tomsich rv_op_zext_h = 355, 38702c1b569SPhilipp Tomsich rv_op_roriw = 356, 38802c1b569SPhilipp Tomsich rv_op_orc_b = 357, 38902c1b569SPhilipp Tomsich rv_op_bset = 358, 39002c1b569SPhilipp Tomsich rv_op_bclr = 359, 39102c1b569SPhilipp Tomsich rv_op_binv = 360, 39202c1b569SPhilipp Tomsich rv_op_bext = 361, 3935748c886SWeiwei Li rv_op_aes32esmi = 362, 3945748c886SWeiwei Li rv_op_aes32esi = 363, 3955748c886SWeiwei Li rv_op_aes32dsmi = 364, 3965748c886SWeiwei Li rv_op_aes32dsi = 365, 3975748c886SWeiwei Li rv_op_aes64ks1i = 366, 3985748c886SWeiwei Li rv_op_aes64ks2 = 367, 3995748c886SWeiwei Li rv_op_aes64im = 368, 4005748c886SWeiwei Li rv_op_aes64esm = 369, 4015748c886SWeiwei Li rv_op_aes64es = 370, 4025748c886SWeiwei Li rv_op_aes64dsm = 371, 4035748c886SWeiwei Li rv_op_aes64ds = 372, 4045748c886SWeiwei Li rv_op_sha256sig0 = 373, 4055748c886SWeiwei Li rv_op_sha256sig1 = 374, 4065748c886SWeiwei Li rv_op_sha256sum0 = 375, 4075748c886SWeiwei Li rv_op_sha256sum1 = 376, 4085748c886SWeiwei Li rv_op_sha512sig0 = 377, 4095748c886SWeiwei Li rv_op_sha512sig1 = 378, 4105748c886SWeiwei Li rv_op_sha512sum0 = 379, 4115748c886SWeiwei Li rv_op_sha512sum1 = 380, 4125748c886SWeiwei Li rv_op_sha512sum0r = 381, 4135748c886SWeiwei Li rv_op_sha512sum1r = 382, 4145748c886SWeiwei Li rv_op_sha512sig0l = 383, 4155748c886SWeiwei Li rv_op_sha512sig0h = 384, 4165748c886SWeiwei Li rv_op_sha512sig1l = 385, 4175748c886SWeiwei Li rv_op_sha512sig1h = 386, 4185748c886SWeiwei Li rv_op_sm3p0 = 387, 4195748c886SWeiwei Li rv_op_sm3p1 = 388, 4205748c886SWeiwei Li rv_op_sm4ed = 389, 4215748c886SWeiwei Li rv_op_sm4ks = 390, 4225748c886SWeiwei Li rv_op_brev8 = 391, 4235748c886SWeiwei Li rv_op_pack = 392, 4245748c886SWeiwei Li rv_op_packh = 393, 4255748c886SWeiwei Li rv_op_packw = 394, 4265748c886SWeiwei Li rv_op_unzip = 395, 4275748c886SWeiwei Li rv_op_zip = 396, 4285748c886SWeiwei Li rv_op_xperm4 = 397, 4295748c886SWeiwei Li rv_op_xperm8 = 398, 43007f4964dSYang Liu rv_op_vle8_v = 399, 43107f4964dSYang Liu rv_op_vle16_v = 400, 43207f4964dSYang Liu rv_op_vle32_v = 401, 43307f4964dSYang Liu rv_op_vle64_v = 402, 43407f4964dSYang Liu rv_op_vse8_v = 403, 43507f4964dSYang Liu rv_op_vse16_v = 404, 43607f4964dSYang Liu rv_op_vse32_v = 405, 43707f4964dSYang Liu rv_op_vse64_v = 406, 43807f4964dSYang Liu rv_op_vlm_v = 407, 43907f4964dSYang Liu rv_op_vsm_v = 408, 44007f4964dSYang Liu rv_op_vlse8_v = 409, 44107f4964dSYang Liu rv_op_vlse16_v = 410, 44207f4964dSYang Liu rv_op_vlse32_v = 411, 44307f4964dSYang Liu rv_op_vlse64_v = 412, 44407f4964dSYang Liu rv_op_vsse8_v = 413, 44507f4964dSYang Liu rv_op_vsse16_v = 414, 44607f4964dSYang Liu rv_op_vsse32_v = 415, 44707f4964dSYang Liu rv_op_vsse64_v = 416, 44807f4964dSYang Liu rv_op_vluxei8_v = 417, 44907f4964dSYang Liu rv_op_vluxei16_v = 418, 45007f4964dSYang Liu rv_op_vluxei32_v = 419, 45107f4964dSYang Liu rv_op_vluxei64_v = 420, 45207f4964dSYang Liu rv_op_vloxei8_v = 421, 45307f4964dSYang Liu rv_op_vloxei16_v = 422, 45407f4964dSYang Liu rv_op_vloxei32_v = 423, 45507f4964dSYang Liu rv_op_vloxei64_v = 424, 45607f4964dSYang Liu rv_op_vsuxei8_v = 425, 45707f4964dSYang Liu rv_op_vsuxei16_v = 426, 45807f4964dSYang Liu rv_op_vsuxei32_v = 427, 45907f4964dSYang Liu rv_op_vsuxei64_v = 428, 46007f4964dSYang Liu rv_op_vsoxei8_v = 429, 46107f4964dSYang Liu rv_op_vsoxei16_v = 430, 46207f4964dSYang Liu rv_op_vsoxei32_v = 431, 46307f4964dSYang Liu rv_op_vsoxei64_v = 432, 46407f4964dSYang Liu rv_op_vle8ff_v = 433, 46507f4964dSYang Liu rv_op_vle16ff_v = 434, 46607f4964dSYang Liu rv_op_vle32ff_v = 435, 46707f4964dSYang Liu rv_op_vle64ff_v = 436, 46807f4964dSYang Liu rv_op_vl1re8_v = 437, 46907f4964dSYang Liu rv_op_vl1re16_v = 438, 47007f4964dSYang Liu rv_op_vl1re32_v = 439, 47107f4964dSYang Liu rv_op_vl1re64_v = 440, 47207f4964dSYang Liu rv_op_vl2re8_v = 441, 47307f4964dSYang Liu rv_op_vl2re16_v = 442, 47407f4964dSYang Liu rv_op_vl2re32_v = 443, 47507f4964dSYang Liu rv_op_vl2re64_v = 444, 47607f4964dSYang Liu rv_op_vl4re8_v = 445, 47707f4964dSYang Liu rv_op_vl4re16_v = 446, 47807f4964dSYang Liu rv_op_vl4re32_v = 447, 47907f4964dSYang Liu rv_op_vl4re64_v = 448, 48007f4964dSYang Liu rv_op_vl8re8_v = 449, 48107f4964dSYang Liu rv_op_vl8re16_v = 450, 48207f4964dSYang Liu rv_op_vl8re32_v = 451, 48307f4964dSYang Liu rv_op_vl8re64_v = 452, 48407f4964dSYang Liu rv_op_vs1r_v = 453, 48507f4964dSYang Liu rv_op_vs2r_v = 454, 48607f4964dSYang Liu rv_op_vs4r_v = 455, 48707f4964dSYang Liu rv_op_vs8r_v = 456, 48807f4964dSYang Liu rv_op_vadd_vv = 457, 48907f4964dSYang Liu rv_op_vadd_vx = 458, 49007f4964dSYang Liu rv_op_vadd_vi = 459, 49107f4964dSYang Liu rv_op_vsub_vv = 460, 49207f4964dSYang Liu rv_op_vsub_vx = 461, 49307f4964dSYang Liu rv_op_vrsub_vx = 462, 49407f4964dSYang Liu rv_op_vrsub_vi = 463, 49507f4964dSYang Liu rv_op_vwaddu_vv = 464, 49607f4964dSYang Liu rv_op_vwaddu_vx = 465, 49707f4964dSYang Liu rv_op_vwadd_vv = 466, 49807f4964dSYang Liu rv_op_vwadd_vx = 467, 49907f4964dSYang Liu rv_op_vwsubu_vv = 468, 50007f4964dSYang Liu rv_op_vwsubu_vx = 469, 50107f4964dSYang Liu rv_op_vwsub_vv = 470, 50207f4964dSYang Liu rv_op_vwsub_vx = 471, 50307f4964dSYang Liu rv_op_vwaddu_wv = 472, 50407f4964dSYang Liu rv_op_vwaddu_wx = 473, 50507f4964dSYang Liu rv_op_vwadd_wv = 474, 50607f4964dSYang Liu rv_op_vwadd_wx = 475, 50707f4964dSYang Liu rv_op_vwsubu_wv = 476, 50807f4964dSYang Liu rv_op_vwsubu_wx = 477, 50907f4964dSYang Liu rv_op_vwsub_wv = 478, 51007f4964dSYang Liu rv_op_vwsub_wx = 479, 51107f4964dSYang Liu rv_op_vadc_vvm = 480, 51207f4964dSYang Liu rv_op_vadc_vxm = 481, 51307f4964dSYang Liu rv_op_vadc_vim = 482, 51407f4964dSYang Liu rv_op_vmadc_vvm = 483, 51507f4964dSYang Liu rv_op_vmadc_vxm = 484, 51607f4964dSYang Liu rv_op_vmadc_vim = 485, 51707f4964dSYang Liu rv_op_vsbc_vvm = 486, 51807f4964dSYang Liu rv_op_vsbc_vxm = 487, 51907f4964dSYang Liu rv_op_vmsbc_vvm = 488, 52007f4964dSYang Liu rv_op_vmsbc_vxm = 489, 52107f4964dSYang Liu rv_op_vand_vv = 490, 52207f4964dSYang Liu rv_op_vand_vx = 491, 52307f4964dSYang Liu rv_op_vand_vi = 492, 52407f4964dSYang Liu rv_op_vor_vv = 493, 52507f4964dSYang Liu rv_op_vor_vx = 494, 52607f4964dSYang Liu rv_op_vor_vi = 495, 52707f4964dSYang Liu rv_op_vxor_vv = 496, 52807f4964dSYang Liu rv_op_vxor_vx = 497, 52907f4964dSYang Liu rv_op_vxor_vi = 498, 53007f4964dSYang Liu rv_op_vsll_vv = 499, 53107f4964dSYang Liu rv_op_vsll_vx = 500, 53207f4964dSYang Liu rv_op_vsll_vi = 501, 53307f4964dSYang Liu rv_op_vsrl_vv = 502, 53407f4964dSYang Liu rv_op_vsrl_vx = 503, 53507f4964dSYang Liu rv_op_vsrl_vi = 504, 53607f4964dSYang Liu rv_op_vsra_vv = 505, 53707f4964dSYang Liu rv_op_vsra_vx = 506, 53807f4964dSYang Liu rv_op_vsra_vi = 507, 53907f4964dSYang Liu rv_op_vnsrl_wv = 508, 54007f4964dSYang Liu rv_op_vnsrl_wx = 509, 54107f4964dSYang Liu rv_op_vnsrl_wi = 510, 54207f4964dSYang Liu rv_op_vnsra_wv = 511, 54307f4964dSYang Liu rv_op_vnsra_wx = 512, 54407f4964dSYang Liu rv_op_vnsra_wi = 513, 54507f4964dSYang Liu rv_op_vmseq_vv = 514, 54607f4964dSYang Liu rv_op_vmseq_vx = 515, 54707f4964dSYang Liu rv_op_vmseq_vi = 516, 54807f4964dSYang Liu rv_op_vmsne_vv = 517, 54907f4964dSYang Liu rv_op_vmsne_vx = 518, 55007f4964dSYang Liu rv_op_vmsne_vi = 519, 55107f4964dSYang Liu rv_op_vmsltu_vv = 520, 55207f4964dSYang Liu rv_op_vmsltu_vx = 521, 55307f4964dSYang Liu rv_op_vmslt_vv = 522, 55407f4964dSYang Liu rv_op_vmslt_vx = 523, 55507f4964dSYang Liu rv_op_vmsleu_vv = 524, 55607f4964dSYang Liu rv_op_vmsleu_vx = 525, 55707f4964dSYang Liu rv_op_vmsleu_vi = 526, 55807f4964dSYang Liu rv_op_vmsle_vv = 527, 55907f4964dSYang Liu rv_op_vmsle_vx = 528, 56007f4964dSYang Liu rv_op_vmsle_vi = 529, 56107f4964dSYang Liu rv_op_vmsgtu_vx = 530, 56207f4964dSYang Liu rv_op_vmsgtu_vi = 531, 56307f4964dSYang Liu rv_op_vmsgt_vx = 532, 56407f4964dSYang Liu rv_op_vmsgt_vi = 533, 56507f4964dSYang Liu rv_op_vminu_vv = 534, 56607f4964dSYang Liu rv_op_vminu_vx = 535, 56707f4964dSYang Liu rv_op_vmin_vv = 536, 56807f4964dSYang Liu rv_op_vmin_vx = 537, 56907f4964dSYang Liu rv_op_vmaxu_vv = 538, 57007f4964dSYang Liu rv_op_vmaxu_vx = 539, 57107f4964dSYang Liu rv_op_vmax_vv = 540, 57207f4964dSYang Liu rv_op_vmax_vx = 541, 57307f4964dSYang Liu rv_op_vmul_vv = 542, 57407f4964dSYang Liu rv_op_vmul_vx = 543, 57507f4964dSYang Liu rv_op_vmulh_vv = 544, 57607f4964dSYang Liu rv_op_vmulh_vx = 545, 57707f4964dSYang Liu rv_op_vmulhu_vv = 546, 57807f4964dSYang Liu rv_op_vmulhu_vx = 547, 57907f4964dSYang Liu rv_op_vmulhsu_vv = 548, 58007f4964dSYang Liu rv_op_vmulhsu_vx = 549, 58107f4964dSYang Liu rv_op_vdivu_vv = 550, 58207f4964dSYang Liu rv_op_vdivu_vx = 551, 58307f4964dSYang Liu rv_op_vdiv_vv = 552, 58407f4964dSYang Liu rv_op_vdiv_vx = 553, 58507f4964dSYang Liu rv_op_vremu_vv = 554, 58607f4964dSYang Liu rv_op_vremu_vx = 555, 58707f4964dSYang Liu rv_op_vrem_vv = 556, 58807f4964dSYang Liu rv_op_vrem_vx = 557, 58907f4964dSYang Liu rv_op_vwmulu_vv = 558, 59007f4964dSYang Liu rv_op_vwmulu_vx = 559, 59107f4964dSYang Liu rv_op_vwmulsu_vv = 560, 59207f4964dSYang Liu rv_op_vwmulsu_vx = 561, 59307f4964dSYang Liu rv_op_vwmul_vv = 562, 59407f4964dSYang Liu rv_op_vwmul_vx = 563, 59507f4964dSYang Liu rv_op_vmacc_vv = 564, 59607f4964dSYang Liu rv_op_vmacc_vx = 565, 59707f4964dSYang Liu rv_op_vnmsac_vv = 566, 59807f4964dSYang Liu rv_op_vnmsac_vx = 567, 59907f4964dSYang Liu rv_op_vmadd_vv = 568, 60007f4964dSYang Liu rv_op_vmadd_vx = 569, 60107f4964dSYang Liu rv_op_vnmsub_vv = 570, 60207f4964dSYang Liu rv_op_vnmsub_vx = 571, 60307f4964dSYang Liu rv_op_vwmaccu_vv = 572, 60407f4964dSYang Liu rv_op_vwmaccu_vx = 573, 60507f4964dSYang Liu rv_op_vwmacc_vv = 574, 60607f4964dSYang Liu rv_op_vwmacc_vx = 575, 60707f4964dSYang Liu rv_op_vwmaccsu_vv = 576, 60807f4964dSYang Liu rv_op_vwmaccsu_vx = 577, 60907f4964dSYang Liu rv_op_vwmaccus_vx = 578, 61007f4964dSYang Liu rv_op_vmv_v_v = 579, 61107f4964dSYang Liu rv_op_vmv_v_x = 580, 61207f4964dSYang Liu rv_op_vmv_v_i = 581, 61307f4964dSYang Liu rv_op_vmerge_vvm = 582, 61407f4964dSYang Liu rv_op_vmerge_vxm = 583, 61507f4964dSYang Liu rv_op_vmerge_vim = 584, 61607f4964dSYang Liu rv_op_vsaddu_vv = 585, 61707f4964dSYang Liu rv_op_vsaddu_vx = 586, 61807f4964dSYang Liu rv_op_vsaddu_vi = 587, 61907f4964dSYang Liu rv_op_vsadd_vv = 588, 62007f4964dSYang Liu rv_op_vsadd_vx = 589, 62107f4964dSYang Liu rv_op_vsadd_vi = 590, 62207f4964dSYang Liu rv_op_vssubu_vv = 591, 62307f4964dSYang Liu rv_op_vssubu_vx = 592, 62407f4964dSYang Liu rv_op_vssub_vv = 593, 62507f4964dSYang Liu rv_op_vssub_vx = 594, 62607f4964dSYang Liu rv_op_vaadd_vv = 595, 62707f4964dSYang Liu rv_op_vaadd_vx = 596, 62807f4964dSYang Liu rv_op_vaaddu_vv = 597, 62907f4964dSYang Liu rv_op_vaaddu_vx = 598, 63007f4964dSYang Liu rv_op_vasub_vv = 599, 63107f4964dSYang Liu rv_op_vasub_vx = 600, 63207f4964dSYang Liu rv_op_vasubu_vv = 601, 63307f4964dSYang Liu rv_op_vasubu_vx = 602, 63407f4964dSYang Liu rv_op_vsmul_vv = 603, 63507f4964dSYang Liu rv_op_vsmul_vx = 604, 63607f4964dSYang Liu rv_op_vssrl_vv = 605, 63707f4964dSYang Liu rv_op_vssrl_vx = 606, 63807f4964dSYang Liu rv_op_vssrl_vi = 607, 63907f4964dSYang Liu rv_op_vssra_vv = 608, 64007f4964dSYang Liu rv_op_vssra_vx = 609, 64107f4964dSYang Liu rv_op_vssra_vi = 610, 64207f4964dSYang Liu rv_op_vnclipu_wv = 611, 64307f4964dSYang Liu rv_op_vnclipu_wx = 612, 64407f4964dSYang Liu rv_op_vnclipu_wi = 613, 64507f4964dSYang Liu rv_op_vnclip_wv = 614, 64607f4964dSYang Liu rv_op_vnclip_wx = 615, 64707f4964dSYang Liu rv_op_vnclip_wi = 616, 64807f4964dSYang Liu rv_op_vfadd_vv = 617, 64907f4964dSYang Liu rv_op_vfadd_vf = 618, 65007f4964dSYang Liu rv_op_vfsub_vv = 619, 65107f4964dSYang Liu rv_op_vfsub_vf = 620, 65207f4964dSYang Liu rv_op_vfrsub_vf = 621, 65307f4964dSYang Liu rv_op_vfwadd_vv = 622, 65407f4964dSYang Liu rv_op_vfwadd_vf = 623, 65507f4964dSYang Liu rv_op_vfwadd_wv = 624, 65607f4964dSYang Liu rv_op_vfwadd_wf = 625, 65707f4964dSYang Liu rv_op_vfwsub_vv = 626, 65807f4964dSYang Liu rv_op_vfwsub_vf = 627, 65907f4964dSYang Liu rv_op_vfwsub_wv = 628, 66007f4964dSYang Liu rv_op_vfwsub_wf = 629, 66107f4964dSYang Liu rv_op_vfmul_vv = 630, 66207f4964dSYang Liu rv_op_vfmul_vf = 631, 66307f4964dSYang Liu rv_op_vfdiv_vv = 632, 66407f4964dSYang Liu rv_op_vfdiv_vf = 633, 66507f4964dSYang Liu rv_op_vfrdiv_vf = 634, 66607f4964dSYang Liu rv_op_vfwmul_vv = 635, 66707f4964dSYang Liu rv_op_vfwmul_vf = 636, 66807f4964dSYang Liu rv_op_vfmacc_vv = 637, 66907f4964dSYang Liu rv_op_vfmacc_vf = 638, 67007f4964dSYang Liu rv_op_vfnmacc_vv = 639, 67107f4964dSYang Liu rv_op_vfnmacc_vf = 640, 67207f4964dSYang Liu rv_op_vfmsac_vv = 641, 67307f4964dSYang Liu rv_op_vfmsac_vf = 642, 67407f4964dSYang Liu rv_op_vfnmsac_vv = 643, 67507f4964dSYang Liu rv_op_vfnmsac_vf = 644, 67607f4964dSYang Liu rv_op_vfmadd_vv = 645, 67707f4964dSYang Liu rv_op_vfmadd_vf = 646, 67807f4964dSYang Liu rv_op_vfnmadd_vv = 647, 67907f4964dSYang Liu rv_op_vfnmadd_vf = 648, 68007f4964dSYang Liu rv_op_vfmsub_vv = 649, 68107f4964dSYang Liu rv_op_vfmsub_vf = 650, 68207f4964dSYang Liu rv_op_vfnmsub_vv = 651, 68307f4964dSYang Liu rv_op_vfnmsub_vf = 652, 68407f4964dSYang Liu rv_op_vfwmacc_vv = 653, 68507f4964dSYang Liu rv_op_vfwmacc_vf = 654, 68607f4964dSYang Liu rv_op_vfwnmacc_vv = 655, 68707f4964dSYang Liu rv_op_vfwnmacc_vf = 656, 68807f4964dSYang Liu rv_op_vfwmsac_vv = 657, 68907f4964dSYang Liu rv_op_vfwmsac_vf = 658, 69007f4964dSYang Liu rv_op_vfwnmsac_vv = 659, 69107f4964dSYang Liu rv_op_vfwnmsac_vf = 660, 69207f4964dSYang Liu rv_op_vfsqrt_v = 661, 69307f4964dSYang Liu rv_op_vfrsqrt7_v = 662, 69407f4964dSYang Liu rv_op_vfrec7_v = 663, 69507f4964dSYang Liu rv_op_vfmin_vv = 664, 69607f4964dSYang Liu rv_op_vfmin_vf = 665, 69707f4964dSYang Liu rv_op_vfmax_vv = 666, 69807f4964dSYang Liu rv_op_vfmax_vf = 667, 69907f4964dSYang Liu rv_op_vfsgnj_vv = 668, 70007f4964dSYang Liu rv_op_vfsgnj_vf = 669, 70107f4964dSYang Liu rv_op_vfsgnjn_vv = 670, 70207f4964dSYang Liu rv_op_vfsgnjn_vf = 671, 70307f4964dSYang Liu rv_op_vfsgnjx_vv = 672, 70407f4964dSYang Liu rv_op_vfsgnjx_vf = 673, 70507f4964dSYang Liu rv_op_vfslide1up_vf = 674, 70607f4964dSYang Liu rv_op_vfslide1down_vf = 675, 70707f4964dSYang Liu rv_op_vmfeq_vv = 676, 70807f4964dSYang Liu rv_op_vmfeq_vf = 677, 70907f4964dSYang Liu rv_op_vmfne_vv = 678, 71007f4964dSYang Liu rv_op_vmfne_vf = 679, 71107f4964dSYang Liu rv_op_vmflt_vv = 680, 71207f4964dSYang Liu rv_op_vmflt_vf = 681, 71307f4964dSYang Liu rv_op_vmfle_vv = 682, 71407f4964dSYang Liu rv_op_vmfle_vf = 683, 71507f4964dSYang Liu rv_op_vmfgt_vf = 684, 71607f4964dSYang Liu rv_op_vmfge_vf = 685, 71707f4964dSYang Liu rv_op_vfclass_v = 686, 71807f4964dSYang Liu rv_op_vfmerge_vfm = 687, 71907f4964dSYang Liu rv_op_vfmv_v_f = 688, 72007f4964dSYang Liu rv_op_vfcvt_xu_f_v = 689, 72107f4964dSYang Liu rv_op_vfcvt_x_f_v = 690, 72207f4964dSYang Liu rv_op_vfcvt_f_xu_v = 691, 72307f4964dSYang Liu rv_op_vfcvt_f_x_v = 692, 72407f4964dSYang Liu rv_op_vfcvt_rtz_xu_f_v = 693, 72507f4964dSYang Liu rv_op_vfcvt_rtz_x_f_v = 694, 72607f4964dSYang Liu rv_op_vfwcvt_xu_f_v = 695, 72707f4964dSYang Liu rv_op_vfwcvt_x_f_v = 696, 72807f4964dSYang Liu rv_op_vfwcvt_f_xu_v = 697, 72907f4964dSYang Liu rv_op_vfwcvt_f_x_v = 698, 73007f4964dSYang Liu rv_op_vfwcvt_f_f_v = 699, 73107f4964dSYang Liu rv_op_vfwcvt_rtz_xu_f_v = 700, 73207f4964dSYang Liu rv_op_vfwcvt_rtz_x_f_v = 701, 73307f4964dSYang Liu rv_op_vfncvt_xu_f_w = 702, 73407f4964dSYang Liu rv_op_vfncvt_x_f_w = 703, 73507f4964dSYang Liu rv_op_vfncvt_f_xu_w = 704, 73607f4964dSYang Liu rv_op_vfncvt_f_x_w = 705, 73707f4964dSYang Liu rv_op_vfncvt_f_f_w = 706, 73807f4964dSYang Liu rv_op_vfncvt_rod_f_f_w = 707, 73907f4964dSYang Liu rv_op_vfncvt_rtz_xu_f_w = 708, 74007f4964dSYang Liu rv_op_vfncvt_rtz_x_f_w = 709, 74107f4964dSYang Liu rv_op_vredsum_vs = 710, 74207f4964dSYang Liu rv_op_vredand_vs = 711, 74307f4964dSYang Liu rv_op_vredor_vs = 712, 74407f4964dSYang Liu rv_op_vredxor_vs = 713, 74507f4964dSYang Liu rv_op_vredminu_vs = 714, 74607f4964dSYang Liu rv_op_vredmin_vs = 715, 74707f4964dSYang Liu rv_op_vredmaxu_vs = 716, 74807f4964dSYang Liu rv_op_vredmax_vs = 717, 74907f4964dSYang Liu rv_op_vwredsumu_vs = 718, 75007f4964dSYang Liu rv_op_vwredsum_vs = 719, 75107f4964dSYang Liu rv_op_vfredusum_vs = 720, 75207f4964dSYang Liu rv_op_vfredosum_vs = 721, 75307f4964dSYang Liu rv_op_vfredmin_vs = 722, 75407f4964dSYang Liu rv_op_vfredmax_vs = 723, 75507f4964dSYang Liu rv_op_vfwredusum_vs = 724, 75607f4964dSYang Liu rv_op_vfwredosum_vs = 725, 75707f4964dSYang Liu rv_op_vmand_mm = 726, 75807f4964dSYang Liu rv_op_vmnand_mm = 727, 75907f4964dSYang Liu rv_op_vmandn_mm = 728, 76007f4964dSYang Liu rv_op_vmxor_mm = 729, 76107f4964dSYang Liu rv_op_vmor_mm = 730, 76207f4964dSYang Liu rv_op_vmnor_mm = 731, 76307f4964dSYang Liu rv_op_vmorn_mm = 732, 76407f4964dSYang Liu rv_op_vmxnor_mm = 733, 76507f4964dSYang Liu rv_op_vcpop_m = 734, 76607f4964dSYang Liu rv_op_vfirst_m = 735, 76707f4964dSYang Liu rv_op_vmsbf_m = 736, 76807f4964dSYang Liu rv_op_vmsif_m = 737, 76907f4964dSYang Liu rv_op_vmsof_m = 738, 77007f4964dSYang Liu rv_op_viota_m = 739, 77107f4964dSYang Liu rv_op_vid_v = 740, 77207f4964dSYang Liu rv_op_vmv_x_s = 741, 77307f4964dSYang Liu rv_op_vmv_s_x = 742, 77407f4964dSYang Liu rv_op_vfmv_f_s = 743, 77507f4964dSYang Liu rv_op_vfmv_s_f = 744, 77607f4964dSYang Liu rv_op_vslideup_vx = 745, 77707f4964dSYang Liu rv_op_vslideup_vi = 746, 77807f4964dSYang Liu rv_op_vslide1up_vx = 747, 77907f4964dSYang Liu rv_op_vslidedown_vx = 748, 78007f4964dSYang Liu rv_op_vslidedown_vi = 749, 78107f4964dSYang Liu rv_op_vslide1down_vx = 750, 78207f4964dSYang Liu rv_op_vrgather_vv = 751, 78307f4964dSYang Liu rv_op_vrgatherei16_vv = 752, 78407f4964dSYang Liu rv_op_vrgather_vx = 753, 78507f4964dSYang Liu rv_op_vrgather_vi = 754, 78607f4964dSYang Liu rv_op_vcompress_vm = 755, 78707f4964dSYang Liu rv_op_vmv1r_v = 756, 78807f4964dSYang Liu rv_op_vmv2r_v = 757, 78907f4964dSYang Liu rv_op_vmv4r_v = 758, 79007f4964dSYang Liu rv_op_vmv8r_v = 759, 79107f4964dSYang Liu rv_op_vzext_vf2 = 760, 79207f4964dSYang Liu rv_op_vzext_vf4 = 761, 79307f4964dSYang Liu rv_op_vzext_vf8 = 762, 79407f4964dSYang Liu rv_op_vsext_vf2 = 763, 79507f4964dSYang Liu rv_op_vsext_vf4 = 764, 79607f4964dSYang Liu rv_op_vsext_vf8 = 765, 79707f4964dSYang Liu rv_op_vsetvli = 766, 79807f4964dSYang Liu rv_op_vsetivli = 767, 79907f4964dSYang Liu rv_op_vsetvl = 768, 8002c71d02eSWeiwei Li rv_op_c_zext_b = 769, 8012c71d02eSWeiwei Li rv_op_c_sext_b = 770, 8022c71d02eSWeiwei Li rv_op_c_zext_h = 771, 8032c71d02eSWeiwei Li rv_op_c_sext_h = 772, 8042c71d02eSWeiwei Li rv_op_c_zext_w = 773, 8052c71d02eSWeiwei Li rv_op_c_not = 774, 8062c71d02eSWeiwei Li rv_op_c_mul = 775, 8072c71d02eSWeiwei Li rv_op_c_lbu = 776, 8082c71d02eSWeiwei Li rv_op_c_lhu = 777, 8092c71d02eSWeiwei Li rv_op_c_lh = 778, 8102c71d02eSWeiwei Li rv_op_c_sb = 779, 8112c71d02eSWeiwei Li rv_op_c_sh = 780, 8122c71d02eSWeiwei Li rv_op_cm_push = 781, 8132c71d02eSWeiwei Li rv_op_cm_pop = 782, 8142c71d02eSWeiwei Li rv_op_cm_popret = 783, 8152c71d02eSWeiwei Li rv_op_cm_popretz = 784, 8162c71d02eSWeiwei Li rv_op_cm_mva01s = 785, 8172c71d02eSWeiwei Li rv_op_cm_mvsa01 = 786, 8182c71d02eSWeiwei Li rv_op_cm_jt = 787, 8192c71d02eSWeiwei Li rv_op_cm_jalt = 788, 820d397be9aSRichard Henderson rv_op_czero_eqz = 789, 821d397be9aSRichard Henderson rv_op_czero_nez = 790, 822ea103259SMichael Clark } rv_op; 823ea103259SMichael Clark 824ea103259SMichael Clark /* register names */ 825ea103259SMichael Clark 826ea103259SMichael Clark static const char rv_ireg_name_sym[32][5] = { 827ea103259SMichael Clark "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", 828ea103259SMichael Clark "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", 829ea103259SMichael Clark "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", 830ea103259SMichael Clark "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6", 831ea103259SMichael Clark }; 832ea103259SMichael Clark 833ea103259SMichael Clark static const char rv_freg_name_sym[32][5] = { 834ea103259SMichael Clark "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", 835ea103259SMichael Clark "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", 836ea103259SMichael Clark "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", 837ea103259SMichael Clark "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11", 838ea103259SMichael Clark }; 839ea103259SMichael Clark 84007f4964dSYang Liu static const char rv_vreg_name_sym[32][4] = { 84107f4964dSYang Liu "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 84207f4964dSYang Liu "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 84307f4964dSYang Liu "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 84407f4964dSYang Liu "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31" 84507f4964dSYang Liu }; 84607f4964dSYang Liu 847ea103259SMichael Clark /* pseudo-instruction constraints */ 848ea103259SMichael Clark 849ea103259SMichael Clark static const rvc_constraint rvcc_jal[] = { rvc_rd_eq_ra, rvc_end }; 85098624d13SWeiwei Li static const rvc_constraint rvcc_jalr[] = { rvc_rd_eq_ra, rvc_imm_eq_zero, 85198624d13SWeiwei Li rvc_end }; 85298624d13SWeiwei Li static const rvc_constraint rvcc_nop[] = { rvc_rd_eq_x0, rvc_rs1_eq_x0, 85398624d13SWeiwei Li rvc_imm_eq_zero, rvc_end }; 854ea103259SMichael Clark static const rvc_constraint rvcc_mv[] = { rvc_imm_eq_zero, rvc_end }; 855ea103259SMichael Clark static const rvc_constraint rvcc_not[] = { rvc_imm_eq_n1, rvc_end }; 856ea103259SMichael Clark static const rvc_constraint rvcc_neg[] = { rvc_rs1_eq_x0, rvc_end }; 857ea103259SMichael Clark static const rvc_constraint rvcc_negw[] = { rvc_rs1_eq_x0, rvc_end }; 85833b4f859SMichael Clark static const rvc_constraint rvcc_sext_w[] = { rvc_imm_eq_zero, rvc_end }; 859ea103259SMichael Clark static const rvc_constraint rvcc_seqz[] = { rvc_imm_eq_p1, rvc_end }; 860ea103259SMichael Clark static const rvc_constraint rvcc_snez[] = { rvc_rs1_eq_x0, rvc_end }; 861ea103259SMichael Clark static const rvc_constraint rvcc_sltz[] = { rvc_rs2_eq_x0, rvc_end }; 862ea103259SMichael Clark static const rvc_constraint rvcc_sgtz[] = { rvc_rs1_eq_x0, rvc_end }; 863ea103259SMichael Clark static const rvc_constraint rvcc_fmv_s[] = { rvc_rs2_eq_rs1, rvc_end }; 864ea103259SMichael Clark static const rvc_constraint rvcc_fabs_s[] = { rvc_rs2_eq_rs1, rvc_end }; 865ea103259SMichael Clark static const rvc_constraint rvcc_fneg_s[] = { rvc_rs2_eq_rs1, rvc_end }; 866ea103259SMichael Clark static const rvc_constraint rvcc_fmv_d[] = { rvc_rs2_eq_rs1, rvc_end }; 867ea103259SMichael Clark static const rvc_constraint rvcc_fabs_d[] = { rvc_rs2_eq_rs1, rvc_end }; 868ea103259SMichael Clark static const rvc_constraint rvcc_fneg_d[] = { rvc_rs2_eq_rs1, rvc_end }; 869ea103259SMichael Clark static const rvc_constraint rvcc_fmv_q[] = { rvc_rs2_eq_rs1, rvc_end }; 870ea103259SMichael Clark static const rvc_constraint rvcc_fabs_q[] = { rvc_rs2_eq_rs1, rvc_end }; 871ea103259SMichael Clark static const rvc_constraint rvcc_fneg_q[] = { rvc_rs2_eq_rs1, rvc_end }; 872ea103259SMichael Clark static const rvc_constraint rvcc_beqz[] = { rvc_rs2_eq_x0, rvc_end }; 873ea103259SMichael Clark static const rvc_constraint rvcc_bnez[] = { rvc_rs2_eq_x0, rvc_end }; 874ea103259SMichael Clark static const rvc_constraint rvcc_blez[] = { rvc_rs1_eq_x0, rvc_end }; 875ea103259SMichael Clark static const rvc_constraint rvcc_bgez[] = { rvc_rs2_eq_x0, rvc_end }; 876ea103259SMichael Clark static const rvc_constraint rvcc_bltz[] = { rvc_rs2_eq_x0, rvc_end }; 877ea103259SMichael Clark static const rvc_constraint rvcc_bgtz[] = { rvc_rs1_eq_x0, rvc_end }; 878ea103259SMichael Clark static const rvc_constraint rvcc_ble[] = { rvc_end }; 879ea103259SMichael Clark static const rvc_constraint rvcc_bleu[] = { rvc_end }; 880ea103259SMichael Clark static const rvc_constraint rvcc_bgt[] = { rvc_end }; 881ea103259SMichael Clark static const rvc_constraint rvcc_bgtu[] = { rvc_end }; 882ea103259SMichael Clark static const rvc_constraint rvcc_j[] = { rvc_rd_eq_x0, rvc_end }; 88398624d13SWeiwei Li static const rvc_constraint rvcc_ret[] = { rvc_rd_eq_x0, rvc_rs1_eq_ra, 88498624d13SWeiwei Li rvc_end }; 88598624d13SWeiwei Li static const rvc_constraint rvcc_jr[] = { rvc_rd_eq_x0, rvc_imm_eq_zero, 88698624d13SWeiwei Li rvc_end }; 88798624d13SWeiwei Li static const rvc_constraint rvcc_rdcycle[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc00, 88898624d13SWeiwei Li rvc_end }; 88998624d13SWeiwei Li static const rvc_constraint rvcc_rdtime[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc01, 89098624d13SWeiwei Li rvc_end }; 89198624d13SWeiwei Li static const rvc_constraint rvcc_rdinstret[] = { rvc_rs1_eq_x0, 89298624d13SWeiwei Li rvc_csr_eq_0xc02, rvc_end }; 89398624d13SWeiwei Li static const rvc_constraint rvcc_rdcycleh[] = { rvc_rs1_eq_x0, 89498624d13SWeiwei Li rvc_csr_eq_0xc80, rvc_end }; 89598624d13SWeiwei Li static const rvc_constraint rvcc_rdtimeh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc81, 89698624d13SWeiwei Li rvc_end }; 8972e3df911SWladimir J. van der Laan static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0, 8982e3df911SWladimir J. van der Laan rvc_csr_eq_0xc82, rvc_end }; 89998624d13SWeiwei Li static const rvc_constraint rvcc_frcsr[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x003, 90098624d13SWeiwei Li rvc_end }; 90198624d13SWeiwei Li static const rvc_constraint rvcc_frrm[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x002, 90298624d13SWeiwei Li rvc_end }; 90398624d13SWeiwei Li static const rvc_constraint rvcc_frflags[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x001, 90498624d13SWeiwei Li rvc_end }; 905ea103259SMichael Clark static const rvc_constraint rvcc_fscsr[] = { rvc_csr_eq_0x003, rvc_end }; 906ea103259SMichael Clark static const rvc_constraint rvcc_fsrm[] = { rvc_csr_eq_0x002, rvc_end }; 907ea103259SMichael Clark static const rvc_constraint rvcc_fsflags[] = { rvc_csr_eq_0x001, rvc_end }; 908ea103259SMichael Clark static const rvc_constraint rvcc_fsrmi[] = { rvc_csr_eq_0x002, rvc_end }; 909ea103259SMichael Clark static const rvc_constraint rvcc_fsflagsi[] = { rvc_csr_eq_0x001, rvc_end }; 910ea103259SMichael Clark 911ea103259SMichael Clark /* pseudo-instruction metadata */ 912ea103259SMichael Clark 913ea103259SMichael Clark static const rv_comp_data rvcp_jal[] = { 914ea103259SMichael Clark { rv_op_j, rvcc_j }, 915ea103259SMichael Clark { rv_op_jal, rvcc_jal }, 916ea103259SMichael Clark { rv_op_illegal, NULL } 917ea103259SMichael Clark }; 918ea103259SMichael Clark 919ea103259SMichael Clark static const rv_comp_data rvcp_jalr[] = { 920ea103259SMichael Clark { rv_op_ret, rvcc_ret }, 921ea103259SMichael Clark { rv_op_jr, rvcc_jr }, 922ea103259SMichael Clark { rv_op_jalr, rvcc_jalr }, 923ea103259SMichael Clark { rv_op_illegal, NULL } 924ea103259SMichael Clark }; 925ea103259SMichael Clark 926ea103259SMichael Clark static const rv_comp_data rvcp_beq[] = { 927ea103259SMichael Clark { rv_op_beqz, rvcc_beqz }, 928ea103259SMichael Clark { rv_op_illegal, NULL } 929ea103259SMichael Clark }; 930ea103259SMichael Clark 931ea103259SMichael Clark static const rv_comp_data rvcp_bne[] = { 932ea103259SMichael Clark { rv_op_bnez, rvcc_bnez }, 933ea103259SMichael Clark { rv_op_illegal, NULL } 934ea103259SMichael Clark }; 935ea103259SMichael Clark 936ea103259SMichael Clark static const rv_comp_data rvcp_blt[] = { 937ea103259SMichael Clark { rv_op_bltz, rvcc_bltz }, 938ea103259SMichael Clark { rv_op_bgtz, rvcc_bgtz }, 939ea103259SMichael Clark { rv_op_bgt, rvcc_bgt }, 940ea103259SMichael Clark { rv_op_illegal, NULL } 941ea103259SMichael Clark }; 942ea103259SMichael Clark 943ea103259SMichael Clark static const rv_comp_data rvcp_bge[] = { 944ea103259SMichael Clark { rv_op_blez, rvcc_blez }, 945ea103259SMichael Clark { rv_op_bgez, rvcc_bgez }, 946ea103259SMichael Clark { rv_op_ble, rvcc_ble }, 947ea103259SMichael Clark { rv_op_illegal, NULL } 948ea103259SMichael Clark }; 949ea103259SMichael Clark 950ea103259SMichael Clark static const rv_comp_data rvcp_bltu[] = { 951ea103259SMichael Clark { rv_op_bgtu, rvcc_bgtu }, 952ea103259SMichael Clark { rv_op_illegal, NULL } 953ea103259SMichael Clark }; 954ea103259SMichael Clark 955ea103259SMichael Clark static const rv_comp_data rvcp_bgeu[] = { 956ea103259SMichael Clark { rv_op_bleu, rvcc_bleu }, 957ea103259SMichael Clark { rv_op_illegal, NULL } 958ea103259SMichael Clark }; 959ea103259SMichael Clark 960ea103259SMichael Clark static const rv_comp_data rvcp_addi[] = { 961ea103259SMichael Clark { rv_op_nop, rvcc_nop }, 962ea103259SMichael Clark { rv_op_mv, rvcc_mv }, 963ea103259SMichael Clark { rv_op_illegal, NULL } 964ea103259SMichael Clark }; 965ea103259SMichael Clark 966ea103259SMichael Clark static const rv_comp_data rvcp_sltiu[] = { 967ea103259SMichael Clark { rv_op_seqz, rvcc_seqz }, 968ea103259SMichael Clark { rv_op_illegal, NULL } 969ea103259SMichael Clark }; 970ea103259SMichael Clark 971ea103259SMichael Clark static const rv_comp_data rvcp_xori[] = { 972ea103259SMichael Clark { rv_op_not, rvcc_not }, 973ea103259SMichael Clark { rv_op_illegal, NULL } 974ea103259SMichael Clark }; 975ea103259SMichael Clark 976ea103259SMichael Clark static const rv_comp_data rvcp_sub[] = { 977ea103259SMichael Clark { rv_op_neg, rvcc_neg }, 978ea103259SMichael Clark { rv_op_illegal, NULL } 979ea103259SMichael Clark }; 980ea103259SMichael Clark 981ea103259SMichael Clark static const rv_comp_data rvcp_slt[] = { 982ea103259SMichael Clark { rv_op_sltz, rvcc_sltz }, 983ea103259SMichael Clark { rv_op_sgtz, rvcc_sgtz }, 984ea103259SMichael Clark { rv_op_illegal, NULL } 985ea103259SMichael Clark }; 986ea103259SMichael Clark 987ea103259SMichael Clark static const rv_comp_data rvcp_sltu[] = { 988ea103259SMichael Clark { rv_op_snez, rvcc_snez }, 989ea103259SMichael Clark { rv_op_illegal, NULL } 990ea103259SMichael Clark }; 991ea103259SMichael Clark 992ea103259SMichael Clark static const rv_comp_data rvcp_addiw[] = { 993ea103259SMichael Clark { rv_op_sext_w, rvcc_sext_w }, 994ea103259SMichael Clark { rv_op_illegal, NULL } 995ea103259SMichael Clark }; 996ea103259SMichael Clark 997ea103259SMichael Clark static const rv_comp_data rvcp_subw[] = { 998ea103259SMichael Clark { rv_op_negw, rvcc_negw }, 999ea103259SMichael Clark { rv_op_illegal, NULL } 1000ea103259SMichael Clark }; 1001ea103259SMichael Clark 1002ea103259SMichael Clark static const rv_comp_data rvcp_csrrw[] = { 1003ea103259SMichael Clark { rv_op_fscsr, rvcc_fscsr }, 1004ea103259SMichael Clark { rv_op_fsrm, rvcc_fsrm }, 1005ea103259SMichael Clark { rv_op_fsflags, rvcc_fsflags }, 1006ea103259SMichael Clark { rv_op_illegal, NULL } 1007ea103259SMichael Clark }; 1008ea103259SMichael Clark 10095748c886SWeiwei Li 1010ea103259SMichael Clark static const rv_comp_data rvcp_csrrs[] = { 1011ea103259SMichael Clark { rv_op_rdcycle, rvcc_rdcycle }, 1012ea103259SMichael Clark { rv_op_rdtime, rvcc_rdtime }, 1013ea103259SMichael Clark { rv_op_rdinstret, rvcc_rdinstret }, 1014ea103259SMichael Clark { rv_op_rdcycleh, rvcc_rdcycleh }, 1015ea103259SMichael Clark { rv_op_rdtimeh, rvcc_rdtimeh }, 1016ea103259SMichael Clark { rv_op_rdinstreth, rvcc_rdinstreth }, 1017ea103259SMichael Clark { rv_op_frcsr, rvcc_frcsr }, 1018ea103259SMichael Clark { rv_op_frrm, rvcc_frrm }, 1019ea103259SMichael Clark { rv_op_frflags, rvcc_frflags }, 1020ea103259SMichael Clark { rv_op_illegal, NULL } 1021ea103259SMichael Clark }; 1022ea103259SMichael Clark 1023ea103259SMichael Clark static const rv_comp_data rvcp_csrrwi[] = { 1024ea103259SMichael Clark { rv_op_fsrmi, rvcc_fsrmi }, 1025ea103259SMichael Clark { rv_op_fsflagsi, rvcc_fsflagsi }, 1026ea103259SMichael Clark { rv_op_illegal, NULL } 1027ea103259SMichael Clark }; 1028ea103259SMichael Clark 1029ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_s[] = { 1030ea103259SMichael Clark { rv_op_fmv_s, rvcc_fmv_s }, 1031ea103259SMichael Clark { rv_op_illegal, NULL } 1032ea103259SMichael Clark }; 1033ea103259SMichael Clark 1034ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_s[] = { 1035ea103259SMichael Clark { rv_op_fneg_s, rvcc_fneg_s }, 1036ea103259SMichael Clark { rv_op_illegal, NULL } 1037ea103259SMichael Clark }; 1038ea103259SMichael Clark 1039ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_s[] = { 1040ea103259SMichael Clark { rv_op_fabs_s, rvcc_fabs_s }, 1041ea103259SMichael Clark { rv_op_illegal, NULL } 1042ea103259SMichael Clark }; 1043ea103259SMichael Clark 1044ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_d[] = { 1045ea103259SMichael Clark { rv_op_fmv_d, rvcc_fmv_d }, 1046ea103259SMichael Clark { rv_op_illegal, NULL } 1047ea103259SMichael Clark }; 1048ea103259SMichael Clark 1049ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_d[] = { 1050ea103259SMichael Clark { rv_op_fneg_d, rvcc_fneg_d }, 1051ea103259SMichael Clark { rv_op_illegal, NULL } 1052ea103259SMichael Clark }; 1053ea103259SMichael Clark 1054ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_d[] = { 1055ea103259SMichael Clark { rv_op_fabs_d, rvcc_fabs_d }, 1056ea103259SMichael Clark { rv_op_illegal, NULL } 1057ea103259SMichael Clark }; 1058ea103259SMichael Clark 1059ea103259SMichael Clark static const rv_comp_data rvcp_fsgnj_q[] = { 1060ea103259SMichael Clark { rv_op_fmv_q, rvcc_fmv_q }, 1061ea103259SMichael Clark { rv_op_illegal, NULL } 1062ea103259SMichael Clark }; 1063ea103259SMichael Clark 1064ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjn_q[] = { 1065ea103259SMichael Clark { rv_op_fneg_q, rvcc_fneg_q }, 1066ea103259SMichael Clark { rv_op_illegal, NULL } 1067ea103259SMichael Clark }; 1068ea103259SMichael Clark 1069ea103259SMichael Clark static const rv_comp_data rvcp_fsgnjx_q[] = { 1070ea103259SMichael Clark { rv_op_fabs_q, rvcc_fabs_q }, 1071ea103259SMichael Clark { rv_op_illegal, NULL } 1072ea103259SMichael Clark }; 1073ea103259SMichael Clark 1074ea103259SMichael Clark /* instruction metadata */ 1075ea103259SMichael Clark 1076fd7c64f6SChristoph Müllner const rv_opcode_data rvi_opcode_data[] = { 1077ea103259SMichael Clark { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, 1078ea103259SMichael Clark { "lui", rv_codec_u, rv_fmt_rd_imm, NULL, 0, 0, 0 }, 1079ea103259SMichael Clark { "auipc", rv_codec_u, rv_fmt_rd_offset, NULL, 0, 0, 0 }, 1080ea103259SMichael Clark { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal, 0, 0, 0 }, 1081ea103259SMichael Clark { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr, 0, 0, 0 }, 1082ea103259SMichael Clark { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq, 0, 0, 0 }, 1083ea103259SMichael Clark { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne, 0, 0, 0 }, 1084ea103259SMichael Clark { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt, 0, 0, 0 }, 1085ea103259SMichael Clark { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge, 0, 0, 0 }, 1086ea103259SMichael Clark { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu, 0, 0, 0 }, 1087ea103259SMichael Clark { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu, 0, 0, 0 }, 1088ea103259SMichael Clark { "lb", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1089ea103259SMichael Clark { "lh", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1090ea103259SMichael Clark { "lw", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1091ea103259SMichael Clark { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1092ea103259SMichael Clark { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1093ea103259SMichael Clark { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1094ea103259SMichael Clark { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1095ea103259SMichael Clark { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1096ea103259SMichael Clark { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi, 0, 0, 0 }, 1097ea103259SMichael Clark { "slti", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1098ea103259SMichael Clark { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu, 0, 0, 0 }, 1099ea103259SMichael Clark { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori, 0, 0, 0 }, 1100ea103259SMichael Clark { "ori", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1101ea103259SMichael Clark { "andi", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1102ea103259SMichael Clark { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1103ea103259SMichael Clark { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1104ea103259SMichael Clark { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1105ea103259SMichael Clark { "add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1106ea103259SMichael Clark { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub, 0, 0, 0 }, 1107ea103259SMichael Clark { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1108ea103259SMichael Clark { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt, 0, 0, 0 }, 1109ea103259SMichael Clark { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu, 0, 0, 0 }, 1110ea103259SMichael Clark { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1111ea103259SMichael Clark { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1112ea103259SMichael Clark { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1113ea103259SMichael Clark { "or", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1114ea103259SMichael Clark { "and", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1115ea103259SMichael Clark { "fence", rv_codec_r_f, rv_fmt_pred_succ, NULL, 0, 0, 0 }, 1116ea103259SMichael Clark { "fence.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1117ea103259SMichael Clark { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1118ea103259SMichael Clark { "ld", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1119ea103259SMichael Clark { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1120ea103259SMichael Clark { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw, 0, 0, 0 }, 1121ea103259SMichael Clark { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1122ea103259SMichael Clark { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1123ea103259SMichael Clark { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1124ea103259SMichael Clark { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1125ea103259SMichael Clark { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw, 0, 0, 0 }, 1126ea103259SMichael Clark { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1127ea103259SMichael Clark { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1128ea103259SMichael Clark { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1129ea103259SMichael Clark { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1130ea103259SMichael Clark { "lq", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, 1131ea103259SMichael Clark { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, 1132ea103259SMichael Clark { "addid", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1133ea103259SMichael Clark { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1134ea103259SMichael Clark { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1135ea103259SMichael Clark { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 1136ea103259SMichael Clark { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1137ea103259SMichael Clark { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1138ea103259SMichael Clark { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1139ea103259SMichael Clark { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1140ea103259SMichael Clark { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1141ea103259SMichael Clark { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1142ea103259SMichael Clark { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1143ea103259SMichael Clark { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1144ea103259SMichael Clark { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1145ea103259SMichael Clark { "div", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1146ea103259SMichael Clark { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1147ea103259SMichael Clark { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1148ea103259SMichael Clark { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1149ea103259SMichael Clark { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1150ea103259SMichael Clark { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1151ea103259SMichael Clark { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1152ea103259SMichael Clark { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1153ea103259SMichael Clark { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1154ea103259SMichael Clark { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1155ea103259SMichael Clark { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1156ea103259SMichael Clark { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1157ea103259SMichael Clark { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1158ea103259SMichael Clark { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1159ea103259SMichael Clark { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1160ea103259SMichael Clark { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1161ea103259SMichael Clark { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1162ea103259SMichael Clark { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1163ea103259SMichael Clark { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1164ea103259SMichael Clark { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1165ea103259SMichael Clark { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1166ea103259SMichael Clark { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1167ea103259SMichael Clark { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1168ea103259SMichael Clark { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1169ea103259SMichael Clark { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1170ea103259SMichael Clark { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1171ea103259SMichael Clark { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1172ea103259SMichael Clark { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1173ea103259SMichael Clark { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1174ea103259SMichael Clark { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1175ea103259SMichael Clark { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1176ea103259SMichael Clark { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1177ea103259SMichael Clark { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1178ea103259SMichael Clark { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1179ea103259SMichael Clark { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1180ea103259SMichael Clark { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1181ea103259SMichael Clark { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, 1182ea103259SMichael Clark { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1183ea103259SMichael Clark { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1184ea103259SMichael Clark { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1185ea103259SMichael Clark { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1186ea103259SMichael Clark { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1187ea103259SMichael Clark { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1188ea103259SMichael Clark { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1189ea103259SMichael Clark { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1190ea103259SMichael Clark { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1191ea103259SMichael Clark { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, 1192ea103259SMichael Clark { "ecall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1193ea103259SMichael Clark { "ebreak", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1194ea103259SMichael Clark { "uret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1195ea103259SMichael Clark { "sret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1196ea103259SMichael Clark { "hret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1197ea103259SMichael Clark { "mret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1198ea103259SMichael Clark { "dret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1199ea103259SMichael Clark { "sfence.vm", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, 1200ea103259SMichael Clark { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 }, 1201ea103259SMichael Clark { "wfi", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, 1202ea103259SMichael Clark { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw, 0, 0, 0 }, 1203ea103259SMichael Clark { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs, 0, 0, 0 }, 1204ea103259SMichael Clark { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1, NULL, 0, 0, 0 }, 1205ea103259SMichael Clark { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi, 0, 0, 0 }, 1206ea103259SMichael Clark { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, 1207ea103259SMichael Clark { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, 1208ea103259SMichael Clark { "flw", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1209ea103259SMichael Clark { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1210ea103259SMichael Clark { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1211ea103259SMichael Clark { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1212ea103259SMichael Clark { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1213ea103259SMichael Clark { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1214ea103259SMichael Clark { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1215ea103259SMichael Clark { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1216ea103259SMichael Clark { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1217ea103259SMichael Clark { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1218ea103259SMichael Clark { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s, 0, 0, 0 }, 1219ea103259SMichael Clark { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s, 0, 0, 0 }, 1220ea103259SMichael Clark { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s, 0, 0, 0 }, 1221ea103259SMichael Clark { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1222ea103259SMichael Clark { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1223ea103259SMichael Clark { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1224ea103259SMichael Clark { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1225ea103259SMichael Clark { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1226ea103259SMichael Clark { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1227ea103259SMichael Clark { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1228ea103259SMichael Clark { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1229ea103259SMichael Clark { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1230ea103259SMichael Clark { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1231ea103259SMichael Clark { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1232ea103259SMichael Clark { "fclass.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1233ea103259SMichael Clark { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1234ea103259SMichael Clark { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1235ea103259SMichael Clark { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1236ea103259SMichael Clark { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1237ea103259SMichael Clark { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1238ea103259SMichael Clark { "fld", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1239ea103259SMichael Clark { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1240ea103259SMichael Clark { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1241ea103259SMichael Clark { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1242ea103259SMichael Clark { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1243ea103259SMichael Clark { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1244ea103259SMichael Clark { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1245ea103259SMichael Clark { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1246ea103259SMichael Clark { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1247ea103259SMichael Clark { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1248ea103259SMichael Clark { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d, 0, 0, 0 }, 1249ea103259SMichael Clark { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d, 0, 0, 0 }, 1250ea103259SMichael Clark { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d, 0, 0, 0 }, 1251ea103259SMichael Clark { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1252ea103259SMichael Clark { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1253ea103259SMichael Clark { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1254ea103259SMichael Clark { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1255ea103259SMichael Clark { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1256ea103259SMichael Clark { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1257ea103259SMichael Clark { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1258ea103259SMichael Clark { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1259ea103259SMichael Clark { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1260ea103259SMichael Clark { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1261ea103259SMichael Clark { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1262ea103259SMichael Clark { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1263ea103259SMichael Clark { "fclass.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1264ea103259SMichael Clark { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1265ea103259SMichael Clark { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1266ea103259SMichael Clark { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1267ea103259SMichael Clark { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1268ea103259SMichael Clark { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1269ea103259SMichael Clark { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1270ea103259SMichael Clark { "flq", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, 1271ea103259SMichael Clark { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, 1272ea103259SMichael Clark { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1273ea103259SMichael Clark { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1274ea103259SMichael Clark { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1275ea103259SMichael Clark { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, 0 }, 1276ea103259SMichael Clark { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1277ea103259SMichael Clark { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1278ea103259SMichael Clark { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1279ea103259SMichael Clark { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, 1280ea103259SMichael Clark { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q, 0, 0, 0 }, 1281ea103259SMichael Clark { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q, 0, 0, 0 }, 1282ea103259SMichael Clark { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q, 0, 0, 0 }, 1283ea103259SMichael Clark { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1284ea103259SMichael Clark { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, 1285ea103259SMichael Clark { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1286ea103259SMichael Clark { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1287ea103259SMichael Clark { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1288ea103259SMichael Clark { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1289ea103259SMichael Clark { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, 1290ea103259SMichael Clark { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1291ea103259SMichael Clark { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1292ea103259SMichael Clark { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, 1293ea103259SMichael Clark { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1294ea103259SMichael Clark { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1295ea103259SMichael Clark { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1296ea103259SMichael Clark { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1297ea103259SMichael Clark { "fclass.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1298ea103259SMichael Clark { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1299ea103259SMichael Clark { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, 1300ea103259SMichael Clark { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1301ea103259SMichael Clark { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, 1302ea103259SMichael Clark { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, 1303ea103259SMichael Clark { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, 1304f88222daSMichael Clark { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, 1305f88222daSMichael Clark rv_op_addi, rv_op_addi, rvcd_imm_nz }, 130698624d13SWeiwei Li { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, 130798624d13SWeiwei Li rv_op_fld, 0 }, 130898624d13SWeiwei Li { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_lw, 130998624d13SWeiwei Li rv_op_lw }, 1310ea103259SMichael Clark { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 0 }, 131198624d13SWeiwei Li { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd, 131298624d13SWeiwei Li rv_op_fsd, 0 }, 131398624d13SWeiwei Li { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op_sw, 131498624d13SWeiwei Li rv_op_sw }, 1315ea103259SMichael Clark { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 0 }, 131698624d13SWeiwei Li { "c.nop", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_addi, rv_op_addi, 131798624d13SWeiwei Li rv_op_addi }, 1318f88222daSMichael Clark { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi, 1319f88222daSMichael Clark rv_op_addi, rvcd_imm_nz }, 1320ea103259SMichael Clark { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 }, 132198624d13SWeiwei Li { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi, 132298624d13SWeiwei Li rv_op_addi }, 1323f88222daSMichael Clark { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, 1324f88222daSMichael Clark rv_op_addi, rv_op_addi, rvcd_imm_nz }, 1325f88222daSMichael Clark { "c.lui", rv_codec_ci_lui, rv_fmt_rd_imm, NULL, rv_op_lui, rv_op_lui, 1326f88222daSMichael Clark rv_op_lui, rvcd_imm_nz }, 1327f88222daSMichael Clark { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli, 1328f88222daSMichael Clark rv_op_srli, rv_op_srli, rvcd_imm_nz }, 1329f88222daSMichael Clark { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai, 1330f88222daSMichael Clark rv_op_srai, rv_op_srai, rvcd_imm_nz }, 1331f88222daSMichael Clark { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi, 13322e3df911SWladimir J. van der Laan rv_op_andi, rv_op_andi }, 133398624d13SWeiwei Li { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub, 133498624d13SWeiwei Li rv_op_sub }, 133598624d13SWeiwei Li { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor, rv_op_xor, 133698624d13SWeiwei Li rv_op_xor }, 133798624d13SWeiwei Li { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or, rv_op_or, 133898624d13SWeiwei Li rv_op_or }, 133998624d13SWeiwei Li { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and, rv_op_and, 134098624d13SWeiwei Li rv_op_and }, 134198624d13SWeiwei Li { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw, rv_op_subw, 134298624d13SWeiwei Li rv_op_subw }, 134398624d13SWeiwei Li { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw, rv_op_addw, 134498624d13SWeiwei Li rv_op_addw }, 134598624d13SWeiwei Li { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal, rv_op_jal, 134698624d13SWeiwei Li rv_op_jal }, 134798624d13SWeiwei Li { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq, rv_op_beq, 134898624d13SWeiwei Li rv_op_beq }, 134998624d13SWeiwei Li { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op_bne, 135098624d13SWeiwei Li rv_op_bne }, 1351f88222daSMichael Clark { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli, 1352f88222daSMichael Clark rv_op_slli, rv_op_slli, rvcd_imm_nz }, 135398624d13SWeiwei Li { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, 135498624d13SWeiwei Li rv_op_fld, rv_op_fld }, 135598624d13SWeiwei Li { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, 135698624d13SWeiwei Li rv_op_lw, rv_op_lw }, 135798624d13SWeiwei Li { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, 135898624d13SWeiwei Li 0 }, 135998624d13SWeiwei Li { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, 136098624d13SWeiwei Li rv_op_jalr, rv_op_jalr }, 136198624d13SWeiwei Li { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi, rv_op_addi, 136298624d13SWeiwei Li rv_op_addi }, 136398624d13SWeiwei Li { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak, 136498624d13SWeiwei Li rv_op_ebreak, rv_op_ebreak }, 136598624d13SWeiwei Li { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, 136698624d13SWeiwei Li rv_op_jalr, rv_op_jalr }, 136798624d13SWeiwei Li { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add, rv_op_add, 136898624d13SWeiwei Li rv_op_add }, 136998624d13SWeiwei Li { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd, 137098624d13SWeiwei Li rv_op_fsd, rv_op_fsd }, 137198624d13SWeiwei Li { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, 137298624d13SWeiwei Li rv_op_sw, rv_op_sw }, 137398624d13SWeiwei Li { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0, 137498624d13SWeiwei Li 0 }, 137598624d13SWeiwei Li { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, 137698624d13SWeiwei Li rv_op_ld }, 137798624d13SWeiwei Li { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd, 137898624d13SWeiwei Li rv_op_sd }, 137998624d13SWeiwei Li { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, 0, rv_op_addiw, 138098624d13SWeiwei Li rv_op_addiw }, 138198624d13SWeiwei Li { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, 138298624d13SWeiwei Li rv_op_ld }, 138398624d13SWeiwei Li { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd, 138498624d13SWeiwei Li rv_op_sd }, 1385ea103259SMichael Clark { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq }, 1386ea103259SMichael Clark { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq }, 1387ea103259SMichael Clark { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq }, 138898624d13SWeiwei Li { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 138998624d13SWeiwei Li rv_op_sq }, 1390ea103259SMichael Clark { "nop", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, 1391ea103259SMichael Clark { "mv", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1392ea103259SMichael Clark { "not", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1393ea103259SMichael Clark { "neg", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1394ea103259SMichael Clark { "negw", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1395ea103259SMichael Clark { "sext.w", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1396ea103259SMichael Clark { "seqz", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1397ea103259SMichael Clark { "snez", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 1398ea103259SMichael Clark { "sltz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1399ea103259SMichael Clark { "sgtz", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 14000d581506SMikhail Tyutin { "fmv.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14010d581506SMikhail Tyutin { "fabs.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14020d581506SMikhail Tyutin { "fneg.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14030d581506SMikhail Tyutin { "fmv.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14040d581506SMikhail Tyutin { "fabs.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14050d581506SMikhail Tyutin { "fneg.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14060d581506SMikhail Tyutin { "fmv.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14070d581506SMikhail Tyutin { "fabs.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 14080d581506SMikhail Tyutin { "fneg.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, 1409ea103259SMichael Clark { "beqz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1410ea103259SMichael Clark { "bnez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1411ea103259SMichael Clark { "blez", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, 1412ea103259SMichael Clark { "bgez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1413ea103259SMichael Clark { "bltz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, 1414ea103259SMichael Clark { "bgtz", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, 1415ea103259SMichael Clark { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1416ea103259SMichael Clark { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1417ea103259SMichael Clark { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1418ea103259SMichael Clark { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, 1419ea103259SMichael Clark { "j", rv_codec_uj, rv_fmt_offset, NULL, 0, 0, 0 }, 1420ea103259SMichael Clark { "ret", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, 1421ea103259SMichael Clark { "jr", rv_codec_i, rv_fmt_rs1, NULL, 0, 0, 0 }, 1422ea103259SMichael Clark { "rdcycle", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1423ea103259SMichael Clark { "rdtime", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1424ea103259SMichael Clark { "rdinstret", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1425ea103259SMichael Clark { "rdcycleh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1426ea103259SMichael Clark { "rdtimeh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1427ea103259SMichael Clark { "rdinstreth", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1428ea103259SMichael Clark { "frcsr", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1429ea103259SMichael Clark { "frrm", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1430ea103259SMichael Clark { "frflags", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, 1431ea103259SMichael Clark { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1432ea103259SMichael Clark { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1433ea103259SMichael Clark { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 1434ea103259SMichael Clark { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, 1435ea103259SMichael Clark { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, 143602c1b569SPhilipp Tomsich { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143702c1b569SPhilipp Tomsich { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143802c1b569SPhilipp Tomsich { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 143902c1b569SPhilipp Tomsich { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 144002c1b569SPhilipp Tomsich { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 144102c1b569SPhilipp Tomsich { "clz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144202c1b569SPhilipp Tomsich { "ctz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144302c1b569SPhilipp Tomsich { "cpop", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144402c1b569SPhilipp Tomsich { "sext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 144502c1b569SPhilipp Tomsich { "sext.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 14463de1fb71SPhilipp Tomsich { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14473de1fb71SPhilipp Tomsich { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14483de1fb71SPhilipp Tomsich { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 144902c1b569SPhilipp Tomsich { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145002c1b569SPhilipp Tomsich { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145102c1b569SPhilipp Tomsich { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145202c1b569SPhilipp Tomsich { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145302c1b569SPhilipp Tomsich { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145402c1b569SPhilipp Tomsich { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145502c1b569SPhilipp Tomsich { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145602c1b569SPhilipp Tomsich { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145702c1b569SPhilipp Tomsich { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145802c1b569SPhilipp Tomsich { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 145902c1b569SPhilipp Tomsich { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146002c1b569SPhilipp Tomsich { "min", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146102c1b569SPhilipp Tomsich { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146202c1b569SPhilipp Tomsich { "max", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146302c1b569SPhilipp Tomsich { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146402c1b569SPhilipp Tomsich { "clzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146527062902SIvan Klokov { "ctzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146602c1b569SPhilipp Tomsich { "cpopw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 146713e269f6SIvan Klokov { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 146802c1b569SPhilipp Tomsich { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 146902c1b569SPhilipp Tomsich { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147002c1b569SPhilipp Tomsich { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147102c1b569SPhilipp Tomsich { "rev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147202c1b569SPhilipp Tomsich { "zext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147302c1b569SPhilipp Tomsich { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, 147402c1b569SPhilipp Tomsich { "orc.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 147502c1b569SPhilipp Tomsich { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147602c1b569SPhilipp Tomsich { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147702c1b569SPhilipp Tomsich { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 147802c1b569SPhilipp Tomsich { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14795748c886SWeiwei Li { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14805748c886SWeiwei Li { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14815748c886SWeiwei Li { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14825748c886SWeiwei Li { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 14835748c886SWeiwei Li { "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum, NULL, 0, 0, 0 }, 14845748c886SWeiwei Li { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14855748c886SWeiwei Li { "aes64im", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14865748c886SWeiwei Li { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14875748c886SWeiwei Li { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14885748c886SWeiwei Li { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14895748c886SWeiwei Li { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14905748c886SWeiwei Li { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14915748c886SWeiwei Li { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14925748c886SWeiwei Li { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14935748c886SWeiwei Li { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 14945748c886SWeiwei Li { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14955748c886SWeiwei Li { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14965748c886SWeiwei Li { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14975748c886SWeiwei Li { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14985748c886SWeiwei Li { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 14995748c886SWeiwei Li { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15005748c886SWeiwei Li { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15015748c886SWeiwei Li { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15025748c886SWeiwei Li { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15035748c886SWeiwei Li { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15045748c886SWeiwei Li { "sm3p0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 15055748c886SWeiwei Li { "sm3p1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, 15065748c886SWeiwei Li { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 15075748c886SWeiwei Li { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, 15085748c886SWeiwei Li { "brev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15095748c886SWeiwei Li { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15105748c886SWeiwei Li { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15115748c886SWeiwei Li { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 15125748c886SWeiwei Li { "unzip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15135748c886SWeiwei Li { "zip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15145748c886SWeiwei Li { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 151507f4964dSYang Liu { "xperm8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, 15168deb4756SWeiwei Li { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15178deb4756SWeiwei Li { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15188deb4756SWeiwei Li { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15198deb4756SWeiwei Li { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15208deb4756SWeiwei Li { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15218deb4756SWeiwei Li { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15228deb4756SWeiwei Li { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15238deb4756SWeiwei Li { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15248deb4756SWeiwei Li { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15258deb4756SWeiwei Li { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15268deb4756SWeiwei Li { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15278deb4756SWeiwei Li { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15288deb4756SWeiwei Li { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15298deb4756SWeiwei Li { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15308deb4756SWeiwei Li { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15318deb4756SWeiwei Li { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15328deb4756SWeiwei Li { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15338deb4756SWeiwei Li { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, 15348deb4756SWeiwei Li { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15358deb4756SWeiwei Li { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15368deb4756SWeiwei Li { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15378deb4756SWeiwei Li { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15388deb4756SWeiwei Li { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15398deb4756SWeiwei Li { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15408deb4756SWeiwei Li { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15418deb4756SWeiwei Li { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15428deb4756SWeiwei Li { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15438deb4756SWeiwei Li { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15448deb4756SWeiwei Li { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15458deb4756SWeiwei Li { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15468deb4756SWeiwei Li { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15478deb4756SWeiwei Li { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15488deb4756SWeiwei Li { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15498deb4756SWeiwei Li { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 15508deb4756SWeiwei Li { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15518deb4756SWeiwei Li { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15528deb4756SWeiwei Li { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15538deb4756SWeiwei Li { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15548deb4756SWeiwei Li { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15558deb4756SWeiwei Li { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15568deb4756SWeiwei Li { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15578deb4756SWeiwei Li { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15588deb4756SWeiwei Li { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15598deb4756SWeiwei Li { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15608deb4756SWeiwei Li { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15618deb4756SWeiwei Li { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15628deb4756SWeiwei Li { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15638deb4756SWeiwei Li { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15648deb4756SWeiwei Li { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15658deb4756SWeiwei Li { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15668deb4756SWeiwei Li { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15678deb4756SWeiwei Li { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15688deb4756SWeiwei Li { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15698deb4756SWeiwei Li { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15708deb4756SWeiwei Li { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15718deb4756SWeiwei Li { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15728deb4756SWeiwei Li { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15738deb4756SWeiwei Li { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, 15748deb4756SWeiwei Li { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15758deb4756SWeiwei Li { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15768deb4756SWeiwei Li { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 15778deb4756SWeiwei Li { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15788deb4756SWeiwei Li { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15798deb4756SWeiwei Li { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15808deb4756SWeiwei Li { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 15818deb4756SWeiwei Li { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15828deb4756SWeiwei Li { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15838deb4756SWeiwei Li { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15848deb4756SWeiwei Li { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15858deb4756SWeiwei Li { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15868deb4756SWeiwei Li { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15878deb4756SWeiwei Li { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15888deb4756SWeiwei Li { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15898deb4756SWeiwei Li { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15908deb4756SWeiwei Li { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15918deb4756SWeiwei Li { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15928deb4756SWeiwei Li { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15938deb4756SWeiwei Li { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15948deb4756SWeiwei Li { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15958deb4756SWeiwei Li { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 15968deb4756SWeiwei Li { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 15978deb4756SWeiwei Li { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 15988deb4756SWeiwei Li { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 15998deb4756SWeiwei Li { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 16008deb4756SWeiwei Li { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16018deb4756SWeiwei Li { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16028deb4756SWeiwei Li { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 16038deb4756SWeiwei Li { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16048deb4756SWeiwei Li { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16058deb4756SWeiwei Li { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 16068deb4756SWeiwei Li { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 16078deb4756SWeiwei Li { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16088deb4756SWeiwei Li { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16098deb4756SWeiwei Li { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16108deb4756SWeiwei Li { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16118deb4756SWeiwei Li { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16128deb4756SWeiwei Li { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16138deb4756SWeiwei Li { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16148deb4756SWeiwei Li { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16158deb4756SWeiwei Li { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16168deb4756SWeiwei Li { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16178deb4756SWeiwei Li { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16188deb4756SWeiwei Li { "vsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16198deb4756SWeiwei Li { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16208deb4756SWeiwei Li { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16218deb4756SWeiwei Li { "vsrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16228deb4756SWeiwei Li { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16238deb4756SWeiwei Li { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16248deb4756SWeiwei Li { "vsra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16258deb4756SWeiwei Li { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16268deb4756SWeiwei Li { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16278deb4756SWeiwei Li { "vnsrl.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16288deb4756SWeiwei Li { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16298deb4756SWeiwei Li { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16308deb4756SWeiwei Li { "vnsra.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 16318deb4756SWeiwei Li { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16328deb4756SWeiwei Li { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16338deb4756SWeiwei Li { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16348deb4756SWeiwei Li { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16358deb4756SWeiwei Li { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16368deb4756SWeiwei Li { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16378deb4756SWeiwei Li { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16388deb4756SWeiwei Li { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16398deb4756SWeiwei Li { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16408deb4756SWeiwei Li { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16418deb4756SWeiwei Li { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16428deb4756SWeiwei Li { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16438deb4756SWeiwei Li { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16448deb4756SWeiwei Li { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16458deb4756SWeiwei Li { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16468deb4756SWeiwei Li { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16478deb4756SWeiwei Li { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16488deb4756SWeiwei Li { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16498deb4756SWeiwei Li { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16508deb4756SWeiwei Li { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 16518deb4756SWeiwei Li { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16528deb4756SWeiwei Li { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16538deb4756SWeiwei Li { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16548deb4756SWeiwei Li { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16558deb4756SWeiwei Li { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16568deb4756SWeiwei Li { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16578deb4756SWeiwei Li { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16588deb4756SWeiwei Li { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16598deb4756SWeiwei Li { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16608deb4756SWeiwei Li { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16618deb4756SWeiwei Li { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16628deb4756SWeiwei Li { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16638deb4756SWeiwei Li { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16648deb4756SWeiwei Li { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16658deb4756SWeiwei Li { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16668deb4756SWeiwei Li { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16678deb4756SWeiwei Li { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16688deb4756SWeiwei Li { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16698deb4756SWeiwei Li { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16708deb4756SWeiwei Li { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16718deb4756SWeiwei Li { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16728deb4756SWeiwei Li { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16738deb4756SWeiwei Li { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16748deb4756SWeiwei Li { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16758deb4756SWeiwei Li { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16768deb4756SWeiwei Li { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16778deb4756SWeiwei Li { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16788deb4756SWeiwei Li { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16798deb4756SWeiwei Li { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 16808deb4756SWeiwei Li { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 16818deb4756SWeiwei Li { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16828deb4756SWeiwei Li { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16838deb4756SWeiwei Li { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16848deb4756SWeiwei Li { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16858deb4756SWeiwei Li { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16868deb4756SWeiwei Li { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16878deb4756SWeiwei Li { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16888deb4756SWeiwei Li { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16898deb4756SWeiwei Li { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16908deb4756SWeiwei Li { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16918deb4756SWeiwei Li { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16928deb4756SWeiwei Li { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16938deb4756SWeiwei Li { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, 16948deb4756SWeiwei Li { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16958deb4756SWeiwei Li { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, 16968deb4756SWeiwei Li { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1, NULL, 0, 0, 0 }, 16978deb4756SWeiwei Li { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, 16988deb4756SWeiwei Li { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm, NULL, 0, 0, 0 }, 16998deb4756SWeiwei Li { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, 17008deb4756SWeiwei Li { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, 17018deb4756SWeiwei Li { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, 17028deb4756SWeiwei Li { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17038deb4756SWeiwei Li { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17048deb4756SWeiwei Li { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 17058deb4756SWeiwei Li { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17068deb4756SWeiwei Li { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17078deb4756SWeiwei Li { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, 17088deb4756SWeiwei Li { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17098deb4756SWeiwei Li { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17108deb4756SWeiwei Li { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17118deb4756SWeiwei Li { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17128deb4756SWeiwei Li { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17138deb4756SWeiwei Li { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17148deb4756SWeiwei Li { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17158deb4756SWeiwei Li { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17168deb4756SWeiwei Li { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17178deb4756SWeiwei Li { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 17188deb4756SWeiwei Li { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17198deb4756SWeiwei Li { "vasubu.vx", rv_codec_v_r, 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"vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17978deb4756SWeiwei Li { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 17988deb4756SWeiwei Li { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 17998deb4756SWeiwei Li { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18008deb4756SWeiwei Li { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 18018deb4756SWeiwei Li { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 18028deb4756SWeiwei Li { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, 18038deb4756SWeiwei Li { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18048deb4756SWeiwei Li { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl, NULL, 0, 0, 0 }, 18058deb4756SWeiwei Li { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, 18068deb4756SWeiwei Li { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18078deb4756SWeiwei Li { "vfcvt.x.f.v", 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"vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18198deb4756SWeiwei Li { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18208deb4756SWeiwei Li { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18218deb4756SWeiwei Li { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18228deb4756SWeiwei Li { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18238deb4756SWeiwei Li { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18248deb4756SWeiwei Li { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18258deb4756SWeiwei Li { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18268deb4756SWeiwei Li { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18278deb4756SWeiwei Li { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18288deb4756SWeiwei Li { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18298deb4756SWeiwei Li { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18308deb4756SWeiwei Li { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18318deb4756SWeiwei Li { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18328deb4756SWeiwei Li { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18338deb4756SWeiwei Li { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18348deb4756SWeiwei Li { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18358deb4756SWeiwei Li { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18368deb4756SWeiwei Li { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18378deb4756SWeiwei Li { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18388deb4756SWeiwei Li { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18398deb4756SWeiwei Li { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18408deb4756SWeiwei Li { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18418deb4756SWeiwei Li { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18428deb4756SWeiwei Li { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18438deb4756SWeiwei Li { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18448deb4756SWeiwei Li { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18458deb4756SWeiwei Li { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18468deb4756SWeiwei Li { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18478deb4756SWeiwei Li { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18488deb4756SWeiwei Li { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18498deb4756SWeiwei Li { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18508deb4756SWeiwei Li { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18518deb4756SWeiwei Li { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, 18528deb4756SWeiwei Li { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, 18538deb4756SWeiwei Li { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18548deb4756SWeiwei Li { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18558deb4756SWeiwei Li { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18568deb4756SWeiwei Li { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18578deb4756SWeiwei Li { "vid.v", rv_codec_v_r, rv_fmt_vd_vm, NULL, 0, 0, 0 }, 18588deb4756SWeiwei Li { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2, NULL, 0, 0, 0 }, 18598deb4756SWeiwei Li { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, 18608deb4756SWeiwei Li { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 }, 18618deb4756SWeiwei Li { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, 18628deb4756SWeiwei Li { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18638deb4756SWeiwei Li { "vslideup.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18648deb4756SWeiwei Li { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18658deb4756SWeiwei Li { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18668deb4756SWeiwei Li { "vslidedown.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18678deb4756SWeiwei Li { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18688deb4756SWeiwei Li { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18698deb4756SWeiwei Li { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, 18708deb4756SWeiwei Li { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, 18718deb4756SWeiwei Li { "vrgather.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, 18728deb4756SWeiwei Li { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, 18738deb4756SWeiwei Li { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18748deb4756SWeiwei Li { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18758deb4756SWeiwei Li { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18768deb4756SWeiwei Li { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, 18778deb4756SWeiwei Li { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18788deb4756SWeiwei Li { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18798deb4756SWeiwei Li { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18808deb4756SWeiwei Li { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18818deb4756SWeiwei Li { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18828deb4756SWeiwei Li { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, 18838deb4756SWeiwei Li { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli, NULL, 0, 0, 0 }, 18848deb4756SWeiwei Li { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli, NULL, 0, 0, 0 }, 18858deb4756SWeiwei Li { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 18862c71d02eSWeiwei Li { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18872c71d02eSWeiwei Li { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18882c71d02eSWeiwei Li { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18892c71d02eSWeiwei Li { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18902c71d02eSWeiwei Li { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18912c71d02eSWeiwei Li { "c.not", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, 18922c71d02eSWeiwei Li { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2, NULL, 0, 0 }, 18932c71d02eSWeiwei Li { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18942c71d02eSWeiwei Li { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18952c71d02eSWeiwei Li { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18962c71d02eSWeiwei Li { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18972c71d02eSWeiwei Li { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, 18982c71d02eSWeiwei Li { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist, NULL, 0, 0 }, 18992c71d02eSWeiwei Li { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 }, 19002c71d02eSWeiwei Li { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0, 0 }, 19012c71d02eSWeiwei Li { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 }, 19022c71d02eSWeiwei Li { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 19032c71d02eSWeiwei Li { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, 19042c71d02eSWeiwei Li { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, 19052c71d02eSWeiwei Li { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, 1906d397be9aSRichard Henderson { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1907d397be9aSRichard Henderson { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 1908ea103259SMichael Clark }; 1909ea103259SMichael Clark 1910ea103259SMichael Clark /* CSR names */ 1911ea103259SMichael Clark 1912ea103259SMichael Clark static const char *csr_name(int csrno) 1913ea103259SMichael Clark { 1914ea103259SMichael Clark switch (csrno) { 1915ea103259SMichael Clark case 0x0000: return "ustatus"; 1916ea103259SMichael Clark case 0x0001: return "fflags"; 1917ea103259SMichael Clark case 0x0002: return "frm"; 1918ea103259SMichael Clark case 0x0003: return "fcsr"; 1919ea103259SMichael Clark case 0x0004: return "uie"; 1920ea103259SMichael Clark case 0x0005: return "utvec"; 192107f4964dSYang Liu case 0x0008: return "vstart"; 192207f4964dSYang Liu case 0x0009: return "vxsat"; 192307f4964dSYang Liu case 0x000a: return "vxrm"; 192407f4964dSYang Liu case 0x000f: return "vcsr"; 19255748c886SWeiwei Li case 0x0015: return "seed"; 19262c71d02eSWeiwei Li case 0x0017: return "jvt"; 1927ea103259SMichael Clark case 0x0040: return "uscratch"; 1928ea103259SMichael Clark case 0x0041: return "uepc"; 1929ea103259SMichael Clark case 0x0042: return "ucause"; 1930ea103259SMichael Clark case 0x0043: return "utval"; 1931ea103259SMichael Clark case 0x0044: return "uip"; 1932ea103259SMichael Clark case 0x0100: return "sstatus"; 1933ea103259SMichael Clark case 0x0104: return "sie"; 1934ea103259SMichael Clark case 0x0105: return "stvec"; 1935ea103259SMichael Clark case 0x0106: return "scounteren"; 1936ea103259SMichael Clark case 0x0140: return "sscratch"; 1937ea103259SMichael Clark case 0x0141: return "sepc"; 1938ea103259SMichael Clark case 0x0142: return "scause"; 1939ea103259SMichael Clark case 0x0143: return "stval"; 1940ea103259SMichael Clark case 0x0144: return "sip"; 1941ea103259SMichael Clark case 0x0180: return "satp"; 1942ea103259SMichael Clark case 0x0200: return "hstatus"; 1943ea103259SMichael Clark case 0x0202: return "hedeleg"; 1944ea103259SMichael Clark case 0x0203: return "hideleg"; 1945ea103259SMichael Clark case 0x0204: return "hie"; 1946ea103259SMichael Clark case 0x0205: return "htvec"; 1947ea103259SMichael Clark case 0x0240: return "hscratch"; 1948ea103259SMichael Clark case 0x0241: return "hepc"; 1949ea103259SMichael Clark case 0x0242: return "hcause"; 1950ea103259SMichael Clark case 0x0243: return "hbadaddr"; 1951ea103259SMichael Clark case 0x0244: return "hip"; 1952ea103259SMichael Clark case 0x0300: return "mstatus"; 1953ea103259SMichael Clark case 0x0301: return "misa"; 1954ea103259SMichael Clark case 0x0302: return "medeleg"; 1955ea103259SMichael Clark case 0x0303: return "mideleg"; 1956ea103259SMichael Clark case 0x0304: return "mie"; 1957ea103259SMichael Clark case 0x0305: return "mtvec"; 1958ea103259SMichael Clark case 0x0306: return "mcounteren"; 1959ea103259SMichael Clark case 0x0320: return "mucounteren"; 1960ea103259SMichael Clark case 0x0321: return "mscounteren"; 1961ea103259SMichael Clark case 0x0322: return "mhcounteren"; 1962ea103259SMichael Clark case 0x0323: return "mhpmevent3"; 1963ea103259SMichael Clark case 0x0324: return "mhpmevent4"; 1964ea103259SMichael Clark case 0x0325: return "mhpmevent5"; 1965ea103259SMichael Clark case 0x0326: return "mhpmevent6"; 1966ea103259SMichael Clark case 0x0327: return "mhpmevent7"; 1967ea103259SMichael Clark case 0x0328: return "mhpmevent8"; 1968ea103259SMichael Clark case 0x0329: return "mhpmevent9"; 1969ea103259SMichael Clark case 0x032a: return "mhpmevent10"; 1970ea103259SMichael Clark case 0x032b: return "mhpmevent11"; 1971ea103259SMichael Clark case 0x032c: return "mhpmevent12"; 1972ea103259SMichael Clark case 0x032d: return "mhpmevent13"; 1973ea103259SMichael Clark case 0x032e: return "mhpmevent14"; 1974ea103259SMichael Clark case 0x032f: return "mhpmevent15"; 1975ea103259SMichael Clark case 0x0330: return "mhpmevent16"; 1976ea103259SMichael Clark case 0x0331: return "mhpmevent17"; 1977ea103259SMichael Clark case 0x0332: return "mhpmevent18"; 1978ea103259SMichael Clark case 0x0333: return "mhpmevent19"; 1979ea103259SMichael Clark case 0x0334: return "mhpmevent20"; 1980ea103259SMichael Clark case 0x0335: return "mhpmevent21"; 1981ea103259SMichael Clark case 0x0336: return "mhpmevent22"; 1982ea103259SMichael Clark case 0x0337: return "mhpmevent23"; 1983ea103259SMichael Clark case 0x0338: return "mhpmevent24"; 1984ea103259SMichael Clark case 0x0339: return "mhpmevent25"; 1985ea103259SMichael Clark case 0x033a: return "mhpmevent26"; 1986ea103259SMichael Clark case 0x033b: return "mhpmevent27"; 1987ea103259SMichael Clark case 0x033c: return "mhpmevent28"; 1988ea103259SMichael Clark case 0x033d: return "mhpmevent29"; 1989ea103259SMichael Clark case 0x033e: return "mhpmevent30"; 1990ea103259SMichael Clark case 0x033f: return "mhpmevent31"; 1991ea103259SMichael Clark case 0x0340: return "mscratch"; 1992ea103259SMichael Clark case 0x0341: return "mepc"; 1993ea103259SMichael Clark case 0x0342: return "mcause"; 1994ea103259SMichael Clark case 0x0343: return "mtval"; 1995ea103259SMichael Clark case 0x0344: return "mip"; 1996ea103259SMichael Clark case 0x0380: return "mbase"; 1997ea103259SMichael Clark case 0x0381: return "mbound"; 1998ea103259SMichael Clark case 0x0382: return "mibase"; 1999ea103259SMichael Clark case 0x0383: return "mibound"; 2000ea103259SMichael Clark case 0x0384: return "mdbase"; 2001ea103259SMichael Clark case 0x0385: return "mdbound"; 2002ea103259SMichael Clark case 0x03a0: return "pmpcfg3"; 2003ea103259SMichael Clark case 0x03b0: return "pmpaddr0"; 2004ea103259SMichael Clark case 0x03b1: return "pmpaddr1"; 2005ea103259SMichael Clark case 0x03b2: return "pmpaddr2"; 2006ea103259SMichael Clark case 0x03b3: return "pmpaddr3"; 2007ea103259SMichael Clark case 0x03b4: return "pmpaddr4"; 2008ea103259SMichael Clark case 0x03b5: return "pmpaddr5"; 2009ea103259SMichael Clark case 0x03b6: return "pmpaddr6"; 2010ea103259SMichael Clark case 0x03b7: return "pmpaddr7"; 2011ea103259SMichael Clark case 0x03b8: return "pmpaddr8"; 2012ea103259SMichael Clark case 0x03b9: return "pmpaddr9"; 2013ea103259SMichael Clark case 0x03ba: return "pmpaddr10"; 2014ea103259SMichael Clark case 0x03bb: return "pmpaddr11"; 2015ea103259SMichael Clark case 0x03bc: return "pmpaddr12"; 2016ea103259SMichael Clark case 0x03bd: return "pmpaddr14"; 2017ea103259SMichael Clark case 0x03be: return "pmpaddr13"; 2018ea103259SMichael Clark case 0x03bf: return "pmpaddr15"; 2019ea103259SMichael Clark case 0x0780: return "mtohost"; 2020ea103259SMichael Clark case 0x0781: return "mfromhost"; 2021ea103259SMichael Clark case 0x0782: return "mreset"; 2022ea103259SMichael Clark case 0x0783: return "mipi"; 2023ea103259SMichael Clark case 0x0784: return "miobase"; 2024ea103259SMichael Clark case 0x07a0: return "tselect"; 2025ea103259SMichael Clark case 0x07a1: return "tdata1"; 2026ea103259SMichael Clark case 0x07a2: return "tdata2"; 2027ea103259SMichael Clark case 0x07a3: return "tdata3"; 2028ea103259SMichael Clark case 0x07b0: return "dcsr"; 2029ea103259SMichael Clark case 0x07b1: return "dpc"; 2030ea103259SMichael Clark case 0x07b2: return "dscratch"; 2031ea103259SMichael Clark case 0x0b00: return "mcycle"; 2032ea103259SMichael Clark case 0x0b01: return "mtime"; 2033ea103259SMichael Clark case 0x0b02: return "minstret"; 2034ea103259SMichael Clark case 0x0b03: return "mhpmcounter3"; 2035ea103259SMichael Clark case 0x0b04: return "mhpmcounter4"; 2036ea103259SMichael Clark case 0x0b05: return "mhpmcounter5"; 2037ea103259SMichael Clark case 0x0b06: return "mhpmcounter6"; 2038ea103259SMichael Clark case 0x0b07: return "mhpmcounter7"; 2039ea103259SMichael Clark case 0x0b08: return "mhpmcounter8"; 2040ea103259SMichael Clark case 0x0b09: return "mhpmcounter9"; 2041ea103259SMichael Clark case 0x0b0a: return "mhpmcounter10"; 2042ea103259SMichael Clark case 0x0b0b: return "mhpmcounter11"; 2043ea103259SMichael Clark case 0x0b0c: return "mhpmcounter12"; 2044ea103259SMichael Clark case 0x0b0d: return "mhpmcounter13"; 2045ea103259SMichael Clark case 0x0b0e: return "mhpmcounter14"; 2046ea103259SMichael Clark case 0x0b0f: return "mhpmcounter15"; 2047ea103259SMichael Clark case 0x0b10: return "mhpmcounter16"; 2048ea103259SMichael Clark case 0x0b11: return "mhpmcounter17"; 2049ea103259SMichael Clark case 0x0b12: return "mhpmcounter18"; 2050ea103259SMichael Clark case 0x0b13: return "mhpmcounter19"; 2051ea103259SMichael Clark case 0x0b14: return "mhpmcounter20"; 2052ea103259SMichael Clark case 0x0b15: return "mhpmcounter21"; 2053ea103259SMichael Clark case 0x0b16: return "mhpmcounter22"; 2054ea103259SMichael Clark case 0x0b17: return "mhpmcounter23"; 2055ea103259SMichael Clark case 0x0b18: return "mhpmcounter24"; 2056ea103259SMichael Clark case 0x0b19: return "mhpmcounter25"; 2057ea103259SMichael Clark case 0x0b1a: return "mhpmcounter26"; 2058ea103259SMichael Clark case 0x0b1b: return "mhpmcounter27"; 2059ea103259SMichael Clark case 0x0b1c: return "mhpmcounter28"; 2060ea103259SMichael Clark case 0x0b1d: return "mhpmcounter29"; 2061ea103259SMichael Clark case 0x0b1e: return "mhpmcounter30"; 2062ea103259SMichael Clark case 0x0b1f: return "mhpmcounter31"; 2063ea103259SMichael Clark case 0x0b80: return "mcycleh"; 2064ea103259SMichael Clark case 0x0b81: return "mtimeh"; 2065ea103259SMichael Clark case 0x0b82: return "minstreth"; 2066ea103259SMichael Clark case 0x0b83: return "mhpmcounter3h"; 2067ea103259SMichael Clark case 0x0b84: return "mhpmcounter4h"; 2068ea103259SMichael Clark case 0x0b85: return "mhpmcounter5h"; 2069ea103259SMichael Clark case 0x0b86: return "mhpmcounter6h"; 2070ea103259SMichael Clark case 0x0b87: return "mhpmcounter7h"; 2071ea103259SMichael Clark case 0x0b88: return "mhpmcounter8h"; 2072ea103259SMichael Clark case 0x0b89: return "mhpmcounter9h"; 2073ea103259SMichael Clark case 0x0b8a: return "mhpmcounter10h"; 2074ea103259SMichael Clark case 0x0b8b: return "mhpmcounter11h"; 2075ea103259SMichael Clark case 0x0b8c: return "mhpmcounter12h"; 2076ea103259SMichael Clark case 0x0b8d: return "mhpmcounter13h"; 2077ea103259SMichael Clark case 0x0b8e: return "mhpmcounter14h"; 2078ea103259SMichael Clark case 0x0b8f: return "mhpmcounter15h"; 2079ea103259SMichael Clark case 0x0b90: return "mhpmcounter16h"; 2080ea103259SMichael Clark case 0x0b91: return "mhpmcounter17h"; 2081ea103259SMichael Clark case 0x0b92: return "mhpmcounter18h"; 2082ea103259SMichael Clark case 0x0b93: return "mhpmcounter19h"; 2083ea103259SMichael Clark case 0x0b94: return "mhpmcounter20h"; 2084ea103259SMichael Clark case 0x0b95: return "mhpmcounter21h"; 2085ea103259SMichael Clark case 0x0b96: return "mhpmcounter22h"; 2086ea103259SMichael Clark case 0x0b97: return "mhpmcounter23h"; 2087ea103259SMichael Clark case 0x0b98: return "mhpmcounter24h"; 2088ea103259SMichael Clark case 0x0b99: return "mhpmcounter25h"; 2089ea103259SMichael Clark case 0x0b9a: return "mhpmcounter26h"; 2090ea103259SMichael Clark case 0x0b9b: return "mhpmcounter27h"; 2091ea103259SMichael Clark case 0x0b9c: return "mhpmcounter28h"; 2092ea103259SMichael Clark case 0x0b9d: return "mhpmcounter29h"; 2093ea103259SMichael Clark case 0x0b9e: return "mhpmcounter30h"; 2094ea103259SMichael Clark case 0x0b9f: return "mhpmcounter31h"; 2095ea103259SMichael Clark case 0x0c00: return "cycle"; 2096ea103259SMichael Clark case 0x0c01: return "time"; 2097ea103259SMichael Clark case 0x0c02: return "instret"; 209807f4964dSYang Liu case 0x0c20: return "vl"; 209907f4964dSYang Liu case 0x0c21: return "vtype"; 210007f4964dSYang Liu case 0x0c22: return "vlenb"; 2101ea103259SMichael Clark case 0x0c80: return "cycleh"; 2102ea103259SMichael Clark case 0x0c81: return "timeh"; 2103ea103259SMichael Clark case 0x0c82: return "instreth"; 2104ea103259SMichael Clark case 0x0d00: return "scycle"; 2105ea103259SMichael Clark case 0x0d01: return "stime"; 2106ea103259SMichael Clark case 0x0d02: return "sinstret"; 2107ea103259SMichael Clark case 0x0d80: return "scycleh"; 2108ea103259SMichael Clark case 0x0d81: return "stimeh"; 2109ea103259SMichael Clark case 0x0d82: return "sinstreth"; 2110ea103259SMichael Clark case 0x0e00: return "hcycle"; 2111ea103259SMichael Clark case 0x0e01: return "htime"; 2112ea103259SMichael Clark case 0x0e02: return "hinstret"; 2113ea103259SMichael Clark case 0x0e80: return "hcycleh"; 2114ea103259SMichael Clark case 0x0e81: return "htimeh"; 2115ea103259SMichael Clark case 0x0e82: return "hinstreth"; 2116ea103259SMichael Clark case 0x0f11: return "mvendorid"; 2117ea103259SMichael Clark case 0x0f12: return "marchid"; 2118ea103259SMichael Clark case 0x0f13: return "mimpid"; 2119ea103259SMichael Clark case 0x0f14: return "mhartid"; 2120ea103259SMichael Clark default: return NULL; 2121ea103259SMichael Clark } 2122ea103259SMichael Clark } 2123ea103259SMichael Clark 2124ea103259SMichael Clark /* decode opcode */ 2125ea103259SMichael Clark 2126ea103259SMichael Clark static void decode_inst_opcode(rv_decode *dec, rv_isa isa) 2127ea103259SMichael Clark { 2128ea103259SMichael Clark rv_inst inst = dec->inst; 2129ea103259SMichael Clark rv_opcode op = rv_op_illegal; 21303bd87176SWeiwei Li switch ((inst >> 0) & 0b11) { 2131ea103259SMichael Clark case 0: 21323bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2133ea103259SMichael Clark case 0: op = rv_op_c_addi4spn; break; 2134ea103259SMichael Clark case 1: 2135ea103259SMichael Clark if (isa == rv128) { 2136ea103259SMichael Clark op = rv_op_c_lq; 2137ea103259SMichael Clark } else { 2138ea103259SMichael Clark op = rv_op_c_fld; 2139ea103259SMichael Clark } 2140ea103259SMichael Clark break; 2141ea103259SMichael Clark case 2: op = rv_op_c_lw; break; 2142ea103259SMichael Clark case 3: 2143ea103259SMichael Clark if (isa == rv32) { 2144ea103259SMichael Clark op = rv_op_c_flw; 2145ea103259SMichael Clark } else { 2146ea103259SMichael Clark op = rv_op_c_ld; 2147ea103259SMichael Clark } 2148ea103259SMichael Clark break; 21492c71d02eSWeiwei Li case 4: 21502c71d02eSWeiwei Li switch ((inst >> 10) & 0b111) { 21512c71d02eSWeiwei Li case 0: op = rv_op_c_lbu; break; 21522c71d02eSWeiwei Li case 1: 21532c71d02eSWeiwei Li if (((inst >> 6) & 1) == 0) { 21542c71d02eSWeiwei Li op = rv_op_c_lhu; 21552c71d02eSWeiwei Li } else { 21562c71d02eSWeiwei Li op = rv_op_c_lh; 21572c71d02eSWeiwei Li } 21582c71d02eSWeiwei Li break; 21592c71d02eSWeiwei Li case 2: op = rv_op_c_sb; break; 21602c71d02eSWeiwei Li case 3: 21612c71d02eSWeiwei Li if (((inst >> 6) & 1) == 0) { 21622c71d02eSWeiwei Li op = rv_op_c_sh; 21632c71d02eSWeiwei Li } 21642c71d02eSWeiwei Li break; 21652c71d02eSWeiwei Li } 21662c71d02eSWeiwei Li break; 2167ea103259SMichael Clark case 5: 2168ea103259SMichael Clark if (isa == rv128) { 2169ea103259SMichael Clark op = rv_op_c_sq; 2170ea103259SMichael Clark } else { 2171ea103259SMichael Clark op = rv_op_c_fsd; 2172ea103259SMichael Clark } 2173ea103259SMichael Clark break; 2174ea103259SMichael Clark case 6: op = rv_op_c_sw; break; 2175ea103259SMichael Clark case 7: 2176ea103259SMichael Clark if (isa == rv32) { 2177ea103259SMichael Clark op = rv_op_c_fsw; 2178ea103259SMichael Clark } else { 2179ea103259SMichael Clark op = rv_op_c_sd; 2180ea103259SMichael Clark } 2181ea103259SMichael Clark break; 2182ea103259SMichael Clark } 2183ea103259SMichael Clark break; 2184ea103259SMichael Clark case 1: 21853bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2186ea103259SMichael Clark case 0: 21873bd87176SWeiwei Li switch ((inst >> 2) & 0b11111111111) { 2188ea103259SMichael Clark case 0: op = rv_op_c_nop; break; 2189ea103259SMichael Clark default: op = rv_op_c_addi; break; 2190ea103259SMichael Clark } 2191ea103259SMichael Clark break; 2192ea103259SMichael Clark case 1: 2193ea103259SMichael Clark if (isa == rv32) { 2194ea103259SMichael Clark op = rv_op_c_jal; 2195ea103259SMichael Clark } else { 2196ea103259SMichael Clark op = rv_op_c_addiw; 2197ea103259SMichael Clark } 2198ea103259SMichael Clark break; 2199ea103259SMichael Clark case 2: op = rv_op_c_li; break; 2200ea103259SMichael Clark case 3: 22013bd87176SWeiwei Li switch ((inst >> 7) & 0b11111) { 2202ea103259SMichael Clark case 2: op = rv_op_c_addi16sp; break; 2203ea103259SMichael Clark default: op = rv_op_c_lui; break; 2204ea103259SMichael Clark } 2205ea103259SMichael Clark break; 2206ea103259SMichael Clark case 4: 22073bd87176SWeiwei Li switch ((inst >> 10) & 0b11) { 2208ea103259SMichael Clark case 0: 2209ea103259SMichael Clark op = rv_op_c_srli; 2210ea103259SMichael Clark break; 2211ea103259SMichael Clark case 1: 2212ea103259SMichael Clark op = rv_op_c_srai; 2213ea103259SMichael Clark break; 2214ea103259SMichael Clark case 2: op = rv_op_c_andi; break; 2215ea103259SMichael Clark case 3: 2216ea103259SMichael Clark switch (((inst >> 10) & 0b100) | ((inst >> 5) & 0b011)) { 2217ea103259SMichael Clark case 0: op = rv_op_c_sub; break; 2218ea103259SMichael Clark case 1: op = rv_op_c_xor; break; 2219ea103259SMichael Clark case 2: op = rv_op_c_or; break; 2220ea103259SMichael Clark case 3: op = rv_op_c_and; break; 2221ea103259SMichael Clark case 4: op = rv_op_c_subw; break; 2222ea103259SMichael Clark case 5: op = rv_op_c_addw; break; 22232c71d02eSWeiwei Li case 6: op = rv_op_c_mul; break; 22242c71d02eSWeiwei Li case 7: 22252c71d02eSWeiwei Li switch ((inst >> 2) & 0b111) { 22262c71d02eSWeiwei Li case 0: op = rv_op_c_zext_b; break; 22272c71d02eSWeiwei Li case 1: op = rv_op_c_sext_b; break; 22282c71d02eSWeiwei Li case 2: op = rv_op_c_zext_h; break; 22292c71d02eSWeiwei Li case 3: op = rv_op_c_sext_h; break; 22302c71d02eSWeiwei Li case 4: op = rv_op_c_zext_w; break; 22312c71d02eSWeiwei Li case 5: op = rv_op_c_not; break; 22322c71d02eSWeiwei Li } 22332c71d02eSWeiwei Li break; 2234ea103259SMichael Clark } 2235ea103259SMichael Clark break; 2236ea103259SMichael Clark } 2237ea103259SMichael Clark break; 2238ea103259SMichael Clark case 5: op = rv_op_c_j; break; 2239ea103259SMichael Clark case 6: op = rv_op_c_beqz; break; 2240ea103259SMichael Clark case 7: op = rv_op_c_bnez; break; 2241ea103259SMichael Clark } 2242ea103259SMichael Clark break; 2243ea103259SMichael Clark case 2: 22443bd87176SWeiwei Li switch ((inst >> 13) & 0b111) { 2245ea103259SMichael Clark case 0: 2246ea103259SMichael Clark op = rv_op_c_slli; 2247ea103259SMichael Clark break; 2248ea103259SMichael Clark case 1: 2249ea103259SMichael Clark if (isa == rv128) { 2250ea103259SMichael Clark op = rv_op_c_lqsp; 2251ea103259SMichael Clark } else { 2252ea103259SMichael Clark op = rv_op_c_fldsp; 2253ea103259SMichael Clark } 2254ea103259SMichael Clark break; 2255ea103259SMichael Clark case 2: op = rv_op_c_lwsp; break; 2256ea103259SMichael Clark case 3: 2257ea103259SMichael Clark if (isa == rv32) { 2258ea103259SMichael Clark op = rv_op_c_flwsp; 2259ea103259SMichael Clark } else { 2260ea103259SMichael Clark op = rv_op_c_ldsp; 2261ea103259SMichael Clark } 2262ea103259SMichael Clark break; 2263ea103259SMichael Clark case 4: 22643bd87176SWeiwei Li switch ((inst >> 12) & 0b1) { 2265ea103259SMichael Clark case 0: 22663bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2267ea103259SMichael Clark case 0: op = rv_op_c_jr; break; 2268ea103259SMichael Clark default: op = rv_op_c_mv; break; 2269ea103259SMichael Clark } 2270ea103259SMichael Clark break; 2271ea103259SMichael Clark case 1: 22723bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2273ea103259SMichael Clark case 0: 22743bd87176SWeiwei Li switch ((inst >> 7) & 0b11111) { 2275ea103259SMichael Clark case 0: op = rv_op_c_ebreak; break; 2276ea103259SMichael Clark default: op = rv_op_c_jalr; break; 2277ea103259SMichael Clark } 2278ea103259SMichael Clark break; 2279ea103259SMichael Clark default: op = rv_op_c_add; break; 2280ea103259SMichael Clark } 2281ea103259SMichael Clark break; 2282ea103259SMichael Clark } 2283ea103259SMichael Clark break; 2284ea103259SMichael Clark case 5: 2285ea103259SMichael Clark if (isa == rv128) { 2286ea103259SMichael Clark op = rv_op_c_sqsp; 2287ea103259SMichael Clark } else { 22881dc34be1SMichael Clark op = rv_op_c_fsdsp; 22892a2b221bSWeiwei Li if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) { 22902c71d02eSWeiwei Li switch ((inst >> 8) & 0b01111) { 22912c71d02eSWeiwei Li case 8: 22922c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 22932c71d02eSWeiwei Li op = rv_op_cm_push; 22942c71d02eSWeiwei Li } 22952c71d02eSWeiwei Li break; 22962c71d02eSWeiwei Li case 10: 22972c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 22982c71d02eSWeiwei Li op = rv_op_cm_pop; 22992c71d02eSWeiwei Li } 23002c71d02eSWeiwei Li break; 23012c71d02eSWeiwei Li case 12: 23022c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 23032c71d02eSWeiwei Li op = rv_op_cm_popretz; 23042c71d02eSWeiwei Li } 23052c71d02eSWeiwei Li break; 23062c71d02eSWeiwei Li case 14: 23072c71d02eSWeiwei Li if (((inst >> 4) & 0b01111) >= 4) { 23082c71d02eSWeiwei Li op = rv_op_cm_popret; 23092c71d02eSWeiwei Li } 23102c71d02eSWeiwei Li break; 23112c71d02eSWeiwei Li } 23122c71d02eSWeiwei Li } else { 23132c71d02eSWeiwei Li switch ((inst >> 10) & 0b011) { 23142c71d02eSWeiwei Li case 0: 23152a2b221bSWeiwei Li if (!dec->cfg->ext_zcmt) { 23162a2b221bSWeiwei Li break; 23172a2b221bSWeiwei Li } 23182c71d02eSWeiwei Li if (((inst >> 2) & 0xFF) >= 32) { 23192c71d02eSWeiwei Li op = rv_op_cm_jalt; 23202c71d02eSWeiwei Li } else { 23212c71d02eSWeiwei Li op = rv_op_cm_jt; 23222c71d02eSWeiwei Li } 23232c71d02eSWeiwei Li break; 23242c71d02eSWeiwei Li case 3: 23252a2b221bSWeiwei Li if (!dec->cfg->ext_zcmp) { 23262a2b221bSWeiwei Li break; 23272a2b221bSWeiwei Li } 23282c71d02eSWeiwei Li switch ((inst >> 5) & 0b011) { 23292c71d02eSWeiwei Li case 1: op = rv_op_cm_mvsa01; break; 23302c71d02eSWeiwei Li case 3: op = rv_op_cm_mva01s; break; 23312c71d02eSWeiwei Li } 23322c71d02eSWeiwei Li break; 23332c71d02eSWeiwei Li } 23342c71d02eSWeiwei Li } 2335ea103259SMichael Clark } 23361dc34be1SMichael Clark break; 2337ea103259SMichael Clark case 6: op = rv_op_c_swsp; break; 2338ea103259SMichael Clark case 7: 2339ea103259SMichael Clark if (isa == rv32) { 2340ea103259SMichael Clark op = rv_op_c_fswsp; 2341ea103259SMichael Clark } else { 2342ea103259SMichael Clark op = rv_op_c_sdsp; 2343ea103259SMichael Clark } 2344ea103259SMichael Clark break; 2345ea103259SMichael Clark } 2346ea103259SMichael Clark break; 2347ea103259SMichael Clark case 3: 23483bd87176SWeiwei Li switch ((inst >> 2) & 0b11111) { 2349ea103259SMichael Clark case 0: 23503bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2351ea103259SMichael Clark case 0: op = rv_op_lb; break; 2352ea103259SMichael Clark case 1: op = rv_op_lh; break; 2353ea103259SMichael Clark case 2: op = rv_op_lw; break; 2354ea103259SMichael Clark case 3: op = rv_op_ld; break; 2355ea103259SMichael Clark case 4: op = rv_op_lbu; break; 2356ea103259SMichael Clark case 5: op = rv_op_lhu; break; 2357ea103259SMichael Clark case 6: op = rv_op_lwu; break; 2358ea103259SMichael Clark case 7: op = rv_op_ldu; break; 2359ea103259SMichael Clark } 2360ea103259SMichael Clark break; 2361ea103259SMichael Clark case 1: 23623bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 236307f4964dSYang Liu case 0: 23643bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 236507f4964dSYang Liu case 40: op = rv_op_vl1re8_v; break; 236607f4964dSYang Liu case 552: op = rv_op_vl2re8_v; break; 236707f4964dSYang Liu case 1576: op = rv_op_vl4re8_v; break; 236807f4964dSYang Liu case 3624: op = rv_op_vl8re8_v; break; 236907f4964dSYang Liu } 23703bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 237107f4964dSYang Liu case 0: 23723bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 237307f4964dSYang Liu case 0: op = rv_op_vle8_v; break; 237407f4964dSYang Liu case 11: op = rv_op_vlm_v; break; 237507f4964dSYang Liu case 16: op = rv_op_vle8ff_v; break; 237607f4964dSYang Liu } 237707f4964dSYang Liu break; 237807f4964dSYang Liu case 1: op = rv_op_vluxei8_v; break; 237907f4964dSYang Liu case 2: op = rv_op_vlse8_v; break; 238007f4964dSYang Liu case 3: op = rv_op_vloxei8_v; break; 238107f4964dSYang Liu } 238207f4964dSYang Liu break; 2383ea103259SMichael Clark case 2: op = rv_op_flw; break; 2384ea103259SMichael Clark case 3: op = rv_op_fld; break; 2385ea103259SMichael Clark case 4: op = rv_op_flq; break; 238607f4964dSYang Liu case 5: 23873bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 238807f4964dSYang Liu case 40: op = rv_op_vl1re16_v; break; 238907f4964dSYang Liu case 552: op = rv_op_vl2re16_v; break; 239007f4964dSYang Liu case 1576: op = rv_op_vl4re16_v; break; 239107f4964dSYang Liu case 3624: op = rv_op_vl8re16_v; break; 239207f4964dSYang Liu } 23933bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 239407f4964dSYang Liu case 0: 23953bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 239607f4964dSYang Liu case 0: op = rv_op_vle16_v; break; 239707f4964dSYang Liu case 16: op = rv_op_vle16ff_v; break; 239807f4964dSYang Liu } 239907f4964dSYang Liu break; 240007f4964dSYang Liu case 1: op = rv_op_vluxei16_v; break; 240107f4964dSYang Liu case 2: op = rv_op_vlse16_v; break; 240207f4964dSYang Liu case 3: op = rv_op_vloxei16_v; break; 240307f4964dSYang Liu } 240407f4964dSYang Liu break; 240507f4964dSYang Liu case 6: 24063bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 240707f4964dSYang Liu case 40: op = rv_op_vl1re32_v; break; 240807f4964dSYang Liu case 552: op = rv_op_vl2re32_v; break; 240907f4964dSYang Liu case 1576: op = rv_op_vl4re32_v; break; 241007f4964dSYang Liu case 3624: op = rv_op_vl8re32_v; break; 241107f4964dSYang Liu } 24123bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 241307f4964dSYang Liu case 0: 24143bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 241507f4964dSYang Liu case 0: op = rv_op_vle32_v; break; 241607f4964dSYang Liu case 16: op = rv_op_vle32ff_v; break; 241707f4964dSYang Liu } 241807f4964dSYang Liu break; 241907f4964dSYang Liu case 1: op = rv_op_vluxei32_v; break; 242007f4964dSYang Liu case 2: op = rv_op_vlse32_v; break; 242107f4964dSYang Liu case 3: op = rv_op_vloxei32_v; break; 242207f4964dSYang Liu } 242307f4964dSYang Liu break; 242407f4964dSYang Liu case 7: 24253bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 242607f4964dSYang Liu case 40: op = rv_op_vl1re64_v; break; 242707f4964dSYang Liu case 552: op = rv_op_vl2re64_v; break; 242807f4964dSYang Liu case 1576: op = rv_op_vl4re64_v; break; 242907f4964dSYang Liu case 3624: op = rv_op_vl8re64_v; break; 243007f4964dSYang Liu } 24313bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 243207f4964dSYang Liu case 0: 24333bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 243407f4964dSYang Liu case 0: op = rv_op_vle64_v; break; 243507f4964dSYang Liu case 16: op = rv_op_vle64ff_v; break; 243607f4964dSYang Liu } 243707f4964dSYang Liu break; 243807f4964dSYang Liu case 1: op = rv_op_vluxei64_v; break; 243907f4964dSYang Liu case 2: op = rv_op_vlse64_v; break; 244007f4964dSYang Liu case 3: op = rv_op_vloxei64_v; break; 244107f4964dSYang Liu } 244207f4964dSYang Liu break; 2443ea103259SMichael Clark } 2444ea103259SMichael Clark break; 2445ea103259SMichael Clark case 3: 24463bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2447ea103259SMichael Clark case 0: op = rv_op_fence; break; 2448ea103259SMichael Clark case 1: op = rv_op_fence_i; break; 2449ea103259SMichael Clark case 2: op = rv_op_lq; break; 2450ea103259SMichael Clark } 2451ea103259SMichael Clark break; 2452ea103259SMichael Clark case 4: 24533bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2454ea103259SMichael Clark case 0: op = rv_op_addi; break; 2455ea103259SMichael Clark case 1: 24563bd87176SWeiwei Li switch ((inst >> 27) & 0b11111) { 245702c1b569SPhilipp Tomsich case 0b00000: op = rv_op_slli; break; 24585748c886SWeiwei Li case 0b00001: 24593bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24605748c886SWeiwei Li case 0b0001111: op = rv_op_zip; break; 24615748c886SWeiwei Li } 24625748c886SWeiwei Li break; 24635748c886SWeiwei Li case 0b00010: 24643bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24655748c886SWeiwei Li case 0b0000000: op = rv_op_sha256sum0; break; 24665748c886SWeiwei Li case 0b0000001: op = rv_op_sha256sum1; break; 24675748c886SWeiwei Li case 0b0000010: op = rv_op_sha256sig0; break; 24685748c886SWeiwei Li case 0b0000011: op = rv_op_sha256sig1; break; 24695748c886SWeiwei Li case 0b0000100: op = rv_op_sha512sum0; break; 24705748c886SWeiwei Li case 0b0000101: op = rv_op_sha512sum1; break; 24715748c886SWeiwei Li case 0b0000110: op = rv_op_sha512sig0; break; 24725748c886SWeiwei Li case 0b0000111: op = rv_op_sha512sig1; break; 24735748c886SWeiwei Li case 0b0001000: op = rv_op_sm3p0; break; 24745748c886SWeiwei Li case 0b0001001: op = rv_op_sm3p1; break; 24755748c886SWeiwei Li } 24765748c886SWeiwei Li break; 247702c1b569SPhilipp Tomsich case 0b00101: op = rv_op_bseti; break; 24785748c886SWeiwei Li case 0b00110: 24793bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 24805748c886SWeiwei Li case 0b0000000: op = rv_op_aes64im; break; 24815748c886SWeiwei Li default: 24825748c886SWeiwei Li if (((inst >> 24) & 0b0111) == 0b001) { 24835748c886SWeiwei Li op = rv_op_aes64ks1i; 24845748c886SWeiwei Li } 24855748c886SWeiwei Li break; 24865748c886SWeiwei Li } 24875748c886SWeiwei Li break; 248802c1b569SPhilipp Tomsich case 0b01001: op = rv_op_bclri; break; 248902c1b569SPhilipp Tomsich case 0b01101: op = rv_op_binvi; break; 249002c1b569SPhilipp Tomsich case 0b01100: 24913bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 249202c1b569SPhilipp Tomsich case 0b0000000: op = rv_op_clz; break; 249302c1b569SPhilipp Tomsich case 0b0000001: op = rv_op_ctz; break; 249402c1b569SPhilipp Tomsich case 0b0000010: op = rv_op_cpop; break; 249502c1b569SPhilipp Tomsich /* 0b0000011 */ 249602c1b569SPhilipp Tomsich case 0b0000100: op = rv_op_sext_b; break; 249702c1b569SPhilipp Tomsich case 0b0000101: op = rv_op_sext_h; break; 249802c1b569SPhilipp Tomsich } 249902c1b569SPhilipp Tomsich break; 2500ea103259SMichael Clark } 2501ea103259SMichael Clark break; 2502ea103259SMichael Clark case 2: op = rv_op_slti; break; 2503ea103259SMichael Clark case 3: op = rv_op_sltiu; break; 2504ea103259SMichael Clark case 4: op = rv_op_xori; break; 2505ea103259SMichael Clark case 5: 25063bd87176SWeiwei Li switch ((inst >> 27) & 0b11111) { 250702c1b569SPhilipp Tomsich case 0b00000: op = rv_op_srli; break; 25085748c886SWeiwei Li case 0b00001: 25093bd87176SWeiwei Li switch ((inst >> 20) & 0b1111111) { 25105748c886SWeiwei Li case 0b0001111: op = rv_op_unzip; break; 25115748c886SWeiwei Li } 25125748c886SWeiwei Li break; 251302c1b569SPhilipp Tomsich case 0b00101: op = rv_op_orc_b; break; 251402c1b569SPhilipp Tomsich case 0b01000: op = rv_op_srai; break; 251502c1b569SPhilipp Tomsich case 0b01001: op = rv_op_bexti; break; 251602c1b569SPhilipp Tomsich case 0b01100: op = rv_op_rori; break; 251702c1b569SPhilipp Tomsich case 0b01101: 251802c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b1111111) { 25195748c886SWeiwei Li case 0b0011000: op = rv_op_rev8; break; 252002c1b569SPhilipp Tomsich case 0b0111000: op = rv_op_rev8; break; 25215748c886SWeiwei Li case 0b0000111: op = rv_op_brev8; break; 252202c1b569SPhilipp Tomsich } 252302c1b569SPhilipp Tomsich break; 2524ea103259SMichael Clark } 2525ea103259SMichael Clark break; 2526ea103259SMichael Clark case 6: op = rv_op_ori; break; 2527ea103259SMichael Clark case 7: op = rv_op_andi; break; 2528ea103259SMichael Clark } 2529ea103259SMichael Clark break; 2530ea103259SMichael Clark case 5: op = rv_op_auipc; break; 2531ea103259SMichael Clark case 6: 25323bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2533ea103259SMichael Clark case 0: op = rv_op_addiw; break; 2534ea103259SMichael Clark case 1: 25353bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 2536ea103259SMichael Clark case 0: op = rv_op_slliw; break; 253713e269f6SIvan Klokov case 2: op = rv_op_slli_uw; break; 253813e269f6SIvan Klokov case 24: 253902c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 254002c1b569SPhilipp Tomsich case 0b00000: op = rv_op_clzw; break; 254102c1b569SPhilipp Tomsich case 0b00001: op = rv_op_ctzw; break; 254202c1b569SPhilipp Tomsich case 0b00010: op = rv_op_cpopw; break; 254302c1b569SPhilipp Tomsich } 254402c1b569SPhilipp Tomsich break; 2545ea103259SMichael Clark } 2546ea103259SMichael Clark break; 2547ea103259SMichael Clark case 5: 25483bd87176SWeiwei Li switch ((inst >> 25) & 0b1111111) { 2549ea103259SMichael Clark case 0: op = rv_op_srliw; break; 2550ea103259SMichael Clark case 32: op = rv_op_sraiw; break; 255102c1b569SPhilipp Tomsich case 48: op = rv_op_roriw; break; 2552ea103259SMichael Clark } 2553ea103259SMichael Clark break; 2554ea103259SMichael Clark } 2555ea103259SMichael Clark break; 2556ea103259SMichael Clark case 8: 25573bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2558ea103259SMichael Clark case 0: op = rv_op_sb; break; 2559ea103259SMichael Clark case 1: op = rv_op_sh; break; 2560ea103259SMichael Clark case 2: op = rv_op_sw; break; 2561ea103259SMichael Clark case 3: op = rv_op_sd; break; 2562ea103259SMichael Clark case 4: op = rv_op_sq; break; 2563ea103259SMichael Clark } 2564ea103259SMichael Clark break; 2565ea103259SMichael Clark case 9: 25663bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 256707f4964dSYang Liu case 0: 25683bd87176SWeiwei Li switch ((inst >> 20) & 0b111111111111) { 256907f4964dSYang Liu case 40: op = rv_op_vs1r_v; break; 257007f4964dSYang Liu case 552: op = rv_op_vs2r_v; break; 257107f4964dSYang Liu case 1576: op = rv_op_vs4r_v; break; 257207f4964dSYang Liu case 3624: op = rv_op_vs8r_v; break; 257307f4964dSYang Liu } 25743bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 257507f4964dSYang Liu case 0: 25763bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 257707f4964dSYang Liu case 0: op = rv_op_vse8_v; break; 257807f4964dSYang Liu case 11: op = rv_op_vsm_v; break; 257907f4964dSYang Liu } 258007f4964dSYang Liu break; 258107f4964dSYang Liu case 1: op = rv_op_vsuxei8_v; break; 258207f4964dSYang Liu case 2: op = rv_op_vsse8_v; break; 258307f4964dSYang Liu case 3: op = rv_op_vsoxei8_v; break; 258407f4964dSYang Liu } 258507f4964dSYang Liu break; 2586ea103259SMichael Clark case 2: op = rv_op_fsw; break; 2587ea103259SMichael Clark case 3: op = rv_op_fsd; break; 2588ea103259SMichael Clark case 4: op = rv_op_fsq; break; 258907f4964dSYang Liu case 5: 25903bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 259107f4964dSYang Liu case 0: 25923bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 259307f4964dSYang Liu case 0: op = rv_op_vse16_v; break; 259407f4964dSYang Liu } 259507f4964dSYang Liu break; 259607f4964dSYang Liu case 1: op = rv_op_vsuxei16_v; break; 259707f4964dSYang Liu case 2: op = rv_op_vsse16_v; break; 259807f4964dSYang Liu case 3: op = rv_op_vsoxei16_v; break; 259907f4964dSYang Liu } 260007f4964dSYang Liu break; 260107f4964dSYang Liu case 6: 26023bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 260307f4964dSYang Liu case 0: 26043bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 260507f4964dSYang Liu case 0: op = rv_op_vse32_v; break; 260607f4964dSYang Liu } 260707f4964dSYang Liu break; 260807f4964dSYang Liu case 1: op = rv_op_vsuxei32_v; break; 260907f4964dSYang Liu case 2: op = rv_op_vsse32_v; break; 261007f4964dSYang Liu case 3: op = rv_op_vsoxei32_v; break; 261107f4964dSYang Liu } 261207f4964dSYang Liu break; 261307f4964dSYang Liu case 7: 26143bd87176SWeiwei Li switch ((inst >> 26) & 0b111) { 261507f4964dSYang Liu case 0: 26163bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 261707f4964dSYang Liu case 0: op = rv_op_vse64_v; break; 261807f4964dSYang Liu } 261907f4964dSYang Liu break; 262007f4964dSYang Liu case 1: op = rv_op_vsuxei64_v; break; 262107f4964dSYang Liu case 2: op = rv_op_vsse64_v; break; 262207f4964dSYang Liu case 3: op = rv_op_vsoxei64_v; break; 262307f4964dSYang Liu } 262407f4964dSYang Liu break; 2625ea103259SMichael Clark } 2626ea103259SMichael Clark break; 2627ea103259SMichael Clark case 11: 262898624d13SWeiwei Li switch (((inst >> 24) & 0b11111000) | 262998624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2630ea103259SMichael Clark case 2: op = rv_op_amoadd_w; break; 2631ea103259SMichael Clark case 3: op = rv_op_amoadd_d; break; 2632ea103259SMichael Clark case 4: op = rv_op_amoadd_q; break; 2633ea103259SMichael Clark case 10: op = rv_op_amoswap_w; break; 2634ea103259SMichael Clark case 11: op = rv_op_amoswap_d; break; 2635ea103259SMichael Clark case 12: op = rv_op_amoswap_q; break; 2636ea103259SMichael Clark case 18: 26373bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2638ea103259SMichael Clark case 0: op = rv_op_lr_w; break; 2639ea103259SMichael Clark } 2640ea103259SMichael Clark break; 2641ea103259SMichael Clark case 19: 26423bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2643ea103259SMichael Clark case 0: op = rv_op_lr_d; break; 2644ea103259SMichael Clark } 2645ea103259SMichael Clark break; 2646ea103259SMichael Clark case 20: 26473bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2648ea103259SMichael Clark case 0: op = rv_op_lr_q; break; 2649ea103259SMichael Clark } 2650ea103259SMichael Clark break; 2651ea103259SMichael Clark case 26: op = rv_op_sc_w; break; 2652ea103259SMichael Clark case 27: op = rv_op_sc_d; break; 2653ea103259SMichael Clark case 28: op = rv_op_sc_q; break; 2654ea103259SMichael Clark case 34: op = rv_op_amoxor_w; break; 2655ea103259SMichael Clark case 35: op = rv_op_amoxor_d; break; 2656ea103259SMichael Clark case 36: op = rv_op_amoxor_q; break; 2657ea103259SMichael Clark case 66: op = rv_op_amoor_w; break; 2658ea103259SMichael Clark case 67: op = rv_op_amoor_d; break; 2659ea103259SMichael Clark case 68: op = rv_op_amoor_q; break; 2660ea103259SMichael Clark case 98: op = rv_op_amoand_w; break; 2661ea103259SMichael Clark case 99: op = rv_op_amoand_d; break; 2662ea103259SMichael Clark case 100: op = rv_op_amoand_q; break; 2663ea103259SMichael Clark case 130: op = rv_op_amomin_w; break; 2664ea103259SMichael Clark case 131: op = rv_op_amomin_d; break; 2665ea103259SMichael Clark case 132: op = rv_op_amomin_q; break; 2666ea103259SMichael Clark case 162: op = rv_op_amomax_w; break; 2667ea103259SMichael Clark case 163: op = rv_op_amomax_d; break; 2668ea103259SMichael Clark case 164: op = rv_op_amomax_q; break; 2669ea103259SMichael Clark case 194: op = rv_op_amominu_w; break; 2670ea103259SMichael Clark case 195: op = rv_op_amominu_d; break; 2671ea103259SMichael Clark case 196: op = rv_op_amominu_q; break; 2672ea103259SMichael Clark case 226: op = rv_op_amomaxu_w; break; 2673ea103259SMichael Clark case 227: op = rv_op_amomaxu_d; break; 2674ea103259SMichael Clark case 228: op = rv_op_amomaxu_q; break; 2675ea103259SMichael Clark } 2676ea103259SMichael Clark break; 2677ea103259SMichael Clark case 12: 267898624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 267998624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 2680ea103259SMichael Clark case 0: op = rv_op_add; break; 2681ea103259SMichael Clark case 1: op = rv_op_sll; break; 2682ea103259SMichael Clark case 2: op = rv_op_slt; break; 2683ea103259SMichael Clark case 3: op = rv_op_sltu; break; 2684ea103259SMichael Clark case 4: op = rv_op_xor; break; 2685ea103259SMichael Clark case 5: op = rv_op_srl; break; 2686ea103259SMichael Clark case 6: op = rv_op_or; break; 2687ea103259SMichael Clark case 7: op = rv_op_and; break; 2688ea103259SMichael Clark case 8: op = rv_op_mul; break; 2689ea103259SMichael Clark case 9: op = rv_op_mulh; break; 2690ea103259SMichael Clark case 10: op = rv_op_mulhsu; break; 2691ea103259SMichael Clark case 11: op = rv_op_mulhu; break; 2692ea103259SMichael Clark case 12: op = rv_op_div; break; 2693ea103259SMichael Clark case 13: op = rv_op_divu; break; 2694ea103259SMichael Clark case 14: op = rv_op_rem; break; 2695ea103259SMichael Clark case 15: op = rv_op_remu; break; 269602c1b569SPhilipp Tomsich case 36: 269702c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 269802c1b569SPhilipp Tomsich case 0: op = rv_op_zext_h; break; 26995748c886SWeiwei Li default: op = rv_op_pack; break; 270002c1b569SPhilipp Tomsich } 270102c1b569SPhilipp Tomsich break; 27025748c886SWeiwei Li case 39: op = rv_op_packh; break; 27035748c886SWeiwei Li 270402c1b569SPhilipp Tomsich case 41: op = rv_op_clmul; break; 270502c1b569SPhilipp Tomsich case 42: op = rv_op_clmulr; break; 270602c1b569SPhilipp Tomsich case 43: op = rv_op_clmulh; break; 270702c1b569SPhilipp Tomsich case 44: op = rv_op_min; break; 270802c1b569SPhilipp Tomsich case 45: op = rv_op_minu; break; 270902c1b569SPhilipp Tomsich case 46: op = rv_op_max; break; 271002c1b569SPhilipp Tomsich case 47: op = rv_op_maxu; break; 2711d397be9aSRichard Henderson case 075: op = rv_op_czero_eqz; break; 2712d397be9aSRichard Henderson case 077: op = rv_op_czero_nez; break; 271302c1b569SPhilipp Tomsich case 130: op = rv_op_sh1add; break; 271402c1b569SPhilipp Tomsich case 132: op = rv_op_sh2add; break; 271502c1b569SPhilipp Tomsich case 134: op = rv_op_sh3add; break; 271602c1b569SPhilipp Tomsich case 161: op = rv_op_bset; break; 27175748c886SWeiwei Li case 162: op = rv_op_xperm4; break; 27185748c886SWeiwei Li case 164: op = rv_op_xperm8; break; 27195748c886SWeiwei Li case 200: op = rv_op_aes64es; break; 27205748c886SWeiwei Li case 216: op = rv_op_aes64esm; break; 27215748c886SWeiwei Li case 232: op = rv_op_aes64ds; break; 27225748c886SWeiwei Li case 248: op = rv_op_aes64dsm; break; 2723ea103259SMichael Clark case 256: op = rv_op_sub; break; 272402c1b569SPhilipp Tomsich case 260: op = rv_op_xnor; break; 2725ea103259SMichael Clark case 261: op = rv_op_sra; break; 272602c1b569SPhilipp Tomsich case 262: op = rv_op_orn; break; 272702c1b569SPhilipp Tomsich case 263: op = rv_op_andn; break; 272802c1b569SPhilipp Tomsich case 289: op = rv_op_bclr; break; 272902c1b569SPhilipp Tomsich case 293: op = rv_op_bext; break; 27305748c886SWeiwei Li case 320: op = rv_op_sha512sum0r; break; 27315748c886SWeiwei Li case 328: op = rv_op_sha512sum1r; break; 27325748c886SWeiwei Li case 336: op = rv_op_sha512sig0l; break; 27335748c886SWeiwei Li case 344: op = rv_op_sha512sig1l; break; 27345748c886SWeiwei Li case 368: op = rv_op_sha512sig0h; break; 27355748c886SWeiwei Li case 376: op = rv_op_sha512sig1h; break; 273602c1b569SPhilipp Tomsich case 385: op = rv_op_rol; break; 27375748c886SWeiwei Li case 389: op = rv_op_ror; break; 273802c1b569SPhilipp Tomsich case 417: op = rv_op_binv; break; 27395748c886SWeiwei Li case 504: op = rv_op_aes64ks2; break; 27405748c886SWeiwei Li } 27415748c886SWeiwei Li switch ((inst >> 25) & 0b0011111) { 27425748c886SWeiwei Li case 17: op = rv_op_aes32esi; break; 27435748c886SWeiwei Li case 19: op = rv_op_aes32esmi; break; 27445748c886SWeiwei Li case 21: op = rv_op_aes32dsi; break; 27455748c886SWeiwei Li case 23: op = rv_op_aes32dsmi; break; 27465748c886SWeiwei Li case 24: op = rv_op_sm4ed; break; 27475748c886SWeiwei Li case 26: op = rv_op_sm4ks; break; 2748ea103259SMichael Clark } 2749ea103259SMichael Clark break; 2750ea103259SMichael Clark case 13: op = rv_op_lui; break; 2751ea103259SMichael Clark case 14: 275298624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 275398624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 2754ea103259SMichael Clark case 0: op = rv_op_addw; break; 2755ea103259SMichael Clark case 1: op = rv_op_sllw; break; 2756ea103259SMichael Clark case 5: op = rv_op_srlw; break; 2757ea103259SMichael Clark case 8: op = rv_op_mulw; break; 2758ea103259SMichael Clark case 12: op = rv_op_divw; break; 2759ea103259SMichael Clark case 13: op = rv_op_divuw; break; 2760ea103259SMichael Clark case 14: op = rv_op_remw; break; 2761ea103259SMichael Clark case 15: op = rv_op_remuw; break; 276202c1b569SPhilipp Tomsich case 32: op = rv_op_add_uw; break; 276302c1b569SPhilipp Tomsich case 36: 276402c1b569SPhilipp Tomsich switch ((inst >> 20) & 0b11111) { 276502c1b569SPhilipp Tomsich case 0: op = rv_op_zext_h; break; 27665748c886SWeiwei Li default: op = rv_op_packw; break; 276702c1b569SPhilipp Tomsich } 276802c1b569SPhilipp Tomsich break; 276902c1b569SPhilipp Tomsich case 130: op = rv_op_sh1add_uw; break; 277002c1b569SPhilipp Tomsich case 132: op = rv_op_sh2add_uw; break; 277102c1b569SPhilipp Tomsich case 134: op = rv_op_sh3add_uw; break; 2772ea103259SMichael Clark case 256: op = rv_op_subw; break; 2773ea103259SMichael Clark case 261: op = rv_op_sraw; break; 277402c1b569SPhilipp Tomsich case 385: op = rv_op_rolw; break; 277502c1b569SPhilipp Tomsich case 389: op = rv_op_rorw; break; 2776ea103259SMichael Clark } 2777ea103259SMichael Clark break; 2778ea103259SMichael Clark case 16: 27793bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2780ea103259SMichael Clark case 0: op = rv_op_fmadd_s; break; 2781ea103259SMichael Clark case 1: op = rv_op_fmadd_d; break; 2782ea103259SMichael Clark case 3: op = rv_op_fmadd_q; break; 2783ea103259SMichael Clark } 2784ea103259SMichael Clark break; 2785ea103259SMichael Clark case 17: 27863bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2787ea103259SMichael Clark case 0: op = rv_op_fmsub_s; break; 2788ea103259SMichael Clark case 1: op = rv_op_fmsub_d; break; 2789ea103259SMichael Clark case 3: op = rv_op_fmsub_q; break; 2790ea103259SMichael Clark } 2791ea103259SMichael Clark break; 2792ea103259SMichael Clark case 18: 27933bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2794ea103259SMichael Clark case 0: op = rv_op_fnmsub_s; break; 2795ea103259SMichael Clark case 1: op = rv_op_fnmsub_d; break; 2796ea103259SMichael Clark case 3: op = rv_op_fnmsub_q; break; 2797ea103259SMichael Clark } 2798ea103259SMichael Clark break; 2799ea103259SMichael Clark case 19: 28003bd87176SWeiwei Li switch ((inst >> 25) & 0b11) { 2801ea103259SMichael Clark case 0: op = rv_op_fnmadd_s; break; 2802ea103259SMichael Clark case 1: op = rv_op_fnmadd_d; break; 2803ea103259SMichael Clark case 3: op = rv_op_fnmadd_q; break; 2804ea103259SMichael Clark } 2805ea103259SMichael Clark break; 2806ea103259SMichael Clark case 20: 28073bd87176SWeiwei Li switch ((inst >> 25) & 0b1111111) { 2808ea103259SMichael Clark case 0: op = rv_op_fadd_s; break; 2809ea103259SMichael Clark case 1: op = rv_op_fadd_d; break; 2810ea103259SMichael Clark case 3: op = rv_op_fadd_q; break; 2811ea103259SMichael Clark case 4: op = rv_op_fsub_s; break; 2812ea103259SMichael Clark case 5: op = rv_op_fsub_d; break; 2813ea103259SMichael Clark case 7: op = rv_op_fsub_q; break; 2814ea103259SMichael Clark case 8: op = rv_op_fmul_s; break; 2815ea103259SMichael Clark case 9: op = rv_op_fmul_d; break; 2816ea103259SMichael Clark case 11: op = rv_op_fmul_q; break; 2817ea103259SMichael Clark case 12: op = rv_op_fdiv_s; break; 2818ea103259SMichael Clark case 13: op = rv_op_fdiv_d; break; 2819ea103259SMichael Clark case 15: op = rv_op_fdiv_q; break; 2820ea103259SMichael Clark case 16: 28213bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2822ea103259SMichael Clark case 0: op = rv_op_fsgnj_s; break; 2823ea103259SMichael Clark case 1: op = rv_op_fsgnjn_s; break; 2824ea103259SMichael Clark case 2: op = rv_op_fsgnjx_s; break; 2825ea103259SMichael Clark } 2826ea103259SMichael Clark break; 2827ea103259SMichael Clark case 17: 28283bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2829ea103259SMichael Clark case 0: op = rv_op_fsgnj_d; break; 2830ea103259SMichael Clark case 1: op = rv_op_fsgnjn_d; break; 2831ea103259SMichael Clark case 2: op = rv_op_fsgnjx_d; break; 2832ea103259SMichael Clark } 2833ea103259SMichael Clark break; 2834ea103259SMichael Clark case 19: 28353bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2836ea103259SMichael Clark case 0: op = rv_op_fsgnj_q; break; 2837ea103259SMichael Clark case 1: op = rv_op_fsgnjn_q; break; 2838ea103259SMichael Clark case 2: op = rv_op_fsgnjx_q; break; 2839ea103259SMichael Clark } 2840ea103259SMichael Clark break; 2841ea103259SMichael Clark case 20: 28423bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2843ea103259SMichael Clark case 0: op = rv_op_fmin_s; break; 2844ea103259SMichael Clark case 1: op = rv_op_fmax_s; break; 2845ea103259SMichael Clark } 2846ea103259SMichael Clark break; 2847ea103259SMichael Clark case 21: 28483bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2849ea103259SMichael Clark case 0: op = rv_op_fmin_d; break; 2850ea103259SMichael Clark case 1: op = rv_op_fmax_d; break; 2851ea103259SMichael Clark } 2852ea103259SMichael Clark break; 2853ea103259SMichael Clark case 23: 28543bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2855ea103259SMichael Clark case 0: op = rv_op_fmin_q; break; 2856ea103259SMichael Clark case 1: op = rv_op_fmax_q; break; 2857ea103259SMichael Clark } 2858ea103259SMichael Clark break; 2859ea103259SMichael Clark case 32: 28603bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2861ea103259SMichael Clark case 1: op = rv_op_fcvt_s_d; break; 2862ea103259SMichael Clark case 3: op = rv_op_fcvt_s_q; break; 2863ea103259SMichael Clark } 2864ea103259SMichael Clark break; 2865ea103259SMichael Clark case 33: 28663bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2867ea103259SMichael Clark case 0: op = rv_op_fcvt_d_s; break; 2868ea103259SMichael Clark case 3: op = rv_op_fcvt_d_q; break; 2869ea103259SMichael Clark } 2870ea103259SMichael Clark break; 2871ea103259SMichael Clark case 35: 28723bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2873ea103259SMichael Clark case 0: op = rv_op_fcvt_q_s; break; 2874ea103259SMichael Clark case 1: op = rv_op_fcvt_q_d; break; 2875ea103259SMichael Clark } 2876ea103259SMichael Clark break; 2877ea103259SMichael Clark case 44: 28783bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2879ea103259SMichael Clark case 0: op = rv_op_fsqrt_s; break; 2880ea103259SMichael Clark } 2881ea103259SMichael Clark break; 2882ea103259SMichael Clark case 45: 28833bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2884ea103259SMichael Clark case 0: op = rv_op_fsqrt_d; break; 2885ea103259SMichael Clark } 2886ea103259SMichael Clark break; 2887ea103259SMichael Clark case 47: 28883bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2889ea103259SMichael Clark case 0: op = rv_op_fsqrt_q; break; 2890ea103259SMichael Clark } 2891ea103259SMichael Clark break; 2892ea103259SMichael Clark case 80: 28933bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2894ea103259SMichael Clark case 0: op = rv_op_fle_s; break; 2895ea103259SMichael Clark case 1: op = rv_op_flt_s; break; 2896ea103259SMichael Clark case 2: op = rv_op_feq_s; break; 2897ea103259SMichael Clark } 2898ea103259SMichael Clark break; 2899ea103259SMichael Clark case 81: 29003bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2901ea103259SMichael Clark case 0: op = rv_op_fle_d; break; 2902ea103259SMichael Clark case 1: op = rv_op_flt_d; break; 2903ea103259SMichael Clark case 2: op = rv_op_feq_d; break; 2904ea103259SMichael Clark } 2905ea103259SMichael Clark break; 2906ea103259SMichael Clark case 83: 29073bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 2908ea103259SMichael Clark case 0: op = rv_op_fle_q; break; 2909ea103259SMichael Clark case 1: op = rv_op_flt_q; break; 2910ea103259SMichael Clark case 2: op = rv_op_feq_q; break; 2911ea103259SMichael Clark } 2912ea103259SMichael Clark break; 2913ea103259SMichael Clark case 96: 29143bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2915ea103259SMichael Clark case 0: op = rv_op_fcvt_w_s; break; 2916ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_s; break; 2917ea103259SMichael Clark case 2: op = rv_op_fcvt_l_s; break; 2918ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_s; break; 2919ea103259SMichael Clark } 2920ea103259SMichael Clark break; 2921ea103259SMichael Clark case 97: 29223bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2923ea103259SMichael Clark case 0: op = rv_op_fcvt_w_d; break; 2924ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_d; break; 2925ea103259SMichael Clark case 2: op = rv_op_fcvt_l_d; break; 2926ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_d; break; 2927ea103259SMichael Clark } 2928ea103259SMichael Clark break; 2929ea103259SMichael Clark case 99: 29303bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2931ea103259SMichael Clark case 0: op = rv_op_fcvt_w_q; break; 2932ea103259SMichael Clark case 1: op = rv_op_fcvt_wu_q; break; 2933ea103259SMichael Clark case 2: op = rv_op_fcvt_l_q; break; 2934ea103259SMichael Clark case 3: op = rv_op_fcvt_lu_q; break; 2935ea103259SMichael Clark } 2936ea103259SMichael Clark break; 2937ea103259SMichael Clark case 104: 29383bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2939ea103259SMichael Clark case 0: op = rv_op_fcvt_s_w; break; 2940ea103259SMichael Clark case 1: op = rv_op_fcvt_s_wu; break; 2941ea103259SMichael Clark case 2: op = rv_op_fcvt_s_l; break; 2942ea103259SMichael Clark case 3: op = rv_op_fcvt_s_lu; break; 2943ea103259SMichael Clark } 2944ea103259SMichael Clark break; 2945ea103259SMichael Clark case 105: 29463bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2947ea103259SMichael Clark case 0: op = rv_op_fcvt_d_w; break; 2948ea103259SMichael Clark case 1: op = rv_op_fcvt_d_wu; break; 2949ea103259SMichael Clark case 2: op = rv_op_fcvt_d_l; break; 2950ea103259SMichael Clark case 3: op = rv_op_fcvt_d_lu; break; 2951ea103259SMichael Clark } 2952ea103259SMichael Clark break; 2953ea103259SMichael Clark case 107: 29543bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 2955ea103259SMichael Clark case 0: op = rv_op_fcvt_q_w; break; 2956ea103259SMichael Clark case 1: op = rv_op_fcvt_q_wu; break; 2957ea103259SMichael Clark case 2: op = rv_op_fcvt_q_l; break; 2958ea103259SMichael Clark case 3: op = rv_op_fcvt_q_lu; break; 2959ea103259SMichael Clark } 2960ea103259SMichael Clark break; 2961ea103259SMichael Clark case 112: 296298624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 296398624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2964ea103259SMichael Clark case 0: op = rv_op_fmv_x_s; break; 2965ea103259SMichael Clark case 1: op = rv_op_fclass_s; break; 2966ea103259SMichael Clark } 2967ea103259SMichael Clark break; 2968ea103259SMichael Clark case 113: 296998624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 297098624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2971ea103259SMichael Clark case 0: op = rv_op_fmv_x_d; break; 2972ea103259SMichael Clark case 1: op = rv_op_fclass_d; break; 2973ea103259SMichael Clark } 2974ea103259SMichael Clark break; 2975ea103259SMichael Clark case 115: 297698624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 297798624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2978ea103259SMichael Clark case 0: op = rv_op_fmv_x_q; break; 2979ea103259SMichael Clark case 1: op = rv_op_fclass_q; break; 2980ea103259SMichael Clark } 2981ea103259SMichael Clark break; 2982ea103259SMichael Clark case 120: 298398624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 298498624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2985ea103259SMichael Clark case 0: op = rv_op_fmv_s_x; break; 2986ea103259SMichael Clark } 2987ea103259SMichael Clark break; 2988ea103259SMichael Clark case 121: 298998624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 299098624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2991ea103259SMichael Clark case 0: op = rv_op_fmv_d_x; break; 2992ea103259SMichael Clark } 2993ea103259SMichael Clark break; 2994ea103259SMichael Clark case 123: 299598624d13SWeiwei Li switch (((inst >> 17) & 0b11111000) | 299698624d13SWeiwei Li ((inst >> 12) & 0b00000111)) { 2997ea103259SMichael Clark case 0: op = rv_op_fmv_q_x; break; 2998ea103259SMichael Clark } 2999ea103259SMichael Clark break; 3000ea103259SMichael Clark } 3001ea103259SMichael Clark break; 300207f4964dSYang Liu case 21: 30033bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 300407f4964dSYang Liu case 0: 30053bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 300607f4964dSYang Liu case 0: op = rv_op_vadd_vv; break; 300707f4964dSYang Liu case 2: op = rv_op_vsub_vv; break; 300807f4964dSYang Liu case 4: op = rv_op_vminu_vv; break; 300907f4964dSYang Liu case 5: op = rv_op_vmin_vv; break; 301007f4964dSYang Liu case 6: op = rv_op_vmaxu_vv; break; 301107f4964dSYang Liu case 7: op = rv_op_vmax_vv; break; 301207f4964dSYang Liu case 9: op = rv_op_vand_vv; break; 301307f4964dSYang Liu case 10: op = rv_op_vor_vv; break; 301407f4964dSYang Liu case 11: op = rv_op_vxor_vv; break; 301507f4964dSYang Liu case 12: op = rv_op_vrgather_vv; break; 301607f4964dSYang Liu case 14: op = rv_op_vrgatherei16_vv; break; 301798624d13SWeiwei Li case 16: 301898624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 301998624d13SWeiwei Li op = rv_op_vadc_vvm; 302098624d13SWeiwei Li } 302198624d13SWeiwei Li break; 302207f4964dSYang Liu case 17: op = rv_op_vmadc_vvm; break; 302398624d13SWeiwei Li case 18: 302498624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 302598624d13SWeiwei Li op = rv_op_vsbc_vvm; 302698624d13SWeiwei Li } 302798624d13SWeiwei Li break; 302807f4964dSYang Liu case 19: op = rv_op_vmsbc_vvm; break; 302907f4964dSYang Liu case 23: 303007f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 303107f4964dSYang Liu op = rv_op_vmv_v_v; 303207f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 303307f4964dSYang Liu op = rv_op_vmerge_vvm; 303407f4964dSYang Liu break; 303507f4964dSYang Liu case 24: op = rv_op_vmseq_vv; break; 303607f4964dSYang Liu case 25: op = rv_op_vmsne_vv; break; 303707f4964dSYang Liu case 26: op = rv_op_vmsltu_vv; break; 303807f4964dSYang Liu case 27: op = rv_op_vmslt_vv; break; 303907f4964dSYang Liu case 28: op = rv_op_vmsleu_vv; break; 304007f4964dSYang Liu case 29: op = rv_op_vmsle_vv; break; 304107f4964dSYang Liu case 32: op = rv_op_vsaddu_vv; break; 304207f4964dSYang Liu case 33: op = rv_op_vsadd_vv; break; 304307f4964dSYang Liu case 34: op = rv_op_vssubu_vv; break; 304407f4964dSYang Liu case 35: op = rv_op_vssub_vv; break; 304507f4964dSYang Liu case 37: op = rv_op_vsll_vv; break; 304607f4964dSYang Liu case 39: op = rv_op_vsmul_vv; break; 304707f4964dSYang Liu case 40: op = rv_op_vsrl_vv; break; 304807f4964dSYang Liu case 41: op = rv_op_vsra_vv; break; 304907f4964dSYang Liu case 42: op = rv_op_vssrl_vv; break; 305007f4964dSYang Liu case 43: op = rv_op_vssra_vv; break; 305107f4964dSYang Liu case 44: op = rv_op_vnsrl_wv; break; 305207f4964dSYang Liu case 45: op = rv_op_vnsra_wv; break; 305307f4964dSYang Liu case 46: op = rv_op_vnclipu_wv; break; 305407f4964dSYang Liu case 47: op = rv_op_vnclip_wv; break; 305507f4964dSYang Liu case 48: op = rv_op_vwredsumu_vs; break; 305607f4964dSYang Liu case 49: op = rv_op_vwredsum_vs; break; 305707f4964dSYang Liu } 305807f4964dSYang Liu break; 305907f4964dSYang Liu case 1: 30603bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 306107f4964dSYang Liu case 0: op = rv_op_vfadd_vv; break; 306207f4964dSYang Liu case 1: op = rv_op_vfredusum_vs; break; 306307f4964dSYang Liu case 2: op = rv_op_vfsub_vv; break; 306407f4964dSYang Liu case 3: op = rv_op_vfredosum_vs; break; 306507f4964dSYang Liu case 4: op = rv_op_vfmin_vv; break; 306607f4964dSYang Liu case 5: op = rv_op_vfredmin_vs; break; 306707f4964dSYang Liu case 6: op = rv_op_vfmax_vv; break; 306807f4964dSYang Liu case 7: op = rv_op_vfredmax_vs; break; 306907f4964dSYang Liu case 8: op = rv_op_vfsgnj_vv; break; 307007f4964dSYang Liu case 9: op = rv_op_vfsgnjn_vv; break; 307107f4964dSYang Liu case 10: op = rv_op_vfsgnjx_vv; break; 307207f4964dSYang Liu case 16: 30733bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 307407f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_f_s; break; 307507f4964dSYang Liu } 307607f4964dSYang Liu break; 307707f4964dSYang Liu case 18: 30783bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 307907f4964dSYang Liu case 0: op = rv_op_vfcvt_xu_f_v; break; 308007f4964dSYang Liu case 1: op = rv_op_vfcvt_x_f_v; break; 308107f4964dSYang Liu case 2: op = rv_op_vfcvt_f_xu_v; break; 308207f4964dSYang Liu case 3: op = rv_op_vfcvt_f_x_v; break; 308307f4964dSYang Liu case 6: op = rv_op_vfcvt_rtz_xu_f_v; break; 308407f4964dSYang Liu case 7: op = rv_op_vfcvt_rtz_x_f_v; break; 308507f4964dSYang Liu case 8: op = rv_op_vfwcvt_xu_f_v; break; 308607f4964dSYang Liu case 9: op = rv_op_vfwcvt_x_f_v; break; 308707f4964dSYang Liu case 10: op = rv_op_vfwcvt_f_xu_v; break; 308807f4964dSYang Liu case 11: op = rv_op_vfwcvt_f_x_v; break; 308907f4964dSYang Liu case 12: op = rv_op_vfwcvt_f_f_v; break; 309007f4964dSYang Liu case 14: op = rv_op_vfwcvt_rtz_xu_f_v; break; 309107f4964dSYang Liu case 15: op = rv_op_vfwcvt_rtz_x_f_v; break; 309207f4964dSYang Liu case 16: op = rv_op_vfncvt_xu_f_w; break; 309307f4964dSYang Liu case 17: op = rv_op_vfncvt_x_f_w; break; 309407f4964dSYang Liu case 18: op = rv_op_vfncvt_f_xu_w; break; 309507f4964dSYang Liu case 19: op = rv_op_vfncvt_f_x_w; break; 309607f4964dSYang Liu case 20: op = rv_op_vfncvt_f_f_w; break; 309707f4964dSYang Liu case 21: op = rv_op_vfncvt_rod_f_f_w; break; 309807f4964dSYang Liu case 22: op = rv_op_vfncvt_rtz_xu_f_w; break; 309907f4964dSYang Liu case 23: op = rv_op_vfncvt_rtz_x_f_w; break; 310007f4964dSYang Liu } 310107f4964dSYang Liu break; 310207f4964dSYang Liu case 19: 31033bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 310407f4964dSYang Liu case 0: op = rv_op_vfsqrt_v; break; 310507f4964dSYang Liu case 4: op = rv_op_vfrsqrt7_v; break; 310607f4964dSYang Liu case 5: op = rv_op_vfrec7_v; break; 310707f4964dSYang Liu case 16: op = rv_op_vfclass_v; break; 310807f4964dSYang Liu } 310907f4964dSYang Liu break; 311007f4964dSYang Liu case 24: op = rv_op_vmfeq_vv; break; 311107f4964dSYang Liu case 25: op = rv_op_vmfle_vv; break; 311207f4964dSYang Liu case 27: op = rv_op_vmflt_vv; break; 311307f4964dSYang Liu case 28: op = rv_op_vmfne_vv; break; 311407f4964dSYang Liu case 32: op = rv_op_vfdiv_vv; break; 311507f4964dSYang Liu case 36: op = rv_op_vfmul_vv; break; 311607f4964dSYang Liu case 40: op = rv_op_vfmadd_vv; break; 311707f4964dSYang Liu case 41: op = rv_op_vfnmadd_vv; break; 311807f4964dSYang Liu case 42: op = rv_op_vfmsub_vv; break; 311907f4964dSYang Liu case 43: op = rv_op_vfnmsub_vv; break; 312007f4964dSYang Liu case 44: op = rv_op_vfmacc_vv; break; 312107f4964dSYang Liu case 45: op = rv_op_vfnmacc_vv; break; 312207f4964dSYang Liu case 46: op = rv_op_vfmsac_vv; break; 312307f4964dSYang Liu case 47: op = rv_op_vfnmsac_vv; break; 312407f4964dSYang Liu case 48: op = rv_op_vfwadd_vv; break; 312507f4964dSYang Liu case 49: op = rv_op_vfwredusum_vs; break; 312607f4964dSYang Liu case 50: op = rv_op_vfwsub_vv; break; 312707f4964dSYang Liu case 51: op = rv_op_vfwredosum_vs; break; 312807f4964dSYang Liu case 52: op = rv_op_vfwadd_wv; break; 312907f4964dSYang Liu case 54: op = rv_op_vfwsub_wv; break; 313007f4964dSYang Liu case 56: op = rv_op_vfwmul_vv; break; 313107f4964dSYang Liu case 60: op = rv_op_vfwmacc_vv; break; 313207f4964dSYang Liu case 61: op = rv_op_vfwnmacc_vv; break; 313307f4964dSYang Liu case 62: op = rv_op_vfwmsac_vv; break; 313407f4964dSYang Liu case 63: op = rv_op_vfwnmsac_vv; break; 313507f4964dSYang Liu } 313607f4964dSYang Liu break; 313707f4964dSYang Liu case 2: 31383bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 313907f4964dSYang Liu case 0: op = rv_op_vredsum_vs; break; 314007f4964dSYang Liu case 1: op = rv_op_vredand_vs; break; 314107f4964dSYang Liu case 2: op = rv_op_vredor_vs; break; 314207f4964dSYang Liu case 3: op = rv_op_vredxor_vs; break; 314307f4964dSYang Liu case 4: op = rv_op_vredminu_vs; break; 314407f4964dSYang Liu case 5: op = rv_op_vredmin_vs; break; 314507f4964dSYang Liu case 6: op = rv_op_vredmaxu_vs; break; 314607f4964dSYang Liu case 7: op = rv_op_vredmax_vs; break; 314707f4964dSYang Liu case 8: op = rv_op_vaaddu_vv; break; 314807f4964dSYang Liu case 9: op = rv_op_vaadd_vv; break; 314907f4964dSYang Liu case 10: op = rv_op_vasubu_vv; break; 315007f4964dSYang Liu case 11: op = rv_op_vasub_vv; break; 315107f4964dSYang Liu case 16: 31523bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 315307f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vmv_x_s; break; 315407f4964dSYang Liu case 16: op = rv_op_vcpop_m; break; 315507f4964dSYang Liu case 17: op = rv_op_vfirst_m; break; 315607f4964dSYang Liu } 315707f4964dSYang Liu break; 315807f4964dSYang Liu case 18: 31593bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 316007f4964dSYang Liu case 2: op = rv_op_vzext_vf8; break; 316107f4964dSYang Liu case 3: op = rv_op_vsext_vf8; break; 316207f4964dSYang Liu case 4: op = rv_op_vzext_vf4; break; 316307f4964dSYang Liu case 5: op = rv_op_vsext_vf4; break; 316407f4964dSYang Liu case 6: op = rv_op_vzext_vf2; break; 316507f4964dSYang Liu case 7: op = rv_op_vsext_vf2; break; 316607f4964dSYang Liu } 316707f4964dSYang Liu break; 316807f4964dSYang Liu case 20: 31693bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 317007f4964dSYang Liu case 1: op = rv_op_vmsbf_m; break; 317107f4964dSYang Liu case 2: op = rv_op_vmsof_m; break; 317207f4964dSYang Liu case 3: op = rv_op_vmsif_m; break; 317307f4964dSYang Liu case 16: op = rv_op_viota_m; break; 317498624d13SWeiwei Li case 17: 317598624d13SWeiwei Li if (((inst >> 20) & 0b11111) == 0) { 317698624d13SWeiwei Li op = rv_op_vid_v; 317798624d13SWeiwei Li } 317898624d13SWeiwei Li break; 317907f4964dSYang Liu } 318007f4964dSYang Liu break; 318107f4964dSYang Liu case 23: if ((inst >> 25) & 1) op = rv_op_vcompress_vm; break; 318207f4964dSYang Liu case 24: if ((inst >> 25) & 1) op = rv_op_vmandn_mm; break; 318307f4964dSYang Liu case 25: if ((inst >> 25) & 1) op = rv_op_vmand_mm; break; 318407f4964dSYang Liu case 26: if ((inst >> 25) & 1) op = rv_op_vmor_mm; break; 318507f4964dSYang Liu case 27: if ((inst >> 25) & 1) op = rv_op_vmxor_mm; break; 318607f4964dSYang Liu case 28: if ((inst >> 25) & 1) op = rv_op_vmorn_mm; break; 318707f4964dSYang Liu case 29: if ((inst >> 25) & 1) op = rv_op_vmnand_mm; break; 318807f4964dSYang Liu case 30: if ((inst >> 25) & 1) op = rv_op_vmnor_mm; break; 318907f4964dSYang Liu case 31: if ((inst >> 25) & 1) op = rv_op_vmxnor_mm; break; 319007f4964dSYang Liu case 32: op = rv_op_vdivu_vv; break; 319107f4964dSYang Liu case 33: op = rv_op_vdiv_vv; break; 319207f4964dSYang Liu case 34: op = rv_op_vremu_vv; break; 319307f4964dSYang Liu case 35: op = rv_op_vrem_vv; break; 319407f4964dSYang Liu case 36: op = rv_op_vmulhu_vv; break; 319507f4964dSYang Liu case 37: op = rv_op_vmul_vv; break; 319607f4964dSYang Liu case 38: op = rv_op_vmulhsu_vv; break; 319707f4964dSYang Liu case 39: op = rv_op_vmulh_vv; break; 319807f4964dSYang Liu case 41: op = rv_op_vmadd_vv; break; 319907f4964dSYang Liu case 43: op = rv_op_vnmsub_vv; break; 320007f4964dSYang Liu case 45: op = rv_op_vmacc_vv; break; 320107f4964dSYang Liu case 47: op = rv_op_vnmsac_vv; break; 320207f4964dSYang Liu case 48: op = rv_op_vwaddu_vv; break; 320307f4964dSYang Liu case 49: op = rv_op_vwadd_vv; break; 320407f4964dSYang Liu case 50: op = rv_op_vwsubu_vv; break; 320507f4964dSYang Liu case 51: op = rv_op_vwsub_vv; break; 320607f4964dSYang Liu case 52: op = rv_op_vwaddu_wv; break; 320707f4964dSYang Liu case 53: op = rv_op_vwadd_wv; break; 320807f4964dSYang Liu case 54: op = rv_op_vwsubu_wv; break; 320907f4964dSYang Liu case 55: op = rv_op_vwsub_wv; break; 321007f4964dSYang Liu case 56: op = rv_op_vwmulu_vv; break; 321107f4964dSYang Liu case 58: op = rv_op_vwmulsu_vv; break; 321207f4964dSYang Liu case 59: op = rv_op_vwmul_vv; break; 321307f4964dSYang Liu case 60: op = rv_op_vwmaccu_vv; break; 321407f4964dSYang Liu case 61: op = rv_op_vwmacc_vv; break; 321507f4964dSYang Liu case 63: op = rv_op_vwmaccsu_vv; break; 321607f4964dSYang Liu } 321707f4964dSYang Liu break; 321807f4964dSYang Liu case 3: 32193bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 322007f4964dSYang Liu case 0: op = rv_op_vadd_vi; break; 322107f4964dSYang Liu case 3: op = rv_op_vrsub_vi; break; 322207f4964dSYang Liu case 9: op = rv_op_vand_vi; break; 322307f4964dSYang Liu case 10: op = rv_op_vor_vi; break; 322407f4964dSYang Liu case 11: op = rv_op_vxor_vi; break; 322507f4964dSYang Liu case 12: op = rv_op_vrgather_vi; break; 322607f4964dSYang Liu case 14: op = rv_op_vslideup_vi; break; 322707f4964dSYang Liu case 15: op = rv_op_vslidedown_vi; break; 322898624d13SWeiwei Li case 16: 322998624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 323098624d13SWeiwei Li op = rv_op_vadc_vim; 323198624d13SWeiwei Li } 323298624d13SWeiwei Li break; 323307f4964dSYang Liu case 17: op = rv_op_vmadc_vim; break; 323407f4964dSYang Liu case 23: 323507f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 323607f4964dSYang Liu op = rv_op_vmv_v_i; 323707f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 323807f4964dSYang Liu op = rv_op_vmerge_vim; 323907f4964dSYang Liu break; 324007f4964dSYang Liu case 24: op = rv_op_vmseq_vi; break; 324107f4964dSYang Liu case 25: op = rv_op_vmsne_vi; break; 324207f4964dSYang Liu case 28: op = rv_op_vmsleu_vi; break; 324307f4964dSYang Liu case 29: op = rv_op_vmsle_vi; break; 324407f4964dSYang Liu case 30: op = rv_op_vmsgtu_vi; break; 324507f4964dSYang Liu case 31: op = rv_op_vmsgt_vi; break; 324607f4964dSYang Liu case 32: op = rv_op_vsaddu_vi; break; 324707f4964dSYang Liu case 33: op = rv_op_vsadd_vi; break; 324807f4964dSYang Liu case 37: op = rv_op_vsll_vi; break; 324907f4964dSYang Liu case 39: 32503bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 325107f4964dSYang Liu case 0: op = rv_op_vmv1r_v; break; 325207f4964dSYang Liu case 1: op = rv_op_vmv2r_v; break; 325307f4964dSYang Liu case 3: op = rv_op_vmv4r_v; break; 325407f4964dSYang Liu case 7: op = rv_op_vmv8r_v; break; 325507f4964dSYang Liu } 325607f4964dSYang Liu break; 325707f4964dSYang Liu case 40: op = rv_op_vsrl_vi; break; 325807f4964dSYang Liu case 41: op = rv_op_vsra_vi; break; 325907f4964dSYang Liu case 42: op = rv_op_vssrl_vi; break; 326007f4964dSYang Liu case 43: op = rv_op_vssra_vi; break; 326107f4964dSYang Liu case 44: op = rv_op_vnsrl_wi; break; 326207f4964dSYang Liu case 45: op = rv_op_vnsra_wi; break; 326307f4964dSYang Liu case 46: op = rv_op_vnclipu_wi; break; 326407f4964dSYang Liu case 47: op = rv_op_vnclip_wi; break; 326507f4964dSYang Liu } 326607f4964dSYang Liu break; 326707f4964dSYang Liu case 4: 32683bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 326907f4964dSYang Liu case 0: op = rv_op_vadd_vx; break; 327007f4964dSYang Liu case 2: op = rv_op_vsub_vx; break; 327107f4964dSYang Liu case 3: op = rv_op_vrsub_vx; break; 327207f4964dSYang Liu case 4: op = rv_op_vminu_vx; break; 327307f4964dSYang Liu case 5: op = rv_op_vmin_vx; break; 327407f4964dSYang Liu case 6: op = rv_op_vmaxu_vx; break; 327507f4964dSYang Liu case 7: op = rv_op_vmax_vx; break; 327607f4964dSYang Liu case 9: op = rv_op_vand_vx; break; 327707f4964dSYang Liu case 10: op = rv_op_vor_vx; break; 327807f4964dSYang Liu case 11: op = rv_op_vxor_vx; break; 327907f4964dSYang Liu case 12: op = rv_op_vrgather_vx; break; 328007f4964dSYang Liu case 14: op = rv_op_vslideup_vx; break; 328107f4964dSYang Liu case 15: op = rv_op_vslidedown_vx; break; 328298624d13SWeiwei Li case 16: 328398624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 328498624d13SWeiwei Li op = rv_op_vadc_vxm; 328598624d13SWeiwei Li } 328698624d13SWeiwei Li break; 328707f4964dSYang Liu case 17: op = rv_op_vmadc_vxm; break; 328898624d13SWeiwei Li case 18: 328998624d13SWeiwei Li if (((inst >> 25) & 1) == 0) { 329098624d13SWeiwei Li op = rv_op_vsbc_vxm; 329198624d13SWeiwei Li } 329298624d13SWeiwei Li break; 329307f4964dSYang Liu case 19: op = rv_op_vmsbc_vxm; break; 329407f4964dSYang Liu case 23: 329507f4964dSYang Liu if (((inst >> 20) & 0b111111) == 32) 329607f4964dSYang Liu op = rv_op_vmv_v_x; 329707f4964dSYang Liu else if (((inst >> 25) & 1) == 0) 329807f4964dSYang Liu op = rv_op_vmerge_vxm; 329907f4964dSYang Liu break; 330007f4964dSYang Liu case 24: op = rv_op_vmseq_vx; break; 330107f4964dSYang Liu case 25: op = rv_op_vmsne_vx; break; 330207f4964dSYang Liu case 26: op = rv_op_vmsltu_vx; break; 330307f4964dSYang Liu case 27: op = rv_op_vmslt_vx; break; 330407f4964dSYang Liu case 28: op = rv_op_vmsleu_vx; break; 330507f4964dSYang Liu case 29: op = rv_op_vmsle_vx; break; 330607f4964dSYang Liu case 30: op = rv_op_vmsgtu_vx; break; 330707f4964dSYang Liu case 31: op = rv_op_vmsgt_vx; break; 330807f4964dSYang Liu case 32: op = rv_op_vsaddu_vx; break; 330907f4964dSYang Liu case 33: op = rv_op_vsadd_vx; break; 331007f4964dSYang Liu case 34: op = rv_op_vssubu_vx; break; 331107f4964dSYang Liu case 35: op = rv_op_vssub_vx; break; 331207f4964dSYang Liu case 37: op = rv_op_vsll_vx; break; 331307f4964dSYang Liu case 39: op = rv_op_vsmul_vx; break; 331407f4964dSYang Liu case 40: op = rv_op_vsrl_vx; break; 331507f4964dSYang Liu case 41: op = rv_op_vsra_vx; break; 331607f4964dSYang Liu case 42: op = rv_op_vssrl_vx; break; 331707f4964dSYang Liu case 43: op = rv_op_vssra_vx; break; 331807f4964dSYang Liu case 44: op = rv_op_vnsrl_wx; break; 331907f4964dSYang Liu case 45: op = rv_op_vnsra_wx; break; 332007f4964dSYang Liu case 46: op = rv_op_vnclipu_wx; break; 332107f4964dSYang Liu case 47: op = rv_op_vnclip_wx; break; 332207f4964dSYang Liu } 332307f4964dSYang Liu break; 332407f4964dSYang Liu case 5: 33253bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 332607f4964dSYang Liu case 0: op = rv_op_vfadd_vf; break; 332707f4964dSYang Liu case 2: op = rv_op_vfsub_vf; break; 332807f4964dSYang Liu case 4: op = rv_op_vfmin_vf; break; 332907f4964dSYang Liu case 6: op = rv_op_vfmax_vf; break; 333007f4964dSYang Liu case 8: op = rv_op_vfsgnj_vf; break; 333107f4964dSYang Liu case 9: op = rv_op_vfsgnjn_vf; break; 333207f4964dSYang Liu case 10: op = rv_op_vfsgnjx_vf; break; 333307f4964dSYang Liu case 14: op = rv_op_vfslide1up_vf; break; 333407f4964dSYang Liu case 15: op = rv_op_vfslide1down_vf; break; 333507f4964dSYang Liu case 16: 33363bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 333707f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vfmv_s_f; break; 333807f4964dSYang Liu } 333907f4964dSYang Liu break; 334007f4964dSYang Liu case 23: 334107f4964dSYang Liu if (((inst >> 25) & 1) == 0) 334207f4964dSYang Liu op = rv_op_vfmerge_vfm; 334307f4964dSYang Liu else if (((inst >> 20) & 0b111111) == 32) 334407f4964dSYang Liu op = rv_op_vfmv_v_f; 334507f4964dSYang Liu break; 334607f4964dSYang Liu case 24: op = rv_op_vmfeq_vf; break; 334707f4964dSYang Liu case 25: op = rv_op_vmfle_vf; break; 334807f4964dSYang Liu case 27: op = rv_op_vmflt_vf; break; 334907f4964dSYang Liu case 28: op = rv_op_vmfne_vf; break; 335007f4964dSYang Liu case 29: op = rv_op_vmfgt_vf; break; 335107f4964dSYang Liu case 31: op = rv_op_vmfge_vf; break; 335207f4964dSYang Liu case 32: op = rv_op_vfdiv_vf; break; 335307f4964dSYang Liu case 33: op = rv_op_vfrdiv_vf; break; 335407f4964dSYang Liu case 36: op = rv_op_vfmul_vf; break; 335507f4964dSYang Liu case 39: op = rv_op_vfrsub_vf; break; 335607f4964dSYang Liu case 40: op = rv_op_vfmadd_vf; break; 335707f4964dSYang Liu case 41: op = rv_op_vfnmadd_vf; break; 335807f4964dSYang Liu case 42: op = rv_op_vfmsub_vf; break; 335907f4964dSYang Liu case 43: op = rv_op_vfnmsub_vf; break; 336007f4964dSYang Liu case 44: op = rv_op_vfmacc_vf; break; 336107f4964dSYang Liu case 45: op = rv_op_vfnmacc_vf; break; 336207f4964dSYang Liu case 46: op = rv_op_vfmsac_vf; break; 336307f4964dSYang Liu case 47: op = rv_op_vfnmsac_vf; break; 336407f4964dSYang Liu case 48: op = rv_op_vfwadd_vf; break; 336507f4964dSYang Liu case 50: op = rv_op_vfwsub_vf; break; 336607f4964dSYang Liu case 52: op = rv_op_vfwadd_wf; break; 336707f4964dSYang Liu case 54: op = rv_op_vfwsub_wf; break; 336807f4964dSYang Liu case 56: op = rv_op_vfwmul_vf; break; 336907f4964dSYang Liu case 60: op = rv_op_vfwmacc_vf; break; 337007f4964dSYang Liu case 61: op = rv_op_vfwnmacc_vf; break; 337107f4964dSYang Liu case 62: op = rv_op_vfwmsac_vf; break; 337207f4964dSYang Liu case 63: op = rv_op_vfwnmsac_vf; break; 337307f4964dSYang Liu } 337407f4964dSYang Liu break; 337507f4964dSYang Liu case 6: 33763bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 337707f4964dSYang Liu case 8: op = rv_op_vaaddu_vx; break; 337807f4964dSYang Liu case 9: op = rv_op_vaadd_vx; break; 337907f4964dSYang Liu case 10: op = rv_op_vasubu_vx; break; 338007f4964dSYang Liu case 11: op = rv_op_vasub_vx; break; 338107f4964dSYang Liu case 14: op = rv_op_vslide1up_vx; break; 338207f4964dSYang Liu case 15: op = rv_op_vslide1down_vx; break; 338307f4964dSYang Liu case 16: 33843bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 338507f4964dSYang Liu case 0: if ((inst >> 25) & 1) op = rv_op_vmv_s_x; break; 338607f4964dSYang Liu } 338707f4964dSYang Liu break; 338807f4964dSYang Liu case 32: op = rv_op_vdivu_vx; break; 338907f4964dSYang Liu case 33: op = rv_op_vdiv_vx; break; 339007f4964dSYang Liu case 34: op = rv_op_vremu_vx; break; 339107f4964dSYang Liu case 35: op = rv_op_vrem_vx; break; 339207f4964dSYang Liu case 36: op = rv_op_vmulhu_vx; break; 339307f4964dSYang Liu case 37: op = rv_op_vmul_vx; break; 339407f4964dSYang Liu case 38: op = rv_op_vmulhsu_vx; break; 339507f4964dSYang Liu case 39: op = rv_op_vmulh_vx; break; 339607f4964dSYang Liu case 41: op = rv_op_vmadd_vx; break; 339707f4964dSYang Liu case 43: op = rv_op_vnmsub_vx; break; 339807f4964dSYang Liu case 45: op = rv_op_vmacc_vx; break; 339907f4964dSYang Liu case 47: op = rv_op_vnmsac_vx; break; 340007f4964dSYang Liu case 48: op = rv_op_vwaddu_vx; break; 340107f4964dSYang Liu case 49: op = rv_op_vwadd_vx; break; 340207f4964dSYang Liu case 50: op = rv_op_vwsubu_vx; break; 340307f4964dSYang Liu case 51: op = rv_op_vwsub_vx; break; 340407f4964dSYang Liu case 52: op = rv_op_vwaddu_wx; break; 340507f4964dSYang Liu case 53: op = rv_op_vwadd_wx; break; 340607f4964dSYang Liu case 54: op = rv_op_vwsubu_wx; break; 340707f4964dSYang Liu case 55: op = rv_op_vwsub_wx; break; 340807f4964dSYang Liu case 56: op = rv_op_vwmulu_vx; break; 340907f4964dSYang Liu case 58: op = rv_op_vwmulsu_vx; break; 341007f4964dSYang Liu case 59: op = rv_op_vwmul_vx; break; 341107f4964dSYang Liu case 60: op = rv_op_vwmaccu_vx; break; 341207f4964dSYang Liu case 61: op = rv_op_vwmacc_vx; break; 341307f4964dSYang Liu case 62: op = rv_op_vwmaccus_vx; break; 341407f4964dSYang Liu case 63: op = rv_op_vwmaccsu_vx; break; 341507f4964dSYang Liu } 341607f4964dSYang Liu break; 341707f4964dSYang Liu case 7: 341807f4964dSYang Liu if (((inst >> 31) & 1) == 0) { 341907f4964dSYang Liu op = rv_op_vsetvli; 342007f4964dSYang Liu } else if ((inst >> 30) & 1) { 342107f4964dSYang Liu op = rv_op_vsetivli; 342207f4964dSYang Liu } else if (((inst >> 25) & 0b11111) == 0) { 342307f4964dSYang Liu op = rv_op_vsetvl; 342407f4964dSYang Liu } 342507f4964dSYang Liu break; 342607f4964dSYang Liu } 342707f4964dSYang Liu break; 3428ea103259SMichael Clark case 22: 34293bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3430ea103259SMichael Clark case 0: op = rv_op_addid; break; 3431ea103259SMichael Clark case 1: 34323bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 3433ea103259SMichael Clark case 0: op = rv_op_sllid; break; 3434ea103259SMichael Clark } 3435ea103259SMichael Clark break; 3436ea103259SMichael Clark case 5: 34373bd87176SWeiwei Li switch ((inst >> 26) & 0b111111) { 3438ea103259SMichael Clark case 0: op = rv_op_srlid; break; 3439ea103259SMichael Clark case 16: op = rv_op_sraid; break; 3440ea103259SMichael Clark } 3441ea103259SMichael Clark break; 3442ea103259SMichael Clark } 3443ea103259SMichael Clark break; 3444ea103259SMichael Clark case 24: 34453bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3446ea103259SMichael Clark case 0: op = rv_op_beq; break; 3447ea103259SMichael Clark case 1: op = rv_op_bne; break; 3448ea103259SMichael Clark case 4: op = rv_op_blt; break; 3449ea103259SMichael Clark case 5: op = rv_op_bge; break; 3450ea103259SMichael Clark case 6: op = rv_op_bltu; break; 3451ea103259SMichael Clark case 7: op = rv_op_bgeu; break; 3452ea103259SMichael Clark } 3453ea103259SMichael Clark break; 3454ea103259SMichael Clark case 25: 34553bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3456ea103259SMichael Clark case 0: op = rv_op_jalr; break; 3457ea103259SMichael Clark } 3458ea103259SMichael Clark break; 3459ea103259SMichael Clark case 27: op = rv_op_jal; break; 3460ea103259SMichael Clark case 28: 34613bd87176SWeiwei Li switch ((inst >> 12) & 0b111) { 3462ea103259SMichael Clark case 0: 346398624d13SWeiwei Li switch (((inst >> 20) & 0b111111100000) | 346498624d13SWeiwei Li ((inst >> 7) & 0b000000011111)) { 3465ea103259SMichael Clark case 0: 34663bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3467ea103259SMichael Clark case 0: op = rv_op_ecall; break; 3468ea103259SMichael Clark case 32: op = rv_op_ebreak; break; 3469ea103259SMichael Clark case 64: op = rv_op_uret; break; 3470ea103259SMichael Clark } 3471ea103259SMichael Clark break; 3472ea103259SMichael Clark case 256: 34733bd87176SWeiwei Li switch ((inst >> 20) & 0b11111) { 3474ea103259SMichael Clark case 2: 34753bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 3476ea103259SMichael Clark case 0: op = rv_op_sret; break; 3477ea103259SMichael Clark } 3478ea103259SMichael Clark break; 3479ea103259SMichael Clark case 4: op = rv_op_sfence_vm; break; 3480ea103259SMichael Clark case 5: 34813bd87176SWeiwei Li switch ((inst >> 15) & 0b11111) { 3482ea103259SMichael Clark case 0: op = rv_op_wfi; break; 3483ea103259SMichael Clark } 3484ea103259SMichael Clark break; 3485ea103259SMichael Clark } 3486ea103259SMichael Clark break; 3487ea103259SMichael Clark case 288: op = rv_op_sfence_vma; break; 3488ea103259SMichael Clark case 512: 34893bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3490ea103259SMichael Clark case 64: op = rv_op_hret; break; 3491ea103259SMichael Clark } 3492ea103259SMichael Clark break; 3493ea103259SMichael Clark case 768: 34943bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3495ea103259SMichael Clark case 64: op = rv_op_mret; break; 3496ea103259SMichael Clark } 3497ea103259SMichael Clark break; 3498ea103259SMichael Clark case 1952: 34993bd87176SWeiwei Li switch ((inst >> 15) & 0b1111111111) { 3500ea103259SMichael Clark case 576: op = rv_op_dret; break; 3501ea103259SMichael Clark } 3502ea103259SMichael Clark break; 3503ea103259SMichael Clark } 3504ea103259SMichael Clark break; 3505ea103259SMichael Clark case 1: op = rv_op_csrrw; break; 3506ea103259SMichael Clark case 2: op = rv_op_csrrs; break; 3507ea103259SMichael Clark case 3: op = rv_op_csrrc; break; 3508ea103259SMichael Clark case 5: op = rv_op_csrrwi; break; 3509ea103259SMichael Clark case 6: op = rv_op_csrrsi; break; 3510ea103259SMichael Clark case 7: op = rv_op_csrrci; break; 3511ea103259SMichael Clark } 3512ea103259SMichael Clark break; 3513ea103259SMichael Clark case 30: 351498624d13SWeiwei Li switch (((inst >> 22) & 0b1111111000) | 351598624d13SWeiwei Li ((inst >> 12) & 0b0000000111)) { 3516ea103259SMichael Clark case 0: op = rv_op_addd; break; 3517ea103259SMichael Clark case 1: op = rv_op_slld; break; 3518ea103259SMichael Clark case 5: op = rv_op_srld; break; 3519ea103259SMichael Clark case 8: op = rv_op_muld; break; 3520ea103259SMichael Clark case 12: op = rv_op_divd; break; 3521ea103259SMichael Clark case 13: op = rv_op_divud; break; 3522ea103259SMichael Clark case 14: op = rv_op_remd; break; 3523ea103259SMichael Clark case 15: op = rv_op_remud; break; 3524ea103259SMichael Clark case 256: op = rv_op_subd; break; 3525ea103259SMichael Clark case 261: op = rv_op_srad; break; 3526ea103259SMichael Clark } 3527ea103259SMichael Clark break; 3528ea103259SMichael Clark } 3529ea103259SMichael Clark break; 3530ea103259SMichael Clark } 3531ea103259SMichael Clark dec->op = op; 3532ea103259SMichael Clark } 3533ea103259SMichael Clark 3534ea103259SMichael Clark /* operand extractors */ 3535ea103259SMichael Clark 3536ea103259SMichael Clark static uint32_t operand_rd(rv_inst inst) 3537ea103259SMichael Clark { 3538ea103259SMichael Clark return (inst << 52) >> 59; 3539ea103259SMichael Clark } 3540ea103259SMichael Clark 3541ea103259SMichael Clark static uint32_t operand_rs1(rv_inst inst) 3542ea103259SMichael Clark { 3543ea103259SMichael Clark return (inst << 44) >> 59; 3544ea103259SMichael Clark } 3545ea103259SMichael Clark 3546ea103259SMichael Clark static uint32_t operand_rs2(rv_inst inst) 3547ea103259SMichael Clark { 3548ea103259SMichael Clark return (inst << 39) >> 59; 3549ea103259SMichael Clark } 3550ea103259SMichael Clark 3551ea103259SMichael Clark static uint32_t operand_rs3(rv_inst inst) 3552ea103259SMichael Clark { 3553ea103259SMichael Clark return (inst << 32) >> 59; 3554ea103259SMichael Clark } 3555ea103259SMichael Clark 3556ea103259SMichael Clark static uint32_t operand_aq(rv_inst inst) 3557ea103259SMichael Clark { 3558ea103259SMichael Clark return (inst << 37) >> 63; 3559ea103259SMichael Clark } 3560ea103259SMichael Clark 3561ea103259SMichael Clark static uint32_t operand_rl(rv_inst inst) 3562ea103259SMichael Clark { 3563ea103259SMichael Clark return (inst << 38) >> 63; 3564ea103259SMichael Clark } 3565ea103259SMichael Clark 3566ea103259SMichael Clark static uint32_t operand_pred(rv_inst inst) 3567ea103259SMichael Clark { 3568ea103259SMichael Clark return (inst << 36) >> 60; 3569ea103259SMichael Clark } 3570ea103259SMichael Clark 3571ea103259SMichael Clark static uint32_t operand_succ(rv_inst inst) 3572ea103259SMichael Clark { 3573ea103259SMichael Clark return (inst << 40) >> 60; 3574ea103259SMichael Clark } 3575ea103259SMichael Clark 3576ea103259SMichael Clark static uint32_t operand_rm(rv_inst inst) 3577ea103259SMichael Clark { 3578ea103259SMichael Clark return (inst << 49) >> 61; 3579ea103259SMichael Clark } 3580ea103259SMichael Clark 3581ea103259SMichael Clark static uint32_t operand_shamt5(rv_inst inst) 3582ea103259SMichael Clark { 3583ea103259SMichael Clark return (inst << 39) >> 59; 3584ea103259SMichael Clark } 3585ea103259SMichael Clark 3586ea103259SMichael Clark static uint32_t operand_shamt6(rv_inst inst) 3587ea103259SMichael Clark { 3588ea103259SMichael Clark return (inst << 38) >> 58; 3589ea103259SMichael Clark } 3590ea103259SMichael Clark 3591ea103259SMichael Clark static uint32_t operand_shamt7(rv_inst inst) 3592ea103259SMichael Clark { 3593ea103259SMichael Clark return (inst << 37) >> 57; 3594ea103259SMichael Clark } 3595ea103259SMichael Clark 3596ea103259SMichael Clark static uint32_t operand_crdq(rv_inst inst) 3597ea103259SMichael Clark { 3598ea103259SMichael Clark return (inst << 59) >> 61; 3599ea103259SMichael Clark } 3600ea103259SMichael Clark 3601ea103259SMichael Clark static uint32_t operand_crs1q(rv_inst inst) 3602ea103259SMichael Clark { 3603ea103259SMichael Clark return (inst << 54) >> 61; 3604ea103259SMichael Clark } 3605ea103259SMichael Clark 3606ea103259SMichael Clark static uint32_t operand_crs1rdq(rv_inst inst) 3607ea103259SMichael Clark { 3608ea103259SMichael Clark return (inst << 54) >> 61; 3609ea103259SMichael Clark } 3610ea103259SMichael Clark 3611ea103259SMichael Clark static uint32_t operand_crs2q(rv_inst inst) 3612ea103259SMichael Clark { 3613ea103259SMichael Clark return (inst << 59) >> 61; 3614ea103259SMichael Clark } 3615ea103259SMichael Clark 36162c71d02eSWeiwei Li static uint32_t calculate_xreg(uint32_t sreg) 36172c71d02eSWeiwei Li { 36182c71d02eSWeiwei Li return sreg < 2 ? sreg + 8 : sreg + 16; 36192c71d02eSWeiwei Li } 36202c71d02eSWeiwei Li 36212c71d02eSWeiwei Li static uint32_t operand_sreg1(rv_inst inst) 36222c71d02eSWeiwei Li { 36232c71d02eSWeiwei Li return calculate_xreg((inst << 54) >> 61); 36242c71d02eSWeiwei Li } 36252c71d02eSWeiwei Li 36262c71d02eSWeiwei Li static uint32_t operand_sreg2(rv_inst inst) 36272c71d02eSWeiwei Li { 36282c71d02eSWeiwei Li return calculate_xreg((inst << 59) >> 61); 36292c71d02eSWeiwei Li } 36302c71d02eSWeiwei Li 3631ea103259SMichael Clark static uint32_t operand_crd(rv_inst inst) 3632ea103259SMichael Clark { 3633ea103259SMichael Clark return (inst << 52) >> 59; 3634ea103259SMichael Clark } 3635ea103259SMichael Clark 3636ea103259SMichael Clark static uint32_t operand_crs1(rv_inst inst) 3637ea103259SMichael Clark { 3638ea103259SMichael Clark return (inst << 52) >> 59; 3639ea103259SMichael Clark } 3640ea103259SMichael Clark 3641ea103259SMichael Clark static uint32_t operand_crs1rd(rv_inst inst) 3642ea103259SMichael Clark { 3643ea103259SMichael Clark return (inst << 52) >> 59; 3644ea103259SMichael Clark } 3645ea103259SMichael Clark 3646ea103259SMichael Clark static uint32_t operand_crs2(rv_inst inst) 3647ea103259SMichael Clark { 3648ea103259SMichael Clark return (inst << 57) >> 59; 3649ea103259SMichael Clark } 3650ea103259SMichael Clark 3651ea103259SMichael Clark static uint32_t operand_cimmsh5(rv_inst inst) 3652ea103259SMichael Clark { 3653ea103259SMichael Clark return (inst << 57) >> 59; 3654ea103259SMichael Clark } 3655ea103259SMichael Clark 3656ea103259SMichael Clark static uint32_t operand_csr12(rv_inst inst) 3657ea103259SMichael Clark { 3658ea103259SMichael Clark return (inst << 32) >> 52; 3659ea103259SMichael Clark } 3660ea103259SMichael Clark 3661ea103259SMichael Clark static int32_t operand_imm12(rv_inst inst) 3662ea103259SMichael Clark { 3663ea103259SMichael Clark return ((int64_t)inst << 32) >> 52; 3664ea103259SMichael Clark } 3665ea103259SMichael Clark 3666ea103259SMichael Clark static int32_t operand_imm20(rv_inst inst) 3667ea103259SMichael Clark { 3668ea103259SMichael Clark return (((int64_t)inst << 32) >> 44) << 12; 3669ea103259SMichael Clark } 3670ea103259SMichael Clark 3671ea103259SMichael Clark static int32_t operand_jimm20(rv_inst inst) 3672ea103259SMichael Clark { 3673ea103259SMichael Clark return (((int64_t)inst << 32) >> 63) << 20 | 3674ea103259SMichael Clark ((inst << 33) >> 54) << 1 | 3675ea103259SMichael Clark ((inst << 43) >> 63) << 11 | 3676ea103259SMichael Clark ((inst << 44) >> 56) << 12; 3677ea103259SMichael Clark } 3678ea103259SMichael Clark 3679ea103259SMichael Clark static int32_t operand_simm12(rv_inst inst) 3680ea103259SMichael Clark { 3681ea103259SMichael Clark return (((int64_t)inst << 32) >> 57) << 5 | 3682ea103259SMichael Clark (inst << 52) >> 59; 3683ea103259SMichael Clark } 3684ea103259SMichael Clark 3685ea103259SMichael Clark static int32_t operand_sbimm12(rv_inst inst) 3686ea103259SMichael Clark { 3687ea103259SMichael Clark return (((int64_t)inst << 32) >> 63) << 12 | 3688ea103259SMichael Clark ((inst << 33) >> 58) << 5 | 3689ea103259SMichael Clark ((inst << 52) >> 60) << 1 | 3690ea103259SMichael Clark ((inst << 56) >> 63) << 11; 3691ea103259SMichael Clark } 3692ea103259SMichael Clark 369333632775SFrédéric Pétrot static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa) 3694ea103259SMichael Clark { 369533632775SFrédéric Pétrot int imm = ((inst << 51) >> 63) << 5 | 3696ea103259SMichael Clark (inst << 57) >> 59; 369733632775SFrédéric Pétrot if (isa == rv128) { 369833632775SFrédéric Pétrot imm = imm ? imm : 64; 369933632775SFrédéric Pétrot } 370033632775SFrédéric Pétrot return imm; 370133632775SFrédéric Pétrot } 370233632775SFrédéric Pétrot 370333632775SFrédéric Pétrot static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa) 370433632775SFrédéric Pétrot { 370533632775SFrédéric Pétrot int imm = ((inst << 51) >> 63) << 5 | 370633632775SFrédéric Pétrot (inst << 57) >> 59; 370733632775SFrédéric Pétrot if (isa == rv128) { 370833632775SFrédéric Pétrot imm = imm | (imm & 32) << 1; 370933632775SFrédéric Pétrot imm = imm ? imm : 64; 371033632775SFrédéric Pétrot } 371133632775SFrédéric Pétrot return imm; 3712ea103259SMichael Clark } 3713ea103259SMichael Clark 3714ea103259SMichael Clark static int32_t operand_cimmi(rv_inst inst) 3715ea103259SMichael Clark { 3716ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 5 | 3717ea103259SMichael Clark (inst << 57) >> 59; 3718ea103259SMichael Clark } 3719ea103259SMichael Clark 3720ea103259SMichael Clark static int32_t operand_cimmui(rv_inst inst) 3721ea103259SMichael Clark { 3722ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 17 | 3723ea103259SMichael Clark ((inst << 57) >> 59) << 12; 3724ea103259SMichael Clark } 3725ea103259SMichael Clark 3726ea103259SMichael Clark static uint32_t operand_cimmlwsp(rv_inst inst) 3727ea103259SMichael Clark { 3728ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3729ea103259SMichael Clark ((inst << 57) >> 61) << 2 | 3730ea103259SMichael Clark ((inst << 60) >> 62) << 6; 3731ea103259SMichael Clark } 3732ea103259SMichael Clark 3733ea103259SMichael Clark static uint32_t operand_cimmldsp(rv_inst inst) 3734ea103259SMichael Clark { 3735ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3736ea103259SMichael Clark ((inst << 57) >> 62) << 3 | 3737ea103259SMichael Clark ((inst << 59) >> 61) << 6; 3738ea103259SMichael Clark } 3739ea103259SMichael Clark 3740ea103259SMichael Clark static uint32_t operand_cimmlqsp(rv_inst inst) 3741ea103259SMichael Clark { 3742ea103259SMichael Clark return ((inst << 51) >> 63) << 5 | 3743ea103259SMichael Clark ((inst << 57) >> 63) << 4 | 3744ea103259SMichael Clark ((inst << 58) >> 60) << 6; 3745ea103259SMichael Clark } 3746ea103259SMichael Clark 3747ea103259SMichael Clark static int32_t operand_cimm16sp(rv_inst inst) 3748ea103259SMichael Clark { 3749ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 9 | 3750ea103259SMichael Clark ((inst << 57) >> 63) << 4 | 3751ea103259SMichael Clark ((inst << 58) >> 63) << 6 | 3752ea103259SMichael Clark ((inst << 59) >> 62) << 7 | 3753ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3754ea103259SMichael Clark } 3755ea103259SMichael Clark 3756ea103259SMichael Clark static int32_t operand_cimmj(rv_inst inst) 3757ea103259SMichael Clark { 3758ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 11 | 3759ea103259SMichael Clark ((inst << 52) >> 63) << 4 | 3760ea103259SMichael Clark ((inst << 53) >> 62) << 8 | 3761ea103259SMichael Clark ((inst << 55) >> 63) << 10 | 3762ea103259SMichael Clark ((inst << 56) >> 63) << 6 | 3763ea103259SMichael Clark ((inst << 57) >> 63) << 7 | 3764ea103259SMichael Clark ((inst << 58) >> 61) << 1 | 3765ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3766ea103259SMichael Clark } 3767ea103259SMichael Clark 3768ea103259SMichael Clark static int32_t operand_cimmb(rv_inst inst) 3769ea103259SMichael Clark { 3770ea103259SMichael Clark return (((int64_t)inst << 51) >> 63) << 8 | 3771ea103259SMichael Clark ((inst << 52) >> 62) << 3 | 3772ea103259SMichael Clark ((inst << 57) >> 62) << 6 | 3773ea103259SMichael Clark ((inst << 59) >> 62) << 1 | 3774ea103259SMichael Clark ((inst << 61) >> 63) << 5; 3775ea103259SMichael Clark } 3776ea103259SMichael Clark 3777ea103259SMichael Clark static uint32_t operand_cimmswsp(rv_inst inst) 3778ea103259SMichael Clark { 3779ea103259SMichael Clark return ((inst << 51) >> 60) << 2 | 3780ea103259SMichael Clark ((inst << 55) >> 62) << 6; 3781ea103259SMichael Clark } 3782ea103259SMichael Clark 3783ea103259SMichael Clark static uint32_t operand_cimmsdsp(rv_inst inst) 3784ea103259SMichael Clark { 3785ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3786ea103259SMichael Clark ((inst << 54) >> 61) << 6; 3787ea103259SMichael Clark } 3788ea103259SMichael Clark 3789ea103259SMichael Clark static uint32_t operand_cimmsqsp(rv_inst inst) 3790ea103259SMichael Clark { 3791ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3792ea103259SMichael Clark ((inst << 53) >> 60) << 6; 3793ea103259SMichael Clark } 3794ea103259SMichael Clark 3795ea103259SMichael Clark static uint32_t operand_cimm4spn(rv_inst inst) 3796ea103259SMichael Clark { 3797ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3798ea103259SMichael Clark ((inst << 53) >> 60) << 6 | 3799ea103259SMichael Clark ((inst << 57) >> 63) << 2 | 3800ea103259SMichael Clark ((inst << 58) >> 63) << 3; 3801ea103259SMichael Clark } 3802ea103259SMichael Clark 3803ea103259SMichael Clark static uint32_t operand_cimmw(rv_inst inst) 3804ea103259SMichael Clark { 3805ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3806ea103259SMichael Clark ((inst << 57) >> 63) << 2 | 3807ea103259SMichael Clark ((inst << 58) >> 63) << 6; 3808ea103259SMichael Clark } 3809ea103259SMichael Clark 3810ea103259SMichael Clark static uint32_t operand_cimmd(rv_inst inst) 3811ea103259SMichael Clark { 3812ea103259SMichael Clark return ((inst << 51) >> 61) << 3 | 3813ea103259SMichael Clark ((inst << 57) >> 62) << 6; 3814ea103259SMichael Clark } 3815ea103259SMichael Clark 3816ea103259SMichael Clark static uint32_t operand_cimmq(rv_inst inst) 3817ea103259SMichael Clark { 3818ea103259SMichael Clark return ((inst << 51) >> 62) << 4 | 3819ea103259SMichael Clark ((inst << 53) >> 63) << 8 | 3820ea103259SMichael Clark ((inst << 57) >> 62) << 6; 3821ea103259SMichael Clark } 3822ea103259SMichael Clark 382307f4964dSYang Liu static uint32_t operand_vimm(rv_inst inst) 382407f4964dSYang Liu { 382507f4964dSYang Liu return (int64_t)(inst << 44) >> 59; 382607f4964dSYang Liu } 382707f4964dSYang Liu 382807f4964dSYang Liu static uint32_t operand_vzimm11(rv_inst inst) 382907f4964dSYang Liu { 383007f4964dSYang Liu return (inst << 33) >> 53; 383107f4964dSYang Liu } 383207f4964dSYang Liu 383307f4964dSYang Liu static uint32_t operand_vzimm10(rv_inst inst) 383407f4964dSYang Liu { 383507f4964dSYang Liu return (inst << 34) >> 54; 383607f4964dSYang Liu } 383707f4964dSYang Liu 38385748c886SWeiwei Li static uint32_t operand_bs(rv_inst inst) 38395748c886SWeiwei Li { 38405748c886SWeiwei Li return (inst << 32) >> 62; 38415748c886SWeiwei Li } 38425748c886SWeiwei Li 38435748c886SWeiwei Li static uint32_t operand_rnum(rv_inst inst) 38445748c886SWeiwei Li { 38455748c886SWeiwei Li return (inst << 40) >> 60; 38465748c886SWeiwei Li } 38475748c886SWeiwei Li 384807f4964dSYang Liu static uint32_t operand_vm(rv_inst inst) 384907f4964dSYang Liu { 385007f4964dSYang Liu return (inst << 38) >> 63; 385107f4964dSYang Liu } 385207f4964dSYang Liu 38532c71d02eSWeiwei Li static uint32_t operand_uimm_c_lb(rv_inst inst) 38542c71d02eSWeiwei Li { 38552c71d02eSWeiwei Li return (((inst << 58) >> 63) << 1) | 38562c71d02eSWeiwei Li ((inst << 57) >> 63); 38572c71d02eSWeiwei Li } 38582c71d02eSWeiwei Li 38592c71d02eSWeiwei Li static uint32_t operand_uimm_c_lh(rv_inst inst) 38602c71d02eSWeiwei Li { 38612c71d02eSWeiwei Li return (((inst << 58) >> 63) << 1); 38622c71d02eSWeiwei Li } 38632c71d02eSWeiwei Li 38642c71d02eSWeiwei Li static uint32_t operand_zcmp_spimm(rv_inst inst) 38652c71d02eSWeiwei Li { 38662c71d02eSWeiwei Li return ((inst << 60) >> 62) << 4; 38672c71d02eSWeiwei Li } 38682c71d02eSWeiwei Li 38692c71d02eSWeiwei Li static uint32_t operand_zcmp_rlist(rv_inst inst) 38702c71d02eSWeiwei Li { 38712c71d02eSWeiwei Li return ((inst << 56) >> 60); 38722c71d02eSWeiwei Li } 38732c71d02eSWeiwei Li 3874*318df723SChristoph Müllner static uint32_t operand_imm6(rv_inst inst) 3875*318df723SChristoph Müllner { 3876*318df723SChristoph Müllner return (inst << 38) >> 60; 3877*318df723SChristoph Müllner } 3878*318df723SChristoph Müllner 3879*318df723SChristoph Müllner static uint32_t operand_imm2(rv_inst inst) 3880*318df723SChristoph Müllner { 3881*318df723SChristoph Müllner return (inst << 37) >> 62; 3882*318df723SChristoph Müllner } 3883*318df723SChristoph Müllner 3884*318df723SChristoph Müllner static uint32_t operand_immh(rv_inst inst) 3885*318df723SChristoph Müllner { 3886*318df723SChristoph Müllner return (inst << 32) >> 58; 3887*318df723SChristoph Müllner } 3888*318df723SChristoph Müllner 3889*318df723SChristoph Müllner static uint32_t operand_imml(rv_inst inst) 3890*318df723SChristoph Müllner { 3891*318df723SChristoph Müllner return (inst << 38) >> 58; 3892*318df723SChristoph Müllner } 3893*318df723SChristoph Müllner 38942c71d02eSWeiwei Li static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t spimm) 38952c71d02eSWeiwei Li { 38962c71d02eSWeiwei Li int xlen_bytes_log2 = isa == rv64 ? 3 : 2; 38972c71d02eSWeiwei Li int regs = rlist == 15 ? 13 : rlist - 3; 38982c71d02eSWeiwei Li uint32_t stack_adj_base = ROUND_UP(regs << xlen_bytes_log2, 16); 38992c71d02eSWeiwei Li return stack_adj_base + spimm; 39002c71d02eSWeiwei Li } 39012c71d02eSWeiwei Li 39022c71d02eSWeiwei Li static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa) 39032c71d02eSWeiwei Li { 39042c71d02eSWeiwei Li return calculate_stack_adj(isa, operand_zcmp_rlist(inst), 39052c71d02eSWeiwei Li operand_zcmp_spimm(inst)); 39062c71d02eSWeiwei Li } 39072c71d02eSWeiwei Li 39082c71d02eSWeiwei Li static uint32_t operand_tbl_index(rv_inst inst) 39092c71d02eSWeiwei Li { 39102c71d02eSWeiwei Li return ((inst << 54) >> 56); 39112c71d02eSWeiwei Li } 39122c71d02eSWeiwei Li 3913ea103259SMichael Clark /* decode operands */ 3914ea103259SMichael Clark 391533632775SFrédéric Pétrot static void decode_inst_operands(rv_decode *dec, rv_isa isa) 3916ea103259SMichael Clark { 3917fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 3918ea103259SMichael Clark rv_inst inst = dec->inst; 3919ea103259SMichael Clark dec->codec = opcode_data[dec->op].codec; 3920ea103259SMichael Clark switch (dec->codec) { 3921ea103259SMichael Clark case rv_codec_none: 3922ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 3923ea103259SMichael Clark dec->imm = 0; 3924ea103259SMichael Clark break; 3925ea103259SMichael Clark case rv_codec_u: 3926ea103259SMichael Clark dec->rd = operand_rd(inst); 3927ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 3928ea103259SMichael Clark dec->imm = operand_imm20(inst); 3929ea103259SMichael Clark break; 3930ea103259SMichael Clark case rv_codec_uj: 3931ea103259SMichael Clark dec->rd = operand_rd(inst); 3932ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 3933ea103259SMichael Clark dec->imm = operand_jimm20(inst); 3934ea103259SMichael Clark break; 3935ea103259SMichael Clark case rv_codec_i: 3936ea103259SMichael Clark dec->rd = operand_rd(inst); 3937ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3938ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3939ea103259SMichael Clark dec->imm = operand_imm12(inst); 3940ea103259SMichael Clark break; 3941ea103259SMichael Clark case rv_codec_i_sh5: 3942ea103259SMichael Clark dec->rd = operand_rd(inst); 3943ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3944ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3945ea103259SMichael Clark dec->imm = operand_shamt5(inst); 3946ea103259SMichael Clark break; 3947ea103259SMichael Clark case rv_codec_i_sh6: 3948ea103259SMichael Clark dec->rd = operand_rd(inst); 3949ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3950ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3951ea103259SMichael Clark dec->imm = operand_shamt6(inst); 3952ea103259SMichael Clark break; 3953ea103259SMichael Clark case rv_codec_i_sh7: 3954ea103259SMichael Clark dec->rd = operand_rd(inst); 3955ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3956ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3957ea103259SMichael Clark dec->imm = operand_shamt7(inst); 3958ea103259SMichael Clark break; 3959ea103259SMichael Clark case rv_codec_i_csr: 3960ea103259SMichael Clark dec->rd = operand_rd(inst); 3961ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3962ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 3963ea103259SMichael Clark dec->imm = operand_csr12(inst); 3964ea103259SMichael Clark break; 3965ea103259SMichael Clark case rv_codec_s: 3966ea103259SMichael Clark dec->rd = rv_ireg_zero; 3967ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3968ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3969ea103259SMichael Clark dec->imm = operand_simm12(inst); 3970ea103259SMichael Clark break; 3971ea103259SMichael Clark case rv_codec_sb: 3972ea103259SMichael Clark dec->rd = rv_ireg_zero; 3973ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3974ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3975ea103259SMichael Clark dec->imm = operand_sbimm12(inst); 3976ea103259SMichael Clark break; 3977ea103259SMichael Clark case rv_codec_r: 3978ea103259SMichael Clark dec->rd = operand_rd(inst); 3979ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3980ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3981ea103259SMichael Clark dec->imm = 0; 3982ea103259SMichael Clark break; 3983ea103259SMichael Clark case rv_codec_r_m: 3984ea103259SMichael Clark dec->rd = operand_rd(inst); 3985ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3986ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3987ea103259SMichael Clark dec->imm = 0; 3988ea103259SMichael Clark dec->rm = operand_rm(inst); 3989ea103259SMichael Clark break; 3990ea103259SMichael Clark case rv_codec_r4_m: 3991ea103259SMichael Clark dec->rd = operand_rd(inst); 3992ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 3993ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 3994ea103259SMichael Clark dec->rs3 = operand_rs3(inst); 3995ea103259SMichael Clark dec->imm = 0; 3996ea103259SMichael Clark dec->rm = operand_rm(inst); 3997ea103259SMichael Clark break; 3998ea103259SMichael Clark case rv_codec_r_a: 3999ea103259SMichael Clark dec->rd = operand_rd(inst); 4000ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 4001ea103259SMichael Clark dec->rs2 = operand_rs2(inst); 4002ea103259SMichael Clark dec->imm = 0; 4003ea103259SMichael Clark dec->aq = operand_aq(inst); 4004ea103259SMichael Clark dec->rl = operand_rl(inst); 4005ea103259SMichael Clark break; 4006ea103259SMichael Clark case rv_codec_r_l: 4007ea103259SMichael Clark dec->rd = operand_rd(inst); 4008ea103259SMichael Clark dec->rs1 = operand_rs1(inst); 4009ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4010ea103259SMichael Clark dec->imm = 0; 4011ea103259SMichael Clark dec->aq = operand_aq(inst); 4012ea103259SMichael Clark dec->rl = operand_rl(inst); 4013ea103259SMichael Clark break; 4014ea103259SMichael Clark case rv_codec_r_f: 4015ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 4016ea103259SMichael Clark dec->pred = operand_pred(inst); 4017ea103259SMichael Clark dec->succ = operand_succ(inst); 4018ea103259SMichael Clark dec->imm = 0; 4019ea103259SMichael Clark break; 4020ea103259SMichael Clark case rv_codec_cb: 4021ea103259SMichael Clark dec->rd = rv_ireg_zero; 4022ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4023ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4024ea103259SMichael Clark dec->imm = operand_cimmb(inst); 4025ea103259SMichael Clark break; 4026ea103259SMichael Clark case rv_codec_cb_imm: 4027ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4028ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4029ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4030ea103259SMichael Clark break; 4031ea103259SMichael Clark case rv_codec_cb_sh5: 4032ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4033ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4034ea103259SMichael Clark dec->imm = operand_cimmsh5(inst); 4035ea103259SMichael Clark break; 4036ea103259SMichael Clark case rv_codec_cb_sh6: 4037ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4038ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 403933632775SFrédéric Pétrot dec->imm = operand_cimmshr6(inst, isa); 4040ea103259SMichael Clark break; 4041ea103259SMichael Clark case rv_codec_ci: 4042ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4043ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4044ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4045ea103259SMichael Clark break; 4046ea103259SMichael Clark case rv_codec_ci_sh5: 4047ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4048ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4049ea103259SMichael Clark dec->imm = operand_cimmsh5(inst); 4050ea103259SMichael Clark break; 4051ea103259SMichael Clark case rv_codec_ci_sh6: 4052ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4053ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 405433632775SFrédéric Pétrot dec->imm = operand_cimmshl6(inst, isa); 4055ea103259SMichael Clark break; 4056ea103259SMichael Clark case rv_codec_ci_16sp: 4057ea103259SMichael Clark dec->rd = rv_ireg_sp; 4058ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4059ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4060ea103259SMichael Clark dec->imm = operand_cimm16sp(inst); 4061ea103259SMichael Clark break; 4062ea103259SMichael Clark case rv_codec_ci_lwsp: 4063ea103259SMichael Clark dec->rd = operand_crd(inst); 4064ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4065ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4066ea103259SMichael Clark dec->imm = operand_cimmlwsp(inst); 4067ea103259SMichael Clark break; 4068ea103259SMichael Clark case rv_codec_ci_ldsp: 4069ea103259SMichael Clark dec->rd = operand_crd(inst); 4070ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4071ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4072ea103259SMichael Clark dec->imm = operand_cimmldsp(inst); 4073ea103259SMichael Clark break; 4074ea103259SMichael Clark case rv_codec_ci_lqsp: 4075ea103259SMichael Clark dec->rd = operand_crd(inst); 4076ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4077ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4078ea103259SMichael Clark dec->imm = operand_cimmlqsp(inst); 4079ea103259SMichael Clark break; 4080ea103259SMichael Clark case rv_codec_ci_li: 4081ea103259SMichael Clark dec->rd = operand_crd(inst); 4082ea103259SMichael Clark dec->rs1 = rv_ireg_zero; 4083ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4084ea103259SMichael Clark dec->imm = operand_cimmi(inst); 4085ea103259SMichael Clark break; 4086ea103259SMichael Clark case rv_codec_ci_lui: 4087ea103259SMichael Clark dec->rd = operand_crd(inst); 4088ea103259SMichael Clark dec->rs1 = rv_ireg_zero; 4089ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4090ea103259SMichael Clark dec->imm = operand_cimmui(inst); 4091ea103259SMichael Clark break; 4092ea103259SMichael Clark case rv_codec_ci_none: 4093ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 4094ea103259SMichael Clark dec->imm = 0; 4095ea103259SMichael Clark break; 4096ea103259SMichael Clark case rv_codec_ciw_4spn: 4097ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4098ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4099ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4100ea103259SMichael Clark dec->imm = operand_cimm4spn(inst); 4101ea103259SMichael Clark break; 4102ea103259SMichael Clark case rv_codec_cj: 4103ea103259SMichael Clark dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero; 4104ea103259SMichael Clark dec->imm = operand_cimmj(inst); 4105ea103259SMichael Clark break; 4106ea103259SMichael Clark case rv_codec_cj_jal: 4107ea103259SMichael Clark dec->rd = rv_ireg_ra; 4108ea103259SMichael Clark dec->rs1 = dec->rs2 = rv_ireg_zero; 4109ea103259SMichael Clark dec->imm = operand_cimmj(inst); 4110ea103259SMichael Clark break; 4111ea103259SMichael Clark case rv_codec_cl_lw: 4112ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4113ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4114ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4115ea103259SMichael Clark dec->imm = operand_cimmw(inst); 4116ea103259SMichael Clark break; 4117ea103259SMichael Clark case rv_codec_cl_ld: 4118ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4119ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4120ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4121ea103259SMichael Clark dec->imm = operand_cimmd(inst); 4122ea103259SMichael Clark break; 4123ea103259SMichael Clark case rv_codec_cl_lq: 4124ea103259SMichael Clark dec->rd = operand_crdq(inst) + 8; 4125ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4126ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4127ea103259SMichael Clark dec->imm = operand_cimmq(inst); 4128ea103259SMichael Clark break; 4129ea103259SMichael Clark case rv_codec_cr: 4130ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rd(inst); 4131ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4132ea103259SMichael Clark dec->imm = 0; 4133ea103259SMichael Clark break; 4134ea103259SMichael Clark case rv_codec_cr_mv: 4135ea103259SMichael Clark dec->rd = operand_crd(inst); 4136ea103259SMichael Clark dec->rs1 = operand_crs2(inst); 4137ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4138ea103259SMichael Clark dec->imm = 0; 4139ea103259SMichael Clark break; 4140ea103259SMichael Clark case rv_codec_cr_jalr: 4141ea103259SMichael Clark dec->rd = rv_ireg_ra; 4142ea103259SMichael Clark dec->rs1 = operand_crs1(inst); 4143ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4144ea103259SMichael Clark dec->imm = 0; 4145ea103259SMichael Clark break; 4146ea103259SMichael Clark case rv_codec_cr_jr: 4147ea103259SMichael Clark dec->rd = rv_ireg_zero; 4148ea103259SMichael Clark dec->rs1 = operand_crs1(inst); 4149ea103259SMichael Clark dec->rs2 = rv_ireg_zero; 4150ea103259SMichael Clark dec->imm = 0; 4151ea103259SMichael Clark break; 4152ea103259SMichael Clark case rv_codec_cs: 4153ea103259SMichael Clark dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8; 4154ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4155ea103259SMichael Clark dec->imm = 0; 4156ea103259SMichael Clark break; 4157ea103259SMichael Clark case rv_codec_cs_sw: 4158ea103259SMichael Clark dec->rd = rv_ireg_zero; 4159ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4160ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4161ea103259SMichael Clark dec->imm = operand_cimmw(inst); 4162ea103259SMichael Clark break; 4163ea103259SMichael Clark case rv_codec_cs_sd: 4164ea103259SMichael Clark dec->rd = rv_ireg_zero; 4165ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4166ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4167ea103259SMichael Clark dec->imm = operand_cimmd(inst); 4168ea103259SMichael Clark break; 4169ea103259SMichael Clark case rv_codec_cs_sq: 4170ea103259SMichael Clark dec->rd = rv_ireg_zero; 4171ea103259SMichael Clark dec->rs1 = operand_crs1q(inst) + 8; 4172ea103259SMichael Clark dec->rs2 = operand_crs2q(inst) + 8; 4173ea103259SMichael Clark dec->imm = operand_cimmq(inst); 4174ea103259SMichael Clark break; 4175ea103259SMichael Clark case rv_codec_css_swsp: 4176ea103259SMichael Clark dec->rd = rv_ireg_zero; 4177ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4178ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4179ea103259SMichael Clark dec->imm = operand_cimmswsp(inst); 4180ea103259SMichael Clark break; 4181ea103259SMichael Clark case rv_codec_css_sdsp: 4182ea103259SMichael Clark dec->rd = rv_ireg_zero; 4183ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4184ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4185ea103259SMichael Clark dec->imm = operand_cimmsdsp(inst); 4186ea103259SMichael Clark break; 4187ea103259SMichael Clark case rv_codec_css_sqsp: 4188ea103259SMichael Clark dec->rd = rv_ireg_zero; 4189ea103259SMichael Clark dec->rs1 = rv_ireg_sp; 4190ea103259SMichael Clark dec->rs2 = operand_crs2(inst); 4191ea103259SMichael Clark dec->imm = operand_cimmsqsp(inst); 4192ea103259SMichael Clark break; 41935748c886SWeiwei Li case rv_codec_k_bs: 41945748c886SWeiwei Li dec->rs1 = operand_rs1(inst); 41955748c886SWeiwei Li dec->rs2 = operand_rs2(inst); 41965748c886SWeiwei Li dec->bs = operand_bs(inst); 41975748c886SWeiwei Li break; 41985748c886SWeiwei Li case rv_codec_k_rnum: 41995748c886SWeiwei Li dec->rd = operand_rd(inst); 42005748c886SWeiwei Li dec->rs1 = operand_rs1(inst); 42015748c886SWeiwei Li dec->rnum = operand_rnum(inst); 42025748c886SWeiwei Li break; 420307f4964dSYang Liu case rv_codec_v_r: 420407f4964dSYang Liu dec->rd = operand_rd(inst); 420507f4964dSYang Liu dec->rs1 = operand_rs1(inst); 420607f4964dSYang Liu dec->rs2 = operand_rs2(inst); 420707f4964dSYang Liu dec->vm = operand_vm(inst); 420807f4964dSYang Liu break; 420907f4964dSYang Liu case rv_codec_v_ldst: 421007f4964dSYang Liu dec->rd = operand_rd(inst); 421107f4964dSYang Liu dec->rs1 = operand_rs1(inst); 421207f4964dSYang Liu dec->vm = operand_vm(inst); 421307f4964dSYang Liu break; 421407f4964dSYang Liu case rv_codec_v_i: 421507f4964dSYang Liu dec->rd = operand_rd(inst); 421607f4964dSYang Liu dec->rs2 = operand_rs2(inst); 421707f4964dSYang Liu dec->imm = operand_vimm(inst); 421807f4964dSYang Liu dec->vm = operand_vm(inst); 421907f4964dSYang Liu break; 422007f4964dSYang Liu case rv_codec_vsetvli: 422107f4964dSYang Liu dec->rd = operand_rd(inst); 422207f4964dSYang Liu dec->rs1 = operand_rs1(inst); 422307f4964dSYang Liu dec->vzimm = operand_vzimm11(inst); 422407f4964dSYang Liu break; 422507f4964dSYang Liu case rv_codec_vsetivli: 422607f4964dSYang Liu dec->rd = operand_rd(inst); 422707f4964dSYang Liu dec->imm = operand_vimm(inst); 422807f4964dSYang Liu dec->vzimm = operand_vzimm10(inst); 422907f4964dSYang Liu break; 42302c71d02eSWeiwei Li case rv_codec_zcb_lb: 42312c71d02eSWeiwei Li dec->rs1 = operand_crs1q(inst) + 8; 42322c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42332c71d02eSWeiwei Li dec->imm = operand_uimm_c_lb(inst); 42342c71d02eSWeiwei Li break; 42352c71d02eSWeiwei Li case rv_codec_zcb_lh: 42362c71d02eSWeiwei Li dec->rs1 = operand_crs1q(inst) + 8; 42372c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42382c71d02eSWeiwei Li dec->imm = operand_uimm_c_lh(inst); 42392c71d02eSWeiwei Li break; 42402c71d02eSWeiwei Li case rv_codec_zcb_ext: 42412c71d02eSWeiwei Li dec->rd = operand_crs1q(inst) + 8; 42422c71d02eSWeiwei Li break; 42432c71d02eSWeiwei Li case rv_codec_zcb_mul: 42442c71d02eSWeiwei Li dec->rd = operand_crs1rdq(inst) + 8; 42452c71d02eSWeiwei Li dec->rs2 = operand_crs2q(inst) + 8; 42462c71d02eSWeiwei Li break; 42472c71d02eSWeiwei Li case rv_codec_zcmp_cm_pushpop: 42482c71d02eSWeiwei Li dec->imm = operand_zcmp_stack_adj(inst, isa); 42492c71d02eSWeiwei Li dec->rlist = operand_zcmp_rlist(inst); 42502c71d02eSWeiwei Li break; 42512c71d02eSWeiwei Li case rv_codec_zcmp_cm_mv: 42522c71d02eSWeiwei Li dec->rd = operand_sreg1(inst); 42532c71d02eSWeiwei Li dec->rs2 = operand_sreg2(inst); 42542c71d02eSWeiwei Li break; 42552c71d02eSWeiwei Li case rv_codec_zcmt_jt: 42562c71d02eSWeiwei Li dec->imm = operand_tbl_index(inst); 42572c71d02eSWeiwei Li break; 4258*318df723SChristoph Müllner case rv_codec_r2_imm5: 4259*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4260*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4261*318df723SChristoph Müllner dec->imm = operand_rs2(inst); 4262*318df723SChristoph Müllner break; 4263*318df723SChristoph Müllner case rv_codec_r2: 4264*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4265*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4266*318df723SChristoph Müllner break; 4267*318df723SChristoph Müllner case rv_codec_r2_imm6: 4268*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4269*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4270*318df723SChristoph Müllner dec->imm = operand_imm6(inst); 4271*318df723SChristoph Müllner break; 4272*318df723SChristoph Müllner case rv_codec_r_imm2: 4273*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4274*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4275*318df723SChristoph Müllner dec->rs2 = operand_rs2(inst); 4276*318df723SChristoph Müllner dec->imm = operand_imm2(inst); 4277*318df723SChristoph Müllner break; 4278*318df723SChristoph Müllner case rv_codec_r2_immhl: 4279*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4280*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4281*318df723SChristoph Müllner dec->imm = operand_immh(inst); 4282*318df723SChristoph Müllner dec->imm1 = operand_imml(inst); 4283*318df723SChristoph Müllner break; 4284*318df723SChristoph Müllner case rv_codec_r2_imm2_imm5: 4285*318df723SChristoph Müllner dec->rd = operand_rd(inst); 4286*318df723SChristoph Müllner dec->rs1 = operand_rs1(inst); 4287*318df723SChristoph Müllner dec->imm = sextract32(operand_rs2(inst), 0, 5); 4288*318df723SChristoph Müllner dec->imm1 = operand_imm2(inst); 4289*318df723SChristoph Müllner break; 4290ea103259SMichael Clark }; 4291ea103259SMichael Clark } 4292ea103259SMichael Clark 4293ea103259SMichael Clark /* check constraint */ 4294ea103259SMichael Clark 4295ea103259SMichael Clark static bool check_constraints(rv_decode *dec, const rvc_constraint *c) 4296ea103259SMichael Clark { 4297ea103259SMichael Clark int32_t imm = dec->imm; 4298ea103259SMichael Clark uint8_t rd = dec->rd, rs1 = dec->rs1, rs2 = dec->rs2; 4299ea103259SMichael Clark while (*c != rvc_end) { 4300ea103259SMichael Clark switch (*c) { 4301ea103259SMichael Clark case rvc_rd_eq_ra: 4302ea103259SMichael Clark if (!(rd == 1)) { 4303ea103259SMichael Clark return false; 4304ea103259SMichael Clark } 4305ea103259SMichael Clark break; 4306ea103259SMichael Clark case rvc_rd_eq_x0: 4307ea103259SMichael Clark if (!(rd == 0)) { 4308ea103259SMichael Clark return false; 4309ea103259SMichael Clark } 4310ea103259SMichael Clark break; 4311ea103259SMichael Clark case rvc_rs1_eq_x0: 4312ea103259SMichael Clark if (!(rs1 == 0)) { 4313ea103259SMichael Clark return false; 4314ea103259SMichael Clark } 4315ea103259SMichael Clark break; 4316ea103259SMichael Clark case rvc_rs2_eq_x0: 4317ea103259SMichael Clark if (!(rs2 == 0)) { 4318ea103259SMichael Clark return false; 4319ea103259SMichael Clark } 4320ea103259SMichael Clark break; 4321ea103259SMichael Clark case rvc_rs2_eq_rs1: 4322ea103259SMichael Clark if (!(rs2 == rs1)) { 4323ea103259SMichael Clark return false; 4324ea103259SMichael Clark } 4325ea103259SMichael Clark break; 4326ea103259SMichael Clark case rvc_rs1_eq_ra: 4327ea103259SMichael Clark if (!(rs1 == 1)) { 4328ea103259SMichael Clark return false; 4329ea103259SMichael Clark } 4330ea103259SMichael Clark break; 4331ea103259SMichael Clark case rvc_imm_eq_zero: 4332ea103259SMichael Clark if (!(imm == 0)) { 4333ea103259SMichael Clark return false; 4334ea103259SMichael Clark } 4335ea103259SMichael Clark break; 4336ea103259SMichael Clark case rvc_imm_eq_n1: 4337ea103259SMichael Clark if (!(imm == -1)) { 4338ea103259SMichael Clark return false; 4339ea103259SMichael Clark } 4340ea103259SMichael Clark break; 4341ea103259SMichael Clark case rvc_imm_eq_p1: 4342ea103259SMichael Clark if (!(imm == 1)) { 4343ea103259SMichael Clark return false; 4344ea103259SMichael Clark } 4345ea103259SMichael Clark break; 4346ea103259SMichael Clark case rvc_csr_eq_0x001: 4347ea103259SMichael Clark if (!(imm == 0x001)) { 4348ea103259SMichael Clark return false; 4349ea103259SMichael Clark } 4350ea103259SMichael Clark break; 4351ea103259SMichael Clark case rvc_csr_eq_0x002: 4352ea103259SMichael Clark if (!(imm == 0x002)) { 4353ea103259SMichael Clark return false; 4354ea103259SMichael Clark } 4355ea103259SMichael Clark break; 4356ea103259SMichael Clark case rvc_csr_eq_0x003: 4357ea103259SMichael Clark if (!(imm == 0x003)) { 4358ea103259SMichael Clark return false; 4359ea103259SMichael Clark } 4360ea103259SMichael Clark break; 4361ea103259SMichael Clark case rvc_csr_eq_0xc00: 4362ea103259SMichael Clark if (!(imm == 0xc00)) { 4363ea103259SMichael Clark return false; 4364ea103259SMichael Clark } 4365ea103259SMichael Clark break; 4366ea103259SMichael Clark case rvc_csr_eq_0xc01: 4367ea103259SMichael Clark if (!(imm == 0xc01)) { 4368ea103259SMichael Clark return false; 4369ea103259SMichael Clark } 4370ea103259SMichael Clark break; 4371ea103259SMichael Clark case rvc_csr_eq_0xc02: 4372ea103259SMichael Clark if (!(imm == 0xc02)) { 4373ea103259SMichael Clark return false; 4374ea103259SMichael Clark } 4375ea103259SMichael Clark break; 4376ea103259SMichael Clark case rvc_csr_eq_0xc80: 4377ea103259SMichael Clark if (!(imm == 0xc80)) { 4378ea103259SMichael Clark return false; 4379ea103259SMichael Clark } 4380ea103259SMichael Clark break; 4381ea103259SMichael Clark case rvc_csr_eq_0xc81: 4382ea103259SMichael Clark if (!(imm == 0xc81)) { 4383ea103259SMichael Clark return false; 4384ea103259SMichael Clark } 4385ea103259SMichael Clark break; 4386ea103259SMichael Clark case rvc_csr_eq_0xc82: 4387ea103259SMichael Clark if (!(imm == 0xc82)) { 4388ea103259SMichael Clark return false; 4389ea103259SMichael Clark } 4390ea103259SMichael Clark break; 4391ea103259SMichael Clark default: break; 4392ea103259SMichael Clark } 4393ea103259SMichael Clark c++; 4394ea103259SMichael Clark } 4395ea103259SMichael Clark return true; 4396ea103259SMichael Clark } 4397ea103259SMichael Clark 4398ea103259SMichael Clark /* instruction length */ 4399ea103259SMichael Clark 4400ea103259SMichael Clark static size_t inst_length(rv_inst inst) 4401ea103259SMichael Clark { 4402ea103259SMichael Clark /* NOTE: supports maximum instruction size of 64-bits */ 4403ea103259SMichael Clark 44043bd87176SWeiwei Li /* 44053bd87176SWeiwei Li * instruction length coding 4406ea103259SMichael Clark * 4407ea103259SMichael Clark * aa - 16 bit aa != 11 4408ea103259SMichael Clark * bbb11 - 32 bit bbb != 111 4409ea103259SMichael Clark * 011111 - 48 bit 4410ea103259SMichael Clark * 0111111 - 64 bit 4411ea103259SMichael Clark */ 4412ea103259SMichael Clark 4413ea103259SMichael Clark return (inst & 0b11) != 0b11 ? 2 4414ea103259SMichael Clark : (inst & 0b11100) != 0b11100 ? 4 4415ea103259SMichael Clark : (inst & 0b111111) == 0b011111 ? 6 4416ea103259SMichael Clark : (inst & 0b1111111) == 0b0111111 ? 8 4417ea103259SMichael Clark : 0; 4418ea103259SMichael Clark } 4419ea103259SMichael Clark 4420ea103259SMichael Clark /* format instruction */ 4421ea103259SMichael Clark 4422ea103259SMichael Clark static void append(char *s1, const char *s2, size_t n) 4423ea103259SMichael Clark { 4424ea103259SMichael Clark size_t l1 = strlen(s1); 4425ea103259SMichael Clark if (n - l1 - 1 > 0) { 4426ea103259SMichael Clark strncat(s1, s2, n - l1); 4427ea103259SMichael Clark } 4428ea103259SMichael Clark } 4429ea103259SMichael Clark 4430ea103259SMichael Clark static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec) 4431ea103259SMichael Clark { 4432fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4433ea103259SMichael Clark char tmp[64]; 4434ea103259SMichael Clark const char *fmt; 4435ea103259SMichael Clark 4436ea103259SMichael Clark fmt = opcode_data[dec->op].format; 4437ea103259SMichael Clark while (*fmt) { 4438ea103259SMichael Clark switch (*fmt) { 4439ea103259SMichael Clark case 'O': 4440ea103259SMichael Clark append(buf, opcode_data[dec->op].name, buflen); 4441ea103259SMichael Clark break; 4442ea103259SMichael Clark case '(': 4443ea103259SMichael Clark append(buf, "(", buflen); 4444ea103259SMichael Clark break; 4445ea103259SMichael Clark case ',': 4446ea103259SMichael Clark append(buf, ",", buflen); 4447ea103259SMichael Clark break; 4448ea103259SMichael Clark case ')': 4449ea103259SMichael Clark append(buf, ")", buflen); 4450ea103259SMichael Clark break; 44512c71d02eSWeiwei Li case '-': 44522c71d02eSWeiwei Li append(buf, "-", buflen); 44532c71d02eSWeiwei Li break; 44545748c886SWeiwei Li case 'b': 44555748c886SWeiwei Li snprintf(tmp, sizeof(tmp), "%d", dec->bs); 44565748c886SWeiwei Li append(buf, tmp, buflen); 44575748c886SWeiwei Li break; 44585748c886SWeiwei Li case 'n': 44595748c886SWeiwei Li snprintf(tmp, sizeof(tmp), "%d", dec->rnum); 44605748c886SWeiwei Li append(buf, tmp, buflen); 44615748c886SWeiwei Li break; 4462ea103259SMichael Clark case '0': 4463ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rd], buflen); 4464ea103259SMichael Clark break; 4465ea103259SMichael Clark case '1': 4466ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rs1], buflen); 4467ea103259SMichael Clark break; 4468ea103259SMichael Clark case '2': 4469ea103259SMichael Clark append(buf, rv_ireg_name_sym[dec->rs2], buflen); 4470ea103259SMichael Clark break; 4471ea103259SMichael Clark case '3': 4472c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rd] : 4473c54dab4cSWeiwei Li rv_freg_name_sym[dec->rd], 4474c54dab4cSWeiwei Li buflen); 4475ea103259SMichael Clark break; 4476ea103259SMichael Clark case '4': 4477c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs1] : 4478c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs1], 4479c54dab4cSWeiwei Li buflen); 4480ea103259SMichael Clark break; 4481ea103259SMichael Clark case '5': 4482c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs2] : 4483c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs2], 4484c54dab4cSWeiwei Li buflen); 4485ea103259SMichael Clark break; 4486ea103259SMichael Clark case '6': 4487c54dab4cSWeiwei Li append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs3] : 4488c54dab4cSWeiwei Li rv_freg_name_sym[dec->rs3], 4489c54dab4cSWeiwei Li buflen); 4490ea103259SMichael Clark break; 4491ea103259SMichael Clark case '7': 4492ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->rs1); 4493ea103259SMichael Clark append(buf, tmp, buflen); 4494ea103259SMichael Clark break; 4495ea103259SMichael Clark case 'i': 4496ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->imm); 4497ea103259SMichael Clark append(buf, tmp, buflen); 4498ea103259SMichael Clark break; 449907f4964dSYang Liu case 'u': 450007f4964dSYang Liu snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b11111)); 450107f4964dSYang Liu append(buf, tmp, buflen); 450207f4964dSYang Liu break; 4503*318df723SChristoph Müllner case 'j': 4504*318df723SChristoph Müllner snprintf(tmp, sizeof(tmp), "%d", dec->imm1); 4505*318df723SChristoph Müllner append(buf, tmp, buflen); 4506*318df723SChristoph Müllner break; 4507ea103259SMichael Clark case 'o': 4508ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "%d", dec->imm); 4509ea103259SMichael Clark append(buf, tmp, buflen); 4510ea103259SMichael Clark while (strlen(buf) < tab * 2) { 4511ea103259SMichael Clark append(buf, " ", buflen); 4512ea103259SMichael Clark } 4513ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "# 0x%" PRIx64, 4514ea103259SMichael Clark dec->pc + dec->imm); 4515ea103259SMichael Clark append(buf, tmp, buflen); 4516ea103259SMichael Clark break; 4517ea103259SMichael Clark case 'c': { 4518ea103259SMichael Clark const char *name = csr_name(dec->imm & 0xfff); 4519ea103259SMichael Clark if (name) { 4520ea103259SMichael Clark append(buf, name, buflen); 4521ea103259SMichael Clark } else { 4522ea103259SMichael Clark snprintf(tmp, sizeof(tmp), "0x%03x", dec->imm & 0xfff); 4523ea103259SMichael Clark append(buf, tmp, buflen); 4524ea103259SMichael Clark } 4525ea103259SMichael Clark break; 4526ea103259SMichael Clark } 4527ea103259SMichael Clark case 'r': 4528ea103259SMichael Clark switch (dec->rm) { 4529ea103259SMichael Clark case rv_rm_rne: 4530ea103259SMichael Clark append(buf, "rne", buflen); 4531ea103259SMichael Clark break; 4532ea103259SMichael Clark case rv_rm_rtz: 4533ea103259SMichael Clark append(buf, "rtz", buflen); 4534ea103259SMichael Clark break; 4535ea103259SMichael Clark case rv_rm_rdn: 4536ea103259SMichael Clark append(buf, "rdn", buflen); 4537ea103259SMichael Clark break; 4538ea103259SMichael Clark case rv_rm_rup: 4539ea103259SMichael Clark append(buf, "rup", buflen); 4540ea103259SMichael Clark break; 4541ea103259SMichael Clark case rv_rm_rmm: 4542ea103259SMichael Clark append(buf, "rmm", buflen); 4543ea103259SMichael Clark break; 4544ea103259SMichael Clark case rv_rm_dyn: 4545ea103259SMichael Clark append(buf, "dyn", buflen); 4546ea103259SMichael Clark break; 4547ea103259SMichael Clark default: 4548ea103259SMichael Clark append(buf, "inv", buflen); 4549ea103259SMichael Clark break; 4550ea103259SMichael Clark } 4551ea103259SMichael Clark break; 4552ea103259SMichael Clark case 'p': 4553ea103259SMichael Clark if (dec->pred & rv_fence_i) { 4554ea103259SMichael Clark append(buf, "i", buflen); 4555ea103259SMichael Clark } 4556ea103259SMichael Clark if (dec->pred & rv_fence_o) { 4557ea103259SMichael Clark append(buf, "o", buflen); 4558ea103259SMichael Clark } 4559ea103259SMichael Clark if (dec->pred & rv_fence_r) { 4560ea103259SMichael Clark append(buf, "r", buflen); 4561ea103259SMichael Clark } 4562ea103259SMichael Clark if (dec->pred & rv_fence_w) { 4563ea103259SMichael Clark append(buf, "w", buflen); 4564ea103259SMichael Clark } 4565ea103259SMichael Clark break; 4566ea103259SMichael Clark case 's': 4567ea103259SMichael Clark if (dec->succ & rv_fence_i) { 4568ea103259SMichael Clark append(buf, "i", buflen); 4569ea103259SMichael Clark } 4570ea103259SMichael Clark if (dec->succ & rv_fence_o) { 4571ea103259SMichael Clark append(buf, "o", buflen); 4572ea103259SMichael Clark } 4573ea103259SMichael Clark if (dec->succ & rv_fence_r) { 4574ea103259SMichael Clark append(buf, "r", buflen); 4575ea103259SMichael Clark } 4576ea103259SMichael Clark if (dec->succ & rv_fence_w) { 4577ea103259SMichael Clark append(buf, "w", buflen); 4578ea103259SMichael Clark } 4579ea103259SMichael Clark break; 4580ea103259SMichael Clark case '\t': 4581ea103259SMichael Clark while (strlen(buf) < tab) { 4582ea103259SMichael Clark append(buf, " ", buflen); 4583ea103259SMichael Clark } 4584ea103259SMichael Clark break; 4585ea103259SMichael Clark case 'A': 4586ea103259SMichael Clark if (dec->aq) { 4587ea103259SMichael Clark append(buf, ".aq", buflen); 4588ea103259SMichael Clark } 4589ea103259SMichael Clark break; 4590ea103259SMichael Clark case 'R': 4591ea103259SMichael Clark if (dec->rl) { 4592ea103259SMichael Clark append(buf, ".rl", buflen); 4593ea103259SMichael Clark } 4594ea103259SMichael Clark break; 459507f4964dSYang Liu case 'l': 459607f4964dSYang Liu append(buf, ",v0", buflen); 459707f4964dSYang Liu break; 459807f4964dSYang Liu case 'm': 459907f4964dSYang Liu if (dec->vm == 0) { 460007f4964dSYang Liu append(buf, ",v0.t", buflen); 460107f4964dSYang Liu } 460207f4964dSYang Liu break; 460307f4964dSYang Liu case 'D': 460407f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rd], buflen); 460507f4964dSYang Liu break; 460607f4964dSYang Liu case 'E': 460707f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs1], buflen); 460807f4964dSYang Liu break; 460907f4964dSYang Liu case 'F': 461007f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs2], buflen); 461107f4964dSYang Liu break; 461207f4964dSYang Liu case 'G': 461307f4964dSYang Liu append(buf, rv_vreg_name_sym[dec->rs3], buflen); 461407f4964dSYang Liu break; 461507f4964dSYang Liu case 'v': { 461607f4964dSYang Liu char nbuf[32] = {0}; 461707f4964dSYang Liu const int sew = 1 << (((dec->vzimm >> 3) & 0b111) + 3); 461807f4964dSYang Liu sprintf(nbuf, "%d", sew); 461907f4964dSYang Liu const int lmul = dec->vzimm & 0b11; 462007f4964dSYang Liu const int flmul = (dec->vzimm >> 2) & 1; 462107f4964dSYang Liu const char *vta = (dec->vzimm >> 6) & 1 ? "ta" : "tu"; 462207f4964dSYang Liu const char *vma = (dec->vzimm >> 7) & 1 ? "ma" : "mu"; 462307f4964dSYang Liu append(buf, "e", buflen); 462407f4964dSYang Liu append(buf, nbuf, buflen); 462507f4964dSYang Liu append(buf, ",m", buflen); 462607f4964dSYang Liu if (flmul) { 462707f4964dSYang Liu switch (lmul) { 462807f4964dSYang Liu case 3: 462907f4964dSYang Liu sprintf(nbuf, "f2"); 463007f4964dSYang Liu break; 463107f4964dSYang Liu case 2: 463207f4964dSYang Liu sprintf(nbuf, "f4"); 463307f4964dSYang Liu break; 463407f4964dSYang Liu case 1: 463507f4964dSYang Liu sprintf(nbuf, "f8"); 463607f4964dSYang Liu break; 463707f4964dSYang Liu } 463807f4964dSYang Liu append(buf, nbuf, buflen); 463907f4964dSYang Liu } else { 464007f4964dSYang Liu sprintf(nbuf, "%d", 1 << lmul); 464107f4964dSYang Liu append(buf, nbuf, buflen); 464207f4964dSYang Liu } 464307f4964dSYang Liu append(buf, ",", buflen); 464407f4964dSYang Liu append(buf, vta, buflen); 464507f4964dSYang Liu append(buf, ",", buflen); 464607f4964dSYang Liu append(buf, vma, buflen); 464707f4964dSYang Liu break; 464807f4964dSYang Liu } 46492c71d02eSWeiwei Li case 'x': { 46502c71d02eSWeiwei Li switch (dec->rlist) { 46512c71d02eSWeiwei Li case 4: 46522c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra}"); 46532c71d02eSWeiwei Li break; 46542c71d02eSWeiwei Li case 5: 46552c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0}"); 46562c71d02eSWeiwei Li break; 46572c71d02eSWeiwei Li case 15: 46582c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0-s11}"); 46592c71d02eSWeiwei Li break; 46602c71d02eSWeiwei Li default: 46612c71d02eSWeiwei Li snprintf(tmp, sizeof(tmp), "{ra, s0-s%d}", dec->rlist - 5); 46622c71d02eSWeiwei Li break; 46632c71d02eSWeiwei Li } 46642c71d02eSWeiwei Li append(buf, tmp, buflen); 46652c71d02eSWeiwei Li break; 46662c71d02eSWeiwei Li } 4667ea103259SMichael Clark default: 4668ea103259SMichael Clark break; 4669ea103259SMichael Clark } 4670ea103259SMichael Clark fmt++; 4671ea103259SMichael Clark } 4672ea103259SMichael Clark } 4673ea103259SMichael Clark 4674ea103259SMichael Clark /* lift instruction to pseudo-instruction */ 4675ea103259SMichael Clark 4676ea103259SMichael Clark static void decode_inst_lift_pseudo(rv_decode *dec) 4677ea103259SMichael Clark { 4678fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4679ea103259SMichael Clark const rv_comp_data *comp_data = opcode_data[dec->op].pseudo; 4680ea103259SMichael Clark if (!comp_data) { 4681ea103259SMichael Clark return; 4682ea103259SMichael Clark } 4683ea103259SMichael Clark while (comp_data->constraints) { 4684ea103259SMichael Clark if (check_constraints(dec, comp_data->constraints)) { 4685ea103259SMichael Clark dec->op = comp_data->op; 4686ea103259SMichael Clark dec->codec = opcode_data[dec->op].codec; 4687ea103259SMichael Clark return; 4688ea103259SMichael Clark } 4689ea103259SMichael Clark comp_data++; 4690ea103259SMichael Clark } 4691ea103259SMichael Clark } 4692ea103259SMichael Clark 4693ea103259SMichael Clark /* decompress instruction */ 4694ea103259SMichael Clark 4695ea103259SMichael Clark static void decode_inst_decompress_rv32(rv_decode *dec) 4696ea103259SMichael Clark { 4697fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4698ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv32; 4699ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4700f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4701f88222daSMichael Clark && dec->imm == 0) { 4702f88222daSMichael Clark dec->op = rv_op_illegal; 4703f88222daSMichael Clark } else { 4704ea103259SMichael Clark dec->op = decomp_op; 4705ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4706ea103259SMichael Clark } 4707ea103259SMichael Clark } 4708f88222daSMichael Clark } 4709ea103259SMichael Clark 4710ea103259SMichael Clark static void decode_inst_decompress_rv64(rv_decode *dec) 4711ea103259SMichael Clark { 4712fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4713ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv64; 4714ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4715f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4716f88222daSMichael Clark && dec->imm == 0) { 4717f88222daSMichael Clark dec->op = rv_op_illegal; 4718f88222daSMichael Clark } else { 4719ea103259SMichael Clark dec->op = decomp_op; 4720ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4721ea103259SMichael Clark } 4722ea103259SMichael Clark } 4723f88222daSMichael Clark } 4724ea103259SMichael Clark 4725ea103259SMichael Clark static void decode_inst_decompress_rv128(rv_decode *dec) 4726ea103259SMichael Clark { 4727fd7c64f6SChristoph Müllner const rv_opcode_data *opcode_data = dec->opcode_data; 4728ea103259SMichael Clark int decomp_op = opcode_data[dec->op].decomp_rv128; 4729ea103259SMichael Clark if (decomp_op != rv_op_illegal) { 4730f88222daSMichael Clark if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) 4731f88222daSMichael Clark && dec->imm == 0) { 4732f88222daSMichael Clark dec->op = rv_op_illegal; 4733f88222daSMichael Clark } else { 4734ea103259SMichael Clark dec->op = decomp_op; 4735ea103259SMichael Clark dec->codec = opcode_data[decomp_op].codec; 4736ea103259SMichael Clark } 4737ea103259SMichael Clark } 4738f88222daSMichael Clark } 4739ea103259SMichael Clark 4740ea103259SMichael Clark static void decode_inst_decompress(rv_decode *dec, rv_isa isa) 4741ea103259SMichael Clark { 4742ea103259SMichael Clark switch (isa) { 4743ea103259SMichael Clark case rv32: 4744ea103259SMichael Clark decode_inst_decompress_rv32(dec); 4745ea103259SMichael Clark break; 4746ea103259SMichael Clark case rv64: 4747ea103259SMichael Clark decode_inst_decompress_rv64(dec); 4748ea103259SMichael Clark break; 4749ea103259SMichael Clark case rv128: 4750ea103259SMichael Clark decode_inst_decompress_rv128(dec); 4751ea103259SMichael Clark break; 4752ea103259SMichael Clark } 4753ea103259SMichael Clark } 4754ea103259SMichael Clark 4755ea103259SMichael Clark /* disassemble instruction */ 4756ea103259SMichael Clark 4757ea103259SMichael Clark static void 4758454c2201SWeiwei Li disasm_inst(char *buf, size_t buflen, rv_isa isa, uint64_t pc, rv_inst inst, 4759454c2201SWeiwei Li RISCVCPUConfig *cfg) 4760ea103259SMichael Clark { 4761ea103259SMichael Clark rv_decode dec = { 0 }; 4762ea103259SMichael Clark dec.pc = pc; 4763ea103259SMichael Clark dec.inst = inst; 4764454c2201SWeiwei Li dec.cfg = cfg; 4765c859a242SChristoph Müllner 4766c859a242SChristoph Müllner static const struct { 4767c859a242SChristoph Müllner bool (*guard_func)(const RISCVCPUConfig *); 4768c859a242SChristoph Müllner const rv_opcode_data *opcode_data; 4769c859a242SChristoph Müllner void (*decode_func)(rv_decode *, rv_isa); 4770c859a242SChristoph Müllner } decoders[] = { 4771c859a242SChristoph Müllner { always_true_p, rvi_opcode_data, decode_inst_opcode }, 4772*318df723SChristoph Müllner { has_xtheadba_p, xthead_opcode_data, decode_xtheadba }, 4773*318df723SChristoph Müllner { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb }, 4774*318df723SChristoph Müllner { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs }, 4775*318df723SChristoph Müllner { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo }, 4776*318df723SChristoph Müllner { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmov }, 4777*318df723SChristoph Müllner { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemidx }, 4778*318df723SChristoph Müllner { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv }, 4779*318df723SChristoph Müllner { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac }, 4780*318df723SChristoph Müllner { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx }, 4781*318df723SChristoph Müllner { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempair }, 4782*318df723SChristoph Müllner { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync }, 4783f6f72338SChristoph Müllner { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops }, 4784c859a242SChristoph Müllner }; 4785c859a242SChristoph Müllner 4786c859a242SChristoph Müllner for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) { 4787c859a242SChristoph Müllner bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func; 4788c859a242SChristoph Müllner const rv_opcode_data *opcode_data = decoders[i].opcode_data; 4789c859a242SChristoph Müllner void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func; 4790c859a242SChristoph Müllner 4791c859a242SChristoph Müllner if (guard_func(cfg)) { 4792c859a242SChristoph Müllner dec.opcode_data = opcode_data; 4793c859a242SChristoph Müllner decode_func(&dec, isa); 4794c859a242SChristoph Müllner if (dec.op != rv_op_illegal) 4795c859a242SChristoph Müllner break; 4796c859a242SChristoph Müllner } 4797c859a242SChristoph Müllner } 4798c859a242SChristoph Müllner 4799c859a242SChristoph Müllner if (dec.op == rv_op_illegal) { 4800c859a242SChristoph Müllner dec.opcode_data = rvi_opcode_data; 4801c859a242SChristoph Müllner } 4802c859a242SChristoph Müllner 480333632775SFrédéric Pétrot decode_inst_operands(&dec, isa); 4804ea103259SMichael Clark decode_inst_decompress(&dec, isa); 4805ea103259SMichael Clark decode_inst_lift_pseudo(&dec); 480607f4964dSYang Liu format_inst(buf, buflen, 24, &dec); 4807ea103259SMichael Clark } 4808ea103259SMichael Clark 48096296a799SMichael Clark #define INST_FMT_2 "%04" PRIx64 " " 48106296a799SMichael Clark #define INST_FMT_4 "%08" PRIx64 " " 48116296a799SMichael Clark #define INST_FMT_6 "%012" PRIx64 " " 48126296a799SMichael Clark #define INST_FMT_8 "%016" PRIx64 " " 48136296a799SMichael Clark 4814ea103259SMichael Clark static int 4815ea103259SMichael Clark print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa) 4816ea103259SMichael Clark { 4817ea103259SMichael Clark char buf[128] = { 0 }; 4818ea103259SMichael Clark bfd_byte packet[2]; 4819ea103259SMichael Clark rv_inst inst = 0; 4820ea103259SMichael Clark size_t len = 2; 4821ea103259SMichael Clark bfd_vma n; 4822ea103259SMichael Clark int status; 4823ea103259SMichael Clark 4824ea103259SMichael Clark /* Instructions are made of 2-byte packets in little-endian order */ 4825ea103259SMichael Clark for (n = 0; n < len; n += 2) { 4826ea103259SMichael Clark status = (*info->read_memory_func)(memaddr + n, packet, 2, info); 4827ea103259SMichael Clark if (status != 0) { 4828ea103259SMichael Clark /* Don't fail just because we fell off the end. */ 4829ea103259SMichael Clark if (n > 0) { 4830ea103259SMichael Clark break; 4831ea103259SMichael Clark } 4832ea103259SMichael Clark (*info->memory_error_func)(status, memaddr, info); 4833ea103259SMichael Clark return status; 4834ea103259SMichael Clark } 4835ea103259SMichael Clark inst |= ((rv_inst) bfd_getl16(packet)) << (8 * n); 4836ea103259SMichael Clark if (n == 0) { 4837ea103259SMichael Clark len = inst_length(inst); 4838ea103259SMichael Clark } 4839ea103259SMichael Clark } 4840ea103259SMichael Clark 48416296a799SMichael Clark switch (len) { 48426296a799SMichael Clark case 2: 48436296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_2, inst); 48446296a799SMichael Clark break; 48456296a799SMichael Clark case 4: 48466296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_4, inst); 48476296a799SMichael Clark break; 48486296a799SMichael Clark case 6: 48496296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_6, inst); 48506296a799SMichael Clark break; 48516296a799SMichael Clark default: 48526296a799SMichael Clark (*info->fprintf_func)(info->stream, INST_FMT_8, inst); 48536296a799SMichael Clark break; 48546296a799SMichael Clark } 48556296a799SMichael Clark 4856454c2201SWeiwei Li disasm_inst(buf, sizeof(buf), isa, memaddr, inst, 4857454c2201SWeiwei Li (RISCVCPUConfig *)info->target_info); 4858ea103259SMichael Clark (*info->fprintf_func)(info->stream, "%s", buf); 4859ea103259SMichael Clark 4860ea103259SMichael Clark return len; 4861ea103259SMichael Clark } 4862ea103259SMichael Clark 4863ea103259SMichael Clark int print_insn_riscv32(bfd_vma memaddr, struct disassemble_info *info) 4864ea103259SMichael Clark { 4865ea103259SMichael Clark return print_insn_riscv(memaddr, info, rv32); 4866ea103259SMichael Clark } 4867ea103259SMichael Clark 4868ea103259SMichael Clark int print_insn_riscv64(bfd_vma memaddr, struct disassemble_info *info) 4869ea103259SMichael Clark { 4870ea103259SMichael Clark return print_insn_riscv(memaddr, info, rv64); 4871ea103259SMichael Clark } 4872332dab68SFrédéric Pétrot 4873332dab68SFrédéric Pétrot int print_insn_riscv128(bfd_vma memaddr, struct disassemble_info *info) 4874332dab68SFrédéric Pétrot { 4875332dab68SFrédéric Pétrot return print_insn_riscv(memaddr, info, rv128); 4876332dab68SFrédéric Pétrot } 4877