1 /* 2 * arm cpu init and loop 3 * 4 * Copyright (c) 2013 Stacey D. Son 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef _TARGET_ARCH_CPU_H_ 21 #define _TARGET_ARCH_CPU_H_ 22 23 #include "target_arch.h" 24 25 #define TARGET_DEFAULT_CPU_MODEL "any" 26 27 static inline void target_cpu_init(CPUARMState *env, 28 struct target_pt_regs *regs) 29 { 30 int i; 31 32 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, 33 CPSRWriteByInstr); 34 for (i = 0; i < 16; i++) { 35 env->regs[i] = regs->uregs[i]; 36 } 37 } 38 39 static inline void target_cpu_loop(CPUARMState *env) 40 { 41 int trapnr; 42 target_siginfo_t info; 43 CPUState *cs = env_cpu(env); 44 45 for (;;) { 46 cpu_exec_start(cs); 47 trapnr = cpu_exec(cs); 48 cpu_exec_end(cs); 49 process_queued_cpu_work(cs); 50 switch (trapnr) { 51 case EXCP_UDEF: 52 { 53 /* See arm/arm/undefined.c undefinedinstruction(); */ 54 info.si_addr = env->regs[15]; 55 56 /* illegal instruction */ 57 info.si_signo = TARGET_SIGILL; 58 info.si_errno = 0; 59 info.si_code = TARGET_ILL_ILLOPC; 60 queue_signal(env, info.si_signo, &info); 61 62 /* TODO: What about instruction emulation? */ 63 } 64 break; 65 case EXCP_INTERRUPT: 66 /* just indicate that signals should be handled asap */ 67 break; 68 case EXCP_PREFETCH_ABORT: 69 /* See arm/arm/trap.c prefetch_abort_handler() */ 70 case EXCP_DATA_ABORT: 71 /* See arm/arm/trap.c data_abort_handler() */ 72 info.si_signo = TARGET_SIGSEGV; 73 info.si_errno = 0; 74 /* XXX: check env->error_code */ 75 info.si_code = 0; 76 info.si_addr = env->exception.vaddress; 77 queue_signal(env, info.si_signo, &info); 78 break; 79 case EXCP_DEBUG: 80 { 81 82 info.si_signo = TARGET_SIGTRAP; 83 info.si_errno = 0; 84 info.si_code = TARGET_TRAP_BRKPT; 85 info.si_addr = env->exception.vaddress; 86 queue_signal(env, info.si_signo, &info); 87 } 88 break; 89 case EXCP_ATOMIC: 90 cpu_exec_step_atomic(cs); 91 break; 92 case EXCP_YIELD: 93 /* nothing to do here for user-mode, just resume guest code */ 94 break; 95 default: 96 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 97 trapnr); 98 cpu_dump_state(cs, stderr, 0); 99 abort(); 100 } /* switch() */ 101 process_pending_signals(env); 102 } /* for (;;) */ 103 } 104 105 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp) 106 { 107 if (newsp) { 108 env->regs[13] = newsp; 109 } 110 env->regs[0] = 0; 111 } 112 113 static inline void target_cpu_reset(CPUArchState *cpu) 114 { 115 } 116 117 #endif /* !_TARGET_ARCH_CPU_H */ 118