1 /* 2 * arm cpu init and loop 3 * 4 * Copyright (c) 2013 Stacey D. Son 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef _TARGET_ARCH_CPU_H_ 21 #define _TARGET_ARCH_CPU_H_ 22 23 #include "target_arch.h" 24 #include "signal-common.h" 25 26 #define TARGET_DEFAULT_CPU_MODEL "any" 27 28 static inline void target_cpu_init(CPUARMState *env, 29 struct target_pt_regs *regs) 30 { 31 int i; 32 33 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, 34 CPSRWriteByInstr); 35 for (i = 0; i < 16; i++) { 36 env->regs[i] = regs->uregs[i]; 37 } 38 } 39 40 static inline void target_cpu_loop(CPUARMState *env) 41 { 42 int trapnr; 43 target_siginfo_t info; 44 unsigned int n; 45 CPUState *cs = env_cpu(env); 46 47 for (;;) { 48 cpu_exec_start(cs); 49 trapnr = cpu_exec(cs); 50 cpu_exec_end(cs); 51 process_queued_cpu_work(cs); 52 switch (trapnr) { 53 case EXCP_UDEF: 54 case EXCP_NOCP: 55 case EXCP_INVSTATE: 56 /* 57 * See arm/arm/undefined.c undefinedinstruction(); 58 * 59 * A number of details aren't emulated (they likely don't matter): 60 * o Misaligned PC generates ILL_ILLADR (these can't come from qemu) 61 * o Thumb-2 instructions generate ILLADR 62 * o Both modes implement coprocessor instructions, which we don't 63 * do here. FreeBSD just implements them for the VFP coprocessor 64 * and special kernel breakpoints, trace points, dtrace, etc. 65 */ 66 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]); 67 break; 68 case EXCP_SWI: 69 { 70 n = env->regs[7]; 71 if (bsd_type == target_freebsd) { 72 int ret; 73 abi_ulong params = get_sp_from_cpustate(env); 74 int32_t syscall_nr = n; 75 int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8; 76 77 /* See arm/arm/syscall.c cpu_fetch_syscall_args() */ 78 if (syscall_nr == TARGET_FREEBSD_NR_syscall) { 79 syscall_nr = env->regs[0]; 80 arg1 = env->regs[1]; 81 arg2 = env->regs[2]; 82 arg3 = env->regs[3]; 83 get_user_s32(arg4, params); 84 params += sizeof(int32_t); 85 get_user_s32(arg5, params); 86 params += sizeof(int32_t); 87 get_user_s32(arg6, params); 88 params += sizeof(int32_t); 89 get_user_s32(arg7, params); 90 arg8 = 0; 91 } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) { 92 syscall_nr = env->regs[0]; 93 arg1 = env->regs[2]; 94 arg2 = env->regs[3]; 95 get_user_s32(arg3, params); 96 params += sizeof(int32_t); 97 get_user_s32(arg4, params); 98 params += sizeof(int32_t); 99 get_user_s32(arg5, params); 100 params += sizeof(int32_t); 101 get_user_s32(arg6, params); 102 arg7 = 0; 103 arg8 = 0; 104 } else { 105 arg1 = env->regs[0]; 106 arg2 = env->regs[1]; 107 arg3 = env->regs[2]; 108 arg4 = env->regs[3]; 109 get_user_s32(arg5, params); 110 params += sizeof(int32_t); 111 get_user_s32(arg6, params); 112 params += sizeof(int32_t); 113 get_user_s32(arg7, params); 114 params += sizeof(int32_t); 115 get_user_s32(arg8, params); 116 } 117 ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3, 118 arg4, arg5, arg6, arg7, arg8); 119 /* 120 * Compare to arm/arm/vm_machdep.c 121 * cpu_set_syscall_retval() 122 */ 123 if (-TARGET_EJUSTRETURN == ret) { 124 /* 125 * Returning from a successful sigreturn syscall. 126 * Avoid clobbering register state. 127 */ 128 break; 129 } 130 if (-TARGET_ERESTART == ret) { 131 env->regs[15] -= env->thumb ? 2 : 4; 132 break; 133 } 134 if ((unsigned int)ret >= (unsigned int)(-515)) { 135 ret = -ret; 136 cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr); 137 env->regs[0] = ret; 138 } else { 139 cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr); 140 env->regs[0] = ret; /* XXX need to handle lseek()? */ 141 /* env->regs[1] = 0; */ 142 } 143 } else { 144 fprintf(stderr, "qemu: bsd_type (= %d) syscall " 145 "not supported\n", bsd_type); 146 } 147 } 148 break; 149 case EXCP_INTERRUPT: 150 /* just indicate that signals should be handled asap */ 151 break; 152 case EXCP_PREFETCH_ABORT: 153 /* See arm/arm/trap.c prefetch_abort_handler() */ 154 case EXCP_DATA_ABORT: 155 /* See arm/arm/trap.c data_abort_handler() */ 156 info.si_signo = TARGET_SIGSEGV; 157 info.si_errno = 0; 158 /* XXX: check env->error_code */ 159 info.si_code = 0; 160 info.si_addr = env->exception.vaddress; 161 queue_signal(env, info.si_signo, &info); 162 break; 163 case EXCP_DEBUG: 164 case EXCP_BKPT: 165 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]); 166 break; 167 case EXCP_YIELD: 168 /* nothing to do here for user-mode, just resume guest code */ 169 break; 170 case EXCP_ATOMIC: 171 cpu_exec_step_atomic(cs); 172 break; 173 default: 174 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 175 trapnr); 176 cpu_dump_state(cs, stderr, 0); 177 abort(); 178 } /* switch() */ 179 process_pending_signals(env); 180 } /* for (;;) */ 181 } 182 183 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp) 184 { 185 if (newsp) { 186 env->regs[13] = newsp; 187 } 188 env->regs[0] = 0; 189 } 190 191 static inline void target_cpu_reset(CPUArchState *cpu) 192 { 193 } 194 195 #endif /* !_TARGET_ARCH_CPU_H */ 196