1*ca5d32a3SWarner Losh /* 2*ca5d32a3SWarner Losh * arm cpu init and loop 3*ca5d32a3SWarner Losh * 4*ca5d32a3SWarner Losh * Copyright (c) 2013 Stacey D. Son 5*ca5d32a3SWarner Losh * 6*ca5d32a3SWarner Losh * This program is free software; you can redistribute it and/or modify 7*ca5d32a3SWarner Losh * it under the terms of the GNU General Public License as published by 8*ca5d32a3SWarner Losh * the Free Software Foundation; either version 2 of the License, or 9*ca5d32a3SWarner Losh * (at your option) any later version. 10*ca5d32a3SWarner Losh * 11*ca5d32a3SWarner Losh * This program is distributed in the hope that it will be useful, 12*ca5d32a3SWarner Losh * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*ca5d32a3SWarner Losh * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*ca5d32a3SWarner Losh * GNU General Public License for more details. 15*ca5d32a3SWarner Losh * 16*ca5d32a3SWarner Losh * You should have received a copy of the GNU General Public License 17*ca5d32a3SWarner Losh * along with this program; if not, see <http://www.gnu.org/licenses/>. 18*ca5d32a3SWarner Losh */ 19*ca5d32a3SWarner Losh 20*ca5d32a3SWarner Losh #ifndef _TARGET_ARCH_CPU_H_ 21*ca5d32a3SWarner Losh #define _TARGET_ARCH_CPU_H_ 22*ca5d32a3SWarner Losh 23*ca5d32a3SWarner Losh #include "target_arch.h" 24*ca5d32a3SWarner Losh 25*ca5d32a3SWarner Losh #define TARGET_DEFAULT_CPU_MODEL "any" 26*ca5d32a3SWarner Losh 27*ca5d32a3SWarner Losh static inline void target_cpu_init(CPUARMState *env, 28*ca5d32a3SWarner Losh struct target_pt_regs *regs) 29*ca5d32a3SWarner Losh { 30*ca5d32a3SWarner Losh int i; 31*ca5d32a3SWarner Losh 32*ca5d32a3SWarner Losh cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, 33*ca5d32a3SWarner Losh CPSRWriteByInstr); 34*ca5d32a3SWarner Losh for (i = 0; i < 16; i++) { 35*ca5d32a3SWarner Losh env->regs[i] = regs->uregs[i]; 36*ca5d32a3SWarner Losh } 37*ca5d32a3SWarner Losh } 38*ca5d32a3SWarner Losh 39*ca5d32a3SWarner Losh static inline void target_cpu_reset(CPUArchState *cpu) 40*ca5d32a3SWarner Losh { 41*ca5d32a3SWarner Losh } 42*ca5d32a3SWarner Losh 43*ca5d32a3SWarner Losh #endif /* !_TARGET_ARCH_CPU_H */ 44