1ca5d32a3SWarner Losh /* 2ca5d32a3SWarner Losh * arm cpu init and loop 3ca5d32a3SWarner Losh * 4ca5d32a3SWarner Losh * Copyright (c) 2013 Stacey D. Son 5ca5d32a3SWarner Losh * 6ca5d32a3SWarner Losh * This program is free software; you can redistribute it and/or modify 7ca5d32a3SWarner Losh * it under the terms of the GNU General Public License as published by 8ca5d32a3SWarner Losh * the Free Software Foundation; either version 2 of the License, or 9ca5d32a3SWarner Losh * (at your option) any later version. 10ca5d32a3SWarner Losh * 11ca5d32a3SWarner Losh * This program is distributed in the hope that it will be useful, 12ca5d32a3SWarner Losh * but WITHOUT ANY WARRANTY; without even the implied warranty of 13ca5d32a3SWarner Losh * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14ca5d32a3SWarner Losh * GNU General Public License for more details. 15ca5d32a3SWarner Losh * 16ca5d32a3SWarner Losh * You should have received a copy of the GNU General Public License 17ca5d32a3SWarner Losh * along with this program; if not, see <http://www.gnu.org/licenses/>. 18ca5d32a3SWarner Losh */ 19ca5d32a3SWarner Losh 20ca5d32a3SWarner Losh #ifndef _TARGET_ARCH_CPU_H_ 21ca5d32a3SWarner Losh #define _TARGET_ARCH_CPU_H_ 22ca5d32a3SWarner Losh 23ca5d32a3SWarner Losh #include "target_arch.h" 24ca5d32a3SWarner Losh 25ca5d32a3SWarner Losh #define TARGET_DEFAULT_CPU_MODEL "any" 26ca5d32a3SWarner Losh 27ca5d32a3SWarner Losh static inline void target_cpu_init(CPUARMState *env, 28ca5d32a3SWarner Losh struct target_pt_regs *regs) 29ca5d32a3SWarner Losh { 30ca5d32a3SWarner Losh int i; 31ca5d32a3SWarner Losh 32ca5d32a3SWarner Losh cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, 33ca5d32a3SWarner Losh CPSRWriteByInstr); 34ca5d32a3SWarner Losh for (i = 0; i < 16; i++) { 35ca5d32a3SWarner Losh env->regs[i] = regs->uregs[i]; 36ca5d32a3SWarner Losh } 37ca5d32a3SWarner Losh } 38ca5d32a3SWarner Losh 39*06efe3bfSWarner Losh static inline void target_cpu_loop(CPUARMState *env) 40*06efe3bfSWarner Losh { 41*06efe3bfSWarner Losh int trapnr; 42*06efe3bfSWarner Losh target_siginfo_t info; 43*06efe3bfSWarner Losh CPUState *cs = env_cpu(env); 44*06efe3bfSWarner Losh 45*06efe3bfSWarner Losh for (;;) { 46*06efe3bfSWarner Losh cpu_exec_start(cs); 47*06efe3bfSWarner Losh trapnr = cpu_exec(cs); 48*06efe3bfSWarner Losh cpu_exec_end(cs); 49*06efe3bfSWarner Losh process_queued_cpu_work(cs); 50*06efe3bfSWarner Losh switch (trapnr) { 51*06efe3bfSWarner Losh default: 52*06efe3bfSWarner Losh fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 53*06efe3bfSWarner Losh trapnr); 54*06efe3bfSWarner Losh cpu_dump_state(cs, stderr, 0); 55*06efe3bfSWarner Losh abort(); 56*06efe3bfSWarner Losh } /* switch() */ 57*06efe3bfSWarner Losh process_pending_signals(env); 58*06efe3bfSWarner Losh } /* for (;;) */ 59*06efe3bfSWarner Losh } 60*06efe3bfSWarner Losh 61e17d4c9aSWarner Losh static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp) 62e17d4c9aSWarner Losh { 63e17d4c9aSWarner Losh if (newsp) { 64e17d4c9aSWarner Losh env->regs[13] = newsp; 65e17d4c9aSWarner Losh } 66e17d4c9aSWarner Losh env->regs[0] = 0; 67e17d4c9aSWarner Losh } 68e17d4c9aSWarner Losh 69ca5d32a3SWarner Losh static inline void target_cpu_reset(CPUArchState *cpu) 70ca5d32a3SWarner Losh { 71ca5d32a3SWarner Losh } 72ca5d32a3SWarner Losh 73ca5d32a3SWarner Losh #endif /* !_TARGET_ARCH_CPU_H */ 74