1 /* 2 * arm signal functions 3 * 4 * Copyright (c) 2013 Stacey D. Son 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu.h" 21 22 /* 23 * Compare to arm/arm/machdep.c sendsig() 24 * Assumes that target stack frame memory is locked. 25 */ 26 abi_long set_sigtramp_args(CPUARMState *env, int sig, 27 struct target_sigframe *frame, 28 abi_ulong frame_addr, 29 struct target_sigaction *ka) 30 { 31 /* 32 * Arguments to signal handler: 33 * r0 = signal number 34 * r1 = siginfo pointer 35 * r2 = ucontext pointer 36 * r5 = ucontext pointer 37 * pc = signal handler pointer 38 * sp = sigframe struct pointer 39 * lr = sigtramp at base of user stack 40 */ 41 42 env->regs[0] = sig; 43 env->regs[1] = frame_addr + 44 offsetof(struct target_sigframe, sf_si); 45 env->regs[2] = frame_addr + 46 offsetof(struct target_sigframe, sf_uc); 47 48 /* the trampoline uses r5 as the uc address */ 49 env->regs[5] = frame_addr + 50 offsetof(struct target_sigframe, sf_uc); 51 env->regs[TARGET_REG_PC] = ka->_sa_handler & ~1; 52 env->regs[TARGET_REG_SP] = frame_addr; 53 env->regs[TARGET_REG_LR] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; 54 /* 55 * Low bit indicates whether or not we're entering thumb mode. 56 */ 57 cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr); 58 59 return 0; 60 } 61 62 /* 63 * Compare to arm/arm/machdep.c get_mcontext() 64 * Assumes that the memory is locked if mcp points to user memory. 65 */ 66 abi_long get_mcontext(CPUARMState *env, target_mcontext_t *mcp, int flags) 67 { 68 int err = 0; 69 uint32_t *gr = mcp->__gregs; 70 71 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(target_mcontext_vfp_t)) { 72 return -TARGET_EINVAL; 73 } 74 75 gr[TARGET_REG_CPSR] = tswap32(cpsr_read(env)); 76 if (flags & TARGET_MC_GET_CLEAR_RET) { 77 gr[TARGET_REG_R0] = 0; 78 gr[TARGET_REG_CPSR] &= ~CPSR_C; 79 } else { 80 gr[TARGET_REG_R0] = tswap32(env->regs[0]); 81 } 82 83 gr[TARGET_REG_R1] = tswap32(env->regs[1]); 84 gr[TARGET_REG_R2] = tswap32(env->regs[2]); 85 gr[TARGET_REG_R3] = tswap32(env->regs[3]); 86 gr[TARGET_REG_R4] = tswap32(env->regs[4]); 87 gr[TARGET_REG_R5] = tswap32(env->regs[5]); 88 gr[TARGET_REG_R6] = tswap32(env->regs[6]); 89 gr[TARGET_REG_R7] = tswap32(env->regs[7]); 90 gr[TARGET_REG_R8] = tswap32(env->regs[8]); 91 gr[TARGET_REG_R9] = tswap32(env->regs[9]); 92 gr[TARGET_REG_R10] = tswap32(env->regs[10]); 93 gr[TARGET_REG_R11] = tswap32(env->regs[11]); 94 gr[TARGET_REG_R12] = tswap32(env->regs[12]); 95 96 gr[TARGET_REG_SP] = tswap32(env->regs[13]); 97 gr[TARGET_REG_LR] = tswap32(env->regs[14]); 98 gr[TARGET_REG_PC] = tswap32(env->regs[15]); 99 100 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr != 0) { 101 /* see get_vfpcontext in sys/arm/arm/exec_machdep.c */ 102 target_mcontext_vfp_t *vfp; 103 vfp = lock_user(VERIFY_WRITE, mcp->mc_vfp_ptr, sizeof(*vfp), 0); 104 for (int i = 0; i < 32; i++) { 105 vfp->mcv_reg[i] = tswap64(*aa32_vfp_dreg(env, i)); 106 } 107 vfp->mcv_fpscr = tswap32(vfp_get_fpscr(env)); 108 unlock_user(vfp, mcp->mc_vfp_ptr, sizeof(*vfp)); 109 } 110 return err; 111 } 112