1 /* 2 * User emulator execution 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include "qemu/osdep.h" 20 #include "accel/tcg/cpu-ops.h" 21 #include "disas/disas.h" 22 #include "cpu.h" 23 #include "exec/vaddr.h" 24 #include "exec/exec-all.h" 25 #include "exec/tlb-flags.h" 26 #include "tcg/tcg.h" 27 #include "qemu/bitops.h" 28 #include "qemu/rcu.h" 29 #include "accel/tcg/cpu-ldst.h" 30 #include "user/cpu_loop.h" 31 #include "qemu/main-loop.h" 32 #include "user/page-protection.h" 33 #include "exec/page-protection.h" 34 #include "exec/helper-proto.h" 35 #include "qemu/atomic128.h" 36 #include "qemu/bswap.h" 37 #include "qemu/int128.h" 38 #include "trace.h" 39 #include "tcg/tcg-ldst.h" 40 #include "backend-ldst.h" 41 #include "internal-common.h" 42 #include "internal-target.h" 43 #include "tb-internal.h" 44 45 __thread uintptr_t helper_retaddr; 46 47 //#define DEBUG_SIGNAL 48 49 void cpu_interrupt(CPUState *cpu, int mask) 50 { 51 g_assert(bql_locked()); 52 cpu->interrupt_request |= mask; 53 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 54 } 55 56 /* 57 * Adjust the pc to pass to cpu_restore_state; return the memop type. 58 */ 59 MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) 60 { 61 switch (helper_retaddr) { 62 default: 63 /* 64 * Fault during host memory operation within a helper function. 65 * The helper's host return address, saved here, gives us a 66 * pointer into the generated code that will unwind to the 67 * correct guest pc. 68 */ 69 *pc = helper_retaddr; 70 break; 71 72 case 0: 73 /* 74 * Fault during host memory operation within generated code. 75 * (Or, a unrelated bug within qemu, but we can't tell from here). 76 * 77 * We take the host pc from the signal frame. However, we cannot 78 * use that value directly. Within cpu_restore_state_from_tb, we 79 * assume PC comes from GETPC(), as used by the helper functions, 80 * so we adjust the address by -GETPC_ADJ to form an address that 81 * is within the call insn, so that the address does not accidentally 82 * match the beginning of the next guest insn. However, when the 83 * pc comes from the signal frame it points to the actual faulting 84 * host memory insn and not the return from a call insn. 85 * 86 * Therefore, adjust to compensate for what will be done later 87 * by cpu_restore_state_from_tb. 88 */ 89 *pc += GETPC_ADJ; 90 break; 91 92 case 1: 93 /* 94 * Fault during host read for translation, or loosely, "execution". 95 * 96 * The guest pc is already pointing to the start of the TB for which 97 * code is being generated. If the guest translator manages the 98 * page crossings correctly, this is exactly the correct address 99 * (and if the translator doesn't handle page boundaries correctly 100 * there's little we can do about that here). Therefore, do not 101 * trigger the unwinder. 102 */ 103 *pc = 0; 104 return MMU_INST_FETCH; 105 } 106 107 return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; 108 } 109 110 /** 111 * handle_sigsegv_accerr_write: 112 * @cpu: the cpu context 113 * @old_set: the sigset_t from the signal ucontext_t 114 * @host_pc: the host pc, adjusted for the signal 115 * @guest_addr: the guest address of the fault 116 * 117 * Return true if the write fault has been handled, and should be re-tried. 118 * 119 * Note that it is important that we don't call page_unprotect() unless 120 * this is really a "write to nonwritable page" fault, because 121 * page_unprotect() assumes that if it is called for an access to 122 * a page that's writable this means we had two threads racing and 123 * another thread got there first and already made the page writable; 124 * so we will retry the access. If we were to call page_unprotect() 125 * for some other kind of fault that should really be passed to the 126 * guest, we'd end up in an infinite loop of retrying the faulting access. 127 */ 128 bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, 129 uintptr_t host_pc, abi_ptr guest_addr) 130 { 131 switch (page_unprotect(guest_addr, host_pc)) { 132 case 0: 133 /* 134 * Fault not caused by a page marked unwritable to protect 135 * cached translations, must be the guest binary's problem. 136 */ 137 return false; 138 case 1: 139 /* 140 * Fault caused by protection of cached translation; TBs 141 * invalidated, so resume execution. 142 */ 143 return true; 144 case 2: 145 /* 146 * Fault caused by protection of cached translation, and the 147 * currently executing TB was modified and must be exited immediately. 148 */ 149 sigprocmask(SIG_SETMASK, old_set, NULL); 150 cpu_loop_exit_noexc(cpu); 151 /* NORETURN */ 152 default: 153 g_assert_not_reached(); 154 } 155 } 156 157 typedef struct PageFlagsNode { 158 struct rcu_head rcu; 159 IntervalTreeNode itree; 160 int flags; 161 } PageFlagsNode; 162 163 static IntervalTreeRoot pageflags_root; 164 165 static PageFlagsNode *pageflags_find(target_ulong start, target_ulong last) 166 { 167 IntervalTreeNode *n; 168 169 n = interval_tree_iter_first(&pageflags_root, start, last); 170 return n ? container_of(n, PageFlagsNode, itree) : NULL; 171 } 172 173 static PageFlagsNode *pageflags_next(PageFlagsNode *p, target_ulong start, 174 target_ulong last) 175 { 176 IntervalTreeNode *n; 177 178 n = interval_tree_iter_next(&p->itree, start, last); 179 return n ? container_of(n, PageFlagsNode, itree) : NULL; 180 } 181 182 int walk_memory_regions(void *priv, walk_memory_regions_fn fn) 183 { 184 IntervalTreeNode *n; 185 int rc = 0; 186 187 mmap_lock(); 188 for (n = interval_tree_iter_first(&pageflags_root, 0, -1); 189 n != NULL; 190 n = interval_tree_iter_next(n, 0, -1)) { 191 PageFlagsNode *p = container_of(n, PageFlagsNode, itree); 192 193 rc = fn(priv, n->start, n->last + 1, p->flags); 194 if (rc != 0) { 195 break; 196 } 197 } 198 mmap_unlock(); 199 200 return rc; 201 } 202 203 static int dump_region(void *priv, target_ulong start, 204 target_ulong end, unsigned long prot) 205 { 206 FILE *f = (FILE *)priv; 207 208 fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx" "TARGET_FMT_lx" %c%c%c\n", 209 start, end, end - start, 210 ((prot & PAGE_READ) ? 'r' : '-'), 211 ((prot & PAGE_WRITE) ? 'w' : '-'), 212 ((prot & PAGE_EXEC) ? 'x' : '-')); 213 return 0; 214 } 215 216 /* dump memory mappings */ 217 void page_dump(FILE *f) 218 { 219 const int length = sizeof(target_ulong) * 2; 220 221 fprintf(f, "%-*s %-*s %-*s %s\n", 222 length, "start", length, "end", length, "size", "prot"); 223 walk_memory_regions(f, dump_region); 224 } 225 226 int page_get_flags(target_ulong address) 227 { 228 PageFlagsNode *p = pageflags_find(address, address); 229 230 /* 231 * See util/interval-tree.c re lockless lookups: no false positives but 232 * there are false negatives. If we find nothing, retry with the mmap 233 * lock acquired. 234 */ 235 if (p) { 236 return p->flags; 237 } 238 if (have_mmap_lock()) { 239 return 0; 240 } 241 242 mmap_lock(); 243 p = pageflags_find(address, address); 244 mmap_unlock(); 245 return p ? p->flags : 0; 246 } 247 248 /* A subroutine of page_set_flags: insert a new node for [start,last]. */ 249 static void pageflags_create(target_ulong start, target_ulong last, int flags) 250 { 251 PageFlagsNode *p = g_new(PageFlagsNode, 1); 252 253 p->itree.start = start; 254 p->itree.last = last; 255 p->flags = flags; 256 interval_tree_insert(&p->itree, &pageflags_root); 257 } 258 259 /* A subroutine of page_set_flags: remove everything in [start,last]. */ 260 static bool pageflags_unset(target_ulong start, target_ulong last) 261 { 262 bool inval_tb = false; 263 264 while (true) { 265 PageFlagsNode *p = pageflags_find(start, last); 266 target_ulong p_last; 267 268 if (!p) { 269 break; 270 } 271 272 if (p->flags & PAGE_EXEC) { 273 inval_tb = true; 274 } 275 276 interval_tree_remove(&p->itree, &pageflags_root); 277 p_last = p->itree.last; 278 279 if (p->itree.start < start) { 280 /* Truncate the node from the end, or split out the middle. */ 281 p->itree.last = start - 1; 282 interval_tree_insert(&p->itree, &pageflags_root); 283 if (last < p_last) { 284 pageflags_create(last + 1, p_last, p->flags); 285 break; 286 } 287 } else if (p_last <= last) { 288 /* Range completely covers node -- remove it. */ 289 g_free_rcu(p, rcu); 290 } else { 291 /* Truncate the node from the start. */ 292 p->itree.start = last + 1; 293 interval_tree_insert(&p->itree, &pageflags_root); 294 break; 295 } 296 } 297 298 return inval_tb; 299 } 300 301 /* 302 * A subroutine of page_set_flags: nothing overlaps [start,last], 303 * but check adjacent mappings and maybe merge into a single range. 304 */ 305 static void pageflags_create_merge(target_ulong start, target_ulong last, 306 int flags) 307 { 308 PageFlagsNode *next = NULL, *prev = NULL; 309 310 if (start > 0) { 311 prev = pageflags_find(start - 1, start - 1); 312 if (prev) { 313 if (prev->flags == flags) { 314 interval_tree_remove(&prev->itree, &pageflags_root); 315 } else { 316 prev = NULL; 317 } 318 } 319 } 320 if (last + 1 != 0) { 321 next = pageflags_find(last + 1, last + 1); 322 if (next) { 323 if (next->flags == flags) { 324 interval_tree_remove(&next->itree, &pageflags_root); 325 } else { 326 next = NULL; 327 } 328 } 329 } 330 331 if (prev) { 332 if (next) { 333 prev->itree.last = next->itree.last; 334 g_free_rcu(next, rcu); 335 } else { 336 prev->itree.last = last; 337 } 338 interval_tree_insert(&prev->itree, &pageflags_root); 339 } else if (next) { 340 next->itree.start = start; 341 interval_tree_insert(&next->itree, &pageflags_root); 342 } else { 343 pageflags_create(start, last, flags); 344 } 345 } 346 347 /* 348 * Allow the target to decide if PAGE_TARGET_[12] may be reset. 349 * By default, they are not kept. 350 */ 351 #ifndef PAGE_TARGET_STICKY 352 #define PAGE_TARGET_STICKY 0 353 #endif 354 #define PAGE_STICKY (PAGE_ANON | PAGE_PASSTHROUGH | PAGE_TARGET_STICKY) 355 356 /* A subroutine of page_set_flags: add flags to [start,last]. */ 357 static bool pageflags_set_clear(target_ulong start, target_ulong last, 358 int set_flags, int clear_flags) 359 { 360 PageFlagsNode *p; 361 target_ulong p_start, p_last; 362 int p_flags, merge_flags; 363 bool inval_tb = false; 364 365 restart: 366 p = pageflags_find(start, last); 367 if (!p) { 368 if (set_flags) { 369 pageflags_create_merge(start, last, set_flags); 370 } 371 goto done; 372 } 373 374 p_start = p->itree.start; 375 p_last = p->itree.last; 376 p_flags = p->flags; 377 /* Using mprotect on a page does not change sticky bits. */ 378 merge_flags = (p_flags & ~clear_flags) | set_flags; 379 380 /* 381 * Need to flush if an overlapping executable region 382 * removes exec, or adds write. 383 */ 384 if ((p_flags & PAGE_EXEC) 385 && (!(merge_flags & PAGE_EXEC) 386 || (merge_flags & ~p_flags & PAGE_WRITE))) { 387 inval_tb = true; 388 } 389 390 /* 391 * If there is an exact range match, update and return without 392 * attempting to merge with adjacent regions. 393 */ 394 if (start == p_start && last == p_last) { 395 if (merge_flags) { 396 p->flags = merge_flags; 397 } else { 398 interval_tree_remove(&p->itree, &pageflags_root); 399 g_free_rcu(p, rcu); 400 } 401 goto done; 402 } 403 404 /* 405 * If sticky bits affect the original mapping, then we must be more 406 * careful about the existing intervals and the separate flags. 407 */ 408 if (set_flags != merge_flags) { 409 if (p_start < start) { 410 interval_tree_remove(&p->itree, &pageflags_root); 411 p->itree.last = start - 1; 412 interval_tree_insert(&p->itree, &pageflags_root); 413 414 if (last < p_last) { 415 if (merge_flags) { 416 pageflags_create(start, last, merge_flags); 417 } 418 pageflags_create(last + 1, p_last, p_flags); 419 } else { 420 if (merge_flags) { 421 pageflags_create(start, p_last, merge_flags); 422 } 423 if (p_last < last) { 424 start = p_last + 1; 425 goto restart; 426 } 427 } 428 } else { 429 if (start < p_start && set_flags) { 430 pageflags_create(start, p_start - 1, set_flags); 431 } 432 if (last < p_last) { 433 interval_tree_remove(&p->itree, &pageflags_root); 434 p->itree.start = last + 1; 435 interval_tree_insert(&p->itree, &pageflags_root); 436 if (merge_flags) { 437 pageflags_create(start, last, merge_flags); 438 } 439 } else { 440 if (merge_flags) { 441 p->flags = merge_flags; 442 } else { 443 interval_tree_remove(&p->itree, &pageflags_root); 444 g_free_rcu(p, rcu); 445 } 446 if (p_last < last) { 447 start = p_last + 1; 448 goto restart; 449 } 450 } 451 } 452 goto done; 453 } 454 455 /* If flags are not changing for this range, incorporate it. */ 456 if (set_flags == p_flags) { 457 if (start < p_start) { 458 interval_tree_remove(&p->itree, &pageflags_root); 459 p->itree.start = start; 460 interval_tree_insert(&p->itree, &pageflags_root); 461 } 462 if (p_last < last) { 463 start = p_last + 1; 464 goto restart; 465 } 466 goto done; 467 } 468 469 /* Maybe split out head and/or tail ranges with the original flags. */ 470 interval_tree_remove(&p->itree, &pageflags_root); 471 if (p_start < start) { 472 p->itree.last = start - 1; 473 interval_tree_insert(&p->itree, &pageflags_root); 474 475 if (p_last < last) { 476 goto restart; 477 } 478 if (last < p_last) { 479 pageflags_create(last + 1, p_last, p_flags); 480 } 481 } else if (last < p_last) { 482 p->itree.start = last + 1; 483 interval_tree_insert(&p->itree, &pageflags_root); 484 } else { 485 g_free_rcu(p, rcu); 486 goto restart; 487 } 488 if (set_flags) { 489 pageflags_create(start, last, set_flags); 490 } 491 492 done: 493 return inval_tb; 494 } 495 496 void page_set_flags(target_ulong start, target_ulong last, int flags) 497 { 498 bool reset = false; 499 bool inval_tb = false; 500 501 /* This function should never be called with addresses outside the 502 guest address space. If this assert fires, it probably indicates 503 a missing call to h2g_valid. */ 504 assert(start <= last); 505 assert(last <= GUEST_ADDR_MAX); 506 /* Only set PAGE_ANON with new mappings. */ 507 assert(!(flags & PAGE_ANON) || (flags & PAGE_RESET)); 508 assert_memory_lock(); 509 510 start &= TARGET_PAGE_MASK; 511 last |= ~TARGET_PAGE_MASK; 512 513 if (!(flags & PAGE_VALID)) { 514 flags = 0; 515 } else { 516 reset = flags & PAGE_RESET; 517 flags &= ~PAGE_RESET; 518 if (flags & PAGE_WRITE) { 519 flags |= PAGE_WRITE_ORG; 520 } 521 } 522 523 if (!flags || reset) { 524 page_reset_target_data(start, last); 525 inval_tb |= pageflags_unset(start, last); 526 } 527 if (flags) { 528 inval_tb |= pageflags_set_clear(start, last, flags, 529 ~(reset ? 0 : PAGE_STICKY)); 530 } 531 if (inval_tb) { 532 tb_invalidate_phys_range(start, last); 533 } 534 } 535 536 bool page_check_range(target_ulong start, target_ulong len, int flags) 537 { 538 target_ulong last; 539 int locked; /* tri-state: =0: unlocked, +1: global, -1: local */ 540 bool ret; 541 542 if (len == 0) { 543 return true; /* trivial length */ 544 } 545 546 last = start + len - 1; 547 if (last < start) { 548 return false; /* wrap around */ 549 } 550 551 locked = have_mmap_lock(); 552 while (true) { 553 PageFlagsNode *p = pageflags_find(start, last); 554 int missing; 555 556 if (!p) { 557 if (!locked) { 558 /* 559 * Lockless lookups have false negatives. 560 * Retry with the lock held. 561 */ 562 mmap_lock(); 563 locked = -1; 564 p = pageflags_find(start, last); 565 } 566 if (!p) { 567 ret = false; /* entire region invalid */ 568 break; 569 } 570 } 571 if (start < p->itree.start) { 572 ret = false; /* initial bytes invalid */ 573 break; 574 } 575 576 missing = flags & ~p->flags; 577 if (missing & ~PAGE_WRITE) { 578 ret = false; /* page doesn't match */ 579 break; 580 } 581 if (missing & PAGE_WRITE) { 582 if (!(p->flags & PAGE_WRITE_ORG)) { 583 ret = false; /* page not writable */ 584 break; 585 } 586 /* Asking about writable, but has been protected: undo. */ 587 if (!page_unprotect(start, 0)) { 588 ret = false; 589 break; 590 } 591 /* TODO: page_unprotect should take a range, not a single page. */ 592 if (last - start < TARGET_PAGE_SIZE) { 593 ret = true; /* ok */ 594 break; 595 } 596 start += TARGET_PAGE_SIZE; 597 continue; 598 } 599 600 if (last <= p->itree.last) { 601 ret = true; /* ok */ 602 break; 603 } 604 start = p->itree.last + 1; 605 } 606 607 /* Release the lock if acquired locally. */ 608 if (locked < 0) { 609 mmap_unlock(); 610 } 611 return ret; 612 } 613 614 bool page_check_range_empty(target_ulong start, target_ulong last) 615 { 616 assert(last >= start); 617 assert_memory_lock(); 618 return pageflags_find(start, last) == NULL; 619 } 620 621 target_ulong page_find_range_empty(target_ulong min, target_ulong max, 622 target_ulong len, target_ulong align) 623 { 624 target_ulong len_m1, align_m1; 625 626 assert(min <= max); 627 assert(max <= GUEST_ADDR_MAX); 628 assert(len != 0); 629 assert(is_power_of_2(align)); 630 assert_memory_lock(); 631 632 len_m1 = len - 1; 633 align_m1 = align - 1; 634 635 /* Iteratively narrow the search region. */ 636 while (1) { 637 PageFlagsNode *p; 638 639 /* Align min and double-check there's enough space remaining. */ 640 min = (min + align_m1) & ~align_m1; 641 if (min > max) { 642 return -1; 643 } 644 if (len_m1 > max - min) { 645 return -1; 646 } 647 648 p = pageflags_find(min, min + len_m1); 649 if (p == NULL) { 650 /* Found! */ 651 return min; 652 } 653 if (max <= p->itree.last) { 654 /* Existing allocation fills the remainder of the search region. */ 655 return -1; 656 } 657 /* Skip across existing allocation. */ 658 min = p->itree.last + 1; 659 } 660 } 661 662 void tb_lock_page0(tb_page_addr_t address) 663 { 664 PageFlagsNode *p; 665 target_ulong start, last; 666 int host_page_size = qemu_real_host_page_size(); 667 int prot; 668 669 assert_memory_lock(); 670 671 if (host_page_size <= TARGET_PAGE_SIZE) { 672 start = address & TARGET_PAGE_MASK; 673 last = start + TARGET_PAGE_SIZE - 1; 674 } else { 675 start = address & -host_page_size; 676 last = start + host_page_size - 1; 677 } 678 679 p = pageflags_find(start, last); 680 if (!p) { 681 return; 682 } 683 prot = p->flags; 684 685 if (unlikely(p->itree.last < last)) { 686 /* More than one protection region covers the one host page. */ 687 assert(TARGET_PAGE_SIZE < host_page_size); 688 while ((p = pageflags_next(p, start, last)) != NULL) { 689 prot |= p->flags; 690 } 691 } 692 693 if (prot & PAGE_WRITE) { 694 pageflags_set_clear(start, last, 0, PAGE_WRITE); 695 mprotect(g2h_untagged(start), last - start + 1, 696 prot & (PAGE_READ | PAGE_EXEC) ? PROT_READ : PROT_NONE); 697 } 698 } 699 700 /* 701 * Called from signal handler: invalidate the code and unprotect the 702 * page. Return 0 if the fault was not handled, 1 if it was handled, 703 * and 2 if it was handled but the caller must cause the TB to be 704 * immediately exited. (We can only return 2 if the 'pc' argument is 705 * non-zero.) 706 */ 707 int page_unprotect(tb_page_addr_t address, uintptr_t pc) 708 { 709 PageFlagsNode *p; 710 bool current_tb_invalidated; 711 712 /* 713 * Technically this isn't safe inside a signal handler. However we 714 * know this only ever happens in a synchronous SEGV handler, so in 715 * practice it seems to be ok. 716 */ 717 mmap_lock(); 718 719 p = pageflags_find(address, address); 720 721 /* If this address was not really writable, nothing to do. */ 722 if (!p || !(p->flags & PAGE_WRITE_ORG)) { 723 mmap_unlock(); 724 return 0; 725 } 726 727 current_tb_invalidated = false; 728 if (p->flags & PAGE_WRITE) { 729 /* 730 * If the page is actually marked WRITE then assume this is because 731 * this thread raced with another one which got here first and 732 * set the page to PAGE_WRITE and did the TB invalidate for us. 733 */ 734 #ifdef TARGET_HAS_PRECISE_SMC 735 TranslationBlock *current_tb = tcg_tb_lookup(pc); 736 if (current_tb) { 737 current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID; 738 } 739 #endif 740 } else { 741 int host_page_size = qemu_real_host_page_size(); 742 target_ulong start, len, i; 743 int prot; 744 745 if (host_page_size <= TARGET_PAGE_SIZE) { 746 start = address & TARGET_PAGE_MASK; 747 len = TARGET_PAGE_SIZE; 748 prot = p->flags | PAGE_WRITE; 749 pageflags_set_clear(start, start + len - 1, PAGE_WRITE, 0); 750 current_tb_invalidated = tb_invalidate_phys_page_unwind(start, pc); 751 } else { 752 start = address & -host_page_size; 753 len = host_page_size; 754 prot = 0; 755 756 for (i = 0; i < len; i += TARGET_PAGE_SIZE) { 757 target_ulong addr = start + i; 758 759 p = pageflags_find(addr, addr); 760 if (p) { 761 prot |= p->flags; 762 if (p->flags & PAGE_WRITE_ORG) { 763 prot |= PAGE_WRITE; 764 pageflags_set_clear(addr, addr + TARGET_PAGE_SIZE - 1, 765 PAGE_WRITE, 0); 766 } 767 } 768 /* 769 * Since the content will be modified, we must invalidate 770 * the corresponding translated code. 771 */ 772 current_tb_invalidated |= 773 tb_invalidate_phys_page_unwind(addr, pc); 774 } 775 } 776 if (prot & PAGE_EXEC) { 777 prot = (prot & ~PAGE_EXEC) | PAGE_READ; 778 } 779 mprotect((void *)g2h_untagged(start), len, prot & PAGE_RWX); 780 } 781 mmap_unlock(); 782 783 /* If current TB was invalidated return to main loop */ 784 return current_tb_invalidated ? 2 : 1; 785 } 786 787 static int probe_access_internal(CPUArchState *env, vaddr addr, 788 int fault_size, MMUAccessType access_type, 789 bool nonfault, uintptr_t ra) 790 { 791 int acc_flag; 792 bool maperr; 793 794 switch (access_type) { 795 case MMU_DATA_STORE: 796 acc_flag = PAGE_WRITE_ORG; 797 break; 798 case MMU_DATA_LOAD: 799 acc_flag = PAGE_READ; 800 break; 801 case MMU_INST_FETCH: 802 acc_flag = PAGE_EXEC; 803 break; 804 default: 805 g_assert_not_reached(); 806 } 807 808 if (guest_addr_valid_untagged(addr)) { 809 int page_flags = page_get_flags(addr); 810 if (page_flags & acc_flag) { 811 if (access_type != MMU_INST_FETCH 812 && cpu_plugin_mem_cbs_enabled(env_cpu(env))) { 813 return TLB_MMIO; 814 } 815 return 0; /* success */ 816 } 817 maperr = !(page_flags & PAGE_VALID); 818 } else { 819 maperr = true; 820 } 821 822 if (nonfault) { 823 return TLB_INVALID_MASK; 824 } 825 826 cpu_loop_exit_sigsegv(env_cpu(env), addr, access_type, maperr, ra); 827 } 828 829 int probe_access_flags(CPUArchState *env, vaddr addr, int size, 830 MMUAccessType access_type, int mmu_idx, 831 bool nonfault, void **phost, uintptr_t ra) 832 { 833 int flags; 834 835 g_assert(-(addr | TARGET_PAGE_MASK) >= size); 836 flags = probe_access_internal(env, addr, size, access_type, nonfault, ra); 837 *phost = (flags & TLB_INVALID_MASK) ? NULL : g2h(env_cpu(env), addr); 838 return flags; 839 } 840 841 void *probe_access(CPUArchState *env, vaddr addr, int size, 842 MMUAccessType access_type, int mmu_idx, uintptr_t ra) 843 { 844 int flags; 845 846 g_assert(-(addr | TARGET_PAGE_MASK) >= size); 847 flags = probe_access_internal(env, addr, size, access_type, false, ra); 848 g_assert((flags & ~TLB_MMIO) == 0); 849 850 return size ? g2h(env_cpu(env), addr) : NULL; 851 } 852 853 tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, 854 void **hostp) 855 { 856 int flags; 857 858 flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, false, 0); 859 g_assert(flags == 0); 860 861 if (hostp) { 862 *hostp = g2h_untagged(addr); 863 } 864 return addr; 865 } 866 867 #ifdef TARGET_PAGE_DATA_SIZE 868 /* 869 * Allocate chunks of target data together. For the only current user, 870 * if we allocate one hunk per page, we have overhead of 40/128 or 40%. 871 * Therefore, allocate memory for 64 pages at a time for overhead < 1%. 872 */ 873 #define TPD_PAGES 64 874 #define TBD_MASK (TARGET_PAGE_MASK * TPD_PAGES) 875 876 typedef struct TargetPageDataNode { 877 struct rcu_head rcu; 878 IntervalTreeNode itree; 879 char data[] __attribute__((aligned)); 880 } TargetPageDataNode; 881 882 static IntervalTreeRoot targetdata_root; 883 884 void page_reset_target_data(target_ulong start, target_ulong last) 885 { 886 IntervalTreeNode *n, *next; 887 888 assert_memory_lock(); 889 890 start &= TARGET_PAGE_MASK; 891 last |= ~TARGET_PAGE_MASK; 892 893 for (n = interval_tree_iter_first(&targetdata_root, start, last), 894 next = n ? interval_tree_iter_next(n, start, last) : NULL; 895 n != NULL; 896 n = next, 897 next = next ? interval_tree_iter_next(n, start, last) : NULL) { 898 target_ulong n_start, n_last, p_ofs, p_len; 899 TargetPageDataNode *t = container_of(n, TargetPageDataNode, itree); 900 901 if (n->start >= start && n->last <= last) { 902 interval_tree_remove(n, &targetdata_root); 903 g_free_rcu(t, rcu); 904 continue; 905 } 906 907 if (n->start < start) { 908 n_start = start; 909 p_ofs = (start - n->start) >> TARGET_PAGE_BITS; 910 } else { 911 n_start = n->start; 912 p_ofs = 0; 913 } 914 n_last = MIN(last, n->last); 915 p_len = (n_last + 1 - n_start) >> TARGET_PAGE_BITS; 916 917 memset(t->data + p_ofs * TARGET_PAGE_DATA_SIZE, 0, 918 p_len * TARGET_PAGE_DATA_SIZE); 919 } 920 } 921 922 void *page_get_target_data(target_ulong address) 923 { 924 IntervalTreeNode *n; 925 TargetPageDataNode *t; 926 target_ulong page, region, p_ofs; 927 928 page = address & TARGET_PAGE_MASK; 929 region = address & TBD_MASK; 930 931 n = interval_tree_iter_first(&targetdata_root, page, page); 932 if (!n) { 933 /* 934 * See util/interval-tree.c re lockless lookups: no false positives 935 * but there are false negatives. If we find nothing, retry with 936 * the mmap lock acquired. We also need the lock for the 937 * allocation + insert. 938 */ 939 mmap_lock(); 940 n = interval_tree_iter_first(&targetdata_root, page, page); 941 if (!n) { 942 t = g_malloc0(sizeof(TargetPageDataNode) 943 + TPD_PAGES * TARGET_PAGE_DATA_SIZE); 944 n = &t->itree; 945 n->start = region; 946 n->last = region | ~TBD_MASK; 947 interval_tree_insert(n, &targetdata_root); 948 } 949 mmap_unlock(); 950 } 951 952 t = container_of(n, TargetPageDataNode, itree); 953 p_ofs = (page - region) >> TARGET_PAGE_BITS; 954 return t->data + p_ofs * TARGET_PAGE_DATA_SIZE; 955 } 956 #else 957 void page_reset_target_data(target_ulong start, target_ulong last) { } 958 #endif /* TARGET_PAGE_DATA_SIZE */ 959 960 /* The system-mode versions of these helpers are in cputlb.c. */ 961 962 static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr, 963 MemOp mop, uintptr_t ra, MMUAccessType type) 964 { 965 int a_bits = memop_alignment_bits(mop); 966 void *ret; 967 968 /* Enforce guest required alignment. */ 969 if (unlikely(addr & ((1 << a_bits) - 1))) { 970 cpu_loop_exit_sigbus(cpu, addr, type, ra); 971 } 972 973 ret = g2h(cpu, addr); 974 set_helper_retaddr(ra); 975 return ret; 976 } 977 978 /* physical memory access (slow version, mainly for debug) */ 979 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, 980 void *ptr, size_t len, bool is_write) 981 { 982 int flags; 983 vaddr l, page; 984 uint8_t *buf = ptr; 985 ssize_t written; 986 int ret = -1; 987 int fd = -1; 988 989 mmap_lock(); 990 991 while (len > 0) { 992 page = addr & TARGET_PAGE_MASK; 993 l = (page + TARGET_PAGE_SIZE) - addr; 994 if (l > len) { 995 l = len; 996 } 997 flags = page_get_flags(page); 998 if (!(flags & PAGE_VALID)) { 999 goto out_close; 1000 } 1001 if (is_write) { 1002 if (flags & PAGE_WRITE) { 1003 memcpy(g2h(cpu, addr), buf, l); 1004 } else { 1005 /* Bypass the host page protection using ptrace. */ 1006 if (fd == -1) { 1007 fd = open("/proc/self/mem", O_WRONLY); 1008 if (fd == -1) { 1009 goto out; 1010 } 1011 } 1012 /* 1013 * If there is a TranslationBlock and we weren't bypassing the 1014 * host page protection, the memcpy() above would SEGV, 1015 * ultimately leading to page_unprotect(). So invalidate the 1016 * translations manually. Both invalidation and pwrite() must 1017 * be under mmap_lock() in order to prevent the creation of 1018 * another TranslationBlock in between. 1019 */ 1020 tb_invalidate_phys_range(addr, addr + l - 1); 1021 written = pwrite(fd, buf, l, 1022 (off_t)(uintptr_t)g2h_untagged(addr)); 1023 if (written != l) { 1024 goto out_close; 1025 } 1026 } 1027 } else if (flags & PAGE_READ) { 1028 memcpy(buf, g2h(cpu, addr), l); 1029 } else { 1030 /* Bypass the host page protection using ptrace. */ 1031 if (fd == -1) { 1032 fd = open("/proc/self/mem", O_RDONLY); 1033 if (fd == -1) { 1034 goto out; 1035 } 1036 } 1037 if (pread(fd, buf, l, 1038 (off_t)(uintptr_t)g2h_untagged(addr)) != l) { 1039 goto out_close; 1040 } 1041 } 1042 len -= l; 1043 buf += l; 1044 addr += l; 1045 } 1046 ret = 0; 1047 out_close: 1048 if (fd != -1) { 1049 close(fd); 1050 } 1051 out: 1052 mmap_unlock(); 1053 1054 return ret; 1055 } 1056 1057 #include "ldst_atomicity.c.inc" 1058 1059 static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1060 uintptr_t ra, MMUAccessType access_type) 1061 { 1062 void *haddr; 1063 uint8_t ret; 1064 1065 cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); 1066 haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, access_type); 1067 ret = ldub_p(haddr); 1068 clear_helper_retaddr(); 1069 return ret; 1070 } 1071 1072 static uint16_t do_ld2_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1073 uintptr_t ra, MMUAccessType access_type) 1074 { 1075 void *haddr; 1076 uint16_t ret; 1077 MemOp mop = get_memop(oi); 1078 1079 cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); 1080 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1081 ret = load_atom_2(cpu, ra, haddr, mop); 1082 clear_helper_retaddr(); 1083 1084 if (mop & MO_BSWAP) { 1085 ret = bswap16(ret); 1086 } 1087 return ret; 1088 } 1089 1090 static uint32_t do_ld4_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1091 uintptr_t ra, MMUAccessType access_type) 1092 { 1093 void *haddr; 1094 uint32_t ret; 1095 MemOp mop = get_memop(oi); 1096 1097 cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); 1098 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1099 ret = load_atom_4(cpu, ra, haddr, mop); 1100 clear_helper_retaddr(); 1101 1102 if (mop & MO_BSWAP) { 1103 ret = bswap32(ret); 1104 } 1105 return ret; 1106 } 1107 1108 static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1109 uintptr_t ra, MMUAccessType access_type) 1110 { 1111 void *haddr; 1112 uint64_t ret; 1113 MemOp mop = get_memop(oi); 1114 1115 cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); 1116 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1117 ret = load_atom_8(cpu, ra, haddr, mop); 1118 clear_helper_retaddr(); 1119 1120 if (mop & MO_BSWAP) { 1121 ret = bswap64(ret); 1122 } 1123 return ret; 1124 } 1125 1126 static Int128 do_ld16_mmu(CPUState *cpu, abi_ptr addr, 1127 MemOpIdx oi, uintptr_t ra) 1128 { 1129 void *haddr; 1130 Int128 ret; 1131 MemOp mop = get_memop(oi); 1132 1133 tcg_debug_assert((mop & MO_SIZE) == MO_128); 1134 cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); 1135 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_LOAD); 1136 ret = load_atom_16(cpu, ra, haddr, mop); 1137 clear_helper_retaddr(); 1138 1139 if (mop & MO_BSWAP) { 1140 ret = bswap128(ret); 1141 } 1142 return ret; 1143 } 1144 1145 static void do_st1_mmu(CPUState *cpu, vaddr addr, uint8_t val, 1146 MemOpIdx oi, uintptr_t ra) 1147 { 1148 void *haddr; 1149 1150 cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); 1151 haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, MMU_DATA_STORE); 1152 stb_p(haddr, val); 1153 clear_helper_retaddr(); 1154 } 1155 1156 static void do_st2_mmu(CPUState *cpu, vaddr addr, uint16_t val, 1157 MemOpIdx oi, uintptr_t ra) 1158 { 1159 void *haddr; 1160 MemOp mop = get_memop(oi); 1161 1162 cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); 1163 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1164 1165 if (mop & MO_BSWAP) { 1166 val = bswap16(val); 1167 } 1168 store_atom_2(cpu, ra, haddr, mop, val); 1169 clear_helper_retaddr(); 1170 } 1171 1172 static void do_st4_mmu(CPUState *cpu, vaddr addr, uint32_t val, 1173 MemOpIdx oi, uintptr_t ra) 1174 { 1175 void *haddr; 1176 MemOp mop = get_memop(oi); 1177 1178 cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); 1179 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1180 1181 if (mop & MO_BSWAP) { 1182 val = bswap32(val); 1183 } 1184 store_atom_4(cpu, ra, haddr, mop, val); 1185 clear_helper_retaddr(); 1186 } 1187 1188 static void do_st8_mmu(CPUState *cpu, vaddr addr, uint64_t val, 1189 MemOpIdx oi, uintptr_t ra) 1190 { 1191 void *haddr; 1192 MemOp mop = get_memop(oi); 1193 1194 cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); 1195 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1196 1197 if (mop & MO_BSWAP) { 1198 val = bswap64(val); 1199 } 1200 store_atom_8(cpu, ra, haddr, mop, val); 1201 clear_helper_retaddr(); 1202 } 1203 1204 static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val, 1205 MemOpIdx oi, uintptr_t ra) 1206 { 1207 void *haddr; 1208 MemOpIdx mop = get_memop(oi); 1209 1210 cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); 1211 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1212 1213 if (mop & MO_BSWAP) { 1214 val = bswap128(val); 1215 } 1216 store_atom_16(cpu, ra, haddr, mop, val); 1217 clear_helper_retaddr(); 1218 } 1219 1220 uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, 1221 MemOpIdx oi, uintptr_t ra) 1222 { 1223 return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1224 } 1225 1226 uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, 1227 MemOpIdx oi, uintptr_t ra) 1228 { 1229 return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1230 } 1231 1232 uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, 1233 MemOpIdx oi, uintptr_t ra) 1234 { 1235 return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1236 } 1237 1238 uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, 1239 MemOpIdx oi, uintptr_t ra) 1240 { 1241 return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1242 } 1243 1244 #include "ldst_common.c.inc" 1245 1246 /* 1247 * Do not allow unaligned operations to proceed. Return the host address. 1248 */ 1249 static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi, 1250 int size, uintptr_t retaddr) 1251 { 1252 MemOp mop = get_memop(oi); 1253 int a_bits = memop_alignment_bits(mop); 1254 void *ret; 1255 1256 /* Enforce guest required alignment. */ 1257 if (unlikely(addr & ((1 << a_bits) - 1))) { 1258 cpu_loop_exit_sigbus(cpu, addr, MMU_DATA_STORE, retaddr); 1259 } 1260 1261 /* Enforce qemu required alignment. */ 1262 if (unlikely(addr & (size - 1))) { 1263 cpu_loop_exit_atomic(cpu, retaddr); 1264 } 1265 1266 ret = g2h(cpu, addr); 1267 set_helper_retaddr(retaddr); 1268 return ret; 1269 } 1270 1271 #include "atomic_common.c.inc" 1272 1273 /* 1274 * First set of functions passes in OI and RETADDR. 1275 * This makes them callable from other helpers. 1276 */ 1277 1278 #define ATOMIC_NAME(X) \ 1279 glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu) 1280 #define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0) 1281 1282 #define DATA_SIZE 1 1283 #include "atomic_template.h" 1284 1285 #define DATA_SIZE 2 1286 #include "atomic_template.h" 1287 1288 #define DATA_SIZE 4 1289 #include "atomic_template.h" 1290 1291 #ifdef CONFIG_ATOMIC64 1292 #define DATA_SIZE 8 1293 #include "atomic_template.h" 1294 #endif 1295 1296 #if defined(CONFIG_ATOMIC128) || HAVE_CMPXCHG128 1297 #define DATA_SIZE 16 1298 #include "atomic_template.h" 1299 #endif 1300