1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/log.h" 12 #include "qemu/error-report.h" 13 #include "exec/exec-all.h" 14 #include "exec/translator.h" 15 #include "exec/cpu_ldst.h" 16 #include "exec/plugin-gen.h" 17 #include "exec/cpu_ldst.h" 18 #include "exec/tswap.h" 19 #include "tcg/tcg-op-common.h" 20 #include "internal-target.h" 21 #include "disas/disas.h" 22 #include "tb-internal.h" 23 24 static void set_can_do_io(DisasContextBase *db, bool val) 25 { 26 QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1); 27 tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, 28 offsetof(ArchCPU, parent_obj.neg.can_do_io) - 29 offsetof(ArchCPU, env)); 30 } 31 32 bool translator_io_start(DisasContextBase *db) 33 { 34 /* 35 * Ensure that this instruction will be the last in the TB. 36 * The target may override this to something more forceful. 37 */ 38 if (db->is_jmp == DISAS_NEXT) { 39 db->is_jmp = DISAS_TOO_MANY; 40 } 41 return true; 42 } 43 44 static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags) 45 { 46 TCGv_i32 count = NULL; 47 TCGOp *icount_start_insn = NULL; 48 49 if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) { 50 count = tcg_temp_new_i32(); 51 tcg_gen_ld_i32(count, tcg_env, 52 offsetof(ArchCPU, parent_obj.neg.icount_decr.u32) 53 - offsetof(ArchCPU, env)); 54 } 55 56 if (cflags & CF_USE_ICOUNT) { 57 /* 58 * We emit a sub with a dummy immediate argument. Keep the insn index 59 * of the sub so that we later (when we know the actual insn count) 60 * can update the argument with the actual insn count. 61 */ 62 tcg_gen_sub_i32(count, count, tcg_constant_i32(0)); 63 icount_start_insn = tcg_last_op(); 64 } 65 66 /* 67 * Emit the check against icount_decr.u32 to see if we should exit 68 * unless we suppress the check with CF_NOIRQ. If we are using 69 * icount and have suppressed interruption the higher level code 70 * should have ensured we don't run more instructions than the 71 * budget. 72 */ 73 if (cflags & CF_NOIRQ) { 74 tcg_ctx->exitreq_label = NULL; 75 } else { 76 tcg_ctx->exitreq_label = gen_new_label(); 77 tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label); 78 } 79 80 if (cflags & CF_USE_ICOUNT) { 81 tcg_gen_st16_i32(count, tcg_env, 82 offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low) 83 - offsetof(ArchCPU, env)); 84 } 85 86 return icount_start_insn; 87 } 88 89 static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags, 90 TCGOp *icount_start_insn, int num_insns) 91 { 92 if (cflags & CF_USE_ICOUNT) { 93 /* 94 * Update the num_insn immediate parameter now that we know 95 * the actual insn count. 96 */ 97 tcg_set_insn_param(icount_start_insn, 2, 98 tcgv_i32_arg(tcg_constant_i32(num_insns))); 99 } 100 101 if (tcg_ctx->exitreq_label) { 102 gen_set_label(tcg_ctx->exitreq_label); 103 tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED); 104 } 105 } 106 107 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest) 108 { 109 /* Suppress goto_tb if requested. */ 110 if (tb_cflags(db->tb) & CF_NO_GOTO_TB) { 111 return false; 112 } 113 114 /* Check for the dest on the same page as the start of the TB. */ 115 return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0; 116 } 117 118 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, 119 vaddr pc, void *host_pc, const TranslatorOps *ops, 120 DisasContextBase *db) 121 { 122 uint32_t cflags = tb_cflags(tb); 123 TCGOp *icount_start_insn; 124 TCGOp *first_insn_start = NULL; 125 bool plugin_enabled; 126 127 /* Initialize DisasContext */ 128 db->tb = tb; 129 db->pc_first = pc; 130 db->pc_next = pc; 131 db->is_jmp = DISAS_NEXT; 132 db->num_insns = 0; 133 db->max_insns = *max_insns; 134 db->insn_start = NULL; 135 db->fake_insn = false; 136 db->host_addr[0] = host_pc; 137 db->host_addr[1] = NULL; 138 db->record_start = 0; 139 db->record_len = 0; 140 141 ops->init_disas_context(db, cpu); 142 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 143 144 /* Start translating. */ 145 icount_start_insn = gen_tb_start(db, cflags); 146 ops->tb_start(db, cpu); 147 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 148 149 plugin_enabled = plugin_gen_tb_start(cpu, db); 150 db->plugin_enabled = plugin_enabled; 151 152 while (true) { 153 *max_insns = ++db->num_insns; 154 ops->insn_start(db, cpu); 155 db->insn_start = tcg_last_op(); 156 if (first_insn_start == NULL) { 157 first_insn_start = db->insn_start; 158 } 159 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 160 161 if (plugin_enabled) { 162 plugin_gen_insn_start(cpu, db); 163 } 164 165 /* 166 * Disassemble one instruction. The translate_insn hook should 167 * update db->pc_next and db->is_jmp to indicate what should be 168 * done next -- either exiting this loop or locate the start of 169 * the next instruction. 170 */ 171 ops->translate_insn(db, cpu); 172 173 /* 174 * We can't instrument after instructions that change control 175 * flow although this only really affects post-load operations. 176 * 177 * Calling plugin_gen_insn_end() before we possibly stop translation 178 * is important. Even if this ends up as dead code, plugin generation 179 * needs to see a matching plugin_gen_insn_{start,end}() pair in order 180 * to accurately track instrumented helpers that might access memory. 181 */ 182 if (plugin_enabled) { 183 plugin_gen_insn_end(); 184 } 185 186 /* Stop translation if translate_insn so indicated. */ 187 if (db->is_jmp != DISAS_NEXT) { 188 break; 189 } 190 191 /* Stop translation if the output buffer is full, 192 or we have executed all of the allowed instructions. */ 193 if (tcg_op_buf_full() || db->num_insns >= db->max_insns) { 194 db->is_jmp = DISAS_TOO_MANY; 195 break; 196 } 197 } 198 199 /* Emit code to exit the TB, as indicated by db->is_jmp. */ 200 ops->tb_stop(db, cpu); 201 gen_tb_end(tb, cflags, icount_start_insn, db->num_insns); 202 203 /* 204 * Manage can_do_io for the translation block: set to false before 205 * the first insn and set to true before the last insn. 206 */ 207 if (db->num_insns == 1) { 208 tcg_debug_assert(first_insn_start == db->insn_start); 209 } else { 210 tcg_debug_assert(first_insn_start != db->insn_start); 211 tcg_ctx->emit_before_op = first_insn_start; 212 set_can_do_io(db, false); 213 } 214 tcg_ctx->emit_before_op = db->insn_start; 215 set_can_do_io(db, true); 216 tcg_ctx->emit_before_op = NULL; 217 218 /* May be used by disas_log or plugin callbacks. */ 219 tb->size = db->pc_next - db->pc_first; 220 tb->icount = db->num_insns; 221 222 if (plugin_enabled) { 223 plugin_gen_tb_end(cpu, db->num_insns); 224 } 225 226 if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) 227 && qemu_log_in_addr_range(db->pc_first)) { 228 FILE *logfile = qemu_log_trylock(); 229 if (logfile) { 230 fprintf(logfile, "----------------\n"); 231 232 if (!ops->disas_log || 233 !ops->disas_log(db, cpu, logfile)) { 234 fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first)); 235 target_disas(logfile, cpu, db); 236 } 237 fprintf(logfile, "\n"); 238 qemu_log_unlock(logfile); 239 } 240 } 241 } 242 243 static bool translator_ld(CPUArchState *env, DisasContextBase *db, 244 void *dest, vaddr pc, size_t len) 245 { 246 TranslationBlock *tb = db->tb; 247 vaddr last = pc + len - 1; 248 void *host; 249 vaddr base; 250 251 /* Use slow path if first page is MMIO. */ 252 if (unlikely(tb_page_addr0(tb) == -1)) { 253 /* We capped translation with first page MMIO in tb_gen_code. */ 254 tcg_debug_assert(db->max_insns == 1); 255 return false; 256 } 257 258 host = db->host_addr[0]; 259 base = db->pc_first; 260 261 if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) { 262 /* Entire read is from the first page. */ 263 memcpy(dest, host + (pc - base), len); 264 return true; 265 } 266 267 if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) { 268 /* Read begins on the first page and extends to the second. */ 269 size_t len0 = -(pc | TARGET_PAGE_MASK); 270 memcpy(dest, host + (pc - base), len0); 271 pc += len0; 272 dest += len0; 273 len -= len0; 274 } 275 276 /* 277 * The read must conclude on the second page and not extend to a third. 278 * 279 * TODO: We could allow the two pages to be virtually discontiguous, 280 * since we already allow the two pages to be physically discontiguous. 281 * The only reasonable use case would be executing an insn at the end 282 * of the address space wrapping around to the beginning. For that, 283 * we would need to know the current width of the address space. 284 * In the meantime, assert. 285 */ 286 base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 287 assert(((base ^ pc) & TARGET_PAGE_MASK) == 0); 288 assert(((base ^ last) & TARGET_PAGE_MASK) == 0); 289 host = db->host_addr[1]; 290 291 if (host == NULL) { 292 tb_page_addr_t page0, old_page1, new_page1; 293 294 new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]); 295 296 /* 297 * If the second page is MMIO, treat as if the first page 298 * was MMIO as well, so that we do not cache the TB. 299 */ 300 if (unlikely(new_page1 == -1)) { 301 tb_unlock_pages(tb); 302 tb_set_page_addr0(tb, -1); 303 /* Require that this be the final insn. */ 304 db->max_insns = db->num_insns; 305 return false; 306 } 307 308 /* 309 * If this is not the first time around, and page1 matches, 310 * then we already have the page locked. Alternately, we're 311 * not doing anything to prevent the PTE from changing, so 312 * we might wind up with a different page, requiring us to 313 * re-do the locking. 314 */ 315 old_page1 = tb_page_addr1(tb); 316 if (likely(new_page1 != old_page1)) { 317 page0 = tb_page_addr0(tb); 318 if (unlikely(old_page1 != -1)) { 319 tb_unlock_page1(page0, old_page1); 320 } 321 tb_set_page_addr1(tb, new_page1); 322 tb_lock_page1(page0, new_page1); 323 } 324 host = db->host_addr[1]; 325 } 326 327 memcpy(dest, host + (pc - base), len); 328 return true; 329 } 330 331 static void record_save(DisasContextBase *db, vaddr pc, 332 const void *from, int size) 333 { 334 int offset; 335 336 /* Do not record probes before the start of TB. */ 337 if (pc < db->pc_first) { 338 return; 339 } 340 341 /* 342 * In translator_access, we verified that pc is within 2 pages 343 * of pc_first, thus this will never overflow. 344 */ 345 offset = pc - db->pc_first; 346 347 /* 348 * Either the first or second page may be I/O. If it is the second, 349 * then the first byte we need to record will be at a non-zero offset. 350 * In either case, we should not need to record but a single insn. 351 */ 352 if (db->record_len == 0) { 353 db->record_start = offset; 354 db->record_len = size; 355 } else { 356 assert(offset == db->record_start + db->record_len); 357 assert(db->record_len + size <= sizeof(db->record)); 358 db->record_len += size; 359 } 360 361 memcpy(db->record + (offset - db->record_start), from, size); 362 } 363 364 size_t translator_st_len(const DisasContextBase *db) 365 { 366 return db->fake_insn ? db->record_len : db->tb->size; 367 } 368 369 bool translator_st(const DisasContextBase *db, void *dest, 370 vaddr addr, size_t len) 371 { 372 size_t offset, offset_end; 373 374 if (addr < db->pc_first) { 375 return false; 376 } 377 offset = addr - db->pc_first; 378 offset_end = offset + len; 379 if (offset_end > translator_st_len(db)) { 380 return false; 381 } 382 383 if (!db->fake_insn) { 384 size_t offset_page1 = -(db->pc_first | TARGET_PAGE_MASK); 385 386 /* Get all the bytes from the first page. */ 387 if (db->host_addr[0]) { 388 if (offset_end <= offset_page1) { 389 memcpy(dest, db->host_addr[0] + offset, len); 390 return true; 391 } 392 if (offset < offset_page1) { 393 size_t len0 = offset_page1 - offset; 394 memcpy(dest, db->host_addr[0] + offset, len0); 395 offset += len0; 396 dest += len0; 397 } 398 } 399 400 /* Get any bytes from the second page. */ 401 if (db->host_addr[1] && offset >= offset_page1) { 402 memcpy(dest, db->host_addr[1] + (offset - offset_page1), 403 offset_end - offset); 404 return true; 405 } 406 } 407 408 /* Else get recorded bytes. */ 409 if (db->record_len != 0 && 410 offset >= db->record_start && 411 offset_end <= db->record_start + db->record_len) { 412 memcpy(dest, db->record + (offset - db->record_start), 413 offset_end - offset); 414 return true; 415 } 416 return false; 417 } 418 419 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc) 420 { 421 uint8_t raw; 422 423 if (!translator_ld(env, db, &raw, pc, sizeof(raw))) { 424 raw = cpu_ldub_code(env, pc); 425 record_save(db, pc, &raw, sizeof(raw)); 426 } 427 return raw; 428 } 429 430 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) 431 { 432 uint16_t raw, tgt; 433 434 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 435 tgt = tswap16(raw); 436 } else { 437 tgt = cpu_lduw_code(env, pc); 438 raw = tswap16(tgt); 439 record_save(db, pc, &raw, sizeof(raw)); 440 } 441 return tgt; 442 } 443 444 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) 445 { 446 uint32_t raw, tgt; 447 448 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 449 tgt = tswap32(raw); 450 } else { 451 tgt = cpu_ldl_code(env, pc); 452 raw = tswap32(tgt); 453 record_save(db, pc, &raw, sizeof(raw)); 454 } 455 return tgt; 456 } 457 458 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) 459 { 460 uint64_t raw, tgt; 461 462 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 463 tgt = tswap64(raw); 464 } else { 465 tgt = cpu_ldq_code(env, pc); 466 raw = tswap64(tgt); 467 record_save(db, pc, &raw, sizeof(raw)); 468 } 469 return tgt; 470 } 471 472 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) 473 { 474 db->fake_insn = true; 475 record_save(db, db->pc_first, data, len); 476 } 477