1 /* 2 * QEMU TCG vCPU common functionality 3 * 4 * Functionality common to all TCG vCPU variants: mttcg, rr and icount. 5 * 6 * Copyright (c) 2003-2008 Fabrice Bellard 7 * Copyright (c) 2014 Red Hat Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "system/accel-ops.h" 30 #include "system/tcg.h" 31 #include "system/replay.h" 32 #include "system/cpu-timers.h" 33 #include "qemu/main-loop.h" 34 #include "qemu/guest-random.h" 35 #include "qemu/timer.h" 36 #include "exec/exec-all.h" 37 #include "exec/hwaddr.h" 38 #include "exec/tb-flush.h" 39 #include "exec/translation-block.h" 40 #include "gdbstub/enums.h" 41 42 #include "hw/core/cpu.h" 43 44 #include "tcg-accel-ops.h" 45 #include "tcg-accel-ops-mttcg.h" 46 #include "tcg-accel-ops-rr.h" 47 #include "tcg-accel-ops-icount.h" 48 49 /* common functionality among all TCG variants */ 50 51 void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) 52 { 53 uint32_t cflags; 54 55 /* 56 * Include the cluster number in the hash we use to look up TBs. 57 * This is important because a TB that is valid for one cluster at 58 * a given physical address and set of CPU flags is not necessarily 59 * valid for another: 60 * the two clusters may have different views of physical memory, or 61 * may have different CPU features (eg FPU present or absent). 62 */ 63 cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; 64 65 cflags |= parallel ? CF_PARALLEL : 0; 66 cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; 67 tcg_cflags_set(cpu, cflags); 68 } 69 70 void tcg_cpu_destroy(CPUState *cpu) 71 { 72 cpu_thread_signal_destroyed(cpu); 73 } 74 75 int tcg_cpu_exec(CPUState *cpu) 76 { 77 int ret; 78 assert(tcg_enabled()); 79 cpu_exec_start(cpu); 80 ret = cpu_exec(cpu); 81 cpu_exec_end(cpu); 82 return ret; 83 } 84 85 static void tcg_cpu_reset_hold(CPUState *cpu) 86 { 87 tcg_flush_jmp_cache(cpu); 88 89 tlb_flush(cpu); 90 } 91 92 /* mask must never be zero, except for A20 change call */ 93 void tcg_handle_interrupt(CPUState *cpu, int mask) 94 { 95 g_assert(bql_locked()); 96 97 cpu->interrupt_request |= mask; 98 99 /* 100 * If called from iothread context, wake the target cpu in 101 * case its halted. 102 */ 103 if (!qemu_cpu_is_self(cpu)) { 104 qemu_cpu_kick(cpu); 105 } else { 106 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 107 } 108 } 109 110 static bool tcg_supports_guest_debug(void) 111 { 112 return true; 113 } 114 115 /* Translate GDB watchpoint type to a flags value for cpu_watchpoint_* */ 116 static inline int xlat_gdb_type(CPUState *cpu, int gdbtype) 117 { 118 static const int xlat[] = { 119 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, 120 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, 121 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, 122 }; 123 124 CPUClass *cc = CPU_GET_CLASS(cpu); 125 int cputype = xlat[gdbtype]; 126 127 if (cc->gdb_stop_before_watchpoint) { 128 cputype |= BP_STOP_BEFORE_ACCESS; 129 } 130 return cputype; 131 } 132 133 static int tcg_insert_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 134 { 135 CPUState *cpu; 136 int err = 0; 137 138 switch (type) { 139 case GDB_BREAKPOINT_SW: 140 case GDB_BREAKPOINT_HW: 141 CPU_FOREACH(cpu) { 142 err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL); 143 if (err) { 144 break; 145 } 146 } 147 return err; 148 case GDB_WATCHPOINT_WRITE: 149 case GDB_WATCHPOINT_READ: 150 case GDB_WATCHPOINT_ACCESS: 151 CPU_FOREACH(cpu) { 152 err = cpu_watchpoint_insert(cpu, addr, len, 153 xlat_gdb_type(cpu, type), NULL); 154 if (err) { 155 break; 156 } 157 } 158 return err; 159 default: 160 return -ENOSYS; 161 } 162 } 163 164 static int tcg_remove_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 165 { 166 CPUState *cpu; 167 int err = 0; 168 169 switch (type) { 170 case GDB_BREAKPOINT_SW: 171 case GDB_BREAKPOINT_HW: 172 CPU_FOREACH(cpu) { 173 err = cpu_breakpoint_remove(cpu, addr, BP_GDB); 174 if (err) { 175 break; 176 } 177 } 178 return err; 179 case GDB_WATCHPOINT_WRITE: 180 case GDB_WATCHPOINT_READ: 181 case GDB_WATCHPOINT_ACCESS: 182 CPU_FOREACH(cpu) { 183 err = cpu_watchpoint_remove(cpu, addr, len, 184 xlat_gdb_type(cpu, type)); 185 if (err) { 186 break; 187 } 188 } 189 return err; 190 default: 191 return -ENOSYS; 192 } 193 } 194 195 static inline void tcg_remove_all_breakpoints(CPUState *cpu) 196 { 197 cpu_breakpoint_remove_all(cpu, BP_GDB); 198 cpu_watchpoint_remove_all(cpu, BP_GDB); 199 } 200 201 static void tcg_accel_ops_init(AccelOpsClass *ops) 202 { 203 if (qemu_tcg_mttcg_enabled()) { 204 ops->create_vcpu_thread = mttcg_start_vcpu_thread; 205 ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; 206 ops->handle_interrupt = tcg_handle_interrupt; 207 } else { 208 ops->create_vcpu_thread = rr_start_vcpu_thread; 209 ops->kick_vcpu_thread = rr_kick_vcpu_thread; 210 211 if (icount_enabled()) { 212 ops->handle_interrupt = icount_handle_interrupt; 213 ops->get_virtual_clock = icount_get; 214 ops->get_elapsed_ticks = icount_get; 215 } else { 216 ops->handle_interrupt = tcg_handle_interrupt; 217 } 218 } 219 220 ops->cpu_reset_hold = tcg_cpu_reset_hold; 221 ops->supports_guest_debug = tcg_supports_guest_debug; 222 ops->insert_breakpoint = tcg_insert_breakpoint; 223 ops->remove_breakpoint = tcg_remove_breakpoint; 224 ops->remove_all_breakpoints = tcg_remove_all_breakpoints; 225 } 226 227 static void tcg_accel_ops_class_init(ObjectClass *oc, void *data) 228 { 229 AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); 230 231 ops->ops_init = tcg_accel_ops_init; 232 } 233 234 static const TypeInfo tcg_accel_ops_type = { 235 .name = ACCEL_OPS_NAME("tcg"), 236 237 .parent = TYPE_ACCEL_OPS, 238 .class_init = tcg_accel_ops_class_init, 239 .abstract = true, 240 }; 241 module_obj(ACCEL_OPS_NAME("tcg")); 242 243 static void tcg_accel_ops_register_types(void) 244 { 245 type_register_static(&tcg_accel_ops_type); 246 } 247 type_init(tcg_accel_ops_register_types); 248