1 /* 2 * QEMU TCG vCPU common functionality 3 * 4 * Functionality common to all TCG vCPU variants: mttcg, rr and icount. 5 * 6 * Copyright (c) 2003-2008 Fabrice Bellard 7 * Copyright (c) 2014 Red Hat Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "system/accel-ops.h" 30 #include "system/tcg.h" 31 #include "system/replay.h" 32 #include "system/cpu-timers.h" 33 #include "qemu/main-loop.h" 34 #include "qemu/guest-random.h" 35 #include "qemu/timer.h" 36 #include "exec/cputlb.h" 37 #include "exec/hwaddr.h" 38 #include "exec/tb-flush.h" 39 #include "exec/translation-block.h" 40 #include "gdbstub/enums.h" 41 42 #include "hw/core/cpu.h" 43 44 #include "tcg-accel-ops.h" 45 #include "tcg-accel-ops-mttcg.h" 46 #include "tcg-accel-ops-rr.h" 47 #include "tcg-accel-ops-icount.h" 48 49 /* common functionality among all TCG variants */ 50 51 void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) 52 { 53 uint32_t cflags; 54 55 /* 56 * Include the cluster number in the hash we use to look up TBs. 57 * This is important because a TB that is valid for one cluster at 58 * a given physical address and set of CPU flags is not necessarily 59 * valid for another: 60 * the two clusters may have different views of physical memory, or 61 * may have different CPU features (eg FPU present or absent). 62 */ 63 cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; 64 65 cflags |= parallel ? CF_PARALLEL : 0; 66 cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; 67 tcg_cflags_set(cpu, cflags); 68 } 69 70 void tcg_cpu_destroy(CPUState *cpu) 71 { 72 cpu_thread_signal_destroyed(cpu); 73 } 74 75 int tcg_cpu_exec(CPUState *cpu) 76 { 77 int ret; 78 assert(tcg_enabled()); 79 cpu_exec_start(cpu); 80 ret = cpu_exec(cpu); 81 cpu_exec_end(cpu); 82 return ret; 83 } 84 85 static void tcg_cpu_reset_hold(CPUState *cpu) 86 { 87 tcg_flush_jmp_cache(cpu); 88 89 tlb_flush(cpu); 90 } 91 92 /* mask must never be zero, except for A20 change call */ 93 void tcg_handle_interrupt(CPUState *cpu, int mask) 94 { 95 g_assert(bql_locked()); 96 97 cpu->interrupt_request |= mask; 98 99 /* 100 * If called from iothread context, wake the target cpu in 101 * case its halted. 102 */ 103 if (!qemu_cpu_is_self(cpu)) { 104 qemu_cpu_kick(cpu); 105 } else { 106 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 107 } 108 } 109 110 static bool tcg_supports_guest_debug(void) 111 { 112 return true; 113 } 114 115 /* Translate GDB watchpoint type to a flags value for cpu_watchpoint_* */ 116 static inline int xlat_gdb_type(CPUState *cpu, int gdbtype) 117 { 118 static const int xlat[] = { 119 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, 120 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, 121 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, 122 }; 123 124 int cputype = xlat[gdbtype]; 125 126 if (cpu->cc->gdb_stop_before_watchpoint) { 127 cputype |= BP_STOP_BEFORE_ACCESS; 128 } 129 return cputype; 130 } 131 132 static int tcg_insert_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 133 { 134 CPUState *cpu; 135 int err = 0; 136 137 switch (type) { 138 case GDB_BREAKPOINT_SW: 139 case GDB_BREAKPOINT_HW: 140 CPU_FOREACH(cpu) { 141 err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL); 142 if (err) { 143 break; 144 } 145 } 146 return err; 147 case GDB_WATCHPOINT_WRITE: 148 case GDB_WATCHPOINT_READ: 149 case GDB_WATCHPOINT_ACCESS: 150 CPU_FOREACH(cpu) { 151 err = cpu_watchpoint_insert(cpu, addr, len, 152 xlat_gdb_type(cpu, type), NULL); 153 if (err) { 154 break; 155 } 156 } 157 return err; 158 default: 159 return -ENOSYS; 160 } 161 } 162 163 static int tcg_remove_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 164 { 165 CPUState *cpu; 166 int err = 0; 167 168 switch (type) { 169 case GDB_BREAKPOINT_SW: 170 case GDB_BREAKPOINT_HW: 171 CPU_FOREACH(cpu) { 172 err = cpu_breakpoint_remove(cpu, addr, BP_GDB); 173 if (err) { 174 break; 175 } 176 } 177 return err; 178 case GDB_WATCHPOINT_WRITE: 179 case GDB_WATCHPOINT_READ: 180 case GDB_WATCHPOINT_ACCESS: 181 CPU_FOREACH(cpu) { 182 err = cpu_watchpoint_remove(cpu, addr, len, 183 xlat_gdb_type(cpu, type)); 184 if (err) { 185 break; 186 } 187 } 188 return err; 189 default: 190 return -ENOSYS; 191 } 192 } 193 194 static inline void tcg_remove_all_breakpoints(CPUState *cpu) 195 { 196 cpu_breakpoint_remove_all(cpu, BP_GDB); 197 cpu_watchpoint_remove_all(cpu, BP_GDB); 198 } 199 200 static void tcg_accel_ops_init(AccelOpsClass *ops) 201 { 202 if (qemu_tcg_mttcg_enabled()) { 203 ops->create_vcpu_thread = mttcg_start_vcpu_thread; 204 ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; 205 ops->handle_interrupt = tcg_handle_interrupt; 206 } else { 207 ops->create_vcpu_thread = rr_start_vcpu_thread; 208 ops->kick_vcpu_thread = rr_kick_vcpu_thread; 209 210 if (icount_enabled()) { 211 ops->handle_interrupt = icount_handle_interrupt; 212 ops->get_virtual_clock = icount_get; 213 ops->get_elapsed_ticks = icount_get; 214 } else { 215 ops->handle_interrupt = tcg_handle_interrupt; 216 } 217 } 218 219 ops->cpu_reset_hold = tcg_cpu_reset_hold; 220 ops->supports_guest_debug = tcg_supports_guest_debug; 221 ops->insert_breakpoint = tcg_insert_breakpoint; 222 ops->remove_breakpoint = tcg_remove_breakpoint; 223 ops->remove_all_breakpoints = tcg_remove_all_breakpoints; 224 } 225 226 static void tcg_accel_ops_class_init(ObjectClass *oc, void *data) 227 { 228 AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); 229 230 ops->ops_init = tcg_accel_ops_init; 231 } 232 233 static const TypeInfo tcg_accel_ops_type = { 234 .name = ACCEL_OPS_NAME("tcg"), 235 236 .parent = TYPE_ACCEL_OPS, 237 .class_init = tcg_accel_ops_class_init, 238 .abstract = true, 239 }; 240 module_obj(ACCEL_OPS_NAME("tcg")); 241 242 static void tcg_accel_ops_register_types(void) 243 { 244 type_register_static(&tcg_accel_ops_type); 245 } 246 type_init(tcg_accel_ops_register_types); 247