1 /* 2 * TranslationBlock internal declarations (target specific) 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * SPDX-License-Identifier: LGPL-2.1-or-later 7 */ 8 9 #ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H 10 #define ACCEL_TCG_TB_INTERNAL_TARGET_H 11 12 #include "exec/cpu-all.h" 13 #include "exec/exec-all.h" 14 #include "exec/translation-block.h" 15 16 #ifdef CONFIG_SOFTMMU 17 18 #define CPU_TLB_DYN_MIN_BITS 6 19 #define CPU_TLB_DYN_DEFAULT_BITS 8 20 21 # if HOST_LONG_BITS == 32 22 /* Make sure we do not require a double-word shift for the TLB load */ 23 # define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS) 24 # else /* HOST_LONG_BITS == 64 */ 25 /* 26 * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) == 27 * 2**34 == 16G of address space. This is roughly what one would expect a 28 * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel 29 * Skylake's Level-2 STLB has 16 1G entries. 30 * Also, make sure we do not size the TLB past the guest's address space. 31 */ 32 # ifdef TARGET_PAGE_BITS_VARY 33 # define CPU_TLB_DYN_MAX_BITS \ 34 MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 35 # else 36 # define CPU_TLB_DYN_MAX_BITS \ 37 MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 38 # endif 39 # endif 40 41 #endif /* CONFIG_SOFTMMU */ 42 43 #ifdef CONFIG_USER_ONLY 44 #include "user/page-protection.h" 45 /* 46 * For user-only, page_protect sets the page read-only. 47 * Since most execution is already on read-only pages, and we'd need to 48 * account for other TBs on the same page, defer undoing any page protection 49 * until we receive the write fault. 50 */ 51 static inline void tb_lock_page0(tb_page_addr_t p0) 52 { 53 page_protect(p0); 54 } 55 56 static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1) 57 { 58 page_protect(p1); 59 } 60 61 static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { } 62 static inline void tb_unlock_pages(TranslationBlock *tb) { } 63 #else 64 void tb_lock_page0(tb_page_addr_t); 65 void tb_lock_page1(tb_page_addr_t, tb_page_addr_t); 66 void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t); 67 void tb_unlock_pages(TranslationBlock *); 68 #endif 69 70 #ifdef CONFIG_SOFTMMU 71 void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, 72 unsigned size, 73 uintptr_t retaddr); 74 #endif /* CONFIG_SOFTMMU */ 75 76 bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); 77 78 #endif 79