1 /* 2 * TranslationBlock internal declarations (target specific) 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * SPDX-License-Identifier: LGPL-2.1-or-later 7 */ 8 9 #ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H 10 #define ACCEL_TCG_TB_INTERNAL_TARGET_H 11 12 #include "exec/translation-block.h" 13 14 /* 15 * The true return address will often point to a host insn that is part of 16 * the next translated guest insn. Adjust the address backward to point to 17 * the middle of the call insn. Subtracting one would do the job except for 18 * several compressed mode architectures (arm, mips) which set the low bit 19 * to indicate the compressed mode; subtracting two works around that. It 20 * is also the case that there are no host isas that contain a call insn 21 * smaller than 4 bytes, so we don't worry about special-casing this. 22 */ 23 #define GETPC_ADJ 2 24 25 void tb_lock_page0(tb_page_addr_t); 26 27 #ifdef CONFIG_USER_ONLY 28 /* 29 * For user-only, page_protect sets the page read-only. 30 * Since most execution is already on read-only pages, and we'd need to 31 * account for other TBs on the same page, defer undoing any page protection 32 * until we receive the write fault. 33 */ 34 static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1) 35 { 36 tb_lock_page0(p1); 37 } 38 39 static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { } 40 static inline void tb_unlock_pages(TranslationBlock *tb) { } 41 #else 42 void tb_lock_page1(tb_page_addr_t, tb_page_addr_t); 43 void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t); 44 void tb_unlock_pages(TranslationBlock *); 45 #endif 46 47 #ifdef CONFIG_SOFTMMU 48 void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, 49 unsigned size, 50 uintptr_t retaddr); 51 #endif /* CONFIG_SOFTMMU */ 52 53 bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); 54 55 #endif 56