xref: /qemu/accel/tcg/internal-common.h (revision 54bd0b135e53d3afe666c5c960d7b2a0c1767bf4)
1 /*
2  * Internal execution defines for qemu (target agnostic)
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * SPDX-License-Identifier: LGPL-2.1-or-later
7  */
8 
9 #ifndef ACCEL_TCG_INTERNAL_COMMON_H
10 #define ACCEL_TCG_INTERNAL_COMMON_H
11 
12 #include "exec/cpu-common.h"
13 #include "exec/translation-block.h"
14 #include "exec/mmap-lock.h"
15 
16 extern int64_t max_delay;
17 extern int64_t max_advance;
18 
19 extern bool one_insn_per_tb;
20 
21 extern bool icount_align_option;
22 
23 /*
24  * Return true if CS is not running in parallel with other cpus, either
25  * because there are no other cpus or we are within an exclusive context.
26  */
27 static inline bool cpu_in_serial_context(CPUState *cs)
28 {
29     return !tcg_cflags_has(cs, CF_PARALLEL) || cpu_in_exclusive_context(cs);
30 }
31 
32 /**
33  * cpu_plugin_mem_cbs_enabled() - are plugin memory callbacks enabled?
34  * @cs: CPUState pointer
35  *
36  * The memory callbacks are installed if a plugin has instrumented an
37  * instruction for memory. This can be useful to know if you want to
38  * force a slow path for a series of memory accesses.
39  */
40 static inline bool cpu_plugin_mem_cbs_enabled(const CPUState *cpu)
41 {
42 #ifdef CONFIG_PLUGIN
43     return !!cpu->neg.plugin_mem_cbs;
44 #else
45     return false;
46 #endif
47 }
48 
49 TranslationBlock *tb_gen_code(CPUState *cpu, vaddr pc,
50                               uint64_t cs_base, uint32_t flags,
51                               int cflags);
52 void page_init(void);
53 void tb_htable_init(void);
54 void tb_reset_jump(TranslationBlock *tb, int n);
55 TranslationBlock *tb_link_page(TranslationBlock *tb);
56 void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
57                                uintptr_t host_pc);
58 
59 /**
60  * tlb_init - initialize a CPU's TLB
61  * @cpu: CPU whose TLB should be initialized
62  */
63 void tlb_init(CPUState *cpu);
64 /**
65  * tlb_destroy - destroy a CPU's TLB
66  * @cpu: CPU whose TLB should be destroyed
67  */
68 void tlb_destroy(CPUState *cpu);
69 
70 bool tcg_exec_realizefn(CPUState *cpu, Error **errp);
71 void tcg_exec_unrealizefn(CPUState *cpu);
72 
73 /* current cflags for hashing/comparison */
74 uint32_t curr_cflags(CPUState *cpu);
75 
76 void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
77 
78 /**
79  * get_page_addr_code_hostp()
80  * @env: CPUArchState
81  * @addr: guest virtual address of guest code
82  *
83  * See get_page_addr_code() (full-system version) for documentation on the
84  * return value.
85  *
86  * Sets *@hostp (when @hostp is non-NULL) as follows.
87  * If the return value is -1, sets *@hostp to NULL. Otherwise, sets *@hostp
88  * to the host address where @addr's content is kept.
89  *
90  * Note: this function can trigger an exception.
91  */
92 tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr,
93                                         void **hostp);
94 
95 /**
96  * get_page_addr_code()
97  * @env: CPUArchState
98  * @addr: guest virtual address of guest code
99  *
100  * If we cannot translate and execute from the entire RAM page, or if
101  * the region is not backed by RAM, returns -1. Otherwise, returns the
102  * ram_addr_t corresponding to the guest code at @addr.
103  *
104  * Note: this function can trigger an exception.
105  */
106 static inline tb_page_addr_t get_page_addr_code(CPUArchState *env,
107                                                 vaddr addr)
108 {
109     return get_page_addr_code_hostp(env, addr, NULL);
110 }
111 
112 /*
113  * Access to the various translations structures need to be serialised
114  * via locks for consistency.  In user-mode emulation access to the
115  * memory related structures are protected with mmap_lock.
116  * In !user-mode we use per-page locks.
117  */
118 #ifdef CONFIG_USER_ONLY
119 #define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
120 #else
121 #define assert_memory_lock()
122 #endif
123 
124 #if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
125 void assert_no_pages_locked(void);
126 #else
127 static inline void assert_no_pages_locked(void) { }
128 #endif
129 
130 #ifdef CONFIG_USER_ONLY
131 static inline void page_table_config_init(void) { }
132 #else
133 void page_table_config_init(void);
134 #endif
135 
136 #ifndef CONFIG_USER_ONLY
137 G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
138 #endif /* CONFIG_USER_ONLY */
139 
140 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
141 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
142 
143 #endif
144