xref: /linux/tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json (revision 4f762cb4091b5b50fa380ccc4ed1804f8fa8a985)

[
  {
    "EventName": "ADDRESSGEN_INTERLOCK",
    "EventCode": "0x101",
    "BriefDescription": "Counts cycles with an address-generation interlock"
  },
  {
    "EventName": "LONGLATENCY_INTERLOCK",
    "EventCode": "0x201",
    "BriefDescription": "Counts cycles with a long-latency interlock"
  },
  {
    "EventName": "CSR_INTERLOCK",
    "EventCode": "0x401",
    "BriefDescription": "Counts cycles with a CSR interlock"
  },
  {
    "EventName": "ICACHE_BLOCKED",
    "EventCode": "0x801",
    "BriefDescription": "Counts cycles in which the instruction cache was not able to provide an instruction"
  },
  {
    "EventName": "DCACHE_BLOCKED",
    "EventCode": "0x1001",
    "BriefDescription": "Counts cycles in which the data cache blocked an instruction"
  },
  {
    "EventName": "BRANCH_DIRECTION_MISPREDICTION",
    "EventCode": "0x2001",
    "BriefDescription": "Counts mispredictions of conditional branch direction (taken/not taken)"
  },
  {
    "EventName": "BRANCH_TARGET_MISPREDICTION",
    "EventCode": "0x4001",
    "BriefDescription": "Counts mispredictions of the target PC of control-flow instructions"
  },
  {
    "EventName": "PIPELINE_FLUSH",
    "EventCode": "0x8001",
    "BriefDescription": "Counts flushes of the core pipeline. Common causes include fence.i and CSR accesses"
  },
  {
    "EventName": "REPLAY",
    "EventCode": "0x10001",
    "BriefDescription": "Counts instruction replays"
  },
  {
    "EventName": "INTEGER_MUL_DIV_INTERLOCK",
    "EventCode": "0x20001",
    "BriefDescription": "Counts cycles with a multiply or divide interlock"
  },
  {
    "EventName": "FP_INTERLOCK",
    "EventCode": "0x40001",
    "BriefDescription": "Counts cycles with a floating-point interlock"
  }
]