1 // SPDX-License-Identifier: GPL-2.0-or-later 2 // sma1307.c -- sma1307 ALSA SoC Audio driver 3 // 4 // Copyright 2024 Iron Device Corporation 5 // 6 // Auther: Gyuhwa Park <gyuwha.park@irondevice.com> 7 // Auther: Kiseok Jo <kiseok.jo@irondevice.com> 8 9 #include <linux/firmware.h> 10 #include <linux/i2c.h> 11 #include <linux/regmap.h> 12 #include <sound/pcm_params.h> 13 #include <sound/tlv.h> 14 #include "sma1307.h" 15 16 #define CHECK_PERIOD_TIME 1 /* sec per HZ */ 17 #define PLL_MATCH(_input_clk_name, _output_clk_name, _input_clk,\ 18 _post_n, _n, _vco, _p_cp)\ 19 {\ 20 .input_clk_name = _input_clk_name,\ 21 .output_clk_name = _output_clk_name,\ 22 .input_clk = _input_clk,\ 23 .post_n = _post_n,\ 24 .n = _n,\ 25 .vco = _vco,\ 26 .p_cp = _p_cp,\ 27 } 28 29 static const char *setting_file = "sma1307_setting.bin"; 30 #define SMA1307_SETTING_CHECKSUM 0x100000 31 32 /* PLL clock setting Table */ 33 struct sma1307_pll_match { 34 char *input_clk_name; 35 char *output_clk_name; 36 unsigned int input_clk; 37 unsigned int post_n; 38 unsigned int n; 39 unsigned int vco; 40 unsigned int p_cp; 41 }; 42 43 struct sma1307_data { 44 char *name; 45 void (*init)(struct regmap *regmap); 46 }; 47 48 struct sma1307_priv { 49 bool check_fault_status; 50 bool force_mute_status; 51 bool sw_ot1_prot; 52 char *name; 53 enum sma1307_mode amp_mode; 54 int binary_mode; 55 int dapm_aif_in; 56 int dapm_aif_out0; 57 int dapm_aif_out1; 58 int dapm_sdo_en; 59 int dapm_sdo_setting; 60 int num_of_pll_matches; 61 int check_fault_period; 62 struct delayed_work check_fault_work; 63 struct device *dev; 64 struct kobject *kobj; 65 struct mutex default_lock; 66 struct regmap *regmap; 67 struct sma1307_setting_file set; 68 const struct sma1307_pll_match *pll_matches; 69 const struct sma1307_data *data; 70 unsigned int cur_vol; 71 unsigned int format; 72 unsigned int frame_size; 73 unsigned int init_vol; 74 unsigned int last_bclk; 75 unsigned int otp_trm2; 76 unsigned int otp_trm3; 77 unsigned int rev_num; 78 unsigned int sys_clk_id; 79 unsigned int tdm_slot0_rx; 80 unsigned int tdm_slot1_rx; 81 unsigned int tdm_slot0_tx; 82 unsigned int tdm_slot1_tx; 83 unsigned int tsdw_cnt; 84 }; 85 86 static const struct sma1307_pll_match sma1307_pll_matches[] = { 87 /* in_clk_name, out_clk_name, input_clk post_n, n, vco, p_cp */ 88 PLL_MATCH("1.411MHz", "24.554MHz", 89 1411200, 0x06, 0xD1, 0x88, 0x00), 90 PLL_MATCH("1.536MHz", "24.576MHz", 91 1536000, 0x06, 0xC0, 0x88, 0x00), 92 PLL_MATCH("2.822MHz", "24.554MHz", 93 2822400, 0x06, 0xD1, 0x88, 0x04), 94 PLL_MATCH("3.072MHz", "24.576MHz", 95 3072000, 0x06, 0x60, 0x88, 0x00), 96 PLL_MATCH("6.144MHz", "24.576MHz", 97 6144000, 0x06, 0x60, 0x88, 0x04), 98 PLL_MATCH("12.288MHz", "24.576MHz", 99 12288000, 0x06, 0x60, 0x88, 0x08), 100 PLL_MATCH("19.2MHz", "24.48MHz", 101 19200000, 0x06, 0x7B, 0x88, 0x0C), 102 PLL_MATCH("24.576MHz", "24.576MHz", 103 24576000, 0x06, 0x60, 0x88, 0x0C), 104 }; 105 106 static struct snd_soc_component *sma1307_amp_component; 107 108 static void sma1307_startup(struct snd_soc_component *); 109 static void sma1307_shutdown(struct snd_soc_component *); 110 static void sma1307_reset(struct snd_soc_component *); 111 static void sma1307_set_binary(struct snd_soc_component *); 112 static void sma1307_set_default(struct snd_soc_component *); 113 114 /* Initial register value - 6.0W SPK (8ohm load) */ 115 static const struct reg_default sma1307_reg_def[] = { 116 { 0x00, 0x80 }, 117 { 0x01, 0x00 }, 118 { 0x02, 0x52 }, 119 { 0x03, 0x4C }, 120 { 0x04, 0x47 }, 121 { 0x05, 0x42 }, 122 { 0x06, 0x40 }, 123 { 0x07, 0x40 }, 124 { 0x08, 0x3C }, 125 { 0x09, 0x2F }, 126 { 0x0A, 0x32 }, 127 { 0x0B, 0x50 }, 128 { 0x0C, 0x8C }, 129 { 0x0D, 0x00 }, 130 { 0x0E, 0x3F }, 131 { 0x0F, 0x00 }, 132 { 0x10, 0x00 }, 133 { 0x11, 0x00 }, 134 { 0x12, 0x00 }, 135 { 0x13, 0x09 }, 136 { 0x14, 0x12 }, 137 { 0x1C, 0x00 }, 138 { 0x1D, 0x85 }, 139 { 0x1E, 0xA1 }, 140 { 0x1F, 0x67 }, 141 { 0x22, 0x00 }, 142 { 0x23, 0x1F }, 143 { 0x24, 0x7A }, 144 { 0x25, 0x00 }, 145 { 0x26, 0xFF }, 146 { 0x27, 0x39 }, 147 { 0x28, 0x54 }, 148 { 0x29, 0x92 }, 149 { 0x2A, 0xB0 }, 150 { 0x2B, 0xED }, 151 { 0x2C, 0xED }, 152 { 0x2D, 0xFF }, 153 { 0x2E, 0xFF }, 154 { 0x2F, 0xFF }, 155 { 0x30, 0xFF }, 156 { 0x31, 0xFF }, 157 { 0x32, 0xFF }, 158 { 0x34, 0x01 }, 159 { 0x35, 0x17 }, 160 { 0x36, 0x92 }, 161 { 0x37, 0x00 }, 162 { 0x38, 0x01 }, 163 { 0x39, 0x10 }, 164 { 0x3E, 0x01 }, 165 { 0x3F, 0x08 }, 166 { 0x8B, 0x05 }, 167 { 0x8C, 0x50 }, 168 { 0x8D, 0x80 }, 169 { 0x8E, 0x10 }, 170 { 0x8F, 0x02 }, 171 { 0x90, 0x02 }, 172 { 0x91, 0x83 }, 173 { 0x92, 0xC0 }, 174 { 0x93, 0x00 }, 175 { 0x94, 0xA4 }, 176 { 0x95, 0x74 }, 177 { 0x96, 0x57 }, 178 { 0xA2, 0xCC }, 179 { 0xA3, 0x28 }, 180 { 0xA4, 0x40 }, 181 { 0xA5, 0x01 }, 182 { 0xA6, 0x41 }, 183 { 0xA7, 0x08 }, 184 { 0xA8, 0x04 }, 185 { 0xA9, 0x27 }, 186 { 0xAA, 0x10 }, 187 { 0xAB, 0x10 }, 188 { 0xAC, 0x10 }, 189 { 0xAD, 0x0F }, 190 { 0xAE, 0xCD }, 191 { 0xAF, 0x70 }, 192 { 0xB0, 0x03 }, 193 { 0xB1, 0xEF }, 194 { 0xB2, 0x03 }, 195 { 0xB3, 0xEF }, 196 { 0xB4, 0xF3 }, 197 { 0xB5, 0x3D }, 198 }; 199 200 static bool sma1307_readable_register(struct device *dev, unsigned int reg) 201 { 202 if (reg > SMA1307_FF_DEVICE_INDEX) 203 return false; 204 205 switch (reg) { 206 case SMA1307_00_SYSTEM_CTRL ... SMA1307_1F_TONE_FINE_VOLUME: 207 case SMA1307_22_COMP_HYS_SEL ... SMA1307_32_BROWN_OUT_PROT19: 208 case SMA1307_34_OCP_SPK ... SMA1307_39_PMT_NZ_VAL: 209 case SMA1307_3B_TEST1 ... SMA1307_3F_ATEST2: 210 case SMA1307_8B_PLL_POST_N ... SMA1307_9A_OTP_TRM3: 211 case SMA1307_A0_PAD_CTRL0 ... SMA1307_BE_MCBS_CTRL2: 212 case SMA1307_F5_READY_FOR_V_SAR: 213 case SMA1307_F7_READY_FOR_T_SAR ... SMA1307_FF_DEVICE_INDEX: 214 break; 215 default: 216 return false; 217 } 218 return true; 219 } 220 221 static bool sma1307_writeable_register(struct device *dev, unsigned int reg) 222 { 223 if (reg > SMA1307_FF_DEVICE_INDEX) 224 return false; 225 226 switch (reg) { 227 case SMA1307_00_SYSTEM_CTRL ... SMA1307_1F_TONE_FINE_VOLUME: 228 case SMA1307_22_COMP_HYS_SEL ... SMA1307_32_BROWN_OUT_PROT19: 229 case SMA1307_34_OCP_SPK ... SMA1307_39_PMT_NZ_VAL: 230 case SMA1307_3B_TEST1 ... SMA1307_3F_ATEST2: 231 case SMA1307_8B_PLL_POST_N ... SMA1307_9A_OTP_TRM3: 232 case SMA1307_A0_PAD_CTRL0 ... SMA1307_BE_MCBS_CTRL2: 233 break; 234 default: 235 return false; 236 } 237 return true; 238 } 239 240 static bool sma1307_volatile_register(struct device *dev, unsigned int reg) 241 { 242 if (reg > SMA1307_FF_DEVICE_INDEX) 243 return false; 244 245 switch (reg) { 246 case SMA1307_F8_STATUS_T1 ... SMA1307_FF_DEVICE_INDEX: 247 break; 248 default: 249 return false; 250 } 251 return true; 252 } 253 254 /* DB scale conversion of speaker volume */ 255 static const DECLARE_TLV_DB_SCALE(sma1307_spk_tlv, -6000, 50, 0); 256 257 static const char *const sma1307_aif_in_source_text[] = { 258 "Mono", "Left", "Right" 259 }; 260 261 static const char *const sma1307_sdo_setting_text[] = { 262 "Data_One_48k", "Data_Two_48k", "Data_Two_24k", 263 "Clk_PLL", "Clk_OSC" 264 }; 265 266 static const char *const sma1307_aif_out_source_text[] = { 267 "Disable", "After_FmtC", "After_Mixer", "After_DSP", 268 "Vrms2_Avg", "Battery", "Temperature", "After_Delay" 269 }; 270 271 static const char *const sma1307_tdm_slot_text[] = { 272 "Slot0", "Slot1", "Slot2", "Slot3", 273 "Slot4", "Slot5", "Slot6", "Slot7" 274 }; 275 276 static const char *const sma1307_binary_mode_text[] = { 277 "Mode0", "Mode1", "Mode2", "Mode3", "Mode4" 278 }; 279 280 static const char *const sma1307_reset_text[] = { 281 "Reset" 282 }; 283 284 static const struct soc_enum sma1307_aif_in_source_enum = 285 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_aif_in_source_text), 286 sma1307_aif_in_source_text); 287 static const struct soc_enum sma1307_sdo_setting_enum = 288 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_sdo_setting_text), 289 sma1307_sdo_setting_text); 290 static const struct soc_enum sma1307_aif_out_source_enum = 291 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_aif_out_source_text), 292 sma1307_aif_out_source_text); 293 static const struct soc_enum sma1307_tdm_slot_enum = 294 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_tdm_slot_text), 295 sma1307_tdm_slot_text); 296 static const struct soc_enum sma1307_binary_mode_enum = 297 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_binary_mode_text), 298 sma1307_binary_mode_text); 299 static const struct soc_enum sma1307_reset_enum = 300 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sma1307_reset_text), 301 sma1307_reset_text); 302 303 static int sma1307_force_mute_get(struct snd_kcontrol *kcontrol, 304 struct snd_ctl_elem_value *ucontrol) 305 { 306 struct snd_soc_component *component = 307 snd_soc_kcontrol_component(kcontrol); 308 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 309 310 ucontrol->value.integer.value[0] = (int)sma1307->force_mute_status; 311 312 return 0; 313 } 314 315 static int sma1307_force_mute_put(struct snd_kcontrol *kcontrol, 316 struct snd_ctl_elem_value *ucontrol) 317 { 318 struct snd_soc_component *component = 319 snd_soc_kcontrol_component(kcontrol); 320 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 321 bool change = false, val = (bool)ucontrol->value.integer.value[0]; 322 323 if (sma1307->force_mute_status == val) { 324 change = false; 325 } else { 326 change = true; 327 sma1307->force_mute_status = val; 328 } 329 330 return change; 331 } 332 333 static int sma1307_tdm_slot_get(struct snd_kcontrol *kcontrol, 334 struct snd_ctl_elem_value *ucontrol) 335 { 336 struct snd_soc_component *component = 337 snd_soc_kcontrol_component(kcontrol); 338 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 339 int val1, val2; 340 341 regmap_read(sma1307->regmap, SMA1307_A5_TDM1, &val1); 342 regmap_read(sma1307->regmap, SMA1307_A6_TDM2, &val2); 343 344 if (!strcmp(kcontrol->id.name, SMA1307_TDM_RX0_POS_NAME)) { 345 ucontrol->value.integer.value[0] 346 = (val1 & SMA1307_TDM_SLOT0_RX_POS_MASK) >> 3; 347 sma1307->tdm_slot0_rx = ucontrol->value.integer.value[0]; 348 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_RX1_POS_NAME)) { 349 ucontrol->value.integer.value[0] 350 = val1 & SMA1307_TDM_SLOT1_RX_POS_MASK; 351 sma1307->tdm_slot1_rx = ucontrol->value.integer.value[0]; 352 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_TX0_POS_NAME)) { 353 ucontrol->value.integer.value[0] 354 = (val2 & SMA1307_TDM_SLOT0_TX_POS_MASK) >> 3; 355 sma1307->tdm_slot0_tx = ucontrol->value.integer.value[0]; 356 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_TX1_POS_NAME)) { 357 ucontrol->value.integer.value[0] 358 = val2 & SMA1307_TDM_SLOT1_TX_POS_MASK; 359 sma1307->tdm_slot1_tx = ucontrol->value.integer.value[0]; 360 } else { 361 return -EINVAL; 362 } 363 364 return 0; 365 } 366 367 static int sma1307_tdm_slot_put(struct snd_kcontrol *kcontrol, 368 struct snd_ctl_elem_value *ucontrol) 369 { 370 struct snd_soc_component *component = 371 snd_soc_kcontrol_component(kcontrol); 372 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 373 int val = (int)ucontrol->value.integer.value[0]; 374 bool change; 375 376 if (!strcmp(kcontrol->id.name, SMA1307_TDM_RX0_POS_NAME)) { 377 if (sma1307->tdm_slot0_rx == val) 378 change = false; 379 else { 380 change = true; 381 sma1307->tdm_slot0_rx = val; 382 regmap_update_bits(sma1307->regmap, SMA1307_A5_TDM1, 383 SMA1307_TDM_SLOT0_RX_POS_MASK, val << 3); 384 } 385 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_RX1_POS_NAME)) { 386 if (sma1307->tdm_slot1_rx == val) 387 change = false; 388 else { 389 change = true; 390 sma1307->tdm_slot1_rx = val; 391 regmap_update_bits(sma1307->regmap, SMA1307_A5_TDM1, 392 SMA1307_TDM_SLOT1_RX_POS_MASK, val); 393 } 394 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_TX0_POS_NAME)) { 395 if (sma1307->tdm_slot0_tx == val) 396 change = false; 397 else { 398 change = true; 399 sma1307->tdm_slot0_tx = val; 400 regmap_update_bits(sma1307->regmap, SMA1307_A6_TDM2, 401 SMA1307_TDM_SLOT0_TX_POS_MASK, val << 3); 402 } 403 } else if (!strcmp(kcontrol->id.name, SMA1307_TDM_TX1_POS_NAME)) { 404 if (sma1307->tdm_slot1_tx == val) 405 change = false; 406 else { 407 change = true; 408 sma1307->tdm_slot1_tx = val; 409 regmap_update_bits(sma1307->regmap, SMA1307_A6_TDM2, 410 SMA1307_TDM_SLOT1_TX_POS_MASK, val); 411 } 412 } else { 413 dev_err(sma1307->dev, "%s: Invalid Control ID - %s\n", 414 __func__, kcontrol->id.name); 415 return -EINVAL; 416 } 417 418 return change; 419 } 420 421 static int sma1307_sw_ot1_prot_get(struct snd_kcontrol *kcontrol, 422 struct snd_ctl_elem_value *ucontrol) 423 { 424 struct snd_soc_component *component = 425 snd_soc_kcontrol_component(kcontrol); 426 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 427 428 ucontrol->value.integer.value[0] = (int)sma1307->sw_ot1_prot; 429 430 return 0; 431 } 432 433 static int sma1307_sw_ot1_prot_put(struct snd_kcontrol *kcontrol, 434 struct snd_ctl_elem_value *ucontrol) 435 { 436 struct snd_soc_component *component = 437 snd_soc_kcontrol_component(kcontrol); 438 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 439 bool change = false, val = (bool)ucontrol->value.integer.value[0]; 440 441 if (sma1307->sw_ot1_prot == val) 442 change = false; 443 else { 444 change = true; 445 sma1307->sw_ot1_prot = val; 446 } 447 448 return change; 449 } 450 451 static int sma1307_check_fault_status_get(struct snd_kcontrol *kcontrol, 452 struct snd_ctl_elem_value *ucontrol) 453 { 454 struct snd_soc_component *component = 455 snd_soc_kcontrol_component(kcontrol); 456 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 457 458 ucontrol->value.integer.value[0] = (int)sma1307->check_fault_status; 459 460 return 0; 461 } 462 463 static int sma1307_check_fault_status_put(struct snd_kcontrol *kcontrol, 464 struct snd_ctl_elem_value *ucontrol) 465 { 466 struct snd_soc_component *component = 467 snd_soc_kcontrol_component(kcontrol); 468 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 469 bool change = false, val = (bool)ucontrol->value.integer.value[0]; 470 471 if (sma1307->check_fault_status == val) { 472 change = false; 473 } else { 474 change = true; 475 sma1307->check_fault_status = val; 476 } 477 478 return change; 479 } 480 481 static int sma1307_check_fault_period_get(struct snd_kcontrol *kcontrol, 482 struct snd_ctl_elem_value *ucontrol) 483 { 484 struct snd_soc_component *component = 485 snd_soc_kcontrol_component(kcontrol); 486 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 487 488 ucontrol->value.integer.value[0] = sma1307->check_fault_period; 489 490 return 0; 491 } 492 493 static int sma1307_check_fault_period_put(struct snd_kcontrol *kcontrol, 494 struct snd_ctl_elem_value *ucontrol) 495 { 496 struct snd_soc_component *component = 497 snd_soc_kcontrol_component(kcontrol); 498 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 499 struct soc_mixer_control *mc = 500 (struct soc_mixer_control *)kcontrol->private_value; 501 bool change = false; 502 int val = ucontrol->value.integer.value[0]; 503 504 if (val < mc->min || val > mc->max) 505 return -EINVAL; 506 if (sma1307->check_fault_period == val) { 507 change = false; 508 } else { 509 change = true; 510 sma1307->check_fault_period = val; 511 } 512 513 return change; 514 } 515 516 static int sma1307_reset_put(struct snd_kcontrol *kcontrol, 517 struct snd_ctl_elem_value *ucontrol) 518 { 519 struct snd_soc_component *component = 520 snd_soc_kcontrol_component(kcontrol); 521 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 522 523 regmap_update_bits(sma1307->regmap, SMA1307_00_SYSTEM_CTRL, 524 SMA1307_RESET_MASK, SMA1307_RESET_ON); 525 sma1307_reset(component); 526 527 snd_ctl_notify(component->card->snd_card, SNDRV_CTL_EVENT_MASK_VALUE, 528 &kcontrol->id); 529 530 return true; 531 } 532 533 static int sma1307_binary_mode_put(struct snd_kcontrol *kcontrol, 534 struct snd_ctl_elem_value *ucontrol) 535 { 536 struct snd_soc_component *component = 537 snd_soc_kcontrol_component(kcontrol); 538 struct sma1307_priv *sma1307 = snd_kcontrol_chip(kcontrol); 539 540 sma1307->binary_mode = (int)ucontrol->value.enumerated.item[0]; 541 if (sma1307->set.status) 542 sma1307_set_binary(component); 543 544 return snd_soc_put_enum_double(kcontrol, ucontrol); 545 } 546 547 static void sma1307_startup(struct snd_soc_component *component) 548 { 549 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 550 551 regmap_update_bits(sma1307->regmap, SMA1307_A2_TOP_MAN1, 552 SMA1307_PLL_MASK, SMA1307_PLL_ON); 553 regmap_update_bits(sma1307->regmap, SMA1307_00_SYSTEM_CTRL, 554 SMA1307_POWER_MASK, SMA1307_POWER_ON); 555 556 if (sma1307->amp_mode == SMA1307_MONO_MODE) { 557 regmap_update_bits(sma1307->regmap, 558 SMA1307_10_SYSTEM_CTRL1, 559 SMA1307_SPK_MODE_MASK, 560 SMA1307_SPK_MONO); 561 } else { 562 regmap_update_bits(sma1307->regmap, 563 SMA1307_10_SYSTEM_CTRL1, 564 SMA1307_SPK_MODE_MASK, 565 SMA1307_SPK_STEREO); 566 } 567 568 if (sma1307->check_fault_status) { 569 if (sma1307->check_fault_period > 0) 570 queue_delayed_work(system_freezable_wq, 571 &sma1307->check_fault_work, 572 sma1307->check_fault_period * HZ); 573 else 574 queue_delayed_work(system_freezable_wq, 575 &sma1307->check_fault_work, 576 CHECK_PERIOD_TIME * HZ); 577 } 578 } 579 580 static void sma1307_shutdown(struct snd_soc_component *component) 581 { 582 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 583 584 /* for SMA1307A */ 585 cancel_delayed_work_sync(&sma1307->check_fault_work); 586 587 regmap_update_bits(sma1307->regmap, SMA1307_0E_MUTE_VOL_CTRL, 588 SMA1307_SPK_MUTE_MASK, SMA1307_SPK_MUTE); 589 /* Need to wait time for mute slope */ 590 msleep(55); 591 592 regmap_update_bits(sma1307->regmap, SMA1307_10_SYSTEM_CTRL1, 593 SMA1307_SPK_MODE_MASK, SMA1307_SPK_OFF); 594 regmap_update_bits(sma1307->regmap, SMA1307_A2_TOP_MAN1, 595 SMA1307_PLL_MASK, SMA1307_PLL_OFF); 596 regmap_update_bits(sma1307->regmap, SMA1307_00_SYSTEM_CTRL, 597 SMA1307_POWER_MASK, SMA1307_POWER_OFF); 598 } 599 600 static int sma1307_aif_in_event(struct snd_soc_dapm_widget *w, 601 struct snd_kcontrol *kcontrol, int event) 602 { 603 struct snd_soc_component *component = 604 snd_soc_dapm_to_component(w->dapm); 605 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 606 unsigned int mux = sma1307->dapm_aif_in; 607 608 switch (event) { 609 case SND_SOC_DAPM_PRE_PMU: 610 switch (mux) { 611 case SMA1307_MONO_MODE: 612 regmap_update_bits(sma1307->regmap, 613 SMA1307_11_SYSTEM_CTRL2, 614 SMA1307_MONOMIX_MASK, 615 SMA1307_MONOMIX_ON); 616 break; 617 case SMA1307_LEFT_MODE: 618 regmap_update_bits(sma1307->regmap, 619 SMA1307_11_SYSTEM_CTRL2, 620 SMA1307_MONOMIX_MASK, 621 SMA1307_MONOMIX_OFF); 622 regmap_update_bits(sma1307->regmap, 623 SMA1307_11_SYSTEM_CTRL2, 624 SMA1307_LR_DATA_SW_MASK, 625 SMA1307_LR_DATA_SW_NORMAL); 626 break; 627 case SMA1307_RIGHT_MODE: 628 regmap_update_bits(sma1307->regmap, 629 SMA1307_11_SYSTEM_CTRL2, 630 SMA1307_MONOMIX_MASK, 631 SMA1307_MONOMIX_OFF); 632 regmap_update_bits(sma1307->regmap, 633 SMA1307_11_SYSTEM_CTRL2, 634 SMA1307_LR_DATA_SW_MASK, 635 SMA1307_LR_DATA_SW_SWAP); 636 break; 637 default: 638 639 dev_err(sma1307->dev, "%s: Invalid value (%d)\n", 640 __func__, mux); 641 return -EINVAL; 642 } 643 sma1307->amp_mode = mux; 644 break; 645 } 646 return 0; 647 } 648 649 static int sma1307_sdo_setting_event(struct snd_soc_dapm_widget *w, 650 struct snd_kcontrol *kcontrol, int event) 651 { 652 struct snd_soc_component *component = 653 snd_soc_dapm_to_component(w->dapm); 654 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 655 unsigned int mux = sma1307->dapm_sdo_setting; 656 657 switch (event) { 658 case SND_SOC_DAPM_PRE_PMU: 659 switch (mux) { 660 case SMA1307_OUT_DATA_ONE_48K: 661 regmap_update_bits(sma1307->regmap, 662 SMA1307_A2_TOP_MAN1, 663 SMA1307_SDO_OUTPUT2_MASK, 664 SMA1307_ONE_SDO_PER_CH); 665 regmap_update_bits(sma1307->regmap, 666 SMA1307_A3_TOP_MAN2, 667 SMA1307_SDO_OUTPUT3_MASK 668 | 669 SMA1307_DATA_CLK_SEL_MASK, 670 SMA1307_SDO_OUTPUT3_DIS 671 | SMA1307_SDO_DATA); 672 break; 673 case SMA1307_OUT_DATA_TWO_48K: 674 regmap_update_bits(sma1307->regmap, 675 SMA1307_A2_TOP_MAN1, 676 SMA1307_SDO_OUTPUT2_MASK, 677 SMA1307_TWO_SDO_PER_CH); 678 regmap_update_bits(sma1307->regmap, 679 SMA1307_A3_TOP_MAN2, 680 SMA1307_SDO_OUTPUT3_MASK 681 | 682 SMA1307_DATA_CLK_SEL_MASK, 683 SMA1307_SDO_OUTPUT3_DIS 684 | SMA1307_SDO_DATA); 685 break; 686 case SMA1307_OUT_DATA_TWO_24K: 687 regmap_update_bits(sma1307->regmap, 688 SMA1307_A2_TOP_MAN1, 689 SMA1307_SDO_OUTPUT2_MASK, 690 SMA1307_TWO_SDO_PER_CH); 691 regmap_update_bits(sma1307->regmap, 692 SMA1307_A3_TOP_MAN2, 693 SMA1307_SDO_OUTPUT3_MASK 694 | 695 SMA1307_DATA_CLK_SEL_MASK, 696 SMA1307_TWO_SDO_PER_CH_24K 697 | SMA1307_SDO_DATA); 698 break; 699 case SMA1307_OUT_CLK_PLL: 700 regmap_update_bits(sma1307->regmap, 701 SMA1307_A3_TOP_MAN2, 702 SMA1307_DATA_CLK_SEL_MASK, 703 SMA1307_SDO_CLK_PLL); 704 705 break; 706 case SMA1307_OUT_CLK_OSC: 707 regmap_update_bits(sma1307->regmap, 708 SMA1307_A3_TOP_MAN2, 709 SMA1307_DATA_CLK_SEL_MASK, 710 SMA1307_SDO_CLK_OSC); 711 712 break; 713 default: 714 dev_err(sma1307->dev, "%s: Invalid value (%d)\n", 715 __func__, mux); 716 return -EINVAL; 717 } 718 break; 719 } 720 return 0; 721 } 722 723 static int sma1307_aif_out_event(struct snd_soc_dapm_widget *w, 724 struct snd_kcontrol *kcontrol, int event) 725 { 726 struct snd_soc_component *component = 727 snd_soc_dapm_to_component(w->dapm); 728 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 729 unsigned int mux = 0, val = 0, mask = 0; 730 731 if (!strcmp(w->name, SMA1307_AIF_OUT0_NAME)) { 732 mux = sma1307->dapm_aif_out0; 733 val = mux; 734 mask = SMA1307_SDO_OUT0_SEL_MASK; 735 } else if (!strcmp(w->name, SMA1307_AIF_OUT1_NAME)) { 736 mux = sma1307->dapm_aif_out1; 737 val = mux << 3; 738 mask = SMA1307_SDO_OUT1_SEL_MASK; 739 } else { 740 dev_err(sma1307->dev, "%s: Invalid widget - %s\n", 741 __func__, w->name); 742 return -EINVAL; 743 } 744 switch (event) { 745 case SND_SOC_DAPM_PRE_PMU: 746 regmap_update_bits(sma1307->regmap, SMA1307_09_OUTPUT_CTRL, 747 mask, val); 748 break; 749 } 750 return 0; 751 } 752 753 static int sma1307_sdo_event(struct snd_soc_dapm_widget *w, 754 struct snd_kcontrol *kcontrol, int event) 755 { 756 struct snd_soc_component *component = 757 snd_soc_dapm_to_component(w->dapm); 758 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 759 760 switch (event) { 761 case SND_SOC_DAPM_PRE_PMU: 762 regmap_update_bits(sma1307->regmap, 763 SMA1307_09_OUTPUT_CTRL, 764 SMA1307_PORT_CONFIG_MASK, 765 SMA1307_OUTPUT_PORT_ENABLE); 766 regmap_update_bits(sma1307->regmap, 767 SMA1307_A3_TOP_MAN2, 768 SMA1307_SDO_OUTPUT_MASK, 769 SMA1307_LOGIC_OUTPUT); 770 break; 771 case SND_SOC_DAPM_POST_PMD: 772 regmap_update_bits(sma1307->regmap, 773 SMA1307_09_OUTPUT_CTRL, 774 SMA1307_PORT_CONFIG_MASK, 775 SMA1307_INPUT_PORT_ONLY); 776 regmap_update_bits(sma1307->regmap, 777 SMA1307_A3_TOP_MAN2, 778 SMA1307_SDO_OUTPUT_MASK, 779 SMA1307_HIGH_Z_OUTPUT); 780 break; 781 } 782 return 0; 783 } 784 785 static int sma1307_power_event(struct snd_soc_dapm_widget *w, 786 struct snd_kcontrol *kcontrol, int event) 787 { 788 struct snd_soc_component *component = 789 snd_soc_dapm_to_component(w->dapm); 790 791 switch (event) { 792 case SND_SOC_DAPM_POST_PMU: 793 sma1307_startup(component); 794 break; 795 case SND_SOC_DAPM_PRE_PMD: 796 sma1307_shutdown(component); 797 break; 798 } 799 return 0; 800 } 801 802 static int sma1307_dapm_aif_in_get(struct snd_kcontrol *kcontrol, 803 struct snd_ctl_elem_value *ucontrol) 804 { 805 struct snd_soc_dapm_context *dapm = 806 snd_soc_dapm_kcontrol_dapm(kcontrol); 807 struct sma1307_priv *sma1307 = 808 snd_soc_component_get_drvdata(dapm->component); 809 810 ucontrol->value.enumerated.item[0] = (unsigned int)sma1307->dapm_aif_in; 811 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 812 813 return 0; 814 } 815 816 static int sma1307_dapm_aif_in_put(struct snd_kcontrol *kcontrol, 817 struct snd_ctl_elem_value *ucontrol) 818 { 819 struct snd_soc_dapm_context *dapm = 820 snd_soc_dapm_kcontrol_dapm(kcontrol); 821 struct sma1307_priv *sma1307 = 822 snd_soc_component_get_drvdata(dapm->component); 823 int val = (int)ucontrol->value.enumerated.item[0]; 824 bool change; 825 826 if ((val < 0) || (val >= ARRAY_SIZE(sma1307_aif_in_source_text))) { 827 dev_err(sma1307->dev, "%s: Out of range\n", __func__); 828 return -EINVAL; 829 } 830 831 if (sma1307->dapm_aif_in != val) { 832 change = true; 833 sma1307->dapm_aif_in = val; 834 } else 835 change = false; 836 837 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 838 839 return change; 840 } 841 842 static int sma1307_dapm_sdo_setting_get(struct snd_kcontrol *kcontrol, 843 struct snd_ctl_elem_value *ucontrol) 844 { 845 struct snd_soc_dapm_context *dapm = 846 snd_soc_dapm_kcontrol_dapm(kcontrol); 847 struct sma1307_priv *sma1307 = 848 snd_soc_component_get_drvdata(dapm->component); 849 850 ucontrol->value.enumerated.item[0] = 851 (unsigned int)sma1307->dapm_sdo_setting; 852 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 853 854 return 0; 855 } 856 857 static int sma1307_dapm_sdo_setting_put(struct snd_kcontrol *kcontrol, 858 struct snd_ctl_elem_value *ucontrol) 859 { 860 struct snd_soc_dapm_context *dapm = 861 snd_soc_dapm_kcontrol_dapm(kcontrol); 862 struct sma1307_priv *sma1307 = 863 snd_soc_component_get_drvdata(dapm->component); 864 int val = (int)ucontrol->value.enumerated.item[0]; 865 bool change; 866 867 if ((val < 0) || (val >= ARRAY_SIZE(sma1307_sdo_setting_text))) { 868 dev_err(sma1307->dev, "%s: Out of range\n", __func__); 869 return -EINVAL; 870 } 871 872 if (sma1307->dapm_sdo_setting != val) { 873 change = true; 874 sma1307->dapm_sdo_setting = val; 875 } else 876 change = false; 877 878 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 879 880 return change; 881 } 882 883 static int sma1307_dapm_aif_out_get(struct snd_kcontrol *kcontrol, 884 struct snd_ctl_elem_value *ucontrol) 885 { 886 struct snd_soc_dapm_context *dapm = 887 snd_soc_dapm_kcontrol_dapm(kcontrol); 888 struct sma1307_priv *sma1307 = 889 snd_soc_component_get_drvdata(dapm->component); 890 unsigned int val = 0; 891 892 if (!strcmp(kcontrol->id.name, SMA1307_AIF_OUT0_NAME)) { 893 val = (unsigned int)sma1307->dapm_aif_out0; 894 } else if (!strcmp(kcontrol->id.name, SMA1307_AIF_OUT1_NAME)) { 895 val = (unsigned int)sma1307->dapm_aif_out1; 896 } else { 897 dev_err(sma1307->dev, "%s: Invalid Control ID - %s\n", 898 __func__, kcontrol->id.name); 899 return -EINVAL; 900 } 901 ucontrol->value.enumerated.item[0] = val; 902 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 903 904 return 0; 905 } 906 907 static int sma1307_dapm_aif_out_put(struct snd_kcontrol *kcontrol, 908 struct snd_ctl_elem_value *ucontrol) 909 { 910 struct snd_soc_dapm_context *dapm = 911 snd_soc_dapm_kcontrol_dapm(kcontrol); 912 struct sma1307_priv *sma1307 = 913 snd_soc_component_get_drvdata(dapm->component); 914 int val = (int)ucontrol->value.enumerated.item[0]; 915 bool change; 916 917 if ((val < 0) || (val >= ARRAY_SIZE(sma1307_aif_out_source_text))) { 918 dev_err(sma1307->dev, "%s: Out of range\n", __func__); 919 return -EINVAL; 920 } 921 922 if (!strcmp(kcontrol->id.name, SMA1307_AIF_OUT0_NAME)) { 923 if (sma1307->dapm_aif_out0 != val) { 924 change = true; 925 sma1307->dapm_aif_out0 = val; 926 } else 927 change = false; 928 } else if (!strcmp(kcontrol->id.name, SMA1307_AIF_OUT1_NAME)) { 929 if (sma1307->dapm_aif_out1 != val) { 930 change = true; 931 sma1307->dapm_aif_out1 = val; 932 } else 933 change = false; 934 } else { 935 dev_err(sma1307->dev, "%s: Invalid Control ID - %s\n", 936 __func__, kcontrol->id.name); 937 return -EINVAL; 938 } 939 940 snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 941 942 return change; 943 } 944 945 static int sma1307_dapm_sdo_enable_get(struct snd_kcontrol *kcontrol, 946 struct snd_ctl_elem_value *ucontrol) 947 { 948 struct snd_soc_dapm_context *dapm = 949 snd_soc_dapm_kcontrol_dapm(kcontrol); 950 struct sma1307_priv *sma1307 = 951 snd_soc_component_get_drvdata(dapm->component); 952 953 ucontrol->value.integer.value[0] = (long)sma1307->dapm_sdo_en; 954 snd_soc_dapm_put_volsw(kcontrol, ucontrol); 955 956 return 0; 957 } 958 959 static int sma1307_dapm_sdo_enable_put(struct snd_kcontrol *kcontrol, 960 struct snd_ctl_elem_value *ucontrol) 961 { 962 struct snd_soc_dapm_context *dapm = 963 snd_soc_dapm_kcontrol_dapm(kcontrol); 964 struct sma1307_priv *sma1307 = 965 snd_soc_component_get_drvdata(dapm->component); 966 int val = (int)ucontrol->value.integer.value[0]; 967 bool change; 968 969 if ((val < 0) || (val > 1)) { 970 dev_err(sma1307->dev, "%s: Out of range\n", __func__); 971 return -EINVAL; 972 } 973 974 if (sma1307->dapm_sdo_en != val) { 975 change = true; 976 sma1307->dapm_sdo_en = val; 977 } else 978 change = false; 979 980 snd_soc_dapm_put_volsw(kcontrol, ucontrol); 981 982 return change; 983 } 984 985 static const struct snd_kcontrol_new sma1307_aif_in_source_control = { 986 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 987 .name = SMA1307_AIF_IN_NAME, 988 .info = snd_soc_info_enum_double, 989 .get = sma1307_dapm_aif_in_get, 990 .put = sma1307_dapm_aif_in_put, 991 .private_value = (unsigned long)&sma1307_aif_in_source_enum 992 }; 993 994 static const struct snd_kcontrol_new sma1307_sdo_setting_control = { 995 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 996 .name = "SDO Setting", 997 .info = snd_soc_info_enum_double, 998 .get = sma1307_dapm_sdo_setting_get, 999 .put = sma1307_dapm_sdo_setting_put, 1000 .private_value = (unsigned long)&sma1307_sdo_setting_enum 1001 }; 1002 1003 static const struct snd_kcontrol_new sma1307_aif_out0_source_control = { 1004 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1005 .name = SMA1307_AIF_OUT0_NAME, 1006 .info = snd_soc_info_enum_double, 1007 .get = sma1307_dapm_aif_out_get, 1008 .put = sma1307_dapm_aif_out_put, 1009 .private_value = (unsigned long)&sma1307_aif_out_source_enum 1010 }; 1011 1012 static const struct snd_kcontrol_new sma1307_aif_out1_source_control = { 1013 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1014 .name = SMA1307_AIF_OUT1_NAME, 1015 .info = snd_soc_info_enum_double, 1016 .get = sma1307_dapm_aif_out_get, 1017 .put = sma1307_dapm_aif_out_put, 1018 .private_value = (unsigned long)&sma1307_aif_out_source_enum 1019 }; 1020 1021 static const struct snd_kcontrol_new sma1307_sdo_control = 1022 SOC_SINGLE_EXT("Switch", SND_SOC_NOPM, 0, 1, 0, 1023 sma1307_dapm_sdo_enable_get, sma1307_dapm_sdo_enable_put); 1024 1025 static const struct snd_kcontrol_new sma1307_enable_control = 1026 SOC_DAPM_SINGLE("Switch", SMA1307_00_SYSTEM_CTRL, 0, 1, 0); 1027 1028 static const struct snd_kcontrol_new sma1307_binary_mode_control[] = { 1029 SOC_ENUM_EXT("Binary Mode", sma1307_binary_mode_enum, 1030 snd_soc_get_enum_double, sma1307_binary_mode_put), 1031 }; 1032 1033 static const struct snd_kcontrol_new sma1307_snd_controls[] = { 1034 SOC_SINGLE_TLV(SMA1307_VOL_CTRL_NAME, SMA1307_0A_SPK_VOL, 1035 0, 167, 1, sma1307_spk_tlv), 1036 SOC_ENUM_EXT(SMA1307_TDM_RX0_POS_NAME, sma1307_tdm_slot_enum, 1037 sma1307_tdm_slot_get, sma1307_tdm_slot_put), 1038 SOC_ENUM_EXT(SMA1307_TDM_RX1_POS_NAME, sma1307_tdm_slot_enum, 1039 sma1307_tdm_slot_get, sma1307_tdm_slot_put), 1040 SOC_ENUM_EXT(SMA1307_TDM_TX0_POS_NAME, sma1307_tdm_slot_enum, 1041 sma1307_tdm_slot_get, sma1307_tdm_slot_put), 1042 SOC_ENUM_EXT(SMA1307_TDM_TX1_POS_NAME, sma1307_tdm_slot_enum, 1043 sma1307_tdm_slot_get, sma1307_tdm_slot_put), 1044 SOC_ENUM_EXT(SMA1307_RESET_CTRL_NAME, sma1307_reset_enum, 1045 snd_soc_get_enum_double, sma1307_reset_put), 1046 SOC_SINGLE_BOOL_EXT(SMA1307_FORCE_MUTE_CTRL_NAME, 0, 1047 sma1307_force_mute_get, sma1307_force_mute_put), 1048 SOC_SINGLE_BOOL_EXT(SMA1307_OT1_SW_PROT_CTRL_NAME, 0, 1049 sma1307_sw_ot1_prot_get, sma1307_sw_ot1_prot_put), 1050 SOC_SINGLE_BOOL_EXT(SMA1307_CHECK_FAULT_STATUS_NAME, 0, 1051 sma1307_check_fault_status_get, 1052 sma1307_check_fault_status_put), 1053 SOC_SINGLE_EXT(SMA1307_CHECK_FAULT_PERIOD_NAME, SND_SOC_NOPM, 0, 600, 0, 1054 sma1307_check_fault_period_get, 1055 sma1307_check_fault_period_put), 1056 }; 1057 1058 static const struct snd_soc_dapm_widget sma1307_dapm_widgets[] = { 1059 /* platform domain */ 1060 SND_SOC_DAPM_OUTPUT("SPK"), 1061 SND_SOC_DAPM_INPUT("SDO"), 1062 1063 /* path domain */ 1064 SND_SOC_DAPM_MUX_E(SMA1307_AIF_IN_NAME, SND_SOC_NOPM, 0, 0, 1065 &sma1307_aif_in_source_control, 1066 sma1307_aif_in_event, 1067 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), 1068 SND_SOC_DAPM_MUX_E("SDO Setting", SND_SOC_NOPM, 0, 0, 1069 &sma1307_sdo_setting_control, 1070 sma1307_sdo_setting_event, 1071 SND_SOC_DAPM_PRE_PMU), 1072 SND_SOC_DAPM_MUX_E(SMA1307_AIF_OUT0_NAME, SND_SOC_NOPM, 0, 0, 1073 &sma1307_aif_out0_source_control, 1074 sma1307_aif_out_event, 1075 SND_SOC_DAPM_PRE_PMU), 1076 SND_SOC_DAPM_MUX_E(SMA1307_AIF_OUT1_NAME, SND_SOC_NOPM, 0, 0, 1077 &sma1307_aif_out1_source_control, 1078 sma1307_aif_out_event, 1079 SND_SOC_DAPM_PRE_PMU), 1080 SND_SOC_DAPM_SWITCH_E("SDO Enable", SND_SOC_NOPM, 0, 0, 1081 &sma1307_sdo_control, 1082 sma1307_sdo_event, 1083 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1084 SND_SOC_DAPM_MIXER("Entry", SND_SOC_NOPM, 0, 0, NULL, 0), 1085 SND_SOC_DAPM_OUT_DRV_E("AMP Power", SND_SOC_NOPM, 0, 0, NULL, 0, 1086 sma1307_power_event, 1087 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD | 1088 SND_SOC_DAPM_POST_PMU), 1089 SND_SOC_DAPM_SWITCH("AMP Enable", SND_SOC_NOPM, 0, 0, 1090 &sma1307_enable_control), 1091 1092 /* stream domain */ 1093 SND_SOC_DAPM_AIF_IN("AIF IN", "Playback", 0, SND_SOC_NOPM, 0, 0), 1094 SND_SOC_DAPM_AIF_OUT("AIF OUT", "Capture", 0, SND_SOC_NOPM, 0, 0), 1095 }; 1096 1097 static const struct snd_soc_dapm_route sma1307_audio_map[] = { 1098 /* Playback */ 1099 { "AIF IN Source", "Mono", "AIF IN" }, 1100 { "AIF IN Source", "Left", "AIF IN" }, 1101 { "AIF IN Source", "Right", "AIF IN" }, 1102 1103 { "SDO Enable", "Switch", "AIF IN" }, 1104 1105 { "SDO Setting", "Data_One_48k", "SDO Enable" }, 1106 { "SDO Setting", "Data_Two_48k", "SDO Enable" }, 1107 { "SDO Setting", "Data_Two_24k", "SDO Enable" }, 1108 { "SDO Setting", "Clk_PLL", "SDO Enable" }, 1109 { "SDO Setting", "Clk_OSC", "SDO Enable" }, 1110 1111 { "AIF OUT0 Source", "Disable", "SDO Setting" }, 1112 { "AIF OUT0 Source", "After_FmtC", "SDO Setting" }, 1113 { "AIF OUT0 Source", "After_Mixer", "SDO Setting" }, 1114 { "AIF OUT0 Source", "After_DSP", "SDO Setting" }, 1115 { "AIF OUT0 Source", "Vrms2_Avg", "SDO Setting" }, 1116 { "AIF OUT0 Source", "Battery", "SDO Setting" }, 1117 { "AIF OUT0 Source", "Temperature", "SDO Setting" }, 1118 { "AIF OUT0 Source", "After_Delay", "SDO Setting" }, 1119 1120 { "AIF OUT1 Source", "Disable", "SDO Setting" }, 1121 { "AIF OUT1 Source", "After_FmtC", "SDO Setting" }, 1122 { "AIF OUT1 Source", "After_Mixer", "SDO Setting" }, 1123 { "AIF OUT1 Source", "After_DSP", "SDO Setting" }, 1124 { "AIF OUT1 Source", "Vrms2_Avg", "SDO Setting" }, 1125 { "AIF OUT1 Source", "Battery", "SDO Setting" }, 1126 { "AIF OUT1 Source", "Temperature", "SDO Setting" }, 1127 { "AIF OUT1 Source", "After_Delay", "SDO Setting" }, 1128 1129 { "Entry", NULL, "AIF OUT0 Source" }, 1130 { "Entry", NULL, "AIF OUT1 Source" }, 1131 { "Entry", NULL, "AIF IN Source" }, 1132 1133 { "AMP Power", NULL, "Entry" }, 1134 1135 { "AMP Enable", "Switch", "AMP Power" }, 1136 { "SPK", NULL, "AMP Enable" }, 1137 1138 /* Capture */ 1139 { "AIF OUT", NULL, "AMP Enable" }, 1140 }; 1141 1142 static void sma1307_setup_pll(struct snd_soc_component *component, 1143 unsigned int bclk) 1144 { 1145 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1146 1147 int i = 0; 1148 1149 dev_dbg(component->dev, "%s: BCLK = %dHz\n", __func__, bclk); 1150 1151 if (sma1307->sys_clk_id == SMA1307_PLL_CLKIN_MCLK) { 1152 dev_warn(component->dev, "%s: MCLK is not supported\n", 1153 __func__); 1154 } else if (sma1307->sys_clk_id == SMA1307_PLL_CLKIN_BCLK) { 1155 for (i = 0; i < sma1307->num_of_pll_matches; i++) { 1156 if (sma1307->pll_matches[i].input_clk == bclk) 1157 break; 1158 } 1159 if (i == sma1307->num_of_pll_matches) { 1160 dev_warn(component->dev, 1161 "%s: No matching value between pll table and SCK\n", 1162 __func__); 1163 return; 1164 } 1165 1166 regmap_update_bits(sma1307->regmap, 1167 SMA1307_A2_TOP_MAN1, 1168 SMA1307_PLL_MASK, SMA1307_PLL_ON); 1169 } 1170 1171 regmap_write(sma1307->regmap, SMA1307_8B_PLL_POST_N, 1172 sma1307->pll_matches[i].post_n); 1173 regmap_write(sma1307->regmap, SMA1307_8C_PLL_N, 1174 sma1307->pll_matches[i].n); 1175 regmap_write(sma1307->regmap, SMA1307_8D_PLL_A_SETTING, 1176 sma1307->pll_matches[i].vco); 1177 regmap_write(sma1307->regmap, SMA1307_8E_PLL_P_CP, 1178 sma1307->pll_matches[i].p_cp); 1179 } 1180 1181 static int sma1307_dai_hw_params_amp(struct snd_pcm_substream *substream, 1182 struct snd_pcm_hw_params *params, 1183 struct snd_soc_dai *dai) 1184 { 1185 struct snd_soc_component *component = dai->component; 1186 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1187 unsigned int bclk = 0; 1188 1189 if (sma1307->format == SND_SOC_DAIFMT_DSP_A) 1190 bclk = params_rate(params) * sma1307->frame_size; 1191 else 1192 bclk = params_rate(params) * params_physical_width(params) 1193 * params_channels(params); 1194 1195 dev_dbg(component->dev, 1196 "%s: rate = %d : bit size = %d : channel = %d\n", 1197 __func__, params_rate(params), params_width(params), 1198 params_channels(params)); 1199 1200 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1201 if (sma1307->sys_clk_id == SMA1307_PLL_CLKIN_BCLK) { 1202 if (sma1307->last_bclk != bclk) { 1203 sma1307_setup_pll(component, bclk); 1204 sma1307->last_bclk = bclk; 1205 } 1206 } 1207 1208 switch (params_rate(params)) { 1209 case 8000: 1210 case 12000: 1211 case 16000: 1212 case 24000: 1213 case 32000: 1214 case 44100: 1215 case 48000: 1216 break; 1217 1218 case 96000: 1219 dev_warn(component->dev, 1220 "%s: %d rate not support SDO\n", __func__, 1221 params_rate(params)); 1222 break; 1223 1224 default: 1225 dev_err(component->dev, "%s: not support rate : %d\n", 1226 __func__, params_rate(params)); 1227 1228 return -EINVAL; 1229 } 1230 1231 /* substream->stream is SNDRV_PCM_STREAM_CAPTURE */ 1232 } else { 1233 1234 switch (params_format(params)) { 1235 case SNDRV_PCM_FORMAT_S16_LE: 1236 regmap_update_bits(sma1307->regmap, 1237 SMA1307_A4_TOP_MAN3, 1238 SMA1307_SCK_RATE_MASK 1239 | 1240 SMA1307_DATA_WIDTH_MASK, 1241 SMA1307_SCK_32FS | 1242 SMA1307_DATA_16BIT); 1243 break; 1244 1245 case SNDRV_PCM_FORMAT_S24_LE: 1246 regmap_update_bits(sma1307->regmap, 1247 SMA1307_A4_TOP_MAN3, 1248 SMA1307_SCK_RATE_MASK 1249 | 1250 SMA1307_DATA_WIDTH_MASK, 1251 SMA1307_SCK_64FS | 1252 SMA1307_DATA_24BIT); 1253 break; 1254 1255 case SNDRV_PCM_FORMAT_S32_LE: 1256 regmap_update_bits(sma1307->regmap, 1257 SMA1307_A4_TOP_MAN3, 1258 SMA1307_SCK_RATE_MASK 1259 | 1260 SMA1307_DATA_WIDTH_MASK, 1261 SMA1307_SCK_64FS | 1262 SMA1307_DATA_24BIT); 1263 break; 1264 default: 1265 dev_err(component->dev, 1266 "%s: not support data bit : %d\n", __func__, 1267 params_format(params)); 1268 return -EINVAL; 1269 } 1270 } 1271 1272 switch (sma1307->format) { 1273 case SND_SOC_DAIFMT_I2S: 1274 regmap_update_bits(sma1307->regmap, 1275 SMA1307_01_INPUT_CTRL1, 1276 SMA1307_I2S_MODE_MASK, 1277 SMA1307_STANDARD_I2S); 1278 regmap_update_bits(sma1307->regmap, 1279 SMA1307_A4_TOP_MAN3, 1280 SMA1307_INTERFACE_MASK, 1281 SMA1307_I2S_FORMAT); 1282 break; 1283 case SND_SOC_DAIFMT_LEFT_J: 1284 regmap_update_bits(sma1307->regmap, 1285 SMA1307_01_INPUT_CTRL1, 1286 SMA1307_I2S_MODE_MASK, SMA1307_LJ); 1287 regmap_update_bits(sma1307->regmap, 1288 SMA1307_A4_TOP_MAN3, 1289 SMA1307_INTERFACE_MASK, 1290 SMA1307_LJ_FORMAT); 1291 break; 1292 case SND_SOC_DAIFMT_RIGHT_J: 1293 switch (params_width(params)) { 1294 case 16: 1295 regmap_update_bits(sma1307->regmap, 1296 SMA1307_01_INPUT_CTRL1, 1297 SMA1307_I2S_MODE_MASK, 1298 SMA1307_RJ_16BIT); 1299 break; 1300 case 24: 1301 case 32: 1302 regmap_update_bits(sma1307->regmap, 1303 SMA1307_01_INPUT_CTRL1, 1304 SMA1307_I2S_MODE_MASK, 1305 SMA1307_RJ_24BIT); 1306 break; 1307 } 1308 break; 1309 case SND_SOC_DAIFMT_DSP_A: 1310 regmap_update_bits(sma1307->regmap, 1311 SMA1307_01_INPUT_CTRL1, 1312 SMA1307_I2S_MODE_MASK, 1313 SMA1307_STANDARD_I2S); 1314 regmap_update_bits(sma1307->regmap, 1315 SMA1307_A4_TOP_MAN3, 1316 SMA1307_INTERFACE_MASK, 1317 SMA1307_TDM_FORMAT); 1318 break; 1319 } 1320 1321 switch (params_width(params)) { 1322 case 16: 1323 case 24: 1324 case 32: 1325 break; 1326 default: 1327 dev_err(component->dev, 1328 "%s: not support data bit : %d\n", __func__, 1329 params_format(params)); 1330 return -EINVAL; 1331 } 1332 1333 return 0; 1334 } 1335 1336 static int sma1307_dai_set_sysclk_amp(struct snd_soc_dai *dai, 1337 int clk_id, unsigned int freq, int dir) 1338 { 1339 struct snd_soc_component *component = dai->component; 1340 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1341 1342 switch (clk_id) { 1343 case SMA1307_EXTERNAL_CLOCK_19_2: 1344 case SMA1307_EXTERNAL_CLOCK_24_576: 1345 case SMA1307_PLL_CLKIN_MCLK: 1346 case SMA1307_PLL_CLKIN_BCLK: 1347 break; 1348 default: 1349 dev_err(component->dev, "%s: Invalid clk id: %d\n", 1350 __func__, clk_id); 1351 return -EINVAL; 1352 } 1353 sma1307->sys_clk_id = clk_id; 1354 1355 return 0; 1356 } 1357 1358 static int sma1307_dai_set_fmt_amp(struct snd_soc_dai *dai, unsigned int fmt) 1359 { 1360 struct snd_soc_component *component = dai->component; 1361 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1362 1363 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1364 1365 case SND_SOC_DAIFMT_CBC_CFC: 1366 dev_dbg(component->dev, 1367 "%s: %s\n", __func__, "I2S/TDM Device mode"); 1368 regmap_update_bits(sma1307->regmap, 1369 SMA1307_01_INPUT_CTRL1, 1370 SMA1307_CONTROLLER_DEVICE_MASK, 1371 SMA1307_DEVICE_MODE); 1372 break; 1373 1374 case SND_SOC_DAIFMT_CBP_CFP: 1375 dev_dbg(component->dev, 1376 "%s: %s\n", __func__, "I2S/TDM Controller mode"); 1377 regmap_update_bits(sma1307->regmap, 1378 SMA1307_01_INPUT_CTRL1, 1379 SMA1307_CONTROLLER_DEVICE_MASK, 1380 SMA1307_CONTROLLER_MODE); 1381 break; 1382 1383 default: 1384 dev_err(component->dev, 1385 "%s: Unsupported Controller/Device : 0x%x\n", 1386 __func__, fmt); 1387 return -EINVAL; 1388 } 1389 1390 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1391 case SND_SOC_DAIFMT_I2S: 1392 case SND_SOC_DAIFMT_RIGHT_J: 1393 case SND_SOC_DAIFMT_LEFT_J: 1394 case SND_SOC_DAIFMT_DSP_A: 1395 case SND_SOC_DAIFMT_DSP_B: 1396 sma1307->format = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 1397 break; 1398 default: 1399 dev_err(component->dev, 1400 "%s: Unsupported Audio Interface Format : 0x%x\n", 1401 __func__, fmt); 1402 return -EINVAL; 1403 } 1404 1405 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1406 1407 case SND_SOC_DAIFMT_IB_NF: 1408 dev_dbg(component->dev, "%s: %s\n", 1409 __func__, "Invert BCLK + Normal Frame"); 1410 regmap_update_bits(sma1307->regmap, 1411 SMA1307_01_INPUT_CTRL1, 1412 SMA1307_SCK_RISING_MASK, 1413 SMA1307_SCK_RISING_EDGE); 1414 break; 1415 case SND_SOC_DAIFMT_IB_IF: 1416 dev_dbg(component->dev, "%s: %s\n", 1417 __func__, "Invert BCLK + Invert Frame"); 1418 regmap_update_bits(sma1307->regmap, 1419 SMA1307_01_INPUT_CTRL1, 1420 SMA1307_LEFTPOL_MASK 1421 | SMA1307_SCK_RISING_MASK, 1422 SMA1307_HIGH_FIRST_CH 1423 | SMA1307_SCK_RISING_EDGE); 1424 break; 1425 case SND_SOC_DAIFMT_NB_IF: 1426 dev_dbg(component->dev, "%s: %s\n", 1427 __func__, "Normal BCLK + Invert Frame"); 1428 regmap_update_bits(sma1307->regmap, 1429 SMA1307_01_INPUT_CTRL1, 1430 SMA1307_LEFTPOL_MASK, 1431 SMA1307_HIGH_FIRST_CH); 1432 break; 1433 case SND_SOC_DAIFMT_NB_NF: 1434 dev_dbg(component->dev, "%s: %s\n", 1435 __func__, "Normal BCLK + Normal Frame"); 1436 break; 1437 default: 1438 dev_err(component->dev, 1439 "%s: Unsupported Bit & Frameclock : 0x%x\n", 1440 __func__, fmt); 1441 return -EINVAL; 1442 } 1443 1444 return 0; 1445 } 1446 1447 static int sma1307_dai_set_tdm_slot(struct snd_soc_dai *dai, 1448 unsigned int tx_mask, unsigned int rx_mask, 1449 int slots, int slot_width) 1450 { 1451 struct snd_soc_component *component = dai->component; 1452 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1453 1454 dev_dbg(component->dev, "%s: slots = %d, slot_width - %d\n", 1455 __func__, slots, slot_width); 1456 1457 sma1307->frame_size = slot_width * slots; 1458 1459 regmap_update_bits(sma1307->regmap, 1460 SMA1307_A4_TOP_MAN3, 1461 SMA1307_INTERFACE_MASK, SMA1307_TDM_FORMAT); 1462 1463 regmap_update_bits(sma1307->regmap, 1464 SMA1307_A5_TDM1, 1465 SMA1307_TDM_TX_MODE_MASK, 1466 SMA1307_TDM_TX_MONO); 1467 1468 switch (slot_width) { 1469 case 16: 1470 regmap_update_bits(sma1307->regmap, 1471 SMA1307_A6_TDM2, 1472 SMA1307_TDM_DL_MASK, 1473 SMA1307_TDM_DL_16); 1474 break; 1475 case 32: 1476 regmap_update_bits(sma1307->regmap, 1477 SMA1307_A6_TDM2, 1478 SMA1307_TDM_DL_MASK, 1479 SMA1307_TDM_DL_32); 1480 break; 1481 default: 1482 dev_err(component->dev, "%s: not support TDM %d slot_width\n", 1483 __func__, slot_width); 1484 return -EINVAL; 1485 } 1486 1487 switch (slots) { 1488 case 4: 1489 regmap_update_bits(sma1307->regmap, 1490 SMA1307_A6_TDM2, 1491 SMA1307_TDM_N_SLOT_MASK, 1492 SMA1307_TDM_N_SLOT_4); 1493 break; 1494 case 8: 1495 regmap_update_bits(sma1307->regmap, 1496 SMA1307_A6_TDM2, 1497 SMA1307_TDM_N_SLOT_MASK, 1498 SMA1307_TDM_N_SLOT_8); 1499 break; 1500 default: 1501 dev_err(component->dev, "%s: not support TDM %d slots\n", 1502 __func__, slots); 1503 return -EINVAL; 1504 } 1505 1506 if (sma1307->tdm_slot0_rx < slots) 1507 regmap_update_bits(sma1307->regmap, 1508 SMA1307_A5_TDM1, 1509 SMA1307_TDM_SLOT0_RX_POS_MASK, 1510 sma1307->tdm_slot0_rx << 3); 1511 else 1512 dev_err(component->dev, "%s: Incorrect tdm-slot0-rx %d set\n", 1513 __func__, sma1307->tdm_slot0_rx); 1514 1515 if (sma1307->tdm_slot1_rx < slots) 1516 regmap_update_bits(sma1307->regmap, 1517 SMA1307_A5_TDM1, 1518 SMA1307_TDM_SLOT1_RX_POS_MASK, 1519 sma1307->tdm_slot1_rx); 1520 else 1521 dev_err(component->dev, "%s: Incorrect tdm-slot1-rx %d set\n", 1522 __func__, sma1307->tdm_slot1_rx); 1523 1524 if (sma1307->tdm_slot0_tx < slots) 1525 regmap_update_bits(sma1307->regmap, 1526 SMA1307_A6_TDM2, 1527 SMA1307_TDM_SLOT0_TX_POS_MASK, 1528 sma1307->tdm_slot0_tx << 3); 1529 else 1530 dev_err(component->dev, "%s: Incorrect tdm-slot0-tx %d set\n", 1531 __func__, sma1307->tdm_slot0_tx); 1532 1533 if (sma1307->tdm_slot1_tx < slots) 1534 regmap_update_bits(sma1307->regmap, 1535 SMA1307_A6_TDM2, 1536 SMA1307_TDM_SLOT1_TX_POS_MASK, 1537 sma1307->tdm_slot1_tx); 1538 else 1539 dev_err(component->dev, "%s: Incorrect tdm-slot1-tx %d set\n", 1540 __func__, sma1307->tdm_slot1_tx); 1541 1542 return 0; 1543 } 1544 1545 static int sma1307_dai_mute_stream(struct snd_soc_dai *dai, int mute, 1546 int stream) 1547 { 1548 struct snd_soc_component *component = dai->component; 1549 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1550 1551 if (stream == SNDRV_PCM_STREAM_CAPTURE) 1552 return 0; 1553 if (mute) { 1554 dev_dbg(component->dev, "%s: %s\n", __func__, "MUTE"); 1555 regmap_update_bits(sma1307->regmap, 1556 SMA1307_0E_MUTE_VOL_CTRL, 1557 SMA1307_SPK_MUTE_MASK, 1558 SMA1307_SPK_MUTE); 1559 } else { 1560 if (!sma1307->force_mute_status) { 1561 dev_dbg(component->dev, "%s: %s\n", __func__, 1562 "UNMUTE"); 1563 regmap_update_bits(sma1307->regmap, 1564 SMA1307_0E_MUTE_VOL_CTRL, 1565 SMA1307_SPK_MUTE_MASK, 1566 SMA1307_SPK_UNMUTE); 1567 } else { 1568 dev_dbg(sma1307->dev, "%s: FORCE MUTE!!!\n", __func__); 1569 } 1570 } 1571 1572 return 0; 1573 } 1574 1575 static const struct snd_soc_dai_ops sma1307_dai_ops_amp = { 1576 .hw_params = sma1307_dai_hw_params_amp, 1577 .set_fmt = sma1307_dai_set_fmt_amp, 1578 .set_sysclk = sma1307_dai_set_sysclk_amp, 1579 .set_tdm_slot = sma1307_dai_set_tdm_slot, 1580 .mute_stream = sma1307_dai_mute_stream, 1581 }; 1582 1583 #define SMA1307_RATES_PLAYBACK SNDRV_PCM_RATE_8000_96000 1584 #define SMA1307_RATES_CAPTURE SNDRV_PCM_RATE_8000_48000 1585 #define SMA1307_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 1586 SNDRV_PCM_FMTBIT_S32_LE) 1587 1588 static struct snd_soc_dai_driver sma1307_dai[] = { 1589 { 1590 .name = "sma1307-amplifier", 1591 .id = 0, 1592 .playback = { 1593 .stream_name = "Playback", 1594 .channels_min = 1, 1595 .channels_max = 2, 1596 .rates = SMA1307_RATES_PLAYBACK, 1597 .formats = SMA1307_FORMATS, 1598 }, 1599 .capture = { 1600 .stream_name = "Capture", 1601 .channels_min = 1, 1602 .channels_max = 2, 1603 .rates = SMA1307_RATES_CAPTURE, 1604 .formats = SMA1307_FORMATS, 1605 }, 1606 .ops = &sma1307_dai_ops_amp, 1607 }, 1608 }; 1609 1610 static void sma1307_check_fault_worker(struct work_struct *work) 1611 { 1612 struct sma1307_priv *sma1307 = 1613 container_of(work, struct sma1307_priv, check_fault_work.work); 1614 unsigned int status1_val, status2_val; 1615 char *envp[3] = { NULL, NULL, NULL }; 1616 1617 if (sma1307->tsdw_cnt) 1618 regmap_read(sma1307->regmap, 1619 SMA1307_0A_SPK_VOL, &sma1307->cur_vol); 1620 else 1621 regmap_read(sma1307->regmap, 1622 SMA1307_0A_SPK_VOL, &sma1307->init_vol); 1623 1624 regmap_read(sma1307->regmap, SMA1307_FA_STATUS1, &status1_val); 1625 regmap_read(sma1307->regmap, SMA1307_FB_STATUS2, &status2_val); 1626 1627 if (~status1_val & SMA1307_OT1_OK_STATUS) { 1628 dev_crit(sma1307->dev, 1629 "%s: OT1(Over Temperature Level 1)\n", __func__); 1630 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OT1"); 1631 if (sma1307->sw_ot1_prot) { 1632 /* Volume control (Current Volume -3dB) */ 1633 if ((sma1307->cur_vol + 6) <= 0xFA) { 1634 sma1307->cur_vol += 6; 1635 regmap_write(sma1307->regmap, 1636 SMA1307_0A_SPK_VOL, 1637 sma1307->cur_vol); 1638 envp[1] = kasprintf(GFP_KERNEL, 1639 "VOLUME=0x%02X", sma1307->cur_vol); 1640 } 1641 } 1642 sma1307->tsdw_cnt++; 1643 } else if (sma1307->tsdw_cnt) { 1644 regmap_write(sma1307->regmap, 1645 SMA1307_0A_SPK_VOL, sma1307->init_vol); 1646 sma1307->tsdw_cnt = 0; 1647 sma1307->cur_vol = sma1307->init_vol; 1648 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OT1_CLEAR"); 1649 envp[1] = kasprintf(GFP_KERNEL, 1650 "VOLUME=0x%02X", sma1307->cur_vol); 1651 } 1652 1653 if (~status1_val & SMA1307_OT2_OK_STATUS) { 1654 dev_crit(sma1307->dev, 1655 "%s: OT2(Over Temperature Level 2)\n", __func__); 1656 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OT2"); 1657 } 1658 if (status1_val & SMA1307_UVLO_STATUS) { 1659 dev_crit(sma1307->dev, 1660 "%s: UVLO(Under Voltage Lock Out)\n", __func__); 1661 envp[0] = kasprintf(GFP_KERNEL, "STATUS=UVLO"); 1662 } 1663 if (status1_val & SMA1307_OVP_BST_STATUS) { 1664 dev_crit(sma1307->dev, 1665 "%s: OVP_BST(Over Voltage Protection)\n", __func__); 1666 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OVP_BST"); 1667 } 1668 if (status2_val & SMA1307_OCP_SPK_STATUS) { 1669 dev_crit(sma1307->dev, 1670 "%s: OCP_SPK(Over Current Protect SPK)\n", __func__); 1671 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OCP_SPK"); 1672 } 1673 if (status2_val & SMA1307_OCP_BST_STATUS) { 1674 dev_crit(sma1307->dev, 1675 "%s: OCP_BST(Over Current Protect Boost)\n", __func__); 1676 envp[0] = kasprintf(GFP_KERNEL, "STATUS=OCP_BST"); 1677 } 1678 if (status2_val & SMA1307_CLK_MON_STATUS) { 1679 dev_crit(sma1307->dev, 1680 "%s: CLK_FAULT(No clock input)\n", __func__); 1681 envp[0] = kasprintf(GFP_KERNEL, "STATUS=CLK_FAULT"); 1682 } 1683 1684 if (envp[0] != NULL) { 1685 if (kobject_uevent_env(sma1307->kobj, KOBJ_CHANGE, envp)) 1686 dev_err(sma1307->dev, 1687 "%s: Error sending uevent\n", __func__); 1688 kfree(envp[0]); 1689 kfree(envp[1]); 1690 } 1691 1692 if (sma1307->check_fault_status) { 1693 if (sma1307->check_fault_period > 0) 1694 queue_delayed_work(system_freezable_wq, 1695 &sma1307->check_fault_work, 1696 sma1307->check_fault_period * HZ); 1697 else 1698 queue_delayed_work(system_freezable_wq, 1699 &sma1307->check_fault_work, 1700 CHECK_PERIOD_TIME * HZ); 1701 } 1702 } 1703 1704 static void sma1307_setting_loaded(struct sma1307_priv *sma1307, const char *file) 1705 { 1706 const struct firmware *fw; 1707 int size, offset, num_mode; 1708 int ret; 1709 1710 ret = request_firmware(&fw, file, sma1307->dev); 1711 1712 if (ret) { 1713 dev_err(sma1307->dev, "%s: failed to read \"%s\": %pe\n", 1714 __func__, setting_file, ERR_PTR(ret)); 1715 sma1307->set.status = false; 1716 return; 1717 } else if ((fw->size) < SMA1307_SETTING_HEADER_SIZE) { 1718 dev_err(sma1307->dev, "%s: Invalid file\n", __func__); 1719 release_firmware(fw); 1720 sma1307->set.status = false; 1721 return; 1722 } 1723 1724 int *data __free(kfree) = kzalloc(fw->size, GFP_KERNEL); 1725 if (!data) { 1726 release_firmware(fw); 1727 sma1307->set.status = false; 1728 return; 1729 } 1730 size = fw->size >> 2; 1731 memcpy(data, fw->data, fw->size); 1732 1733 release_firmware(fw); 1734 1735 /* HEADER */ 1736 sma1307->set.header_size = SMA1307_SETTING_HEADER_SIZE; 1737 sma1307->set.checksum = data[sma1307->set.header_size - 2]; 1738 sma1307->set.num_mode = data[sma1307->set.header_size - 1]; 1739 num_mode = sma1307->set.num_mode; 1740 sma1307->set.header = devm_kzalloc(sma1307->dev, 1741 sma1307->set.header_size, 1742 GFP_KERNEL); 1743 if (!sma1307->set.header) { 1744 sma1307->set.status = false; 1745 return; 1746 } 1747 1748 memcpy(sma1307->set.header, data, 1749 sma1307->set.header_size * sizeof(int)); 1750 1751 if ((sma1307->set.checksum >> 8) != SMA1307_SETTING_CHECKSUM) { 1752 dev_err(sma1307->dev, "%s: failed by dismatch \"%s\"\n", 1753 __func__, setting_file); 1754 sma1307->set.status = false; 1755 return; 1756 } 1757 1758 /* DEFAULT */ 1759 sma1307->set.def_size = SMA1307_SETTING_DEFAULT_SIZE; 1760 sma1307->set.def 1761 = devm_kzalloc(sma1307->dev, 1762 sma1307->set.def_size * sizeof(int), GFP_KERNEL); 1763 if (!sma1307->set.def) { 1764 sma1307->set.status = false; 1765 return; 1766 } 1767 1768 memcpy(sma1307->set.def, 1769 &data[sma1307->set.header_size], 1770 sma1307->set.def_size * sizeof(int)); 1771 1772 /* MODE */ 1773 offset = sma1307->set.header_size + sma1307->set.def_size; 1774 sma1307->set.mode_size = DIV_ROUND_CLOSEST(size - offset, num_mode + 1); 1775 for (int i = 0; i < num_mode; i++) { 1776 sma1307->set.mode_set[i] 1777 = devm_kzalloc(sma1307->dev, 1778 sma1307->set.mode_size * 2 * sizeof(int), 1779 GFP_KERNEL); 1780 if (!sma1307->set.mode_set[i]) { 1781 for (int j = 0; j < i; j++) 1782 kfree(sma1307->set.mode_set[j]); 1783 sma1307->set.status = false; 1784 return; 1785 } 1786 1787 for (int j = 0; j < sma1307->set.mode_size; j++) { 1788 sma1307->set.mode_set[i][2 * j] 1789 = data[offset + ((num_mode + 1) * j)]; 1790 sma1307->set.mode_set[i][2 * j + 1] 1791 = data[offset + ((num_mode + 1) * j + i + 1)]; 1792 } 1793 } 1794 1795 sma1307->set.status = true; 1796 1797 } 1798 1799 static void sma1307_reset(struct snd_soc_component *component) 1800 { 1801 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1802 unsigned int status = 0; 1803 1804 regmap_read(sma1307->regmap, SMA1307_FF_DEVICE_INDEX, &status); 1805 1806 sma1307->rev_num = status & SMA1307_REV_NUM_STATUS; 1807 dev_dbg(component->dev, "%s: SMA1307 Revision %d\n", 1808 __func__, sma1307->rev_num); 1809 regmap_read(sma1307->regmap, SMA1307_99_OTP_TRM2, &sma1307->otp_trm2); 1810 regmap_read(sma1307->regmap, SMA1307_9A_OTP_TRM3, &sma1307->otp_trm3); 1811 1812 if ((sma1307->otp_trm2 & SMA1307_OTP_STAT_MASK) != SMA1307_OTP_STAT_1) 1813 dev_warn(component->dev, "%s: SMA1307 OTP Status Fail\n", 1814 __func__); 1815 1816 /* Register Initial Value Setting */ 1817 sma1307_setting_loaded(sma1307, setting_file); 1818 if (sma1307->set.status) 1819 sma1307_set_binary(component); 1820 else 1821 sma1307_set_default(component); 1822 1823 regmap_update_bits(sma1307->regmap, 1824 SMA1307_93_INT_CTRL, 1825 SMA1307_DIS_INT_MASK, SMA1307_HIGH_Z_INT); 1826 regmap_write(sma1307->regmap, SMA1307_0A_SPK_VOL, sma1307->init_vol); 1827 } 1828 1829 static void sma1307_set_binary(struct snd_soc_component *component) 1830 { 1831 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1832 int i = 0, mode = 0; 1833 1834 for (i = 0; i < (sma1307->set.def_size); i++) { 1835 if (sma1307_writeable_register(sma1307->dev, i) 1836 && ((i < SMA1307_97_OTP_TRM0) 1837 || (i > SMA1307_9A_OTP_TRM3))) { 1838 regmap_write(sma1307->regmap, i, sma1307->set.def[i]); 1839 1840 } 1841 } 1842 for (i = 0; i < (sma1307->set.mode_size); i++) { 1843 if (sma1307_writeable_register(sma1307->dev, i) 1844 && ((i < SMA1307_97_OTP_TRM0) 1845 || (i > SMA1307_9A_OTP_TRM3))) { 1846 mode = sma1307->binary_mode; 1847 regmap_write(sma1307->regmap, 1848 sma1307->set.mode_set[mode][2 * i], 1849 sma1307->set.mode_set[mode][2 * i + 1850 1]); 1851 } 1852 } 1853 } 1854 1855 static void sma1307_set_default(struct snd_soc_component *component) 1856 { 1857 struct sma1307_priv *sma1307 = snd_soc_component_get_drvdata(component); 1858 int i = 0; 1859 1860 for (i = 0; i < (unsigned int)ARRAY_SIZE(sma1307_reg_def); i++) 1861 regmap_write(sma1307->regmap, 1862 sma1307_reg_def[i].reg, 1863 sma1307_reg_def[i].def); 1864 1865 if (!strcmp(sma1307->name, DEVICE_NAME_SMA1307AQ)) 1866 sma1307->data->init(sma1307->regmap); 1867 } 1868 1869 static int sma1307_probe(struct snd_soc_component *component) 1870 { 1871 struct snd_soc_dapm_context *dapm = 1872 snd_soc_component_get_dapm(component); 1873 1874 snd_soc_dapm_sync(dapm); 1875 1876 sma1307_amp_component = component; 1877 1878 snd_soc_add_component_controls(component, sma1307_binary_mode_control, 1879 ARRAY_SIZE(sma1307_binary_mode_control)); 1880 sma1307_reset(component); 1881 1882 return 0; 1883 } 1884 1885 static const struct snd_soc_component_driver sma1307_component = { 1886 .probe = sma1307_probe, 1887 .controls = sma1307_snd_controls, 1888 .num_controls = ARRAY_SIZE(sma1307_snd_controls), 1889 .dapm_widgets = sma1307_dapm_widgets, 1890 .num_dapm_widgets = ARRAY_SIZE(sma1307_dapm_widgets), 1891 .dapm_routes = sma1307_audio_map, 1892 .num_dapm_routes = ARRAY_SIZE(sma1307_audio_map), 1893 }; 1894 1895 static const struct regmap_config sma_i2c_regmap = { 1896 .reg_bits = 8, 1897 .val_bits = 8, 1898 1899 .max_register = SMA1307_FF_DEVICE_INDEX, 1900 .readable_reg = sma1307_readable_register, 1901 .writeable_reg = sma1307_writeable_register, 1902 .volatile_reg = sma1307_volatile_register, 1903 1904 .reg_defaults = sma1307_reg_def, 1905 .num_reg_defaults = ARRAY_SIZE(sma1307_reg_def), 1906 }; 1907 1908 static void sma1307aq_init(struct regmap *regmap) 1909 { 1910 /* Guidelines for driving 4ohm load */ 1911 /* Brown Out Protection */ 1912 regmap_write(regmap, SMA1307_02_BROWN_OUT_PROT1, 0x62); 1913 regmap_write(regmap, SMA1307_03_BROWN_OUT_PROT2, 0x5D); 1914 regmap_write(regmap, SMA1307_04_BROWN_OUT_PROT3, 0x57); 1915 regmap_write(regmap, SMA1307_05_BROWN_OUT_PROT8, 0x54); 1916 regmap_write(regmap, SMA1307_06_BROWN_OUT_PROT9, 0x51); 1917 regmap_write(regmap, 1918 SMA1307_07_BROWN_OUT_PROT10, 0x4D); 1919 regmap_write(regmap, 1920 SMA1307_08_BROWN_OUT_PROT11, 0x4B); 1921 regmap_write(regmap, SMA1307_27_BROWN_OUT_PROT4, 0x3C); 1922 regmap_write(regmap, SMA1307_28_BROWN_OUT_PROT5, 0x5B); 1923 regmap_write(regmap, 1924 SMA1307_29_BROWN_OUT_PROT12, 0x78); 1925 regmap_write(regmap, 1926 SMA1307_2A_BROWN_OUT_PROT13, 0x96); 1927 regmap_write(regmap, 1928 SMA1307_2B_BROWN_OUT_PROT14, 0xB4); 1929 regmap_write(regmap, 1930 SMA1307_2C_BROWN_OUT_PROT15, 0xD3); 1931 /* FDPEC Gain */ 1932 regmap_write(regmap, SMA1307_35_FDPEC_CTRL0, 0x16); 1933 /* FLT Vdd */ 1934 regmap_write(regmap, SMA1307_92_FDPEC_CTRL1, 0xA0); 1935 /* Boost Max */ 1936 regmap_write(regmap, SMA1307_AB_BOOST_CTRL4, 0x0F); 1937 } 1938 1939 static const struct sma1307_data sma1307aq_data = { 1940 .name = DEVICE_NAME_SMA1307AQ, 1941 .init = sma1307aq_init, 1942 }; 1943 1944 static int sma1307_i2c_probe(struct i2c_client *client) 1945 { 1946 struct sma1307_priv *sma1307; 1947 const struct sma1307_data *data; 1948 int ret = 0; 1949 unsigned int device_info; 1950 1951 sma1307 = devm_kzalloc(&client->dev, 1952 sizeof(*sma1307), GFP_KERNEL); 1953 if (!sma1307) 1954 return -ENOMEM; 1955 1956 sma1307->regmap = devm_regmap_init_i2c(client, &sma_i2c_regmap); 1957 if (IS_ERR(sma1307->regmap)) { 1958 return dev_err_probe(&client->dev, PTR_ERR(sma1307->regmap), 1959 "%s: failed to allocate register map\n", __func__); 1960 } 1961 1962 data = device_get_match_data(&client->dev); 1963 if (!data) 1964 return -ENODEV; 1965 1966 sma1307->data = data; 1967 1968 /* set initial value as normal AMP IC status */ 1969 sma1307->name = client->name; 1970 sma1307->format = SND_SOC_DAIFMT_I2S; 1971 sma1307->sys_clk_id = SMA1307_PLL_CLKIN_BCLK; 1972 sma1307->num_of_pll_matches = ARRAY_SIZE(sma1307_pll_matches); 1973 1974 sma1307->check_fault_period = CHECK_PERIOD_TIME; 1975 sma1307->check_fault_status = true; 1976 sma1307->init_vol = 0x32; 1977 sma1307->cur_vol = sma1307->init_vol; 1978 sma1307->sw_ot1_prot = true; 1979 1980 mutex_init(&sma1307->default_lock); 1981 1982 INIT_DELAYED_WORK(&sma1307->check_fault_work, 1983 sma1307_check_fault_worker); 1984 1985 sma1307->dev = &client->dev; 1986 sma1307->kobj = &client->dev.kobj; 1987 1988 i2c_set_clientdata(client, sma1307); 1989 1990 sma1307->pll_matches = sma1307_pll_matches; 1991 1992 regmap_read(sma1307->regmap, 1993 SMA1307_FF_DEVICE_INDEX, &device_info); 1994 1995 if ((device_info & 0xF8) != SMA1307_DEVICE_ID) { 1996 dev_err(&client->dev, 1997 "%s: device initialization error (0x%02X)", 1998 __func__, device_info); 1999 return -ENODEV; 2000 } 2001 dev_dbg(&client->dev, "%s: chip version 0x%02X\n", 2002 __func__, device_info); 2003 2004 i2c_set_clientdata(client, sma1307); 2005 2006 ret = devm_snd_soc_register_component(&client->dev, 2007 &sma1307_component, sma1307_dai, 2008 1); 2009 2010 if (ret) { 2011 dev_err(&client->dev, "%s: failed to register component\n", 2012 __func__); 2013 2014 return ret; 2015 } 2016 2017 return ret; 2018 } 2019 2020 static void sma1307_i2c_remove(struct i2c_client *client) 2021 { 2022 struct sma1307_priv *sma1307 = 2023 (struct sma1307_priv *)i2c_get_clientdata(client); 2024 2025 cancel_delayed_work_sync(&sma1307->check_fault_work); 2026 } 2027 2028 static const struct i2c_device_id sma1307_i2c_id[] = { 2029 { "sma1307a" }, 2030 { "sma1307aq" }, 2031 { } 2032 }; 2033 2034 MODULE_DEVICE_TABLE(i2c, sma1307_i2c_id); 2035 2036 static const struct of_device_id sma1307_of_match[] = { 2037 { 2038 .compatible = "irondevice,sma1307a", 2039 }, 2040 { 2041 .compatible = "irondevice,sma1307aq", 2042 .data = &sma1307aq_data //AEC-Q100 Qualificated 2043 }, 2044 { } 2045 }; 2046 2047 MODULE_DEVICE_TABLE(of, sma1307_of_match); 2048 2049 static struct i2c_driver sma1307_i2c_driver = { 2050 .driver = { 2051 .name = "sma1307", 2052 .of_match_table = sma1307_of_match, 2053 }, 2054 .probe = sma1307_i2c_probe, 2055 .remove = sma1307_i2c_remove, 2056 .id_table = sma1307_i2c_id, 2057 }; 2058 2059 module_i2c_driver(sma1307_i2c_driver); 2060 2061 MODULE_DESCRIPTION("ALSA SoC SMA1307 driver"); 2062 MODULE_AUTHOR("Gyuhwa Park, <gyuhwa.park@irondevice.com>"); 2063 MODULE_AUTHOR("KS Jo, <kiseok.jo@irondevice.com>"); 2064 MODULE_LICENSE("GPL"); 2065