1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2023 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/mod_devicetable.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/soundwire/sdw_registers.h> 15 16 #include "rt722-sdca.h" 17 #include "rt722-sdca-sdw.h" 18 19 static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg) 20 { 21 switch (reg) { 22 case 0x2f01 ... 0x2f0a: 23 case 0x2f35 ... 0x2f36: 24 case 0x2f50: 25 case 0x2f54: 26 case 0x2f58 ... 0x2f5d: 27 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 28 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE, 29 0): 30 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 31 0): 32 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE, 33 0): 34 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 35 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 36 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 37 RT722_SDCA_CTL_FU_MUTE, CH_R): 38 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D, 39 RT722_SDCA_CTL_SELECTED_MODE, 0): 40 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 41 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 42 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 43 RT722_SDCA_CTL_FU_MUTE, CH_R): 44 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 45 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 46 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 47 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 48 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 49 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 50 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 51 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 52 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, 53 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 54 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, 55 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 56 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 57 RT722_SDCA_CTL_FU_MUTE, CH_01) ... 58 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 59 RT722_SDCA_CTL_FU_MUTE, CH_04): 60 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, 61 RT722_SDCA_CTL_VENDOR_DEF, 0): 62 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 63 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 64 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 65 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 66 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 67 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, 68 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 69 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 70 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... 71 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 72 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 73 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 74 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 75 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 76 RT722_SDCA_CTL_FU_MUTE, CH_R): 77 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, 78 RT722_SDCA_CTL_VENDOR_DEF, CH_08): 79 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 80 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 81 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 82 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 83 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 84 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, 85 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 86 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 87 return 1; 88 case 0x2000000 ... 0x2000024: 89 case 0x2000029 ... 0x200004a: 90 case 0x2000051 ... 0x2000052: 91 case 0x200005a ... 0x200005b: 92 case 0x2000061 ... 0x2000069: 93 case 0x200006b: 94 case 0x2000070: 95 case 0x200007f: 96 case 0x2000082 ... 0x200008e: 97 case 0x2000090 ... 0x2000094: 98 case 0x3110000: 99 case 0x5300000 ... 0x5300002: 100 case 0x5400002: 101 case 0x5600000 ... 0x5600007: 102 case 0x5700000 ... 0x5700004: 103 case 0x5800000 ... 0x5800004: 104 case 0x5810000: 105 case 0x5b00003: 106 case 0x5c00011: 107 case 0x5d00006: 108 case 0x5f00000 ... 0x5f0000d: 109 case 0x5f00030: 110 case 0x6100000 ... 0x6100051: 111 case 0x6100055 ... 0x6100057: 112 case 0x6100060: 113 case 0x6100062: 114 case 0x6100064 ... 0x6100065: 115 case 0x6100067: 116 case 0x6100070 ... 0x610007c: 117 case 0x6100080: 118 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 119 CH_01) ... 120 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 121 CH_04): 122 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 123 CH_01): 124 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 125 CH_02): 126 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 127 CH_03): 128 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 129 CH_04): 130 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L): 131 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R): 132 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 133 CH_L): 134 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 135 CH_R): 136 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 137 CH_L): 138 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 139 CH_R): 140 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 141 RT722_SDCA_CTL_FU_CH_GAIN, CH_L): 142 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 143 RT722_SDCA_CTL_FU_CH_GAIN, CH_R): 144 return 2; 145 default: 146 return 0; 147 } 148 } 149 150 static struct regmap_sdw_mbq_cfg rt722_mbq_config = { 151 .mbq_size = rt722_sdca_mbq_size, 152 }; 153 154 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg) 155 { 156 return rt722_sdca_mbq_size(dev, reg) > 0; 157 } 158 159 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg) 160 { 161 switch (reg) { 162 case 0x2f01: 163 case 0x2f54: 164 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 165 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 166 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 167 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 168 0): 169 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 170 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 171 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 172 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 173 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 174 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 175 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 176 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 177 case 0x2000000: 178 case 0x200000d: 179 case 0x2000019: 180 case 0x2000020: 181 case 0x2000030: 182 case 0x2000046: 183 case 0x2000067: 184 case 0x2000084: 185 case 0x2000086: 186 case 0x3110000: 187 case 0x5800003: 188 case 0x5810000: 189 return true; 190 default: 191 return false; 192 } 193 } 194 195 static const struct regmap_config rt722_sdca_regmap = { 196 .reg_bits = 32, 197 .val_bits = 16, 198 .readable_reg = rt722_sdca_readable_register, 199 .volatile_reg = rt722_sdca_volatile_register, 200 .max_register = 0x44ffffff, 201 .reg_defaults = rt722_sdca_reg_defaults, 202 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults), 203 .cache_type = REGCACHE_MAPLE, 204 .use_single_read = true, 205 .use_single_write = true, 206 }; 207 208 static int rt722_sdca_update_status(struct sdw_slave *slave, 209 enum sdw_slave_status status) 210 { 211 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 212 213 if (status == SDW_SLAVE_UNATTACHED) 214 rt722->hw_init = false; 215 216 if (status == SDW_SLAVE_ATTACHED) { 217 if (rt722->hs_jack) { 218 /* 219 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then 220 * if the device attached again, we will need to set the setting back. 221 * It could avoid losing the jack detection interrupt. 222 * This also could sync with the cache value as the rt722_sdca_jack_init set. 223 */ 224 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1, 225 SDW_SCP_SDCA_INTMASK_SDCA_0); 226 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2, 227 SDW_SCP_SDCA_INTMASK_SDCA_8); 228 } 229 } 230 231 /* 232 * Perform initialization only if slave status is present and 233 * hw_init flag is false 234 */ 235 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED) 236 return 0; 237 238 /* perform I/O transfers required for Slave initialization */ 239 return rt722_sdca_io_init(&slave->dev, slave); 240 } 241 242 static int rt722_sdca_read_prop(struct sdw_slave *slave) 243 { 244 struct sdw_slave_prop *prop = &slave->prop; 245 int nval; 246 int i, j; 247 u32 bit; 248 unsigned long addr; 249 struct sdw_dpn_prop *dpn; 250 251 sdw_slave_read_lane_mapping(slave); 252 253 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; 254 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 255 256 prop->paging_support = true; 257 258 /* 259 * port = 1 for headphone playback 260 * port = 2 for headset-mic capture 261 * port = 3 for speaker playback 262 * port = 6 for digital-mic capture 263 */ 264 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */ 265 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */ 266 267 nval = hweight32(prop->source_ports); 268 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 269 sizeof(*prop->src_dpn_prop), GFP_KERNEL); 270 if (!prop->src_dpn_prop) 271 return -ENOMEM; 272 273 i = 0; 274 dpn = prop->src_dpn_prop; 275 addr = prop->source_ports; 276 for_each_set_bit(bit, &addr, 32) { 277 dpn[i].num = bit; 278 dpn[i].type = SDW_DPN_FULL; 279 dpn[i].simple_ch_prep_sm = true; 280 dpn[i].ch_prep_timeout = 10; 281 i++; 282 } 283 284 /* do this again for sink now */ 285 nval = hweight32(prop->sink_ports); 286 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 287 sizeof(*prop->sink_dpn_prop), GFP_KERNEL); 288 if (!prop->sink_dpn_prop) 289 return -ENOMEM; 290 291 j = 0; 292 dpn = prop->sink_dpn_prop; 293 addr = prop->sink_ports; 294 for_each_set_bit(bit, &addr, 32) { 295 dpn[j].num = bit; 296 dpn[j].type = SDW_DPN_FULL; 297 dpn[j].simple_ch_prep_sm = true; 298 dpn[j].ch_prep_timeout = 10; 299 j++; 300 } 301 302 /* set the timeout values */ 303 prop->clk_stop_timeout = 900; 304 305 /* wake-up event */ 306 prop->wake_capable = 1; 307 308 /* Three data lanes are supported by rt722-sdca codec */ 309 prop->lane_control_support = true; 310 311 return 0; 312 } 313 314 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave, 315 struct sdw_slave_intr_status *status) 316 { 317 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 318 int ret, stat; 319 int count = 0, retry = 3; 320 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0; 321 322 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) { 323 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__); 324 /* avoid the HID owner doesn't change to device */ 325 if (rt722->scp_sdca_stat2) 326 scp_sdca_stat2 = rt722->scp_sdca_stat2; 327 } 328 329 /* 330 * The critical section below intentionally protects a rather large piece of code. 331 * We don't want to allow the system suspend to disable an interrupt while we are 332 * processing it, which could be problematic given the quirky SoundWire interrupt 333 * scheme. We do want however to prevent new workqueues from being scheduled if 334 * the disable_irq flag was set during system suspend. 335 */ 336 mutex_lock(&rt722->disable_irq_lock); 337 338 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 339 if (ret < 0) 340 goto io_error; 341 rt722->scp_sdca_stat1 = ret; 342 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 343 if (ret < 0) 344 goto io_error; 345 rt722->scp_sdca_stat2 = ret; 346 if (scp_sdca_stat2) 347 rt722->scp_sdca_stat2 |= scp_sdca_stat2; 348 do { 349 /* clear flag */ 350 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 351 if (ret < 0) 352 goto io_error; 353 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) { 354 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1, 355 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0); 356 if (ret < 0) 357 goto io_error; 358 } 359 360 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 361 if (ret < 0) 362 goto io_error; 363 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) { 364 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2, 365 SDW_SCP_SDCA_INTMASK_SDCA_8); 366 if (ret < 0) 367 goto io_error; 368 } 369 370 /* check if flag clear or not */ 371 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT); 372 if (ret < 0) 373 goto io_error; 374 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 375 376 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 377 if (ret < 0) 378 goto io_error; 379 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0; 380 381 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 382 if (ret < 0) 383 goto io_error; 384 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8; 385 386 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade; 387 388 count++; 389 } while (stat != 0 && count < retry); 390 391 if (stat) 392 dev_warn(&slave->dev, 393 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 394 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2); 395 396 if (status->sdca_cascade && !rt722->disable_irq) 397 mod_delayed_work(system_power_efficient_wq, 398 &rt722->jack_detect_work, msecs_to_jiffies(280)); 399 400 mutex_unlock(&rt722->disable_irq_lock); 401 402 return 0; 403 404 io_error: 405 mutex_unlock(&rt722->disable_irq_lock); 406 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 407 return ret; 408 } 409 410 static const struct sdw_slave_ops rt722_sdca_slave_ops = { 411 .read_prop = rt722_sdca_read_prop, 412 .interrupt_callback = rt722_sdca_interrupt_callback, 413 .update_status = rt722_sdca_update_status, 414 }; 415 416 static int rt722_sdca_sdw_probe(struct sdw_slave *slave, 417 const struct sdw_device_id *id) 418 { 419 struct regmap *regmap; 420 421 /* Regmap Initialization */ 422 regmap = devm_regmap_init_sdw_mbq_cfg(slave, &rt722_sdca_regmap, &rt722_mbq_config); 423 if (IS_ERR(regmap)) 424 return PTR_ERR(regmap); 425 426 return rt722_sdca_init(&slave->dev, regmap, slave); 427 } 428 429 static int rt722_sdca_sdw_remove(struct sdw_slave *slave) 430 { 431 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 432 433 if (rt722->hw_init) { 434 cancel_delayed_work_sync(&rt722->jack_detect_work); 435 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 436 } 437 438 if (rt722->first_hw_init) 439 pm_runtime_disable(&slave->dev); 440 441 mutex_destroy(&rt722->calibrate_mutex); 442 mutex_destroy(&rt722->disable_irq_lock); 443 444 return 0; 445 } 446 447 static const struct sdw_device_id rt722_sdca_id[] = { 448 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0), 449 {}, 450 }; 451 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id); 452 453 static int rt722_sdca_dev_suspend(struct device *dev) 454 { 455 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 456 457 if (!rt722->hw_init) 458 return 0; 459 460 cancel_delayed_work_sync(&rt722->jack_detect_work); 461 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 462 463 regcache_cache_only(rt722->regmap, true); 464 465 return 0; 466 } 467 468 static int rt722_sdca_dev_system_suspend(struct device *dev) 469 { 470 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev); 471 struct sdw_slave *slave = dev_to_sdw_dev(dev); 472 int ret1, ret2; 473 474 if (!rt722_sdca->hw_init) 475 return 0; 476 477 /* 478 * prevent new interrupts from being handled after the 479 * deferred work completes and before the parent disables 480 * interrupts on the link 481 */ 482 mutex_lock(&rt722_sdca->disable_irq_lock); 483 rt722_sdca->disable_irq = true; 484 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1, 485 SDW_SCP_SDCA_INTMASK_SDCA_0, 0); 486 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2, 487 SDW_SCP_SDCA_INTMASK_SDCA_8, 0); 488 mutex_unlock(&rt722_sdca->disable_irq_lock); 489 490 if (ret1 < 0 || ret2 < 0) { 491 /* log but don't prevent suspend from happening */ 492 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__); 493 } 494 495 return rt722_sdca_dev_suspend(dev); 496 } 497 498 #define RT722_PROBE_TIMEOUT 5000 499 500 static int rt722_sdca_dev_resume(struct device *dev) 501 { 502 struct sdw_slave *slave = dev_to_sdw_dev(dev); 503 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 504 unsigned long time; 505 506 if (!rt722->first_hw_init) 507 return 0; 508 509 if (!slave->unattach_request) { 510 mutex_lock(&rt722->disable_irq_lock); 511 if (rt722->disable_irq == true) { 512 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 513 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 514 rt722->disable_irq = false; 515 } 516 mutex_unlock(&rt722->disable_irq_lock); 517 goto regmap_sync; 518 } 519 520 time = wait_for_completion_timeout(&slave->initialization_complete, 521 msecs_to_jiffies(RT722_PROBE_TIMEOUT)); 522 if (!time) { 523 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 524 sdw_show_ping_status(slave->bus, true); 525 526 return -ETIMEDOUT; 527 } 528 529 regmap_sync: 530 slave->unattach_request = 0; 531 regcache_cache_only(rt722->regmap, false); 532 regcache_sync(rt722->regmap); 533 return 0; 534 } 535 536 static const struct dev_pm_ops rt722_sdca_pm = { 537 SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume) 538 RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL) 539 }; 540 541 static struct sdw_driver rt722_sdca_sdw_driver = { 542 .driver = { 543 .name = "rt722-sdca", 544 .pm = pm_ptr(&rt722_sdca_pm), 545 }, 546 .probe = rt722_sdca_sdw_probe, 547 .remove = rt722_sdca_sdw_remove, 548 .ops = &rt722_sdca_slave_ops, 549 .id_table = rt722_sdca_id, 550 }; 551 module_sdw_driver(rt722_sdca_sdw_driver); 552 553 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver"); 554 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 555 MODULE_LICENSE("GPL"); 556