1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2023 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/mod_devicetable.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/soundwire/sdw_registers.h> 15 16 #include "rt722-sdca.h" 17 #include "rt722-sdca-sdw.h" 18 19 static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg) 20 { 21 switch (reg) { 22 case 0x2f01 ... 0x2f0a: 23 case 0x2f35 ... 0x2f36: 24 case 0x2f50: 25 case 0x2f54: 26 case 0x2f58 ... 0x2f5d: 27 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE, 28 0): 29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 30 0): 31 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE, 32 0): 33 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 34 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 35 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 36 RT722_SDCA_CTL_FU_MUTE, CH_R): 37 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D, 38 RT722_SDCA_CTL_SELECTED_MODE, 0): 39 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 40 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 41 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 42 RT722_SDCA_CTL_FU_MUTE, CH_R): 43 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 44 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 45 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 46 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 47 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, 48 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 49 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, 50 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 51 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 52 RT722_SDCA_CTL_FU_MUTE, CH_01) ... 53 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 54 RT722_SDCA_CTL_FU_MUTE, CH_04): 55 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, 56 RT722_SDCA_CTL_VENDOR_DEF, 0): 57 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 58 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 59 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, 60 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 61 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 62 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... 63 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 64 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 65 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 66 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 67 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 68 RT722_SDCA_CTL_FU_MUTE, CH_R): 69 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, 70 RT722_SDCA_CTL_VENDOR_DEF, CH_08): 71 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 72 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 73 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, 74 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 75 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 76 return 1; 77 case 0x2000000 ... 0x2000024: 78 case 0x2000029 ... 0x200004a: 79 case 0x2000051 ... 0x2000052: 80 case 0x200005a ... 0x200005b: 81 case 0x2000061 ... 0x2000069: 82 case 0x200006b: 83 case 0x2000070: 84 case 0x200007f: 85 case 0x2000082 ... 0x200008e: 86 case 0x2000090 ... 0x2000094: 87 case 0x3110000: 88 case 0x5300000 ... 0x5300002: 89 case 0x5400002: 90 case 0x5600000 ... 0x5600007: 91 case 0x5700000 ... 0x5700004: 92 case 0x5800000 ... 0x5800004: 93 case 0x5810000: 94 case 0x5b00003: 95 case 0x5c00011: 96 case 0x5d00006: 97 case 0x5f00000 ... 0x5f0000d: 98 case 0x5f00030: 99 case 0x6100000 ... 0x6100051: 100 case 0x6100055 ... 0x6100057: 101 case 0x6100060: 102 case 0x6100062: 103 case 0x6100064 ... 0x6100065: 104 case 0x6100067: 105 case 0x6100070 ... 0x610007c: 106 case 0x6100080: 107 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 108 CH_01) ... 109 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 110 CH_04): 111 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 112 CH_01): 113 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 114 CH_02): 115 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 116 CH_03): 117 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 118 CH_04): 119 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L): 120 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R): 121 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 122 CH_L): 123 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 124 CH_R): 125 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 126 CH_L): 127 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 128 CH_R): 129 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 130 RT722_SDCA_CTL_FU_CH_GAIN, CH_L): 131 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 132 RT722_SDCA_CTL_FU_CH_GAIN, CH_R): 133 return 2; 134 default: 135 return 0; 136 } 137 } 138 139 static struct regmap_sdw_mbq_cfg rt722_mbq_config = { 140 .mbq_size = rt722_sdca_mbq_size, 141 }; 142 143 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg) 144 { 145 return rt722_sdca_mbq_size(dev, reg) > 0; 146 } 147 148 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg) 149 { 150 switch (reg) { 151 case 0x2f01: 152 case 0x2f54: 153 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 154 0): 155 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 156 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 157 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 158 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 159 case 0x2000000: 160 case 0x200000d: 161 case 0x2000019: 162 case 0x2000020: 163 case 0x2000030: 164 case 0x2000046: 165 case 0x2000067: 166 case 0x2000084: 167 case 0x2000086: 168 case 0x3110000: 169 return true; 170 default: 171 return false; 172 } 173 } 174 175 static const struct regmap_config rt722_sdca_regmap = { 176 .reg_bits = 32, 177 .val_bits = 16, 178 .readable_reg = rt722_sdca_readable_register, 179 .volatile_reg = rt722_sdca_volatile_register, 180 .max_register = 0x44ffffff, 181 .reg_defaults = rt722_sdca_reg_defaults, 182 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults), 183 .cache_type = REGCACHE_MAPLE, 184 .use_single_read = true, 185 .use_single_write = true, 186 }; 187 188 static int rt722_sdca_update_status(struct sdw_slave *slave, 189 enum sdw_slave_status status) 190 { 191 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 192 193 if (status == SDW_SLAVE_UNATTACHED) 194 rt722->hw_init = false; 195 196 if (status == SDW_SLAVE_ATTACHED) { 197 if (rt722->hs_jack) { 198 /* 199 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then 200 * if the device attached again, we will need to set the setting back. 201 * It could avoid losing the jack detection interrupt. 202 * This also could sync with the cache value as the rt722_sdca_jack_init set. 203 */ 204 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1, 205 SDW_SCP_SDCA_INTMASK_SDCA_0); 206 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2, 207 SDW_SCP_SDCA_INTMASK_SDCA_8); 208 } 209 } 210 211 /* 212 * Perform initialization only if slave status is present and 213 * hw_init flag is false 214 */ 215 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED) 216 return 0; 217 218 /* perform I/O transfers required for Slave initialization */ 219 return rt722_sdca_io_init(&slave->dev, slave); 220 } 221 222 static int rt722_sdca_read_prop(struct sdw_slave *slave) 223 { 224 struct sdw_slave_prop *prop = &slave->prop; 225 int nval; 226 int i, j; 227 u32 bit; 228 unsigned long addr; 229 struct sdw_dpn_prop *dpn; 230 231 sdw_slave_read_lane_mapping(slave); 232 233 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; 234 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 235 236 prop->paging_support = true; 237 238 /* 239 * port = 1 for headphone playback 240 * port = 2 for headset-mic capture 241 * port = 3 for speaker playback 242 * port = 6 for digital-mic capture 243 */ 244 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */ 245 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */ 246 247 nval = hweight32(prop->source_ports); 248 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 249 sizeof(*prop->src_dpn_prop), GFP_KERNEL); 250 if (!prop->src_dpn_prop) 251 return -ENOMEM; 252 253 i = 0; 254 dpn = prop->src_dpn_prop; 255 addr = prop->source_ports; 256 for_each_set_bit(bit, &addr, 32) { 257 dpn[i].num = bit; 258 dpn[i].type = SDW_DPN_FULL; 259 dpn[i].simple_ch_prep_sm = true; 260 dpn[i].ch_prep_timeout = 10; 261 i++; 262 } 263 264 /* do this again for sink now */ 265 nval = hweight32(prop->sink_ports); 266 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 267 sizeof(*prop->sink_dpn_prop), GFP_KERNEL); 268 if (!prop->sink_dpn_prop) 269 return -ENOMEM; 270 271 j = 0; 272 dpn = prop->sink_dpn_prop; 273 addr = prop->sink_ports; 274 for_each_set_bit(bit, &addr, 32) { 275 dpn[j].num = bit; 276 dpn[j].type = SDW_DPN_FULL; 277 dpn[j].simple_ch_prep_sm = true; 278 dpn[j].ch_prep_timeout = 10; 279 j++; 280 } 281 282 /* set the timeout values */ 283 prop->clk_stop_timeout = 900; 284 285 /* wake-up event */ 286 prop->wake_capable = 1; 287 288 /* Three data lanes are supported by rt722-sdca codec */ 289 prop->lane_control_support = true; 290 291 return 0; 292 } 293 294 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave, 295 struct sdw_slave_intr_status *status) 296 { 297 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 298 int ret, stat; 299 int count = 0, retry = 3; 300 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0; 301 302 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) { 303 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__); 304 /* avoid the HID owner doesn't change to device */ 305 if (rt722->scp_sdca_stat2) 306 scp_sdca_stat2 = rt722->scp_sdca_stat2; 307 } 308 309 /* 310 * The critical section below intentionally protects a rather large piece of code. 311 * We don't want to allow the system suspend to disable an interrupt while we are 312 * processing it, which could be problematic given the quirky SoundWire interrupt 313 * scheme. We do want however to prevent new workqueues from being scheduled if 314 * the disable_irq flag was set during system suspend. 315 */ 316 mutex_lock(&rt722->disable_irq_lock); 317 318 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 319 if (ret < 0) 320 goto io_error; 321 rt722->scp_sdca_stat1 = ret; 322 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 323 if (ret < 0) 324 goto io_error; 325 rt722->scp_sdca_stat2 = ret; 326 if (scp_sdca_stat2) 327 rt722->scp_sdca_stat2 |= scp_sdca_stat2; 328 do { 329 /* clear flag */ 330 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 331 if (ret < 0) 332 goto io_error; 333 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) { 334 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1, 335 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0); 336 if (ret < 0) 337 goto io_error; 338 } 339 340 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 341 if (ret < 0) 342 goto io_error; 343 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) { 344 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2, 345 SDW_SCP_SDCA_INTMASK_SDCA_8); 346 if (ret < 0) 347 goto io_error; 348 } 349 350 /* check if flag clear or not */ 351 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT); 352 if (ret < 0) 353 goto io_error; 354 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 355 356 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 357 if (ret < 0) 358 goto io_error; 359 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0; 360 361 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 362 if (ret < 0) 363 goto io_error; 364 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8; 365 366 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade; 367 368 count++; 369 } while (stat != 0 && count < retry); 370 371 if (stat) 372 dev_warn(&slave->dev, 373 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 374 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2); 375 376 if (status->sdca_cascade && !rt722->disable_irq) 377 mod_delayed_work(system_power_efficient_wq, 378 &rt722->jack_detect_work, msecs_to_jiffies(280)); 379 380 mutex_unlock(&rt722->disable_irq_lock); 381 382 return 0; 383 384 io_error: 385 mutex_unlock(&rt722->disable_irq_lock); 386 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 387 return ret; 388 } 389 390 static const struct sdw_slave_ops rt722_sdca_slave_ops = { 391 .read_prop = rt722_sdca_read_prop, 392 .interrupt_callback = rt722_sdca_interrupt_callback, 393 .update_status = rt722_sdca_update_status, 394 }; 395 396 static int rt722_sdca_sdw_probe(struct sdw_slave *slave, 397 const struct sdw_device_id *id) 398 { 399 struct regmap *regmap; 400 401 /* Regmap Initialization */ 402 regmap = devm_regmap_init_sdw_mbq_cfg(slave, &rt722_sdca_regmap, &rt722_mbq_config); 403 if (IS_ERR(regmap)) 404 return PTR_ERR(regmap); 405 406 return rt722_sdca_init(&slave->dev, regmap, slave); 407 } 408 409 static int rt722_sdca_sdw_remove(struct sdw_slave *slave) 410 { 411 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 412 413 if (rt722->hw_init) { 414 cancel_delayed_work_sync(&rt722->jack_detect_work); 415 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 416 } 417 418 if (rt722->first_hw_init) 419 pm_runtime_disable(&slave->dev); 420 421 mutex_destroy(&rt722->calibrate_mutex); 422 mutex_destroy(&rt722->disable_irq_lock); 423 424 return 0; 425 } 426 427 static const struct sdw_device_id rt722_sdca_id[] = { 428 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0), 429 {}, 430 }; 431 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id); 432 433 static int rt722_sdca_dev_suspend(struct device *dev) 434 { 435 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 436 437 if (!rt722->hw_init) 438 return 0; 439 440 cancel_delayed_work_sync(&rt722->jack_detect_work); 441 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 442 443 regcache_cache_only(rt722->regmap, true); 444 445 return 0; 446 } 447 448 static int rt722_sdca_dev_system_suspend(struct device *dev) 449 { 450 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev); 451 struct sdw_slave *slave = dev_to_sdw_dev(dev); 452 int ret1, ret2; 453 454 if (!rt722_sdca->hw_init) 455 return 0; 456 457 /* 458 * prevent new interrupts from being handled after the 459 * deferred work completes and before the parent disables 460 * interrupts on the link 461 */ 462 mutex_lock(&rt722_sdca->disable_irq_lock); 463 rt722_sdca->disable_irq = true; 464 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1, 465 SDW_SCP_SDCA_INTMASK_SDCA_0, 0); 466 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2, 467 SDW_SCP_SDCA_INTMASK_SDCA_8, 0); 468 mutex_unlock(&rt722_sdca->disable_irq_lock); 469 470 if (ret1 < 0 || ret2 < 0) { 471 /* log but don't prevent suspend from happening */ 472 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__); 473 } 474 475 return rt722_sdca_dev_suspend(dev); 476 } 477 478 #define RT722_PROBE_TIMEOUT 5000 479 480 static int rt722_sdca_dev_resume(struct device *dev) 481 { 482 struct sdw_slave *slave = dev_to_sdw_dev(dev); 483 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 484 unsigned long time; 485 486 if (!rt722->first_hw_init) 487 return 0; 488 489 if (!slave->unattach_request) { 490 mutex_lock(&rt722->disable_irq_lock); 491 if (rt722->disable_irq == true) { 492 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 493 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 494 rt722->disable_irq = false; 495 } 496 mutex_unlock(&rt722->disable_irq_lock); 497 goto regmap_sync; 498 } 499 500 time = wait_for_completion_timeout(&slave->initialization_complete, 501 msecs_to_jiffies(RT722_PROBE_TIMEOUT)); 502 if (!time) { 503 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 504 sdw_show_ping_status(slave->bus, true); 505 506 return -ETIMEDOUT; 507 } 508 509 regmap_sync: 510 slave->unattach_request = 0; 511 regcache_cache_only(rt722->regmap, false); 512 regcache_sync(rt722->regmap); 513 return 0; 514 } 515 516 static const struct dev_pm_ops rt722_sdca_pm = { 517 SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume) 518 RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL) 519 }; 520 521 static struct sdw_driver rt722_sdca_sdw_driver = { 522 .driver = { 523 .name = "rt722-sdca", 524 .pm = pm_ptr(&rt722_sdca_pm), 525 }, 526 .probe = rt722_sdca_sdw_probe, 527 .remove = rt722_sdca_sdw_remove, 528 .ops = &rt722_sdca_slave_ops, 529 .id_table = rt722_sdca_id, 530 }; 531 module_sdw_driver(rt722_sdca_sdw_driver); 532 533 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver"); 534 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 535 MODULE_LICENSE("GPL"); 536