1*e8521822SAbhijit Gangurde /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*e8521822SAbhijit Gangurde /* Copyright (C) 2018-2025, Advanced Micro Devices, Inc */ 3*e8521822SAbhijit Gangurde 4*e8521822SAbhijit Gangurde #ifndef IONIC_ABI_H 5*e8521822SAbhijit Gangurde #define IONIC_ABI_H 6*e8521822SAbhijit Gangurde 7*e8521822SAbhijit Gangurde #include <linux/types.h> 8*e8521822SAbhijit Gangurde 9*e8521822SAbhijit Gangurde #define IONIC_ABI_VERSION 1 10*e8521822SAbhijit Gangurde 11*e8521822SAbhijit Gangurde #define IONIC_EXPDB_64 1 12*e8521822SAbhijit Gangurde #define IONIC_EXPDB_128 2 13*e8521822SAbhijit Gangurde #define IONIC_EXPDB_256 4 14*e8521822SAbhijit Gangurde #define IONIC_EXPDB_512 8 15*e8521822SAbhijit Gangurde 16*e8521822SAbhijit Gangurde #define IONIC_EXPDB_SQ 1 17*e8521822SAbhijit Gangurde #define IONIC_EXPDB_RQ 2 18*e8521822SAbhijit Gangurde 19*e8521822SAbhijit Gangurde #define IONIC_CMB_ENABLE 1 20*e8521822SAbhijit Gangurde #define IONIC_CMB_REQUIRE 2 21*e8521822SAbhijit Gangurde #define IONIC_CMB_EXPDB 4 22*e8521822SAbhijit Gangurde #define IONIC_CMB_WC 8 23*e8521822SAbhijit Gangurde #define IONIC_CMB_UC 16 24*e8521822SAbhijit Gangurde 25*e8521822SAbhijit Gangurde struct ionic_ctx_req { 26*e8521822SAbhijit Gangurde __u32 rsvd[2]; 27*e8521822SAbhijit Gangurde }; 28*e8521822SAbhijit Gangurde 29*e8521822SAbhijit Gangurde struct ionic_ctx_resp { 30*e8521822SAbhijit Gangurde __u32 rsvd; 31*e8521822SAbhijit Gangurde __u32 page_shift; 32*e8521822SAbhijit Gangurde 33*e8521822SAbhijit Gangurde __aligned_u64 dbell_offset; 34*e8521822SAbhijit Gangurde 35*e8521822SAbhijit Gangurde __u16 version; 36*e8521822SAbhijit Gangurde __u8 qp_opcodes; 37*e8521822SAbhijit Gangurde __u8 admin_opcodes; 38*e8521822SAbhijit Gangurde 39*e8521822SAbhijit Gangurde __u8 sq_qtype; 40*e8521822SAbhijit Gangurde __u8 rq_qtype; 41*e8521822SAbhijit Gangurde __u8 cq_qtype; 42*e8521822SAbhijit Gangurde __u8 admin_qtype; 43*e8521822SAbhijit Gangurde 44*e8521822SAbhijit Gangurde __u8 max_stride; 45*e8521822SAbhijit Gangurde __u8 max_spec; 46*e8521822SAbhijit Gangurde __u8 udma_count; 47*e8521822SAbhijit Gangurde __u8 expdb_mask; 48*e8521822SAbhijit Gangurde __u8 expdb_qtypes; 49*e8521822SAbhijit Gangurde 50*e8521822SAbhijit Gangurde __u8 rsvd2[3]; 51*e8521822SAbhijit Gangurde }; 52*e8521822SAbhijit Gangurde 53*e8521822SAbhijit Gangurde struct ionic_qdesc { 54*e8521822SAbhijit Gangurde __aligned_u64 addr; 55*e8521822SAbhijit Gangurde __u32 size; 56*e8521822SAbhijit Gangurde __u16 mask; 57*e8521822SAbhijit Gangurde __u8 depth_log2; 58*e8521822SAbhijit Gangurde __u8 stride_log2; 59*e8521822SAbhijit Gangurde }; 60*e8521822SAbhijit Gangurde 61*e8521822SAbhijit Gangurde struct ionic_ah_resp { 62*e8521822SAbhijit Gangurde __u32 ahid; 63*e8521822SAbhijit Gangurde __u32 pad; 64*e8521822SAbhijit Gangurde }; 65*e8521822SAbhijit Gangurde 66*e8521822SAbhijit Gangurde struct ionic_cq_req { 67*e8521822SAbhijit Gangurde struct ionic_qdesc cq[2]; 68*e8521822SAbhijit Gangurde __u8 udma_mask; 69*e8521822SAbhijit Gangurde __u8 rsvd[7]; 70*e8521822SAbhijit Gangurde }; 71*e8521822SAbhijit Gangurde 72*e8521822SAbhijit Gangurde struct ionic_cq_resp { 73*e8521822SAbhijit Gangurde __u32 cqid[2]; 74*e8521822SAbhijit Gangurde __u8 udma_mask; 75*e8521822SAbhijit Gangurde __u8 rsvd[7]; 76*e8521822SAbhijit Gangurde }; 77*e8521822SAbhijit Gangurde 78*e8521822SAbhijit Gangurde struct ionic_qp_req { 79*e8521822SAbhijit Gangurde struct ionic_qdesc sq; 80*e8521822SAbhijit Gangurde struct ionic_qdesc rq; 81*e8521822SAbhijit Gangurde __u8 sq_spec; 82*e8521822SAbhijit Gangurde __u8 rq_spec; 83*e8521822SAbhijit Gangurde __u8 sq_cmb; 84*e8521822SAbhijit Gangurde __u8 rq_cmb; 85*e8521822SAbhijit Gangurde __u8 udma_mask; 86*e8521822SAbhijit Gangurde __u8 rsvd[3]; 87*e8521822SAbhijit Gangurde }; 88*e8521822SAbhijit Gangurde 89*e8521822SAbhijit Gangurde struct ionic_qp_resp { 90*e8521822SAbhijit Gangurde __u32 qpid; 91*e8521822SAbhijit Gangurde __u8 sq_cmb; 92*e8521822SAbhijit Gangurde __u8 rq_cmb; 93*e8521822SAbhijit Gangurde __u8 udma_idx; 94*e8521822SAbhijit Gangurde __u8 rsvd[1]; 95*e8521822SAbhijit Gangurde __aligned_u64 sq_cmb_offset; 96*e8521822SAbhijit Gangurde __aligned_u64 rq_cmb_offset; 97*e8521822SAbhijit Gangurde }; 98*e8521822SAbhijit Gangurde 99*e8521822SAbhijit Gangurde struct ionic_srq_req { 100*e8521822SAbhijit Gangurde struct ionic_qdesc rq; 101*e8521822SAbhijit Gangurde __u8 rq_spec; 102*e8521822SAbhijit Gangurde __u8 rq_cmb; 103*e8521822SAbhijit Gangurde __u8 udma_mask; 104*e8521822SAbhijit Gangurde __u8 rsvd[5]; 105*e8521822SAbhijit Gangurde }; 106*e8521822SAbhijit Gangurde 107*e8521822SAbhijit Gangurde struct ionic_srq_resp { 108*e8521822SAbhijit Gangurde __u32 qpid; 109*e8521822SAbhijit Gangurde __u8 rq_cmb; 110*e8521822SAbhijit Gangurde __u8 udma_idx; 111*e8521822SAbhijit Gangurde __u8 rsvd[2]; 112*e8521822SAbhijit Gangurde __aligned_u64 rq_cmb_offset; 113*e8521822SAbhijit Gangurde }; 114*e8521822SAbhijit Gangurde 115*e8521822SAbhijit Gangurde #endif /* IONIC_ABI_H */ 116