1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2024 NXP 4 */ 5 6 #ifndef _SCMI_IMX_H 7 #define _SCMI_IMX_H 8 9 #include <linux/bitfield.h> 10 #include <linux/errno.h> 11 #include <linux/scmi_imx_protocol.h> 12 #include <linux/types.h> 13 14 #define SCMI_IMX95_CTRL_PDM_CLK_SEL 0 /* AON PDM clock sel */ 15 #define SCMI_IMX95_CTRL_MQS1_SETTINGS 1 /* AON MQS settings */ 16 #define SCMI_IMX95_CTRL_SAI1_MCLK 2 /* AON SAI1 MCLK */ 17 #define SCMI_IMX95_CTRL_SAI3_MCLK 3 /* WAKE SAI3 MCLK */ 18 #define SCMI_IMX95_CTRL_SAI4_MCLK 4 /* WAKE SAI4 MCLK */ 19 #define SCMI_IMX95_CTRL_SAI5_MCLK 5 /* WAKE SAI5 MCLK */ 20 21 #define SCMI_IMX94_CTRL_PDM_CLK_SEL 0U /*!< AON PDM clock sel */ 22 #define SCMI_IMX94_CTRL_MQS1_SETTINGS 1U /*!< AON MQS settings */ 23 #define SCMI_IMX94_CTRL_MQS2_SETTINGS 2U /*!< WAKE MQS settings */ 24 #define SCMI_IMX94_CTRL_SAI1_MCLK 3U /*!< AON SAI1 MCLK */ 25 #define SCMI_IMX94_CTRL_SAI2_MCLK 4U /*!< WAKE SAI2 MCLK */ 26 #define SCMI_IMX94_CTRL_SAI3_MCLK 5U /*!< WAKE SAI3 MCLK */ 27 #define SCMI_IMX94_CTRL_SAI4_MCLK 6U /*!< WAKE SAI4 MCLK */ 28 29 #if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV) 30 int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val); 31 int scmi_imx_misc_ctrl_set(u32 id, u32 val); 32 #else 33 static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val) 34 { 35 return -EOPNOTSUPP; 36 } 37 38 static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val) 39 { 40 return -EOPNOTSUPP; 41 } 42 #endif 43 44 #if IS_ENABLED(CONFIG_IMX_SCMI_CPU_DRV) 45 int scmi_imx_cpu_start(u32 cpuid, bool start); 46 int scmi_imx_cpu_started(u32 cpuid, bool *started); 47 int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot, 48 bool resume); 49 #else 50 static inline int scmi_imx_cpu_start(u32 cpuid, bool start) 51 { 52 return -EOPNOTSUPP; 53 } 54 55 static inline int scmi_imx_cpu_started(u32 cpuid, bool *started) 56 { 57 return -EOPNOTSUPP; 58 } 59 60 static inline int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, 61 bool boot, bool resume) 62 { 63 return -EOPNOTSUPP; 64 } 65 #endif 66 67 enum scmi_imx_lmm_op { 68 SCMI_IMX_LMM_BOOT, 69 SCMI_IMX_LMM_POWER_ON, 70 SCMI_IMX_LMM_SHUTDOWN, 71 }; 72 73 /* For shutdown pperation */ 74 #define SCMI_IMX_LMM_OP_FORCEFUL 0 75 #define SCMI_IMX_LMM_OP_GRACEFUL BIT(0) 76 77 #if IS_ENABLED(CONFIG_IMX_SCMI_LMM_DRV) 78 int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags); 79 int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info); 80 int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector); 81 #else 82 static inline int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags) 83 { 84 return -EOPNOTSUPP; 85 } 86 87 static inline int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info) 88 { 89 return -EOPNOTSUPP; 90 } 91 92 static inline int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector) 93 { 94 return -EOPNOTSUPP; 95 } 96 #endif 97 #endif 98