1*06b72824SJerome Brunet /* SPDX-License-Identifier: GPL-2.0 */ 2*06b72824SJerome Brunet #ifndef __DT_MESON_AIU_H 3*06b72824SJerome Brunet #define __DT_MESON_AIU_H 4*06b72824SJerome Brunet 5*06b72824SJerome Brunet #define AIU_CPU 0 6*06b72824SJerome Brunet #define AIU_HDMI 1 7*06b72824SJerome Brunet #define AIU_ACODEC 2 8*06b72824SJerome Brunet 9*06b72824SJerome Brunet #define CPU_I2S_FIFO 0 10*06b72824SJerome Brunet #define CPU_SPDIF_FIFO 1 11*06b72824SJerome Brunet #define CPU_I2S_ENCODER 2 12*06b72824SJerome Brunet #define CPU_SPDIF_ENCODER 3 13*06b72824SJerome Brunet 14*06b72824SJerome Brunet #define CTRL_I2S 0 15*06b72824SJerome Brunet #define CTRL_PCM 1 16*06b72824SJerome Brunet #define CTRL_OUT 2 17*06b72824SJerome Brunet 18*06b72824SJerome Brunet #endif /* __DT_MESON_AIU_H */ 19