xref: /linux/include/dt-bindings/interconnect/qcom,sm8450.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
10ae8c625SVinod Koul /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
20ae8c625SVinod Koul /*
30ae8c625SVinod Koul  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
40ae8c625SVinod Koul  * Copyright (c) 2021, Linaro Limited
50ae8c625SVinod Koul  */
60ae8c625SVinod Koul 
70ae8c625SVinod Koul #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8450_H
80ae8c625SVinod Koul #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8450_H
90ae8c625SVinod Koul 
100ae8c625SVinod Koul #define MASTER_QSPI_0				0
110ae8c625SVinod Koul #define MASTER_QUP_1				1
120ae8c625SVinod Koul #define MASTER_A1NOC_CFG			2
130ae8c625SVinod Koul #define MASTER_SDCC_4				3
140ae8c625SVinod Koul #define MASTER_UFS_MEM				4
150ae8c625SVinod Koul #define MASTER_USB3_0				5
160ae8c625SVinod Koul #define SLAVE_A1NOC_SNOC			6
170ae8c625SVinod Koul #define SLAVE_SERVICE_A1NOC			7
180ae8c625SVinod Koul 
190ae8c625SVinod Koul #define	MASTER_QDSS_BAM				0
200ae8c625SVinod Koul #define	MASTER_QUP_0				1
210ae8c625SVinod Koul #define	MASTER_QUP_2				2
220ae8c625SVinod Koul #define	MASTER_A2NOC_CFG			3
230ae8c625SVinod Koul #define	MASTER_CRYPTO				4
240ae8c625SVinod Koul #define	MASTER_IPA				5
250ae8c625SVinod Koul #define	MASTER_SENSORS_PROC			6
260ae8c625SVinod Koul #define	MASTER_SP				7
270ae8c625SVinod Koul #define	MASTER_QDSS_ETR				8
280ae8c625SVinod Koul #define	MASTER_QDSS_ETR_1			9
290ae8c625SVinod Koul #define	MASTER_SDCC_2				10
300ae8c625SVinod Koul #define	SLAVE_A2NOC_SNOC			11
310ae8c625SVinod Koul #define	SLAVE_SERVICE_A2NOC			12
320ae8c625SVinod Koul 
330ae8c625SVinod Koul #define MASTER_QUP_CORE_0			0
340ae8c625SVinod Koul #define MASTER_QUP_CORE_1			1
350ae8c625SVinod Koul #define MASTER_QUP_CORE_2			2
360ae8c625SVinod Koul #define SLAVE_QUP_CORE_0			3
370ae8c625SVinod Koul #define SLAVE_QUP_CORE_1			4
380ae8c625SVinod Koul #define SLAVE_QUP_CORE_2			5
390ae8c625SVinod Koul 
400ae8c625SVinod Koul #define	MASTER_GEM_NOC_CNOC			0
410ae8c625SVinod Koul #define	MASTER_GEM_NOC_PCIE_SNOC		1
420ae8c625SVinod Koul #define	SLAVE_AHB2PHY_SOUTH			2
430ae8c625SVinod Koul #define	SLAVE_AHB2PHY_NORTH			3
440ae8c625SVinod Koul #define	SLAVE_AOSS			        4
450ae8c625SVinod Koul #define	SLAVE_CAMERA_CFG			5
460ae8c625SVinod Koul #define	SLAVE_CLK_CTL			        6
470ae8c625SVinod Koul #define	SLAVE_CDSP_CFG			        7
480ae8c625SVinod Koul #define	SLAVE_RBCPR_CX_CFG			8
490ae8c625SVinod Koul #define	SLAVE_RBCPR_MMCX_CFG			9
500ae8c625SVinod Koul #define	SLAVE_RBCPR_MXA_CFG			10
510ae8c625SVinod Koul #define	SLAVE_RBCPR_MXC_CFG			11
520ae8c625SVinod Koul #define	SLAVE_CRYPTO_0_CFG			12
530ae8c625SVinod Koul #define	SLAVE_CX_RDPM				13
540ae8c625SVinod Koul #define	SLAVE_DISPLAY_CFG			14
550ae8c625SVinod Koul #define	SLAVE_GFX3D_CFG			        15
560ae8c625SVinod Koul #define	SLAVE_IMEM_CFG			        16
570ae8c625SVinod Koul #define	SLAVE_IPA_CFG			        17
580ae8c625SVinod Koul #define	SLAVE_IPC_ROUTER_CFG			18
590ae8c625SVinod Koul #define	SLAVE_LPASS			        19
600ae8c625SVinod Koul #define	SLAVE_CNOC_MSS			        20
610ae8c625SVinod Koul #define	SLAVE_MX_RDPM				21
620ae8c625SVinod Koul #define	SLAVE_PCIE_0_CFG			22
630ae8c625SVinod Koul #define	SLAVE_PCIE_1_CFG			23
640ae8c625SVinod Koul #define	SLAVE_PDM				24
650ae8c625SVinod Koul #define	SLAVE_PIMEM_CFG				25
660ae8c625SVinod Koul #define	SLAVE_PRNG				26
670ae8c625SVinod Koul #define	SLAVE_QDSS_CFG				27
680ae8c625SVinod Koul #define	SLAVE_QSPI_0				28
690ae8c625SVinod Koul #define	SLAVE_QUP_0				29
700ae8c625SVinod Koul #define	SLAVE_QUP_1				30
710ae8c625SVinod Koul #define	SLAVE_QUP_2				31
720ae8c625SVinod Koul #define	SLAVE_SDCC_2				32
730ae8c625SVinod Koul #define	SLAVE_SDCC_4				33
740ae8c625SVinod Koul #define	SLAVE_SPSS_CFG				34
750ae8c625SVinod Koul #define	SLAVE_TCSR				35
760ae8c625SVinod Koul #define	SLAVE_TLMM				36
770ae8c625SVinod Koul #define	SLAVE_TME_CFG				37
780ae8c625SVinod Koul #define	SLAVE_UFS_MEM_CFG			38
790ae8c625SVinod Koul #define	SLAVE_USB3_0				39
800ae8c625SVinod Koul #define	SLAVE_VENUS_CFG				40
810ae8c625SVinod Koul #define	SLAVE_VSENSE_CTRL_CFG			41
820ae8c625SVinod Koul #define	SLAVE_A1NOC_CFG				42
830ae8c625SVinod Koul #define	SLAVE_A2NOC_CFG				43
840ae8c625SVinod Koul #define	SLAVE_DDRSS_CFG				44
850ae8c625SVinod Koul #define	SLAVE_CNOC_MNOC_CFG			45
860ae8c625SVinod Koul #define	SLAVE_PCIE_ANOC_CFG			46
870ae8c625SVinod Koul #define	SLAVE_SNOC_CFG				47
880ae8c625SVinod Koul #define	SLAVE_IMEM				48
890ae8c625SVinod Koul #define	SLAVE_PIMEM				49
900ae8c625SVinod Koul #define	SLAVE_SERVICE_CNOC			50
910ae8c625SVinod Koul #define	SLAVE_PCIE_0				51
920ae8c625SVinod Koul #define	SLAVE_PCIE_1				52
930ae8c625SVinod Koul #define	SLAVE_QDSS_STM				53
940ae8c625SVinod Koul #define	SLAVE_TCU				54
950ae8c625SVinod Koul 
960ae8c625SVinod Koul #define MASTER_GPU_TCU				0
970ae8c625SVinod Koul #define MASTER_SYS_TCU				1
980ae8c625SVinod Koul #define MASTER_APPSS_PROC			2
990ae8c625SVinod Koul #define MASTER_GFX3D				3
1000ae8c625SVinod Koul #define MASTER_MSS_PROC				4
1010ae8c625SVinod Koul #define MASTER_MNOC_HF_MEM_NOC			5
1020ae8c625SVinod Koul #define MASTER_MNOC_SF_MEM_NOC			6
1030ae8c625SVinod Koul #define MASTER_COMPUTE_NOC			7
1040ae8c625SVinod Koul #define MASTER_ANOC_PCIE_GEM_NOC		8
1050ae8c625SVinod Koul #define MASTER_SNOC_GC_MEM_NOC			9
1060ae8c625SVinod Koul #define MASTER_SNOC_SF_MEM_NOC			10
1070ae8c625SVinod Koul #define SLAVE_GEM_NOC_CNOC			11
1080ae8c625SVinod Koul #define SLAVE_LLCC				12
1090ae8c625SVinod Koul #define SLAVE_MEM_NOC_PCIE_SNOC			13
1100ae8c625SVinod Koul #define MASTER_MNOC_HF_MEM_NOC_DISP		14
1110ae8c625SVinod Koul #define MASTER_MNOC_SF_MEM_NOC_DISP		15
1120ae8c625SVinod Koul #define MASTER_ANOC_PCIE_GEM_NOC_DISP		16
1130ae8c625SVinod Koul #define SLAVE_LLCC_DISP				17
1140ae8c625SVinod Koul 
1150ae8c625SVinod Koul #define MASTER_CNOC_LPASS_AG_NOC		0
1160ae8c625SVinod Koul #define MASTER_LPASS_PROC			1
1170ae8c625SVinod Koul #define SLAVE_LPASS_CORE_CFG			2
1180ae8c625SVinod Koul #define SLAVE_LPASS_LPI_CFG			3
1190ae8c625SVinod Koul #define SLAVE_LPASS_MPU_CFG			4
1200ae8c625SVinod Koul #define SLAVE_LPASS_TOP_CFG			5
1210ae8c625SVinod Koul #define SLAVE_LPASS_SNOC			6
1220ae8c625SVinod Koul #define SLAVE_SERVICES_LPASS_AML_NOC		7
1230ae8c625SVinod Koul #define SLAVE_SERVICE_LPASS_AG_NOC		8
1240ae8c625SVinod Koul 
1250ae8c625SVinod Koul #define MASTER_LLCC				0
1260ae8c625SVinod Koul #define SLAVE_EBI1				1
1270ae8c625SVinod Koul #define MASTER_LLCC_DISP			2
1280ae8c625SVinod Koul #define SLAVE_EBI1_DISP				3
1290ae8c625SVinod Koul 
1300ae8c625SVinod Koul #define MASTER_CAMNOC_HF			0
1310ae8c625SVinod Koul #define MASTER_CAMNOC_ICP			1
1320ae8c625SVinod Koul #define MASTER_CAMNOC_SF			2
1330ae8c625SVinod Koul #define MASTER_MDP				3
1340ae8c625SVinod Koul #define MASTER_CNOC_MNOC_CFG			4
1350ae8c625SVinod Koul #define MASTER_ROTATOR				5
1360ae8c625SVinod Koul #define MASTER_CDSP_HCP				6
1370ae8c625SVinod Koul #define MASTER_VIDEO				7
1380ae8c625SVinod Koul #define MASTER_VIDEO_CV_PROC			8
1390ae8c625SVinod Koul #define MASTER_VIDEO_PROC			9
1400ae8c625SVinod Koul #define MASTER_VIDEO_V_PROC			10
1410ae8c625SVinod Koul #define SLAVE_MNOC_HF_MEM_NOC			11
1420ae8c625SVinod Koul #define SLAVE_MNOC_SF_MEM_NOC			12
1430ae8c625SVinod Koul #define SLAVE_SERVICE_MNOC			13
1440ae8c625SVinod Koul #define MASTER_MDP_DISP				14
1450ae8c625SVinod Koul #define MASTER_ROTATOR_DISP			15
1460ae8c625SVinod Koul #define SLAVE_MNOC_HF_MEM_NOC_DISP		16
1470ae8c625SVinod Koul #define SLAVE_MNOC_SF_MEM_NOC_DISP		17
1480ae8c625SVinod Koul 
1490ae8c625SVinod Koul #define MASTER_CDSP_NOC_CFG			0
1500ae8c625SVinod Koul #define MASTER_CDSP_PROC			1
1510ae8c625SVinod Koul #define SLAVE_CDSP_MEM_NOC			2
1520ae8c625SVinod Koul #define SLAVE_SERVICE_NSP_NOC			3
1530ae8c625SVinod Koul 
1540ae8c625SVinod Koul #define MASTER_PCIE_ANOC_CFG			0
1550ae8c625SVinod Koul #define MASTER_PCIE_0				1
1560ae8c625SVinod Koul #define MASTER_PCIE_1				2
1570ae8c625SVinod Koul #define SLAVE_ANOC_PCIE_GEM_NOC			3
1580ae8c625SVinod Koul #define SLAVE_SERVICE_PCIE_ANOC			4
1590ae8c625SVinod Koul 
1600ae8c625SVinod Koul #define MASTER_GIC_AHB				0
1610ae8c625SVinod Koul #define MASTER_A1NOC_SNOC			1
1620ae8c625SVinod Koul #define MASTER_A2NOC_SNOC			2
1630ae8c625SVinod Koul #define MASTER_LPASS_ANOC			3
1640ae8c625SVinod Koul #define MASTER_SNOC_CFG				4
1650ae8c625SVinod Koul #define MASTER_PIMEM				5
1660ae8c625SVinod Koul #define MASTER_GIC				6
1670ae8c625SVinod Koul #define SLAVE_SNOC_GEM_NOC_GC			7
1680ae8c625SVinod Koul #define SLAVE_SNOC_GEM_NOC_SF			8
1690ae8c625SVinod Koul #define SLAVE_SERVICE_SNOC			9
1700ae8c625SVinod Koul 
1710ae8c625SVinod Koul #endif
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