1*4cb21b9eSSiarhei Volkau /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*4cb21b9eSSiarhei Volkau /* 3*4cb21b9eSSiarhei Volkau * This header provides clock numbers for the ingenic,jz4755-cgu DT binding. 4*4cb21b9eSSiarhei Volkau */ 5*4cb21b9eSSiarhei Volkau 6*4cb21b9eSSiarhei Volkau #ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ 7*4cb21b9eSSiarhei Volkau #define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ 8*4cb21b9eSSiarhei Volkau 9*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_EXT 0 10*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_OSC32K 1 11*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_PLL 2 12*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_PLL_HALF 3 13*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_EXT_HALF 4 14*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_CCLK 5 15*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_H0CLK 6 16*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_PCLK 7 17*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_MCLK 8 18*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_H1CLK 9 19*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_UDC 10 20*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_LCD 11 21*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_UART0 12 22*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_UART1 13 23*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_UART2 14 24*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_DMA 15 25*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_MMC 16 26*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_MMC0 17 27*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_MMC1 18 28*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_EXT512 19 29*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_RTC 20 30*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_UDC_PHY 21 31*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_I2S 22 32*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_SPI 23 33*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_AIC 24 34*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_ADC 25 35*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_TCU 26 36*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_BCH 27 37*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_I2C 28 38*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_TVE 29 39*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_CIM 30 40*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_AUX_CPU 31 41*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_AHB1 32 42*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_IDCT 33 43*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_DB 34 44*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_ME 35 45*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_MC 36 46*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_TSSI 37 47*4cb21b9eSSiarhei Volkau #define JZ4755_CLK_IPU 38 48*4cb21b9eSSiarhei Volkau 49*4cb21b9eSSiarhei Volkau #endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */ 50