1a636cd6cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 27e682b44SBoris BREZILLON /* 37e682b44SBoris BREZILLON * This header provides constants for AT91 pmc status. 47e682b44SBoris BREZILLON * 57e682b44SBoris BREZILLON * The constants defined in this header are being used in dts. 67e682b44SBoris BREZILLON */ 77e682b44SBoris BREZILLON 87e682b44SBoris BREZILLON #ifndef _DT_BINDINGS_CLK_AT91_H 97e682b44SBoris BREZILLON #define _DT_BINDINGS_CLK_AT91_H 107e682b44SBoris BREZILLON 11d387ff54SAlexandre Belloni #define PMC_TYPE_CORE 0 12d387ff54SAlexandre Belloni #define PMC_TYPE_SYSTEM 1 13d387ff54SAlexandre Belloni #define PMC_TYPE_PERIPHERAL 2 14d387ff54SAlexandre Belloni #define PMC_TYPE_GCK 3 1599767cd4SMichał Mirosław #define PMC_TYPE_PROGRAMMABLE 4 16d387ff54SAlexandre Belloni 17d387ff54SAlexandre Belloni #define PMC_SLOW 0 18d387ff54SAlexandre Belloni #define PMC_MCK 1 19d387ff54SAlexandre Belloni #define PMC_UTMI 2 20d387ff54SAlexandre Belloni #define PMC_MAIN 3 21d387ff54SAlexandre Belloni #define PMC_MCK2 4 22d387ff54SAlexandre Belloni #define PMC_I2S0_MUX 5 23d387ff54SAlexandre Belloni #define PMC_I2S1_MUX 6 2403a1ee1dSMichał Mirosław #define PMC_PLLACK 7 2503a1ee1dSMichał Mirosław #define PMC_PLLBCK 8 2603a1ee1dSMichał Mirosław #define PMC_AUDIOPLLCK 9 27ea2be22fSZixun LI #define PMC_AUDIOPINCK 10 28d387ff54SAlexandre Belloni 293d86ee17SEugen Hristev /* SAMA7G5 */ 303d86ee17SEugen Hristev #define PMC_CPUPLL (PMC_MAIN + 1) 313d86ee17SEugen Hristev #define PMC_SYSPLL (PMC_MAIN + 2) 323d86ee17SEugen Hristev #define PMC_DDRPLL (PMC_MAIN + 3) 333d86ee17SEugen Hristev #define PMC_IMGPLL (PMC_MAIN + 4) 343d86ee17SEugen Hristev #define PMC_BAUDPLL (PMC_MAIN + 5) 353d86ee17SEugen Hristev #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) 363d86ee17SEugen Hristev #define PMC_AUDIOIOPLL (PMC_MAIN + 7) 373d86ee17SEugen Hristev #define PMC_ETHPLL (PMC_MAIN + 8) 3891f3bf0dSClaudiu Beznea #define PMC_CPU (PMC_MAIN + 9) 39a5ab04afSTudor Ambarus #define PMC_MCK1 (PMC_MAIN + 10) 403d86ee17SEugen Hristev 41d387ff54SAlexandre Belloni #ifndef AT91_PMC_MOSCS 427e682b44SBoris BREZILLON #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 437e682b44SBoris BREZILLON #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 447e682b44SBoris BREZILLON #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 457e682b44SBoris BREZILLON #define AT91_PMC_MCKRDY 3 /* Master Clock */ 467e682b44SBoris BREZILLON #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 477e682b44SBoris BREZILLON #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 487e682b44SBoris BREZILLON #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 497e682b44SBoris BREZILLON #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 507e682b44SBoris BREZILLON #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 51a5752e57SNicolas Ferre #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 52d387ff54SAlexandre Belloni #endif 537e682b44SBoris BREZILLON 547e682b44SBoris BREZILLON #endif 55