1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 #include <linux/completion.h> 30 #include <linux/xarray.h> 31 #include <linux/workqueue.h> 32 33 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 34 35 /** 36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prevent dependency pipelining 37 * 38 * Setting this flag on a scheduler fence prevents pipelining of jobs depending 39 * on this fence. In other words we always insert a full CPU round trip before 40 * dependent jobs are pushed to the hw queue. 41 */ 42 #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS 43 44 /** 45 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set 46 * 47 * Because we could have a deadline hint can be set before the backing hw 48 * fence is created, we need to keep track of whether a deadline has already 49 * been set. 50 */ 51 #define DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT (DMA_FENCE_FLAG_USER_BITS + 1) 52 53 enum dma_resv_usage; 54 struct dma_resv; 55 struct drm_gem_object; 56 57 struct drm_gpu_scheduler; 58 struct drm_sched_rq; 59 60 struct drm_file; 61 62 /* These are often used as an (initial) index 63 * to an array, and as such should start at 0. 64 */ 65 enum drm_sched_priority { 66 DRM_SCHED_PRIORITY_KERNEL, 67 DRM_SCHED_PRIORITY_HIGH, 68 DRM_SCHED_PRIORITY_NORMAL, 69 DRM_SCHED_PRIORITY_LOW, 70 71 DRM_SCHED_PRIORITY_COUNT 72 }; 73 74 /** 75 * struct drm_sched_entity - A wrapper around a job queue (typically 76 * attached to the DRM file_priv). 77 * 78 * Entities will emit jobs in order to their corresponding hardware 79 * ring, and the scheduler will alternate between entities based on 80 * scheduling policy. 81 */ 82 struct drm_sched_entity { 83 /** 84 * @list: 85 * 86 * Used to append this struct to the list of entities in the runqueue 87 * @rq under &drm_sched_rq.entities. 88 * 89 * Protected by &drm_sched_rq.lock of @rq. 90 */ 91 struct list_head list; 92 93 /** 94 * @lock: 95 * 96 * Lock protecting the run-queue (@rq) to which this entity belongs, 97 * @priority and the list of schedulers (@sched_list, @num_sched_list). 98 */ 99 spinlock_t lock; 100 101 /** 102 * @rq: 103 * 104 * Runqueue on which this entity is currently scheduled. 105 * 106 * FIXME: Locking is very unclear for this. Writers are protected by 107 * @lock, but readers are generally lockless and seem to just race with 108 * not even a READ_ONCE. 109 */ 110 struct drm_sched_rq *rq; 111 112 /** 113 * @sched_list: 114 * 115 * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can 116 * be scheduled on any scheduler on this list. 117 * 118 * This can be modified by calling drm_sched_entity_modify_sched(). 119 * Locking is entirely up to the driver, see the above function for more 120 * details. 121 * 122 * This will be set to NULL if &num_sched_list equals 1 and @rq has been 123 * set already. 124 * 125 * FIXME: This means priority changes through 126 * drm_sched_entity_set_priority() will be lost henceforth in this case. 127 */ 128 struct drm_gpu_scheduler **sched_list; 129 130 /** 131 * @num_sched_list: 132 * 133 * Number of drm_gpu_schedulers in the @sched_list. 134 */ 135 unsigned int num_sched_list; 136 137 /** 138 * @priority: 139 * 140 * Priority of the entity. This can be modified by calling 141 * drm_sched_entity_set_priority(). Protected by @lock. 142 */ 143 enum drm_sched_priority priority; 144 145 /** 146 * @job_queue: the list of jobs of this entity. 147 */ 148 struct spsc_queue job_queue; 149 150 /** 151 * @fence_seq: 152 * 153 * A linearly increasing seqno incremented with each new 154 * &drm_sched_fence which is part of the entity. 155 * 156 * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking, 157 * this doesn't need to be atomic. 158 */ 159 atomic_t fence_seq; 160 161 /** 162 * @fence_context: 163 * 164 * A unique context for all the fences which belong to this entity. The 165 * &drm_sched_fence.scheduled uses the fence_context but 166 * &drm_sched_fence.finished uses fence_context + 1. 167 */ 168 uint64_t fence_context; 169 170 /** 171 * @dependency: 172 * 173 * The dependency fence of the job which is on the top of the job queue. 174 */ 175 struct dma_fence *dependency; 176 177 /** 178 * @cb: 179 * 180 * Callback for the dependency fence above. 181 */ 182 struct dma_fence_cb cb; 183 184 /** 185 * @guilty: 186 * 187 * Points to entities' guilty. 188 */ 189 atomic_t *guilty; 190 191 /** 192 * @last_scheduled: 193 * 194 * Points to the finished fence of the last scheduled job. Only written 195 * by the scheduler thread, can be accessed locklessly from 196 * drm_sched_job_arm() if the queue is empty. 197 */ 198 struct dma_fence __rcu *last_scheduled; 199 200 /** 201 * @last_user: last group leader pushing a job into the entity. 202 */ 203 struct task_struct *last_user; 204 205 /** 206 * @stopped: 207 * 208 * Marks the enity as removed from rq and destined for 209 * termination. This is set by calling drm_sched_entity_flush() and by 210 * drm_sched_fini(). 211 */ 212 bool stopped; 213 214 /** 215 * @entity_idle: 216 * 217 * Signals when entity is not in use, used to sequence entity cleanup in 218 * drm_sched_entity_fini(). 219 */ 220 struct completion entity_idle; 221 222 /** 223 * @oldest_job_waiting: 224 * 225 * Marks earliest job waiting in SW queue 226 */ 227 ktime_t oldest_job_waiting; 228 229 /** 230 * @rb_tree_node: 231 * 232 * The node used to insert this entity into time based priority queue 233 */ 234 struct rb_node rb_tree_node; 235 236 }; 237 238 /** 239 * struct drm_sched_rq - queue of entities to be scheduled. 240 * 241 * @sched: the scheduler to which this rq belongs to. 242 * @lock: protects @entities, @rb_tree_root and @current_entity. 243 * @current_entity: the entity which is to be scheduled. 244 * @entities: list of the entities to be scheduled. 245 * @rb_tree_root: root of time based priority queue of entities for FIFO scheduling 246 * 247 * Run queue is a set of entities scheduling command submissions for 248 * one specific ring. It implements the scheduling policy that selects 249 * the next entity to emit commands from. 250 */ 251 struct drm_sched_rq { 252 struct drm_gpu_scheduler *sched; 253 254 spinlock_t lock; 255 /* Following members are protected by the @lock: */ 256 struct drm_sched_entity *current_entity; 257 struct list_head entities; 258 struct rb_root_cached rb_tree_root; 259 }; 260 261 /** 262 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 263 */ 264 struct drm_sched_fence { 265 /** 266 * @scheduled: this fence is what will be signaled by the scheduler 267 * when the job is scheduled. 268 */ 269 struct dma_fence scheduled; 270 271 /** 272 * @finished: this fence is what will be signaled by the scheduler 273 * when the job is completed. 274 * 275 * When setting up an out fence for the job, you should use 276 * this, since it's available immediately upon 277 * drm_sched_job_init(), and the fence returned by the driver 278 * from run_job() won't be created until the dependencies have 279 * resolved. 280 */ 281 struct dma_fence finished; 282 283 /** 284 * @deadline: deadline set on &drm_sched_fence.finished which 285 * potentially needs to be propagated to &drm_sched_fence.parent 286 */ 287 ktime_t deadline; 288 289 /** 290 * @parent: the fence returned by &drm_sched_backend_ops.run_job 291 * when scheduling the job on hardware. We signal the 292 * &drm_sched_fence.finished fence once parent is signalled. 293 */ 294 struct dma_fence *parent; 295 /** 296 * @sched: the scheduler instance to which the job having this struct 297 * belongs to. 298 */ 299 struct drm_gpu_scheduler *sched; 300 /** 301 * @lock: the lock used by the scheduled and the finished fences. 302 */ 303 spinlock_t lock; 304 /** 305 * @owner: job owner for debugging 306 */ 307 void *owner; 308 }; 309 310 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 311 312 /** 313 * struct drm_sched_job - A job to be run by an entity. 314 * 315 * @queue_node: used to append this struct to the queue of jobs in an entity. 316 * @list: a job participates in a "pending" and "done" lists. 317 * @sched: the scheduler instance on which this job is scheduled. 318 * @s_fence: contains the fences for the scheduling of job. 319 * @finish_cb: the callback for the finished fence. 320 * @credits: the number of credits this job contributes to the scheduler 321 * @work: Helper to reschedule job kill to different context. 322 * @id: a unique id assigned to each job scheduled on the scheduler. 323 * @karma: increment on every hang caused by this job. If this exceeds the hang 324 * limit of the scheduler then the job is marked guilty and will not 325 * be scheduled further. 326 * @s_priority: the priority of the job. 327 * @entity: the entity to which this job belongs. 328 * @cb: the callback for the parent fence in s_fence. 329 * 330 * A job is created by the driver using drm_sched_job_init(), and 331 * should call drm_sched_entity_push_job() once it wants the scheduler 332 * to schedule the job. 333 */ 334 struct drm_sched_job { 335 u64 id; 336 337 /** 338 * @submit_ts: 339 * 340 * When the job was pushed into the entity queue. 341 */ 342 ktime_t submit_ts; 343 344 /** 345 * @sched: 346 * 347 * The scheduler this job is or will be scheduled on. Gets set by 348 * drm_sched_job_arm(). Valid until drm_sched_backend_ops.free_job() 349 * has finished. 350 */ 351 struct drm_gpu_scheduler *sched; 352 353 struct drm_sched_fence *s_fence; 354 struct drm_sched_entity *entity; 355 356 enum drm_sched_priority s_priority; 357 u32 credits; 358 /** @last_dependency: tracks @dependencies as they signal */ 359 unsigned int last_dependency; 360 atomic_t karma; 361 362 struct spsc_node queue_node; 363 struct list_head list; 364 365 /* 366 * work is used only after finish_cb has been used and will not be 367 * accessed anymore. 368 */ 369 union { 370 struct dma_fence_cb finish_cb; 371 struct work_struct work; 372 }; 373 374 struct dma_fence_cb cb; 375 376 /** 377 * @dependencies: 378 * 379 * Contains the dependencies as struct dma_fence for this job, see 380 * drm_sched_job_add_dependency() and 381 * drm_sched_job_add_implicit_dependencies(). 382 */ 383 struct xarray dependencies; 384 }; 385 386 enum drm_gpu_sched_stat { 387 DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */ 388 DRM_GPU_SCHED_STAT_NOMINAL, 389 DRM_GPU_SCHED_STAT_ENODEV, 390 }; 391 392 /** 393 * struct drm_sched_backend_ops - Define the backend operations 394 * called by the scheduler 395 * 396 * These functions should be implemented in the driver side. 397 */ 398 struct drm_sched_backend_ops { 399 /** 400 * @prepare_job: 401 * 402 * Called when the scheduler is considering scheduling this job next, to 403 * get another struct dma_fence for this job to block on. Once it 404 * returns NULL, run_job() may be called. 405 * 406 * Can be NULL if no additional preparation to the dependencies are 407 * necessary. Skipped when jobs are killed instead of run. 408 */ 409 struct dma_fence *(*prepare_job)(struct drm_sched_job *sched_job, 410 struct drm_sched_entity *s_entity); 411 412 /** 413 * @run_job: Called to execute the job once all of the dependencies 414 * have been resolved. This may be called multiple times, if 415 * timedout_job() has happened and drm_sched_job_recovery() 416 * decides to try it again. 417 */ 418 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 419 420 /** 421 * @timedout_job: Called when a job has taken too long to execute, 422 * to trigger GPU recovery. 423 * 424 * This method is called in a workqueue context. 425 * 426 * Drivers typically issue a reset to recover from GPU hangs, and this 427 * procedure usually follows the following workflow: 428 * 429 * 1. Stop the scheduler using drm_sched_stop(). This will park the 430 * scheduler thread and cancel the timeout work, guaranteeing that 431 * nothing is queued while we reset the hardware queue 432 * 2. Try to gracefully stop non-faulty jobs (optional) 433 * 3. Issue a GPU reset (driver-specific) 434 * 4. Re-submit jobs using drm_sched_resubmit_jobs() 435 * 5. Restart the scheduler using drm_sched_start(). At that point, new 436 * jobs can be queued, and the scheduler thread is unblocked 437 * 438 * Note that some GPUs have distinct hardware queues but need to reset 439 * the GPU globally, which requires extra synchronization between the 440 * timeout handler of the different &drm_gpu_scheduler. One way to 441 * achieve this synchronization is to create an ordered workqueue 442 * (using alloc_ordered_workqueue()) at the driver level, and pass this 443 * queue to drm_sched_init(), to guarantee that timeout handlers are 444 * executed sequentially. The above workflow needs to be slightly 445 * adjusted in that case: 446 * 447 * 1. Stop all schedulers impacted by the reset using drm_sched_stop() 448 * 2. Try to gracefully stop non-faulty jobs on all queues impacted by 449 * the reset (optional) 450 * 3. Issue a GPU reset on all faulty queues (driver-specific) 451 * 4. Re-submit jobs on all schedulers impacted by the reset using 452 * drm_sched_resubmit_jobs() 453 * 5. Restart all schedulers that were stopped in step #1 using 454 * drm_sched_start() 455 * 456 * Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal, 457 * and the underlying driver has started or completed recovery. 458 * 459 * Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer 460 * available, i.e. has been unplugged. 461 */ 462 enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job); 463 464 /** 465 * @free_job: Called once the job's finished fence has been signaled 466 * and it's time to clean it up. 467 */ 468 void (*free_job)(struct drm_sched_job *sched_job); 469 }; 470 471 /** 472 * struct drm_gpu_scheduler - scheduler instance-specific data 473 * 474 * @ops: backend operations provided by the driver. 475 * @credit_limit: the credit limit of this scheduler 476 * @credit_count: the current credit count of this scheduler 477 * @timeout: the time after which a job is removed from the scheduler. 478 * @name: name of the ring for which this scheduler is being used. 479 * @num_rqs: Number of run-queues. This is at most DRM_SCHED_PRIORITY_COUNT, 480 * as there's usually one run-queue per priority, but could be less. 481 * @sched_rq: An allocated array of run-queues of size @num_rqs; 482 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 483 * waits on this wait queue until all the scheduled jobs are 484 * finished. 485 * @job_id_count: used to assign unique id to the each job. 486 * @submit_wq: workqueue used to queue @work_run_job and @work_free_job 487 * @timeout_wq: workqueue used to queue @work_tdr 488 * @work_run_job: work which calls run_job op of each scheduler. 489 * @work_free_job: work which calls free_job op of each scheduler. 490 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the 491 * timeout interval is over. 492 * @pending_list: the list of jobs which are currently in the job queue. 493 * @job_list_lock: lock to protect the pending_list. 494 * @hang_limit: once the hangs by a job crosses this limit then it is marked 495 * guilty and it will no longer be considered for scheduling. 496 * @score: score to help loadbalancer pick a idle sched 497 * @_score: score used when the driver doesn't provide one 498 * @ready: marks if the underlying HW is ready to work 499 * @free_guilty: A hit to time out handler to free the guilty job. 500 * @pause_submit: pause queuing of @work_run_job on @submit_wq 501 * @own_submit_wq: scheduler owns allocation of @submit_wq 502 * @dev: system &struct device 503 * 504 * One scheduler is implemented for each hardware ring. 505 */ 506 struct drm_gpu_scheduler { 507 const struct drm_sched_backend_ops *ops; 508 u32 credit_limit; 509 atomic_t credit_count; 510 long timeout; 511 const char *name; 512 u32 num_rqs; 513 struct drm_sched_rq **sched_rq; 514 wait_queue_head_t job_scheduled; 515 atomic64_t job_id_count; 516 struct workqueue_struct *submit_wq; 517 struct workqueue_struct *timeout_wq; 518 struct work_struct work_run_job; 519 struct work_struct work_free_job; 520 struct delayed_work work_tdr; 521 struct list_head pending_list; 522 spinlock_t job_list_lock; 523 int hang_limit; 524 atomic_t *score; 525 atomic_t _score; 526 bool ready; 527 bool free_guilty; 528 bool pause_submit; 529 bool own_submit_wq; 530 struct device *dev; 531 }; 532 533 /** 534 * struct drm_sched_init_args - parameters for initializing a DRM GPU scheduler 535 * 536 * @ops: backend operations provided by the driver 537 * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is 538 * allocated and used. 539 * @num_rqs: Number of run-queues. This may be at most DRM_SCHED_PRIORITY_COUNT, 540 * as there's usually one run-queue per priority, but may be less. 541 * @credit_limit: the number of credits this scheduler can hold from all jobs 542 * @hang_limit: number of times to allow a job to hang before dropping it. 543 * This mechanism is DEPRECATED. Set it to 0. 544 * @timeout: timeout value in jiffies for submitted jobs. 545 * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq is used. 546 * @score: score atomic shared with other schedulers. May be NULL. 547 * @name: name (typically the driver's name). Used for debugging 548 * @dev: associated device. Used for debugging 549 */ 550 struct drm_sched_init_args { 551 const struct drm_sched_backend_ops *ops; 552 struct workqueue_struct *submit_wq; 553 struct workqueue_struct *timeout_wq; 554 u32 num_rqs; 555 u32 credit_limit; 556 unsigned int hang_limit; 557 long timeout; 558 atomic_t *score; 559 const char *name; 560 struct device *dev; 561 }; 562 563 /* Scheduler operations */ 564 565 int drm_sched_init(struct drm_gpu_scheduler *sched, 566 const struct drm_sched_init_args *args); 567 568 void drm_sched_fini(struct drm_gpu_scheduler *sched); 569 570 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched); 571 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched, 572 unsigned long remaining); 573 void drm_sched_tdr_queue_imm(struct drm_gpu_scheduler *sched); 574 bool drm_sched_wqueue_ready(struct drm_gpu_scheduler *sched); 575 void drm_sched_wqueue_stop(struct drm_gpu_scheduler *sched); 576 void drm_sched_wqueue_start(struct drm_gpu_scheduler *sched); 577 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad); 578 void drm_sched_start(struct drm_gpu_scheduler *sched, int errno); 579 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched); 580 void drm_sched_fault(struct drm_gpu_scheduler *sched); 581 582 struct drm_gpu_scheduler * 583 drm_sched_pick_best(struct drm_gpu_scheduler **sched_list, 584 unsigned int num_sched_list); 585 586 /* Jobs */ 587 588 int drm_sched_job_init(struct drm_sched_job *job, 589 struct drm_sched_entity *entity, 590 u32 credits, void *owner); 591 void drm_sched_job_arm(struct drm_sched_job *job); 592 void drm_sched_entity_push_job(struct drm_sched_job *sched_job); 593 int drm_sched_job_add_dependency(struct drm_sched_job *job, 594 struct dma_fence *fence); 595 int drm_sched_job_add_syncobj_dependency(struct drm_sched_job *job, 596 struct drm_file *file, 597 u32 handle, 598 u32 point); 599 int drm_sched_job_add_resv_dependencies(struct drm_sched_job *job, 600 struct dma_resv *resv, 601 enum dma_resv_usage usage); 602 int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job, 603 struct drm_gem_object *obj, 604 bool write); 605 bool drm_sched_job_has_dependency(struct drm_sched_job *job, 606 struct dma_fence *fence); 607 void drm_sched_job_cleanup(struct drm_sched_job *job); 608 void drm_sched_increase_karma(struct drm_sched_job *bad); 609 610 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 611 int threshold) 612 { 613 return s_job && atomic_inc_return(&s_job->karma) > threshold; 614 } 615 616 /* Entities */ 617 618 int drm_sched_entity_init(struct drm_sched_entity *entity, 619 enum drm_sched_priority priority, 620 struct drm_gpu_scheduler **sched_list, 621 unsigned int num_sched_list, 622 atomic_t *guilty); 623 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 624 void drm_sched_entity_fini(struct drm_sched_entity *entity); 625 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 626 void drm_sched_entity_set_priority(struct drm_sched_entity *entity, 627 enum drm_sched_priority priority); 628 int drm_sched_entity_error(struct drm_sched_entity *entity); 629 void drm_sched_entity_modify_sched(struct drm_sched_entity *entity, 630 struct drm_gpu_scheduler **sched_list, 631 unsigned int num_sched_list); 632 633 #endif 634