xref: /linux/drivers/video/fbdev/ep93xx-fb.c (revision 03c11eb3b16dc0058589751dfd91f254be2be613)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
288017bdaSRyan Mallon /*
388017bdaSRyan Mallon  * linux/drivers/video/ep93xx-fb.c
488017bdaSRyan Mallon  *
588017bdaSRyan Mallon  * Framebuffer support for the EP93xx series.
688017bdaSRyan Mallon  *
788017bdaSRyan Mallon  * Copyright (C) 2007 Bluewater Systems Ltd
81c5454eeSRyan Mallon  * Author: Ryan Mallon
988017bdaSRyan Mallon  *
1088017bdaSRyan Mallon  * Copyright (c) 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
1188017bdaSRyan Mallon  *
1288017bdaSRyan Mallon  * Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb
1388017bdaSRyan Mallon  * drivers.
1488017bdaSRyan Mallon  */
1588017bdaSRyan Mallon 
1688017bdaSRyan Mallon #include <linux/platform_device.h>
17355b200bSPaul Gortmaker #include <linux/module.h>
1888017bdaSRyan Mallon #include <linux/dma-mapping.h>
195a0e3ad6STejun Heo #include <linux/slab.h>
2088017bdaSRyan Mallon #include <linux/clk.h>
2188017bdaSRyan Mallon #include <linux/fb.h>
22e66b0587SH Hartley Sweeten #include <linux/io.h>
2388017bdaSRyan Mallon 
24a3b29245SArnd Bergmann #include <linux/platform_data/video-ep93xx.h>
2588017bdaSRyan Mallon 
2688017bdaSRyan Mallon /* Vertical Frame Timing Registers */
2788017bdaSRyan Mallon #define EP93XXFB_VLINES_TOTAL			0x0000	/* SW locked */
2888017bdaSRyan Mallon #define EP93XXFB_VSYNC				0x0004	/* SW locked */
2988017bdaSRyan Mallon #define EP93XXFB_VACTIVE			0x0008	/* SW locked */
3088017bdaSRyan Mallon #define EP93XXFB_VBLANK				0x0228	/* SW locked */
3188017bdaSRyan Mallon #define EP93XXFB_VCLK				0x000c	/* SW locked */
3288017bdaSRyan Mallon 
3388017bdaSRyan Mallon /* Horizontal Frame Timing Registers */
3488017bdaSRyan Mallon #define EP93XXFB_HCLKS_TOTAL			0x0010	/* SW locked */
3588017bdaSRyan Mallon #define EP93XXFB_HSYNC				0x0014	/* SW locked */
3688017bdaSRyan Mallon #define EP93XXFB_HACTIVE			0x0018	/* SW locked */
3788017bdaSRyan Mallon #define EP93XXFB_HBLANK				0x022c	/* SW locked */
3888017bdaSRyan Mallon #define EP93XXFB_HCLK				0x001c	/* SW locked */
3988017bdaSRyan Mallon 
4088017bdaSRyan Mallon /* Frame Buffer Memory Configuration Registers */
4188017bdaSRyan Mallon #define EP93XXFB_SCREEN_PAGE			0x0028
4288017bdaSRyan Mallon #define EP93XXFB_SCREEN_HPAGE			0x002c
4388017bdaSRyan Mallon #define EP93XXFB_SCREEN_LINES			0x0030
4488017bdaSRyan Mallon #define EP93XXFB_LINE_LENGTH			0x0034
4588017bdaSRyan Mallon #define EP93XXFB_VLINE_STEP			0x0038
4688017bdaSRyan Mallon #define EP93XXFB_LINE_CARRY			0x003c	/* SW locked */
4788017bdaSRyan Mallon #define EP93XXFB_EOL_OFFSET			0x0230
4888017bdaSRyan Mallon 
4988017bdaSRyan Mallon /* Other Video Registers */
5088017bdaSRyan Mallon #define EP93XXFB_BRIGHTNESS			0x0020
5188017bdaSRyan Mallon #define EP93XXFB_ATTRIBS			0x0024	/* SW locked */
5288017bdaSRyan Mallon #define EP93XXFB_SWLOCK				0x007c	/* SW locked */
5388017bdaSRyan Mallon #define EP93XXFB_AC_RATE			0x0214
5488017bdaSRyan Mallon #define EP93XXFB_FIFO_LEVEL			0x0234
5588017bdaSRyan Mallon #define EP93XXFB_PIXELMODE			0x0054
5688017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_32BPP		(0x7 << 0)
5788017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_24BPP		(0x6 << 0)
5888017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_16BPP		(0x4 << 0)
5988017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_8BPP			(0x2 << 0)
6088017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_SHIFT_1P_24B		(0x0 << 3)
6188017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_SHIFT_1P_18B		(0x1 << 3)
6288017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_COLOR_LUT		(0x0 << 10)
6388017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_COLOR_888		(0x4 << 10)
6488017bdaSRyan Mallon #define EP93XXFB_PIXELMODE_COLOR_555		(0x5 << 10)
6588017bdaSRyan Mallon #define EP93XXFB_PARL_IF_OUT			0x0058
6688017bdaSRyan Mallon #define EP93XXFB_PARL_IF_IN			0x005c
6788017bdaSRyan Mallon 
6888017bdaSRyan Mallon /* Blink Control Registers */
6988017bdaSRyan Mallon #define EP93XXFB_BLINK_RATE			0x0040
7088017bdaSRyan Mallon #define EP93XXFB_BLINK_MASK			0x0044
7188017bdaSRyan Mallon #define EP93XXFB_BLINK_PATTRN			0x0048
7288017bdaSRyan Mallon #define EP93XXFB_PATTRN_MASK			0x004c
7388017bdaSRyan Mallon #define EP93XXFB_BKGRND_OFFSET			0x0050
7488017bdaSRyan Mallon 
7588017bdaSRyan Mallon /* Hardware Cursor Registers */
7688017bdaSRyan Mallon #define EP93XXFB_CURSOR_ADR_START		0x0060
7788017bdaSRyan Mallon #define EP93XXFB_CURSOR_ADR_RESET		0x0064
7888017bdaSRyan Mallon #define EP93XXFB_CURSOR_SIZE			0x0068
7988017bdaSRyan Mallon #define EP93XXFB_CURSOR_COLOR1			0x006c
8088017bdaSRyan Mallon #define EP93XXFB_CURSOR_COLOR2			0x0070
8188017bdaSRyan Mallon #define EP93XXFB_CURSOR_BLINK_COLOR1		0x021c
8288017bdaSRyan Mallon #define EP93XXFB_CURSOR_BLINK_COLOR2		0x0220
8388017bdaSRyan Mallon #define EP93XXFB_CURSOR_XY_LOC			0x0074
8488017bdaSRyan Mallon #define EP93XXFB_CURSOR_DSCAN_HY_LOC		0x0078
8588017bdaSRyan Mallon #define EP93XXFB_CURSOR_BLINK_RATE_CTRL		0x0224
8688017bdaSRyan Mallon 
8788017bdaSRyan Mallon /* LUT Registers */
8888017bdaSRyan Mallon #define EP93XXFB_GRY_SCL_LUTR			0x0080
8988017bdaSRyan Mallon #define EP93XXFB_GRY_SCL_LUTG			0x0280
9088017bdaSRyan Mallon #define EP93XXFB_GRY_SCL_LUTB			0x0300
9188017bdaSRyan Mallon #define EP93XXFB_LUT_SW_CONTROL			0x0218
9288017bdaSRyan Mallon #define EP93XXFB_LUT_SW_CONTROL_SWTCH		(1 << 0)
9388017bdaSRyan Mallon #define EP93XXFB_LUT_SW_CONTROL_SSTAT		(1 << 1)
9488017bdaSRyan Mallon #define EP93XXFB_COLOR_LUT			0x0400
9588017bdaSRyan Mallon 
9688017bdaSRyan Mallon /* Video Signature Registers */
9788017bdaSRyan Mallon #define EP93XXFB_VID_SIG_RSLT_VAL		0x0200
9888017bdaSRyan Mallon #define EP93XXFB_VID_SIG_CTRL			0x0204
9988017bdaSRyan Mallon #define EP93XXFB_VSIG				0x0208
10088017bdaSRyan Mallon #define EP93XXFB_HSIG				0x020c
10188017bdaSRyan Mallon #define EP93XXFB_SIG_CLR_STR			0x0210
10288017bdaSRyan Mallon 
10388017bdaSRyan Mallon /* Minimum / Maximum resolutions supported */
10488017bdaSRyan Mallon #define EP93XXFB_MIN_XRES			64
10588017bdaSRyan Mallon #define EP93XXFB_MIN_YRES			64
10688017bdaSRyan Mallon #define EP93XXFB_MAX_XRES			1024
10788017bdaSRyan Mallon #define EP93XXFB_MAX_YRES			768
10888017bdaSRyan Mallon 
10988017bdaSRyan Mallon struct ep93xx_fbi {
11088017bdaSRyan Mallon 	struct ep93xxfb_mach_info	*mach_info;
11188017bdaSRyan Mallon 	struct clk			*clk;
11288017bdaSRyan Mallon 	struct resource			*res;
11388017bdaSRyan Mallon 	void __iomem			*mmio_base;
11488017bdaSRyan Mallon 	unsigned int			pseudo_palette[256];
11588017bdaSRyan Mallon };
11688017bdaSRyan Mallon 
11788017bdaSRyan Mallon static int check_screenpage_bug = 1;
11888017bdaSRyan Mallon module_param(check_screenpage_bug, int, 0644);
11988017bdaSRyan Mallon MODULE_PARM_DESC(check_screenpage_bug,
12088017bdaSRyan Mallon 		 "Check for bit 27 screen page bug. Default = 1");
12188017bdaSRyan Mallon 
ep93xxfb_readl(struct ep93xx_fbi * fbi,unsigned int off)12288017bdaSRyan Mallon static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi,
12388017bdaSRyan Mallon 					  unsigned int off)
12488017bdaSRyan Mallon {
12588017bdaSRyan Mallon 	return __raw_readl(fbi->mmio_base + off);
12688017bdaSRyan Mallon }
12788017bdaSRyan Mallon 
ep93xxfb_writel(struct ep93xx_fbi * fbi,unsigned int val,unsigned int off)12888017bdaSRyan Mallon static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi,
12988017bdaSRyan Mallon 				   unsigned int val, unsigned int off)
13088017bdaSRyan Mallon {
13188017bdaSRyan Mallon 	__raw_writel(val, fbi->mmio_base + off);
13288017bdaSRyan Mallon }
13388017bdaSRyan Mallon 
13488017bdaSRyan Mallon /*
13588017bdaSRyan Mallon  * Write to one of the locked raster registers.
13688017bdaSRyan Mallon  */
ep93xxfb_out_locked(struct ep93xx_fbi * fbi,unsigned int val,unsigned int reg)13788017bdaSRyan Mallon static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi,
13888017bdaSRyan Mallon 				       unsigned int val, unsigned int reg)
13988017bdaSRyan Mallon {
14088017bdaSRyan Mallon 	/*
14188017bdaSRyan Mallon 	 * We don't need a lock or delay here since the raster register
14288017bdaSRyan Mallon 	 * block will remain unlocked until the next access.
14388017bdaSRyan Mallon 	 */
14488017bdaSRyan Mallon 	ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK);
14588017bdaSRyan Mallon 	ep93xxfb_writel(fbi, val, reg);
14688017bdaSRyan Mallon }
14788017bdaSRyan Mallon 
ep93xxfb_set_video_attribs(struct fb_info * info)14888017bdaSRyan Mallon static void ep93xxfb_set_video_attribs(struct fb_info *info)
14988017bdaSRyan Mallon {
15088017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
15188017bdaSRyan Mallon 	unsigned int attribs;
15288017bdaSRyan Mallon 
15388017bdaSRyan Mallon 	attribs = EP93XXFB_ENABLE;
15488017bdaSRyan Mallon 	attribs |= fbi->mach_info->flags;
15588017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS);
15688017bdaSRyan Mallon }
15788017bdaSRyan Mallon 
ep93xxfb_set_pixelmode(struct fb_info * info)15888017bdaSRyan Mallon static int ep93xxfb_set_pixelmode(struct fb_info *info)
15988017bdaSRyan Mallon {
16088017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
16188017bdaSRyan Mallon 	unsigned int val;
16288017bdaSRyan Mallon 
16388017bdaSRyan Mallon 	info->var.transp.offset = 0;
16488017bdaSRyan Mallon 	info->var.transp.length = 0;
16588017bdaSRyan Mallon 
16688017bdaSRyan Mallon 	switch (info->var.bits_per_pixel) {
16788017bdaSRyan Mallon 	case 8:
16888017bdaSRyan Mallon 		val = EP93XXFB_PIXELMODE_8BPP | EP93XXFB_PIXELMODE_COLOR_LUT |
16988017bdaSRyan Mallon 			EP93XXFB_PIXELMODE_SHIFT_1P_18B;
17088017bdaSRyan Mallon 
17188017bdaSRyan Mallon 		info->var.red.offset	= 0;
17288017bdaSRyan Mallon 		info->var.red.length	= 8;
17388017bdaSRyan Mallon 		info->var.green.offset	= 0;
17488017bdaSRyan Mallon 		info->var.green.length	= 8;
17588017bdaSRyan Mallon 		info->var.blue.offset	= 0;
17688017bdaSRyan Mallon 		info->var.blue.length	= 8;
17788017bdaSRyan Mallon 		info->fix.visual 	= FB_VISUAL_PSEUDOCOLOR;
17888017bdaSRyan Mallon 		break;
17988017bdaSRyan Mallon 
18088017bdaSRyan Mallon 	case 16:
18188017bdaSRyan Mallon 		val = EP93XXFB_PIXELMODE_16BPP | EP93XXFB_PIXELMODE_COLOR_555 |
18288017bdaSRyan Mallon 			EP93XXFB_PIXELMODE_SHIFT_1P_18B;
18388017bdaSRyan Mallon 
18488017bdaSRyan Mallon 		info->var.red.offset	= 11;
18588017bdaSRyan Mallon 		info->var.red.length	= 5;
18688017bdaSRyan Mallon 		info->var.green.offset	= 5;
18788017bdaSRyan Mallon 		info->var.green.length	= 6;
18888017bdaSRyan Mallon 		info->var.blue.offset	= 0;
18988017bdaSRyan Mallon 		info->var.blue.length	= 5;
19088017bdaSRyan Mallon 		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
19188017bdaSRyan Mallon 		break;
19288017bdaSRyan Mallon 
19388017bdaSRyan Mallon 	case 24:
19488017bdaSRyan Mallon 		val = EP93XXFB_PIXELMODE_24BPP | EP93XXFB_PIXELMODE_COLOR_888 |
19588017bdaSRyan Mallon 			EP93XXFB_PIXELMODE_SHIFT_1P_24B;
19688017bdaSRyan Mallon 
19788017bdaSRyan Mallon 		info->var.red.offset	= 16;
19888017bdaSRyan Mallon 		info->var.red.length	= 8;
19988017bdaSRyan Mallon 		info->var.green.offset	= 8;
20088017bdaSRyan Mallon 		info->var.green.length	= 8;
20188017bdaSRyan Mallon 		info->var.blue.offset	= 0;
20288017bdaSRyan Mallon 		info->var.blue.length	= 8;
20388017bdaSRyan Mallon 		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
20488017bdaSRyan Mallon 		break;
20588017bdaSRyan Mallon 
20688017bdaSRyan Mallon 	case 32:
20788017bdaSRyan Mallon 		val = EP93XXFB_PIXELMODE_32BPP | EP93XXFB_PIXELMODE_COLOR_888 |
20888017bdaSRyan Mallon 			EP93XXFB_PIXELMODE_SHIFT_1P_24B;
20988017bdaSRyan Mallon 
21088017bdaSRyan Mallon 		info->var.red.offset	= 16;
21188017bdaSRyan Mallon 		info->var.red.length	= 8;
21288017bdaSRyan Mallon 		info->var.green.offset	= 8;
21388017bdaSRyan Mallon 		info->var.green.length	= 8;
21488017bdaSRyan Mallon 		info->var.blue.offset	= 0;
21588017bdaSRyan Mallon 		info->var.blue.length	= 8;
21688017bdaSRyan Mallon 		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
21788017bdaSRyan Mallon 		break;
21888017bdaSRyan Mallon 
21988017bdaSRyan Mallon 	default:
22088017bdaSRyan Mallon 		return -EINVAL;
22188017bdaSRyan Mallon 	}
22288017bdaSRyan Mallon 
22388017bdaSRyan Mallon 	ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE);
22488017bdaSRyan Mallon 	return 0;
22588017bdaSRyan Mallon }
22688017bdaSRyan Mallon 
ep93xxfb_set_timing(struct fb_info * info)22788017bdaSRyan Mallon static void ep93xxfb_set_timing(struct fb_info *info)
22888017bdaSRyan Mallon {
22988017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
23088017bdaSRyan Mallon 	unsigned int vlines_total, hclks_total, start, stop;
23188017bdaSRyan Mallon 
23288017bdaSRyan Mallon 	vlines_total = info->var.yres + info->var.upper_margin +
23388017bdaSRyan Mallon 		info->var.lower_margin + info->var.vsync_len - 1;
23488017bdaSRyan Mallon 
23588017bdaSRyan Mallon 	hclks_total = info->var.xres + info->var.left_margin +
23688017bdaSRyan Mallon 		info->var.right_margin + info->var.hsync_len - 1;
23788017bdaSRyan Mallon 
23888017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL);
23988017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL);
24088017bdaSRyan Mallon 
24188017bdaSRyan Mallon 	start = vlines_total;
24288017bdaSRyan Mallon 	stop = vlines_total - info->var.vsync_len;
24388017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VSYNC);
24488017bdaSRyan Mallon 
24588017bdaSRyan Mallon 	start = vlines_total - info->var.vsync_len - info->var.upper_margin;
24688017bdaSRyan Mallon 	stop = info->var.lower_margin - 1;
24788017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VBLANK);
24888017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VACTIVE);
24988017bdaSRyan Mallon 
25088017bdaSRyan Mallon 	start = vlines_total;
25188017bdaSRyan Mallon 	stop = vlines_total + 1;
25288017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VCLK);
25388017bdaSRyan Mallon 
25488017bdaSRyan Mallon 	start = hclks_total;
25588017bdaSRyan Mallon 	stop = hclks_total - info->var.hsync_len;
25688017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HSYNC);
25788017bdaSRyan Mallon 
25888017bdaSRyan Mallon 	start = hclks_total - info->var.hsync_len - info->var.left_margin;
25988017bdaSRyan Mallon 	stop = info->var.right_margin - 1;
26088017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HBLANK);
26188017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HACTIVE);
26288017bdaSRyan Mallon 
26388017bdaSRyan Mallon 	start = hclks_total;
26488017bdaSRyan Mallon 	stop = hclks_total;
26588017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HCLK);
26688017bdaSRyan Mallon 
26788017bdaSRyan Mallon 	ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY);
26888017bdaSRyan Mallon }
26988017bdaSRyan Mallon 
ep93xxfb_set_par(struct fb_info * info)27088017bdaSRyan Mallon static int ep93xxfb_set_par(struct fb_info *info)
27188017bdaSRyan Mallon {
27288017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
27388017bdaSRyan Mallon 
27488017bdaSRyan Mallon 	clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));
27588017bdaSRyan Mallon 
27688017bdaSRyan Mallon 	ep93xxfb_set_timing(info);
27788017bdaSRyan Mallon 
27888017bdaSRyan Mallon 	info->fix.line_length = info->var.xres_virtual *
27988017bdaSRyan Mallon 		info->var.bits_per_pixel / 8;
28088017bdaSRyan Mallon 
28188017bdaSRyan Mallon 	ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE);
28288017bdaSRyan Mallon 	ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES);
28388017bdaSRyan Mallon 	ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel)
28488017bdaSRyan Mallon 			      / 32) - 1, EP93XXFB_LINE_LENGTH);
28588017bdaSRyan Mallon 	ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP);
28688017bdaSRyan Mallon 	ep93xxfb_set_video_attribs(info);
28788017bdaSRyan Mallon 	return 0;
28888017bdaSRyan Mallon }
28988017bdaSRyan Mallon 
ep93xxfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)29088017bdaSRyan Mallon static int ep93xxfb_check_var(struct fb_var_screeninfo *var,
29188017bdaSRyan Mallon 			      struct fb_info *info)
29288017bdaSRyan Mallon {
29388017bdaSRyan Mallon 	int err;
29488017bdaSRyan Mallon 
29588017bdaSRyan Mallon 	err = ep93xxfb_set_pixelmode(info);
29688017bdaSRyan Mallon 	if (err)
29788017bdaSRyan Mallon 		return err;
29888017bdaSRyan Mallon 
29988017bdaSRyan Mallon 	var->xres = max_t(unsigned int, var->xres, EP93XXFB_MIN_XRES);
30088017bdaSRyan Mallon 	var->xres = min_t(unsigned int, var->xres, EP93XXFB_MAX_XRES);
30188017bdaSRyan Mallon 	var->xres_virtual = max(var->xres_virtual, var->xres);
30288017bdaSRyan Mallon 
30388017bdaSRyan Mallon 	var->yres = max_t(unsigned int, var->yres, EP93XXFB_MIN_YRES);
30488017bdaSRyan Mallon 	var->yres = min_t(unsigned int, var->yres, EP93XXFB_MAX_YRES);
30588017bdaSRyan Mallon 	var->yres_virtual = max(var->yres_virtual, var->yres);
30688017bdaSRyan Mallon 
30788017bdaSRyan Mallon 	return 0;
30888017bdaSRyan Mallon }
30988017bdaSRyan Mallon 
ep93xxfb_mmap(struct fb_info * info,struct vm_area_struct * vma)31088017bdaSRyan Mallon static int ep93xxfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
31188017bdaSRyan Mallon {
31288017bdaSRyan Mallon 	unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
31388017bdaSRyan Mallon 
314*76f92201SThomas Zimmermann 	vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
315*76f92201SThomas Zimmermann 
31688017bdaSRyan Mallon 	if (offset < info->fix.smem_len) {
3179aee7f04SThomas Zimmermann 		return dma_mmap_wc(info->device, vma, info->screen_base,
318f6e45661SLuis R. Rodriguez 				   info->fix.smem_start, info->fix.smem_len);
31988017bdaSRyan Mallon 	}
32088017bdaSRyan Mallon 
32188017bdaSRyan Mallon 	return -EINVAL;
32288017bdaSRyan Mallon }
32388017bdaSRyan Mallon 
ep93xxfb_blank(int blank_mode,struct fb_info * info)32488017bdaSRyan Mallon static int ep93xxfb_blank(int blank_mode, struct fb_info *info)
32588017bdaSRyan Mallon {
32688017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
32788017bdaSRyan Mallon 	unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS);
32888017bdaSRyan Mallon 
32988017bdaSRyan Mallon 	if (blank_mode) {
33088017bdaSRyan Mallon 		if (fbi->mach_info->blank)
33188017bdaSRyan Mallon 			fbi->mach_info->blank(blank_mode, info);
33288017bdaSRyan Mallon 		ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE,
33388017bdaSRyan Mallon 				    EP93XXFB_ATTRIBS);
33488017bdaSRyan Mallon 		clk_disable(fbi->clk);
33588017bdaSRyan Mallon 	} else {
33688017bdaSRyan Mallon 		clk_enable(fbi->clk);
33788017bdaSRyan Mallon 		ep93xxfb_out_locked(fbi, attribs | EP93XXFB_ENABLE,
33888017bdaSRyan Mallon 				    EP93XXFB_ATTRIBS);
33988017bdaSRyan Mallon 		if (fbi->mach_info->blank)
34088017bdaSRyan Mallon 			fbi->mach_info->blank(blank_mode, info);
34188017bdaSRyan Mallon 	}
34288017bdaSRyan Mallon 
34388017bdaSRyan Mallon 	return 0;
34488017bdaSRyan Mallon }
34588017bdaSRyan Mallon 
ep93xxfb_convert_color(int val,int width)34688017bdaSRyan Mallon static inline int ep93xxfb_convert_color(int val, int width)
34788017bdaSRyan Mallon {
34888017bdaSRyan Mallon 	return ((val << width) + 0x7fff - val) >> 16;
34988017bdaSRyan Mallon }
35088017bdaSRyan Mallon 
ep93xxfb_setcolreg(unsigned int regno,unsigned int red,unsigned int green,unsigned int blue,unsigned int transp,struct fb_info * info)35188017bdaSRyan Mallon static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
35288017bdaSRyan Mallon 			      unsigned int green, unsigned int blue,
35388017bdaSRyan Mallon 			      unsigned int transp, struct fb_info *info)
35488017bdaSRyan Mallon {
35588017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
35688017bdaSRyan Mallon 	unsigned int *pal = info->pseudo_palette;
35788017bdaSRyan Mallon 	unsigned int ctrl, i, rgb, lut_current, lut_stat;
35888017bdaSRyan Mallon 
35988017bdaSRyan Mallon 	switch (info->fix.visual) {
36088017bdaSRyan Mallon 	case FB_VISUAL_PSEUDOCOLOR:
3612f390380SKrzysztof Helt 		if (regno > 255)
3622f390380SKrzysztof Helt 			return 1;
36388017bdaSRyan Mallon 		rgb = ((red & 0xff00) << 8) | (green & 0xff00) |
36488017bdaSRyan Mallon 			((blue & 0xff00) >> 8);
36588017bdaSRyan Mallon 
36688017bdaSRyan Mallon 		pal[regno] = rgb;
36788017bdaSRyan Mallon 		ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2)));
36888017bdaSRyan Mallon 		ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL);
36988017bdaSRyan Mallon 		lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT);
37088017bdaSRyan Mallon 		lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH);
37188017bdaSRyan Mallon 
37288017bdaSRyan Mallon 		if (lut_stat == lut_current) {
37388017bdaSRyan Mallon 			for (i = 0; i < 256; i++) {
37488017bdaSRyan Mallon 				ep93xxfb_writel(fbi, pal[i],
37588017bdaSRyan Mallon 					EP93XXFB_COLOR_LUT + (i << 2));
37688017bdaSRyan Mallon 			}
37788017bdaSRyan Mallon 
37888017bdaSRyan Mallon 			ep93xxfb_writel(fbi,
37988017bdaSRyan Mallon 					ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH,
38088017bdaSRyan Mallon 					EP93XXFB_LUT_SW_CONTROL);
38188017bdaSRyan Mallon 		}
38288017bdaSRyan Mallon 		break;
38388017bdaSRyan Mallon 
38488017bdaSRyan Mallon 	case FB_VISUAL_TRUECOLOR:
38588017bdaSRyan Mallon 		if (regno > 16)
38688017bdaSRyan Mallon 			return 1;
38788017bdaSRyan Mallon 
38888017bdaSRyan Mallon 		red = ep93xxfb_convert_color(red, info->var.red.length);
38988017bdaSRyan Mallon 		green = ep93xxfb_convert_color(green, info->var.green.length);
39088017bdaSRyan Mallon 		blue = ep93xxfb_convert_color(blue, info->var.blue.length);
39188017bdaSRyan Mallon 		transp = ep93xxfb_convert_color(transp,
39288017bdaSRyan Mallon 						info->var.transp.length);
39388017bdaSRyan Mallon 
39488017bdaSRyan Mallon 		pal[regno] = (red << info->var.red.offset) |
39588017bdaSRyan Mallon 			(green << info->var.green.offset) |
39688017bdaSRyan Mallon 			(blue << info->var.blue.offset) |
39788017bdaSRyan Mallon 			(transp << info->var.transp.offset);
39888017bdaSRyan Mallon 		break;
39988017bdaSRyan Mallon 
40088017bdaSRyan Mallon 	default:
40188017bdaSRyan Mallon 		return 1;
40288017bdaSRyan Mallon 	}
40388017bdaSRyan Mallon 
40488017bdaSRyan Mallon 	return 0;
40588017bdaSRyan Mallon }
40688017bdaSRyan Mallon 
4078a48ac33SJani Nikula static const struct fb_ops ep93xxfb_ops = {
40888017bdaSRyan Mallon 	.owner		= THIS_MODULE,
409244c2b55SThomas Zimmermann 	__FB_DEFAULT_IOMEM_OPS_RDWR,
41088017bdaSRyan Mallon 	.fb_check_var	= ep93xxfb_check_var,
41188017bdaSRyan Mallon 	.fb_set_par	= ep93xxfb_set_par,
41288017bdaSRyan Mallon 	.fb_blank	= ep93xxfb_blank,
413244c2b55SThomas Zimmermann 	__FB_DEFAULT_IOMEM_OPS_DRAW,
41488017bdaSRyan Mallon 	.fb_setcolreg	= ep93xxfb_setcolreg,
41588017bdaSRyan Mallon 	.fb_mmap	= ep93xxfb_mmap,
41688017bdaSRyan Mallon };
41788017bdaSRyan Mallon 
ep93xxfb_alloc_videomem(struct fb_info * info)418bb5254d2SH Hartley Sweeten static int ep93xxfb_alloc_videomem(struct fb_info *info)
41988017bdaSRyan Mallon {
42088017bdaSRyan Mallon 	char __iomem *virt_addr;
42188017bdaSRyan Mallon 	dma_addr_t phys_addr;
42288017bdaSRyan Mallon 	unsigned int fb_size;
42388017bdaSRyan Mallon 
42416478b61SLinus Walleij 	/* Maximum 16bpp -> used memory is maximum x*y*2 bytes */
42516478b61SLinus Walleij 	fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES * 2;
42616478b61SLinus Walleij 
4279aee7f04SThomas Zimmermann 	virt_addr = dma_alloc_wc(info->device, fb_size, &phys_addr, GFP_KERNEL);
42888017bdaSRyan Mallon 	if (!virt_addr)
42988017bdaSRyan Mallon 		return -ENOMEM;
43088017bdaSRyan Mallon 
43188017bdaSRyan Mallon 	/*
43288017bdaSRyan Mallon 	 * There is a bug in the ep93xx framebuffer which causes problems
43388017bdaSRyan Mallon 	 * if bit 27 of the physical address is set.
4347c7b2a35SAlexander A. Klimov 	 * See: https://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
43525985edcSLucas De Marchi 	 * There does not seem to be any official errata for this, but I
43688017bdaSRyan Mallon 	 * have confirmed the problem exists on my hardware (ep9315) at
43788017bdaSRyan Mallon 	 * least.
43888017bdaSRyan Mallon 	 */
43988017bdaSRyan Mallon 	if (check_screenpage_bug && phys_addr & (1 << 27)) {
440be05e207SThomas Zimmermann 		fb_err(info, "ep93xx framebuffer bug. phys addr (0x%x) "
44188017bdaSRyan Mallon 		       "has bit 27 set: cannot init framebuffer\n",
44288017bdaSRyan Mallon 		       phys_addr);
44388017bdaSRyan Mallon 
4449aee7f04SThomas Zimmermann 		dma_free_coherent(info->device, fb_size, virt_addr, phys_addr);
44588017bdaSRyan Mallon 		return -ENOMEM;
44688017bdaSRyan Mallon 	}
44788017bdaSRyan Mallon 
44888017bdaSRyan Mallon 	info->fix.smem_start = phys_addr;
44988017bdaSRyan Mallon 	info->fix.smem_len = fb_size;
45088017bdaSRyan Mallon 	info->screen_base = virt_addr;
45188017bdaSRyan Mallon 
45288017bdaSRyan Mallon 	return 0;
45388017bdaSRyan Mallon }
45488017bdaSRyan Mallon 
ep93xxfb_dealloc_videomem(struct fb_info * info)45588017bdaSRyan Mallon static void ep93xxfb_dealloc_videomem(struct fb_info *info)
45688017bdaSRyan Mallon {
45788017bdaSRyan Mallon 	if (info->screen_base)
4589aee7f04SThomas Zimmermann 		dma_free_coherent(info->device, info->fix.smem_len,
45988017bdaSRyan Mallon 				  info->screen_base, info->fix.smem_start);
46088017bdaSRyan Mallon }
46188017bdaSRyan Mallon 
ep93xxfb_probe(struct platform_device * pdev)46248c68c4fSGreg Kroah-Hartman static int ep93xxfb_probe(struct platform_device *pdev)
46388017bdaSRyan Mallon {
464e09f398eSJingoo Han 	struct ep93xxfb_mach_info *mach_info = dev_get_platdata(&pdev->dev);
46588017bdaSRyan Mallon 	struct fb_info *info;
46688017bdaSRyan Mallon 	struct ep93xx_fbi *fbi;
46788017bdaSRyan Mallon 	struct resource *res;
46888017bdaSRyan Mallon 	char *video_mode;
46988017bdaSRyan Mallon 	int err;
47088017bdaSRyan Mallon 
47188017bdaSRyan Mallon 	if (!mach_info)
47288017bdaSRyan Mallon 		return -EINVAL;
47388017bdaSRyan Mallon 
47488017bdaSRyan Mallon 	info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev);
47588017bdaSRyan Mallon 	if (!info)
47688017bdaSRyan Mallon 		return -ENOMEM;
47788017bdaSRyan Mallon 
47888017bdaSRyan Mallon 	platform_set_drvdata(pdev, info);
47988017bdaSRyan Mallon 	fbi = info->par;
48088017bdaSRyan Mallon 	fbi->mach_info = mach_info;
48188017bdaSRyan Mallon 
48288017bdaSRyan Mallon 	err = fb_alloc_cmap(&info->cmap, 256, 0);
48388017bdaSRyan Mallon 	if (err)
484045dfdb5SJulia Lawall 		goto failed_cmap;
48588017bdaSRyan Mallon 
48688017bdaSRyan Mallon 	err = ep93xxfb_alloc_videomem(info);
48788017bdaSRyan Mallon 	if (err)
488045dfdb5SJulia Lawall 		goto failed_videomem;
48988017bdaSRyan Mallon 
49088017bdaSRyan Mallon 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
49188017bdaSRyan Mallon 	if (!res) {
49288017bdaSRyan Mallon 		err = -ENXIO;
493045dfdb5SJulia Lawall 		goto failed_resource;
49488017bdaSRyan Mallon 	}
49588017bdaSRyan Mallon 
4960fd19580SRyan Mallon 	/*
4970fd19580SRyan Mallon 	 * FIXME - We don't do a request_mem_region here because we are
4980fd19580SRyan Mallon 	 * sharing the register space with the backlight driver (see
4990fd19580SRyan Mallon 	 * drivers/video/backlight/ep93xx_bl.c) and doing so will cause
5000fd19580SRyan Mallon 	 * the second loaded driver to return -EBUSY.
5010fd19580SRyan Mallon 	 *
5020fd19580SRyan Mallon 	 * NOTE: No locking is required; the backlight does not touch
5030fd19580SRyan Mallon 	 * any of the framebuffer registers.
5040fd19580SRyan Mallon 	 */
50588017bdaSRyan Mallon 	fbi->res = res;
506be867814SDamien Cassou 	fbi->mmio_base = devm_ioremap(&pdev->dev, res->start,
507be867814SDamien Cassou 				      resource_size(res));
50888017bdaSRyan Mallon 	if (!fbi->mmio_base) {
50988017bdaSRyan Mallon 		err = -ENXIO;
510045dfdb5SJulia Lawall 		goto failed_resource;
51188017bdaSRyan Mallon 	}
51288017bdaSRyan Mallon 
51388017bdaSRyan Mallon 	strcpy(info->fix.id, pdev->name);
51488017bdaSRyan Mallon 	info->fbops		= &ep93xxfb_ops;
51588017bdaSRyan Mallon 	info->fix.type		= FB_TYPE_PACKED_PIXELS;
51688017bdaSRyan Mallon 	info->fix.accel		= FB_ACCEL_NONE;
51788017bdaSRyan Mallon 	info->var.activate	= FB_ACTIVATE_NOW;
51888017bdaSRyan Mallon 	info->var.vmode		= FB_VMODE_NONINTERLACED;
51988017bdaSRyan Mallon 	info->node		= -1;
52088017bdaSRyan Mallon 	info->state		= FBINFO_STATE_RUNNING;
52188017bdaSRyan Mallon 	info->pseudo_palette	= &fbi->pseudo_palette;
52288017bdaSRyan Mallon 
52388017bdaSRyan Mallon 	fb_get_options("ep93xx-fb", &video_mode);
52488017bdaSRyan Mallon 	err = fb_find_mode(&info->var, info, video_mode,
52516478b61SLinus Walleij 			   NULL, 0, NULL, 16);
52688017bdaSRyan Mallon 	if (err == 0) {
527be05e207SThomas Zimmermann 		fb_err(info, "No suitable video mode found\n");
52888017bdaSRyan Mallon 		err = -EINVAL;
529be867814SDamien Cassou 		goto failed_resource;
53088017bdaSRyan Mallon 	}
53188017bdaSRyan Mallon 
53288017bdaSRyan Mallon 	if (mach_info->setup) {
53388017bdaSRyan Mallon 		err = mach_info->setup(pdev);
53488017bdaSRyan Mallon 		if (err)
535be867814SDamien Cassou 			goto failed_resource;
53688017bdaSRyan Mallon 	}
53788017bdaSRyan Mallon 
53888017bdaSRyan Mallon 	err = ep93xxfb_check_var(&info->var, info);
53988017bdaSRyan Mallon 	if (err)
540045dfdb5SJulia Lawall 		goto failed_check;
54188017bdaSRyan Mallon 
542be867814SDamien Cassou 	fbi->clk = devm_clk_get(&pdev->dev, NULL);
54388017bdaSRyan Mallon 	if (IS_ERR(fbi->clk)) {
54488017bdaSRyan Mallon 		err = PTR_ERR(fbi->clk);
54588017bdaSRyan Mallon 		fbi->clk = NULL;
546045dfdb5SJulia Lawall 		goto failed_check;
54788017bdaSRyan Mallon 	}
54888017bdaSRyan Mallon 
54988017bdaSRyan Mallon 	ep93xxfb_set_par(info);
5509d5651adSYuanjun Gong 	err = clk_prepare_enable(fbi->clk);
5519d5651adSYuanjun Gong 	if (err)
5529d5651adSYuanjun Gong 		goto failed_check;
55388017bdaSRyan Mallon 
55488017bdaSRyan Mallon 	err = register_framebuffer(info);
55588017bdaSRyan Mallon 	if (err)
556c84bf485SGaosheng Cui 		goto failed_framebuffer;
55788017bdaSRyan Mallon 
558be05e207SThomas Zimmermann 	fb_info(info, "registered. Mode = %dx%d-%d\n",
55988017bdaSRyan Mallon 		info->var.xres, info->var.yres, info->var.bits_per_pixel);
56088017bdaSRyan Mallon 	return 0;
56188017bdaSRyan Mallon 
562c84bf485SGaosheng Cui failed_framebuffer:
563c84bf485SGaosheng Cui 	clk_disable_unprepare(fbi->clk);
564045dfdb5SJulia Lawall failed_check:
56588017bdaSRyan Mallon 	if (fbi->mach_info->teardown)
56688017bdaSRyan Mallon 		fbi->mach_info->teardown(pdev);
567045dfdb5SJulia Lawall failed_resource:
568045dfdb5SJulia Lawall 	ep93xxfb_dealloc_videomem(info);
569045dfdb5SJulia Lawall failed_videomem:
570045dfdb5SJulia Lawall 	fb_dealloc_cmap(&info->cmap);
571045dfdb5SJulia Lawall failed_cmap:
57288017bdaSRyan Mallon 	kfree(info);
57388017bdaSRyan Mallon 
57488017bdaSRyan Mallon 	return err;
57588017bdaSRyan Mallon }
57688017bdaSRyan Mallon 
ep93xxfb_remove(struct platform_device * pdev)57781431a9eSUwe Kleine-König static void ep93xxfb_remove(struct platform_device *pdev)
57888017bdaSRyan Mallon {
57988017bdaSRyan Mallon 	struct fb_info *info = platform_get_drvdata(pdev);
58088017bdaSRyan Mallon 	struct ep93xx_fbi *fbi = info->par;
58188017bdaSRyan Mallon 
58288017bdaSRyan Mallon 	unregister_framebuffer(info);
5830937a7b3SAlexander Sverdlin 	clk_disable_unprepare(fbi->clk);
58488017bdaSRyan Mallon 	ep93xxfb_dealloc_videomem(info);
58588017bdaSRyan Mallon 	fb_dealloc_cmap(&info->cmap);
58688017bdaSRyan Mallon 
58788017bdaSRyan Mallon 	if (fbi->mach_info->teardown)
58888017bdaSRyan Mallon 		fbi->mach_info->teardown(pdev);
58988017bdaSRyan Mallon 
59088017bdaSRyan Mallon 	kfree(info);
59188017bdaSRyan Mallon }
59288017bdaSRyan Mallon 
59388017bdaSRyan Mallon static struct platform_driver ep93xxfb_driver = {
59488017bdaSRyan Mallon 	.probe		= ep93xxfb_probe,
59581431a9eSUwe Kleine-König 	.remove		= ep93xxfb_remove,
59688017bdaSRyan Mallon 	.driver = {
59788017bdaSRyan Mallon 		.name	= "ep93xx-fb",
59888017bdaSRyan Mallon 	},
59988017bdaSRyan Mallon };
600bb5254d2SH Hartley Sweeten module_platform_driver(ep93xxfb_driver);
60188017bdaSRyan Mallon 
60288017bdaSRyan Mallon MODULE_DESCRIPTION("EP93XX Framebuffer Driver");
60388017bdaSRyan Mallon MODULE_ALIAS("platform:ep93xx-fb");
6041c5454eeSRyan Mallon MODULE_AUTHOR("Ryan Mallon, "
60588017bdaSRyan Mallon 	      "H Hartley Sweeten <hsweeten@visionengravers.com");
60688017bdaSRyan Mallon MODULE_LICENSE("GPL");
607