1 /* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #include <linux/tty.h> 12 #include <linux/tty_flip.h> 13 #include <linux/serial_reg.h> 14 #include <linux/dma-mapping.h> 15 16 #include "8250.h" 17 18 static void __dma_tx_complete(void *param) 19 { 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 unsigned long flags; 24 int ret; 25 26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 27 UART_XMIT_SIZE, DMA_TO_DEVICE); 28 29 spin_lock_irqsave(&p->port.lock, flags); 30 31 dma->tx_running = 0; 32 33 xmit->tail += dma->tx_size; 34 xmit->tail &= UART_XMIT_SIZE - 1; 35 p->port.icount.tx += dma->tx_size; 36 37 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 38 uart_write_wakeup(&p->port); 39 40 ret = serial8250_tx_dma(p); 41 if (ret) { 42 p->ier |= UART_IER_THRI; 43 serial_port_out(&p->port, UART_IER, p->ier); 44 } 45 46 spin_unlock_irqrestore(&p->port.lock, flags); 47 } 48 49 static void __dma_rx_complete(void *param) 50 { 51 struct uart_8250_port *p = param; 52 struct uart_8250_dma *dma = p->dma; 53 struct tty_port *tty_port = &p->port.state->port; 54 struct dma_tx_state state; 55 int count; 56 57 dma->rx_running = 0; 58 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 59 60 count = dma->rx_size - state.residue; 61 62 tty_insert_flip_string(tty_port, dma->rx_buf, count); 63 p->port.icount.rx += count; 64 65 tty_flip_buffer_push(tty_port); 66 } 67 68 int serial8250_tx_dma(struct uart_8250_port *p) 69 { 70 struct uart_8250_dma *dma = p->dma; 71 struct circ_buf *xmit = &p->port.state->xmit; 72 struct dma_async_tx_descriptor *desc; 73 int ret; 74 75 if (uart_tx_stopped(&p->port) || dma->tx_running || 76 uart_circ_empty(xmit)) 77 return 0; 78 79 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 80 81 desc = dmaengine_prep_slave_single(dma->txchan, 82 dma->tx_addr + xmit->tail, 83 dma->tx_size, DMA_MEM_TO_DEV, 84 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 85 if (!desc) { 86 ret = -EBUSY; 87 goto err; 88 } 89 90 dma->tx_running = 1; 91 desc->callback = __dma_tx_complete; 92 desc->callback_param = p; 93 94 dma->tx_cookie = dmaengine_submit(desc); 95 96 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 97 UART_XMIT_SIZE, DMA_TO_DEVICE); 98 99 dma_async_issue_pending(dma->txchan); 100 if (dma->tx_err) { 101 dma->tx_err = 0; 102 if (p->ier & UART_IER_THRI) { 103 p->ier &= ~UART_IER_THRI; 104 serial_out(p, UART_IER, p->ier); 105 } 106 } 107 return 0; 108 err: 109 dma->tx_err = 1; 110 return ret; 111 } 112 113 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 114 { 115 struct uart_8250_dma *dma = p->dma; 116 struct dma_async_tx_descriptor *desc; 117 118 switch (iir & 0x3f) { 119 case UART_IIR_RLSI: 120 /* 8250_core handles errors and break interrupts */ 121 return -EIO; 122 case UART_IIR_RX_TIMEOUT: 123 /* 124 * If RCVR FIFO trigger level was not reached, complete the 125 * transfer and let 8250_core copy the remaining data. 126 */ 127 if (dma->rx_running) { 128 dmaengine_pause(dma->rxchan); 129 __dma_rx_complete(p); 130 dmaengine_terminate_all(dma->rxchan); 131 } 132 return -ETIMEDOUT; 133 default: 134 break; 135 } 136 137 if (dma->rx_running) 138 return 0; 139 140 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 141 dma->rx_size, DMA_DEV_TO_MEM, 142 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 143 if (!desc) 144 return -EBUSY; 145 146 dma->rx_running = 1; 147 desc->callback = __dma_rx_complete; 148 desc->callback_param = p; 149 150 dma->rx_cookie = dmaengine_submit(desc); 151 152 dma_async_issue_pending(dma->rxchan); 153 154 return 0; 155 } 156 157 int serial8250_request_dma(struct uart_8250_port *p) 158 { 159 struct uart_8250_dma *dma = p->dma; 160 dma_cap_mask_t mask; 161 struct dma_slave_caps caps; 162 int ret; 163 164 /* Default slave configuration parameters */ 165 dma->rxconf.direction = DMA_DEV_TO_MEM; 166 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 167 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 168 169 dma->txconf.direction = DMA_MEM_TO_DEV; 170 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 171 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 172 173 dma_cap_zero(mask); 174 dma_cap_set(DMA_SLAVE, mask); 175 176 /* Get a channel for RX */ 177 dma->rxchan = dma_request_slave_channel_compat(mask, 178 dma->fn, dma->rx_param, 179 p->port.dev, "rx"); 180 if (!dma->rxchan) 181 return -ENODEV; 182 183 /* 8250 rx dma requires dmaengine driver to support pause/terminate */ 184 ret = dma_get_slave_caps(dma->rxchan, &caps); 185 if (ret) 186 goto release_rx; 187 if (!caps.cmd_pause || !caps.cmd_terminate || 188 caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) { 189 ret = -EINVAL; 190 goto release_rx; 191 } 192 193 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 194 195 /* Get a channel for TX */ 196 dma->txchan = dma_request_slave_channel_compat(mask, 197 dma->fn, dma->tx_param, 198 p->port.dev, "tx"); 199 if (!dma->txchan) { 200 ret = -ENODEV; 201 goto release_rx; 202 } 203 204 dmaengine_slave_config(dma->txchan, &dma->txconf); 205 206 /* RX buffer */ 207 if (!dma->rx_size) 208 dma->rx_size = PAGE_SIZE; 209 210 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 211 &dma->rx_addr, GFP_KERNEL); 212 if (!dma->rx_buf) { 213 ret = -ENOMEM; 214 goto err; 215 } 216 217 /* TX buffer */ 218 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 219 p->port.state->xmit.buf, 220 UART_XMIT_SIZE, 221 DMA_TO_DEVICE); 222 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 223 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 224 dma->rx_buf, dma->rx_addr); 225 ret = -ENOMEM; 226 goto err; 227 } 228 229 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 230 231 return 0; 232 err: 233 dma_release_channel(dma->txchan); 234 release_rx: 235 dma_release_channel(dma->rxchan); 236 return ret; 237 } 238 EXPORT_SYMBOL_GPL(serial8250_request_dma); 239 240 void serial8250_release_dma(struct uart_8250_port *p) 241 { 242 struct uart_8250_dma *dma = p->dma; 243 244 if (!dma) 245 return; 246 247 /* Release RX resources */ 248 dmaengine_terminate_all(dma->rxchan); 249 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 250 dma->rx_addr); 251 dma_release_channel(dma->rxchan); 252 dma->rxchan = NULL; 253 254 /* Release TX resources */ 255 dmaengine_terminate_all(dma->txchan); 256 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 257 UART_XMIT_SIZE, DMA_TO_DEVICE); 258 dma_release_channel(dma->txchan); 259 dma->txchan = NULL; 260 dma->tx_running = 0; 261 262 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 263 } 264 EXPORT_SYMBOL_GPL(serial8250_release_dma); 265