1 /* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #include <linux/tty.h> 12 #include <linux/tty_flip.h> 13 #include <linux/serial_reg.h> 14 #include <linux/dma-mapping.h> 15 16 #include "8250.h" 17 18 static void __dma_tx_complete(void *param) 19 { 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 unsigned long flags; 24 int ret; 25 26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 27 UART_XMIT_SIZE, DMA_TO_DEVICE); 28 29 spin_lock_irqsave(&p->port.lock, flags); 30 31 dma->tx_running = 0; 32 33 xmit->tail += dma->tx_size; 34 xmit->tail &= UART_XMIT_SIZE - 1; 35 p->port.icount.tx += dma->tx_size; 36 37 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 38 uart_write_wakeup(&p->port); 39 40 ret = serial8250_tx_dma(p); 41 if (ret) { 42 dma->tx_err = 1; 43 p->ier |= UART_IER_THRI; 44 serial_port_out(&p->port, UART_IER, p->ier); 45 } 46 47 spin_unlock_irqrestore(&p->port.lock, flags); 48 } 49 50 static void __dma_rx_complete(void *param) 51 { 52 struct uart_8250_port *p = param; 53 struct uart_8250_dma *dma = p->dma; 54 struct tty_port *tty_port = &p->port.state->port; 55 struct dma_tx_state state; 56 int count; 57 58 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, 59 dma->rx_size, DMA_FROM_DEVICE); 60 61 dma->rx_running = 0; 62 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 63 dmaengine_terminate_all(dma->rxchan); 64 65 count = dma->rx_size - state.residue; 66 67 tty_insert_flip_string(tty_port, dma->rx_buf, count); 68 p->port.icount.rx += count; 69 70 tty_flip_buffer_push(tty_port); 71 } 72 73 int serial8250_tx_dma(struct uart_8250_port *p) 74 { 75 struct uart_8250_dma *dma = p->dma; 76 struct circ_buf *xmit = &p->port.state->xmit; 77 struct dma_async_tx_descriptor *desc; 78 int ret; 79 80 if (uart_tx_stopped(&p->port) || dma->tx_running || 81 uart_circ_empty(xmit)) 82 return 0; 83 84 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 85 86 desc = dmaengine_prep_slave_single(dma->txchan, 87 dma->tx_addr + xmit->tail, 88 dma->tx_size, DMA_MEM_TO_DEV, 89 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 90 if (!desc) { 91 ret = -EBUSY; 92 goto err; 93 } 94 95 dma->tx_running = 1; 96 97 desc->callback = __dma_tx_complete; 98 desc->callback_param = p; 99 100 dma->tx_cookie = dmaengine_submit(desc); 101 102 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 103 UART_XMIT_SIZE, DMA_TO_DEVICE); 104 105 dma_async_issue_pending(dma->txchan); 106 if (dma->tx_err) { 107 dma->tx_err = 0; 108 if (p->ier & UART_IER_THRI) { 109 p->ier &= ~UART_IER_THRI; 110 serial_out(p, UART_IER, p->ier); 111 } 112 } 113 return 0; 114 err: 115 dma->tx_err = 1; 116 return ret; 117 } 118 119 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 120 { 121 struct uart_8250_dma *dma = p->dma; 122 struct dma_async_tx_descriptor *desc; 123 124 switch (iir & 0x3f) { 125 case UART_IIR_RLSI: 126 /* 8250_core handles errors and break interrupts */ 127 return -EIO; 128 case UART_IIR_RX_TIMEOUT: 129 /* 130 * If RCVR FIFO trigger level was not reached, complete the 131 * transfer and let 8250_core copy the remaining data. 132 */ 133 if (dma->rx_running) { 134 dmaengine_pause(dma->rxchan); 135 __dma_rx_complete(p); 136 } 137 return -ETIMEDOUT; 138 default: 139 break; 140 } 141 142 if (dma->rx_running) 143 return 0; 144 145 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 146 dma->rx_size, DMA_DEV_TO_MEM, 147 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 148 if (!desc) 149 return -EBUSY; 150 151 dma->rx_running = 1; 152 desc->callback = __dma_rx_complete; 153 desc->callback_param = p; 154 155 dma->rx_cookie = dmaengine_submit(desc); 156 157 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, 158 dma->rx_size, DMA_FROM_DEVICE); 159 160 dma_async_issue_pending(dma->rxchan); 161 162 return 0; 163 } 164 165 int serial8250_request_dma(struct uart_8250_port *p) 166 { 167 struct uart_8250_dma *dma = p->dma; 168 dma_cap_mask_t mask; 169 170 /* Default slave configuration parameters */ 171 dma->rxconf.direction = DMA_DEV_TO_MEM; 172 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 173 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 174 175 dma->txconf.direction = DMA_MEM_TO_DEV; 176 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 177 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 178 179 dma_cap_zero(mask); 180 dma_cap_set(DMA_SLAVE, mask); 181 182 /* Get a channel for RX */ 183 dma->rxchan = dma_request_slave_channel_compat(mask, 184 dma->fn, dma->rx_param, 185 p->port.dev, "rx"); 186 if (!dma->rxchan) 187 return -ENODEV; 188 189 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 190 191 /* Get a channel for TX */ 192 dma->txchan = dma_request_slave_channel_compat(mask, 193 dma->fn, dma->tx_param, 194 p->port.dev, "tx"); 195 if (!dma->txchan) { 196 dma_release_channel(dma->rxchan); 197 return -ENODEV; 198 } 199 200 dmaengine_slave_config(dma->txchan, &dma->txconf); 201 202 /* RX buffer */ 203 if (!dma->rx_size) 204 dma->rx_size = PAGE_SIZE; 205 206 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 207 &dma->rx_addr, GFP_KERNEL); 208 if (!dma->rx_buf) 209 goto err; 210 211 /* TX buffer */ 212 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 213 p->port.state->xmit.buf, 214 UART_XMIT_SIZE, 215 DMA_TO_DEVICE); 216 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 217 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 218 dma->rx_buf, dma->rx_addr); 219 goto err; 220 } 221 222 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 223 224 return 0; 225 err: 226 dma_release_channel(dma->rxchan); 227 dma_release_channel(dma->txchan); 228 229 return -ENOMEM; 230 } 231 EXPORT_SYMBOL_GPL(serial8250_request_dma); 232 233 void serial8250_release_dma(struct uart_8250_port *p) 234 { 235 struct uart_8250_dma *dma = p->dma; 236 237 if (!dma) 238 return; 239 240 /* Release RX resources */ 241 dmaengine_terminate_all(dma->rxchan); 242 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 243 dma->rx_addr); 244 dma_release_channel(dma->rxchan); 245 dma->rxchan = NULL; 246 247 /* Release TX resources */ 248 dmaengine_terminate_all(dma->txchan); 249 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 250 UART_XMIT_SIZE, DMA_TO_DEVICE); 251 dma_release_channel(dma->txchan); 252 dma->txchan = NULL; 253 dma->tx_running = 0; 254 255 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 256 } 257 EXPORT_SYMBOL_GPL(serial8250_release_dma); 258