xref: /linux/drivers/scsi/bnx2i/bnx2i.h (revision adfc5217e9db68d3f0cec8dd847c1a6d3ab549ee)
1cf4e6363SMichael Chan /* bnx2i.h: Broadcom NetXtreme II iSCSI driver.
2cf4e6363SMichael Chan  *
3ea9582d7SEddie Wai  * Copyright (c) 2006 - 2011 Broadcom Corporation
4cf4e6363SMichael Chan  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.
5cf4e6363SMichael Chan  * Copyright (c) 2007, 2008 Mike Christie
6cf4e6363SMichael Chan  *
7cf4e6363SMichael Chan  * This program is free software; you can redistribute it and/or modify
8cf4e6363SMichael Chan  * it under the terms of the GNU General Public License as published by
9cf4e6363SMichael Chan  * the Free Software Foundation.
10cf4e6363SMichael Chan  *
11cf4e6363SMichael Chan  * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
1211cec1e2SEddie Wai  * Maintained by: Eddie Wai (eddie.wai@broadcom.com)
13cf4e6363SMichael Chan  */
14cf4e6363SMichael Chan 
15cf4e6363SMichael Chan #ifndef _BNX2I_H_
16cf4e6363SMichael Chan #define _BNX2I_H_
17cf4e6363SMichael Chan 
18cf4e6363SMichael Chan #include <linux/module.h>
19cf4e6363SMichael Chan #include <linux/moduleparam.h>
20cf4e6363SMichael Chan 
21cf4e6363SMichael Chan #include <linux/errno.h>
22cf4e6363SMichael Chan #include <linux/pci.h>
23cf4e6363SMichael Chan #include <linux/spinlock.h>
24cf4e6363SMichael Chan #include <linux/interrupt.h>
25b5cf6b63SEddie Wai #include <linux/delay.h>
26cf4e6363SMichael Chan #include <linux/sched.h>
27cf4e6363SMichael Chan #include <linux/in.h>
28cf4e6363SMichael Chan #include <linux/kfifo.h>
29cf4e6363SMichael Chan #include <linux/netdevice.h>
30cf4e6363SMichael Chan #include <linux/completion.h>
31b5cf6b63SEddie Wai #include <linux/kthread.h>
32b5cf6b63SEddie Wai #include <linux/cpu.h>
33cf4e6363SMichael Chan 
34cf4e6363SMichael Chan #include <scsi/scsi_cmnd.h>
35cf4e6363SMichael Chan #include <scsi/scsi_device.h>
36cf4e6363SMichael Chan #include <scsi/scsi_eh.h>
37cf4e6363SMichael Chan #include <scsi/scsi_host.h>
38cf4e6363SMichael Chan #include <scsi/scsi.h>
39cf4e6363SMichael Chan #include <scsi/iscsi_proto.h>
40cf4e6363SMichael Chan #include <scsi/libiscsi.h>
41cf4e6363SMichael Chan #include <scsi/scsi_transport_iscsi.h>
42cf4e6363SMichael Chan 
43*adfc5217SJeff Kirsher #include "../../net/ethernet/broadcom/cnic_if.h"
44cf4e6363SMichael Chan #include "57xx_iscsi_hsi.h"
45cf4e6363SMichael Chan #include "57xx_iscsi_constants.h"
46cf4e6363SMichael Chan 
47cf4e6363SMichael Chan #define BNX2_ISCSI_DRIVER_NAME		"bnx2i"
48cf4e6363SMichael Chan 
49cf4e6363SMichael Chan #define BNX2I_MAX_ADAPTERS		8
50cf4e6363SMichael Chan 
51cf4e6363SMichael Chan #define ISCSI_MAX_CONNS_PER_HBA		128
52cf4e6363SMichael Chan #define ISCSI_MAX_SESS_PER_HBA		ISCSI_MAX_CONNS_PER_HBA
53cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_SESS		128
54cf4e6363SMichael Chan 
55cf4e6363SMichael Chan /* Total active commands across all connections supported by devices */
56cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_5708	(28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
57cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_5709	(128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
58cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_57710	(256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
59cf4e6363SMichael Chan 
60cf4e6363SMichael Chan #define ISCSI_MAX_BDS_PER_CMD		32
61cf4e6363SMichael Chan 
62cf4e6363SMichael Chan #define MAX_PAGES_PER_CTRL_STRUCT_POOL	8
63cf4e6363SMichael Chan #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS	4
64cf4e6363SMichael Chan 
65523224a3SDmitry Kravkov #define BNX2I_5771X_DBELL_PAGE_SIZE	128
66523224a3SDmitry Kravkov 
67cf4e6363SMichael Chan /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
68cf4e6363SMichael Chan #define MAX_BD_LENGTH			65535
69cf4e6363SMichael Chan #define BD_SPLIT_SIZE			32768
70cf4e6363SMichael Chan 
71cf4e6363SMichael Chan /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
72cf4e6363SMichael Chan #define BNX2I_SQ_WQES_MIN		16
73cf4e6363SMichael Chan #define BNX2I_570X_SQ_WQES_MAX		128
74cf4e6363SMichael Chan #define BNX2I_5770X_SQ_WQES_MAX		512
75cf4e6363SMichael Chan #define BNX2I_570X_SQ_WQES_DEFAULT	128
769ae58e14SEddie Wai #define BNX2I_5770X_SQ_WQES_DEFAULT	128
77cf4e6363SMichael Chan 
78cf4e6363SMichael Chan #define BNX2I_570X_CQ_WQES_MAX 		128
79cf4e6363SMichael Chan #define BNX2I_5770X_CQ_WQES_MAX 	512
80cf4e6363SMichael Chan 
81cf4e6363SMichael Chan #define BNX2I_RQ_WQES_MIN 		16
82cf4e6363SMichael Chan #define BNX2I_RQ_WQES_MAX 		32
83cf4e6363SMichael Chan #define BNX2I_RQ_WQES_DEFAULT 		16
84cf4e6363SMichael Chan 
85cf4e6363SMichael Chan /* CCELLs per conn */
86cf4e6363SMichael Chan #define BNX2I_CCELLS_MIN		16
87cf4e6363SMichael Chan #define BNX2I_CCELLS_MAX		96
88cf4e6363SMichael Chan #define BNX2I_CCELLS_DEFAULT		64
89cf4e6363SMichael Chan 
90cf4e6363SMichael Chan #define ITT_INVALID_SIGNATURE		0xFFFF
91cf4e6363SMichael Chan 
92cf4e6363SMichael Chan #define ISCSI_CMD_CLEANUP_TIMEOUT	100
93cf4e6363SMichael Chan 
94cf4e6363SMichael Chan #define BNX2I_CONN_CTX_BUF_SIZE		16384
95cf4e6363SMichael Chan 
96cf4e6363SMichael Chan #define BNX2I_SQ_WQE_SIZE		64
97cf4e6363SMichael Chan #define BNX2I_RQ_WQE_SIZE		256
98cf4e6363SMichael Chan #define BNX2I_CQE_SIZE			64
99cf4e6363SMichael Chan 
100cf4e6363SMichael Chan #define MB_KERNEL_CTX_SHIFT		8
101cf4e6363SMichael Chan #define MB_KERNEL_CTX_SIZE		(1 << MB_KERNEL_CTX_SHIFT)
102cf4e6363SMichael Chan 
103cf4e6363SMichael Chan #define CTX_SHIFT			7
104cf4e6363SMichael Chan #define GET_CID_NUM(cid_addr)		((cid_addr) >> CTX_SHIFT)
105cf4e6363SMichael Chan 
106cf4e6363SMichael Chan #define CTX_OFFSET 			0x10000
107cf4e6363SMichael Chan #define MAX_CID_CNT			0x4000
108cf4e6363SMichael Chan 
10953203244SAnil Veerabhadrappa #define BNX2I_570X_PAGE_SIZE_DEFAULT	4096
11053203244SAnil Veerabhadrappa 
111cf4e6363SMichael Chan /* 5709 context registers */
112cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2			0x00003d00
113cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2_CONT_SZ		(0x7L<<4)
114cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2_FIRST_L4L5	(0x1fL<<8)
115cf4e6363SMichael Chan 
116cf4e6363SMichael Chan /* 57710's BAR2 is mapped to doorbell registers */
117cf4e6363SMichael Chan #define BNX2X_DOORBELL_PCI_BAR		2
118cf4e6363SMichael Chan #define BNX2X_MAX_CQS			8
119cf4e6363SMichael Chan 
120cf4e6363SMichael Chan #define CNIC_ARM_CQE			1
1219ae58e14SEddie Wai #define CNIC_ARM_CQE_FP			2
122cf4e6363SMichael Chan #define CNIC_DISARM_CQE			0
123cf4e6363SMichael Chan 
124cf4e6363SMichael Chan #define REG_RD(__hba, offset)				\
125cf4e6363SMichael Chan 		readl(__hba->regview + offset)
126cf4e6363SMichael Chan #define REG_WR(__hba, offset, val)			\
127cf4e6363SMichael Chan 		writel(val, __hba->regview + offset)
128cf4e6363SMichael Chan 
129cf4e6363SMichael Chan 
130cf4e6363SMichael Chan /**
131cf4e6363SMichael Chan  * struct generic_pdu_resc - login pdu resource structure
132cf4e6363SMichael Chan  *
133cf4e6363SMichael Chan  * @req_buf:            driver buffer used to stage payload associated with
134cf4e6363SMichael Chan  *                      the login request
135cf4e6363SMichael Chan  * @req_dma_addr:       dma address for iscsi login request payload buffer
136cf4e6363SMichael Chan  * @req_buf_size:       actual login request payload length
137cf4e6363SMichael Chan  * @req_wr_ptr:         pointer into login request buffer when next data is
138cf4e6363SMichael Chan  *                      to be written
139cf4e6363SMichael Chan  * @resp_hdr:           iscsi header where iscsi login response header is to
140cf4e6363SMichael Chan  *                      be recreated
141cf4e6363SMichael Chan  * @resp_buf:           buffer to stage login response payload
142cf4e6363SMichael Chan  * @resp_dma_addr:      login response payload buffer dma address
143cf4e6363SMichael Chan  * @resp_buf_size:      login response paylod length
144cf4e6363SMichael Chan  * @resp_wr_ptr:        pointer into login response buffer when next data is
145cf4e6363SMichael Chan  *                      to be written
146cf4e6363SMichael Chan  * @req_bd_tbl:         iscsi login request payload BD table
147cf4e6363SMichael Chan  * @req_bd_dma:         login request BD table dma address
148cf4e6363SMichael Chan  * @resp_bd_tbl:        iscsi login response payload BD table
149cf4e6363SMichael Chan  * @resp_bd_dma:        login request BD table dma address
150cf4e6363SMichael Chan  *
151cf4e6363SMichael Chan  * following structure defines buffer info for generic pdus such as iSCSI Login,
152cf4e6363SMichael Chan  *	Logout and NOP
153cf4e6363SMichael Chan  */
154cf4e6363SMichael Chan struct generic_pdu_resc {
155cf4e6363SMichael Chan 	char *req_buf;
156cf4e6363SMichael Chan 	dma_addr_t req_dma_addr;
157cf4e6363SMichael Chan 	u32 req_buf_size;
158cf4e6363SMichael Chan 	char *req_wr_ptr;
159cf4e6363SMichael Chan 	struct iscsi_hdr resp_hdr;
160cf4e6363SMichael Chan 	char *resp_buf;
161cf4e6363SMichael Chan 	dma_addr_t resp_dma_addr;
162cf4e6363SMichael Chan 	u32 resp_buf_size;
163cf4e6363SMichael Chan 	char *resp_wr_ptr;
164cf4e6363SMichael Chan 	char *req_bd_tbl;
165cf4e6363SMichael Chan 	dma_addr_t req_bd_dma;
166cf4e6363SMichael Chan 	char *resp_bd_tbl;
167cf4e6363SMichael Chan 	dma_addr_t resp_bd_dma;
168cf4e6363SMichael Chan };
169cf4e6363SMichael Chan 
170cf4e6363SMichael Chan 
171cf4e6363SMichael Chan /**
172cf4e6363SMichael Chan  * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
173cf4e6363SMichael Chan  *
174cf4e6363SMichael Chan  * @link:               list head to link elements
175cf4e6363SMichael Chan  * @max_ptrs:           maximun pointers that can be stored in this page
176cf4e6363SMichael Chan  * @num_valid:          number of pointer valid in this page
177cf4e6363SMichael Chan  * @page:               base addess for page pointer array
178cf4e6363SMichael Chan  *
179cf4e6363SMichael Chan  * structure to track DMA'able memory allocated for command BD tables
180cf4e6363SMichael Chan  */
181cf4e6363SMichael Chan struct bd_resc_page {
182cf4e6363SMichael Chan 	struct list_head link;
183cf4e6363SMichael Chan 	u32 max_ptrs;
184cf4e6363SMichael Chan 	u32 num_valid;
185cf4e6363SMichael Chan 	void *page[1];
186cf4e6363SMichael Chan };
187cf4e6363SMichael Chan 
188cf4e6363SMichael Chan 
189cf4e6363SMichael Chan /**
190cf4e6363SMichael Chan  * struct io_bdt - I/O buffer destricptor table
191cf4e6363SMichael Chan  *
192cf4e6363SMichael Chan  * @bd_tbl:             BD table's virtual address
193cf4e6363SMichael Chan  * @bd_tbl_dma:         BD table's dma address
194cf4e6363SMichael Chan  * @bd_valid:           num valid BD entries
195cf4e6363SMichael Chan  *
196cf4e6363SMichael Chan  * IO BD table
197cf4e6363SMichael Chan  */
198cf4e6363SMichael Chan struct io_bdt {
199cf4e6363SMichael Chan 	struct iscsi_bd *bd_tbl;
200cf4e6363SMichael Chan 	dma_addr_t bd_tbl_dma;
201cf4e6363SMichael Chan 	u16 bd_valid;
202cf4e6363SMichael Chan };
203cf4e6363SMichael Chan 
204cf4e6363SMichael Chan 
205cf4e6363SMichael Chan /**
206cf4e6363SMichael Chan  * bnx2i_cmd - iscsi command structure
207cf4e6363SMichael Chan  *
208b5cf6b63SEddie Wai  * @hdr:                iSCSI header
209b5cf6b63SEddie Wai  * @conn:               iscsi_conn pointer
210cf4e6363SMichael Chan  * @scsi_cmd:           SCSI-ML task pointer corresponding to this iscsi cmd
211cf4e6363SMichael Chan  * @sg:                 SG list
212cf4e6363SMichael Chan  * @io_tbl:             buffer descriptor (BD) table
213cf4e6363SMichael Chan  * @bd_tbl_dma:         buffer descriptor (BD) table's dma address
214b5cf6b63SEddie Wai  * @req:                bnx2i specific command request struct
215cf4e6363SMichael Chan  */
216cf4e6363SMichael Chan struct bnx2i_cmd {
217cf4e6363SMichael Chan 	struct iscsi_hdr hdr;
218cf4e6363SMichael Chan 	struct bnx2i_conn *conn;
219cf4e6363SMichael Chan 	struct scsi_cmnd *scsi_cmd;
220cf4e6363SMichael Chan 	struct scatterlist *sg;
221cf4e6363SMichael Chan 	struct io_bdt io_tbl;
222cf4e6363SMichael Chan 	dma_addr_t bd_tbl_dma;
223cf4e6363SMichael Chan 	struct bnx2i_cmd_request req;
224cf4e6363SMichael Chan };
225cf4e6363SMichael Chan 
226cf4e6363SMichael Chan 
227cf4e6363SMichael Chan /**
228cf4e6363SMichael Chan  * struct bnx2i_conn - iscsi connection structure
229cf4e6363SMichael Chan  *
230cf4e6363SMichael Chan  * @cls_conn:              pointer to iscsi cls conn
231cf4e6363SMichael Chan  * @hba:                   adapter structure pointer
232cf4e6363SMichael Chan  * @iscsi_conn_cid:        iscsi conn id
233cf4e6363SMichael Chan  * @fw_cid:                firmware iscsi context id
234cf4e6363SMichael Chan  * @ep:                    endpoint structure pointer
235cf4e6363SMichael Chan  * @gen_pdu:               login/nopout/logout pdu resources
236cf4e6363SMichael Chan  * @violation_notified:    bit mask used to track iscsi error/warning messages
237cf4e6363SMichael Chan  *                         already printed out
238b5cf6b63SEddie Wai  * @work_cnt:              keeps track of the number of outstanding work
239cf4e6363SMichael Chan  *
240cf4e6363SMichael Chan  * iSCSI connection structure
241cf4e6363SMichael Chan  */
242cf4e6363SMichael Chan struct bnx2i_conn {
243cf4e6363SMichael Chan 	struct iscsi_cls_conn *cls_conn;
244cf4e6363SMichael Chan 	struct bnx2i_hba *hba;
245cf4e6363SMichael Chan 	struct completion cmd_cleanup_cmpl;
246cf4e6363SMichael Chan 
247cf4e6363SMichael Chan 	u32 iscsi_conn_cid;
248cf4e6363SMichael Chan #define BNX2I_CID_RESERVED	0x5AFF
249cf4e6363SMichael Chan 	u32 fw_cid;
250cf4e6363SMichael Chan 
251cf4e6363SMichael Chan 	struct timer_list poll_timer;
252cf4e6363SMichael Chan 	/*
253cf4e6363SMichael Chan 	 * Queue Pair (QP) related structure elements.
254cf4e6363SMichael Chan 	 */
255cf4e6363SMichael Chan 	struct bnx2i_endpoint *ep;
256cf4e6363SMichael Chan 
257cf4e6363SMichael Chan 	/*
258cf4e6363SMichael Chan 	 * Buffer for login negotiation process
259cf4e6363SMichael Chan 	 */
260cf4e6363SMichael Chan 	struct generic_pdu_resc gen_pdu;
261cf4e6363SMichael Chan 	u64 violation_notified;
262b5cf6b63SEddie Wai 
263b5cf6b63SEddie Wai 	atomic_t work_cnt;
264cf4e6363SMichael Chan };
265cf4e6363SMichael Chan 
266cf4e6363SMichael Chan 
267cf4e6363SMichael Chan 
268cf4e6363SMichael Chan /**
269cf4e6363SMichael Chan  * struct iscsi_cid_queue - Per adapter iscsi cid queue
270cf4e6363SMichael Chan  *
271cf4e6363SMichael Chan  * @cid_que_base:           queue base memory
272cf4e6363SMichael Chan  * @cid_que:                queue memory pointer
273cf4e6363SMichael Chan  * @cid_q_prod_idx:         produce index
274cf4e6363SMichael Chan  * @cid_q_cons_idx:         consumer index
275cf4e6363SMichael Chan  * @cid_q_max_idx:          max index. used to detect wrap around condition
276cf4e6363SMichael Chan  * @cid_free_cnt:           queue size
277cf4e6363SMichael Chan  * @conn_cid_tbl:           iscsi cid to conn structure mapping table
278cf4e6363SMichael Chan  *
279cf4e6363SMichael Chan  * Per adapter iSCSI CID Queue
280cf4e6363SMichael Chan  */
281cf4e6363SMichael Chan struct iscsi_cid_queue {
282cf4e6363SMichael Chan 	void *cid_que_base;
283cf4e6363SMichael Chan 	u32 *cid_que;
284cf4e6363SMichael Chan 	u32 cid_q_prod_idx;
285cf4e6363SMichael Chan 	u32 cid_q_cons_idx;
286cf4e6363SMichael Chan 	u32 cid_q_max_idx;
287cf4e6363SMichael Chan 	u32 cid_free_cnt;
288cf4e6363SMichael Chan 	struct bnx2i_conn **conn_cid_tbl;
289cf4e6363SMichael Chan };
290cf4e6363SMichael Chan 
291cf4e6363SMichael Chan /**
292cf4e6363SMichael Chan  * struct bnx2i_hba - bnx2i adapter structure
293cf4e6363SMichael Chan  *
294cf4e6363SMichael Chan  * @link:                  list head to link elements
295cf4e6363SMichael Chan  * @cnic:                  pointer to cnic device
296cf4e6363SMichael Chan  * @pcidev:                pointer to pci dev
297cf4e6363SMichael Chan  * @netdev:                pointer to netdev structure
298cf4e6363SMichael Chan  * @regview:               mapped PCI register space
299cf4e6363SMichael Chan  * @age:                   age, incremented by every recovery
300cf4e6363SMichael Chan  * @cnic_dev_type:         cnic device type, 5706/5708/5709/57710
301cf4e6363SMichael Chan  * @mail_queue_access:     mailbox queue access mode, applicable to 5709 only
302cf4e6363SMichael Chan  * @reg_with_cnic:         indicates whether the device is register with CNIC
303cf4e6363SMichael Chan  * @adapter_state:         adapter state, UP, GOING_DOWN, LINK_DOWN
304cf4e6363SMichael Chan  * @mtu_supported:         Ethernet MTU supported
305cf4e6363SMichael Chan  * @shost:                 scsi host pointer
306cf4e6363SMichael Chan  * @max_sqes:              SQ size
307cf4e6363SMichael Chan  * @max_rqes:              RQ size
308cf4e6363SMichael Chan  * @max_cqes:              CQ size
309cf4e6363SMichael Chan  * @num_ccell:             number of command cells per connection
310cf4e6363SMichael Chan  * @ofld_conns_active:     active connection list
31155e15c97SEddie Wai  * @eh_wait:               wait queue for the endpoint to shutdown
312cf4e6363SMichael Chan  * @max_active_conns:      max offload connections supported by this device
313cf4e6363SMichael Chan  * @cid_que:               iscsi cid queue
314cf4e6363SMichael Chan  * @ep_rdwr_lock:          read / write lock to synchronize various ep lists
315cf4e6363SMichael Chan  * @ep_ofld_list:          connection list for pending offload completion
31646012e8bSEddie Wai  * @ep_active_list:        connection list for active offload endpoints
317cf4e6363SMichael Chan  * @ep_destroy_list:       connection list for pending offload completion
318cf4e6363SMichael Chan  * @mp_bd_tbl:             BD table to be used with middle path requests
319cf4e6363SMichael Chan  * @mp_bd_dma:             DMA address of 'mp_bd_tbl' memory buffer
320cf4e6363SMichael Chan  * @dummy_buffer:          Dummy buffer to be used with zero length scsicmd reqs
321cf4e6363SMichael Chan  * @dummy_buf_dma:         DMA address of 'dummy_buffer' memory buffer
322cf4e6363SMichael Chan  * @lock:              	   lock to synchonize access to hba structure
32355e15c97SEddie Wai  * @hba_shutdown_tmo:      Timeout value to shutdown each connection
324e37d2c47SEddie Wai  * @conn_teardown_tmo:     Timeout value to tear down each connection
325e37d2c47SEddie Wai  * @conn_ctx_destroy_tmo:  Timeout value to destroy context of each connection
326cf4e6363SMichael Chan  * @pci_did:               PCI device ID
327cf4e6363SMichael Chan  * @pci_vid:               PCI vendor ID
328cf4e6363SMichael Chan  * @pci_sdid:              PCI subsystem device ID
329cf4e6363SMichael Chan  * @pci_svid:              PCI subsystem vendor ID
330cf4e6363SMichael Chan  * @pci_func:              PCI function number in system pci tree
331cf4e6363SMichael Chan  * @pci_devno:             PCI device number in system pci tree
332cf4e6363SMichael Chan  * @num_wqe_sent:          statistic counter, total wqe's sent
333cf4e6363SMichael Chan  * @num_cqe_rcvd:          statistic counter, total cqe's received
334cf4e6363SMichael Chan  * @num_intr_claimed:      statistic counter, total interrupts claimed
335cf4e6363SMichael Chan  * @link_changed_count:    statistic counter, num of link change notifications
336cf4e6363SMichael Chan  *                         received
337cf4e6363SMichael Chan  * @ipaddr_changed_count:  statistic counter, num times IP address changed while
338cf4e6363SMichael Chan  *                         at least one connection is offloaded
339cf4e6363SMichael Chan  * @num_sess_opened:       statistic counter, total num sessions opened
340cf4e6363SMichael Chan  * @num_conn_opened:       statistic counter, total num conns opened on this hba
341cf4e6363SMichael Chan  * @ctx_ccell_tasks:       captures number of ccells and tasks supported by
342cf4e6363SMichael Chan  *                         currently offloaded connection, used to decode
343cf4e6363SMichael Chan  *                         context memory
344cf4e6363SMichael Chan  *
345cf4e6363SMichael Chan  * Adapter Data Structure
346cf4e6363SMichael Chan  */
347cf4e6363SMichael Chan struct bnx2i_hba {
348cf4e6363SMichael Chan 	struct list_head link;
349cf4e6363SMichael Chan 	struct cnic_dev *cnic;
350cf4e6363SMichael Chan 	struct pci_dev *pcidev;
351cf4e6363SMichael Chan 	struct net_device *netdev;
352cf4e6363SMichael Chan 	void __iomem *regview;
353cf4e6363SMichael Chan 
354cf4e6363SMichael Chan 	u32 age;
355cf4e6363SMichael Chan 	unsigned long cnic_dev_type;
356cf4e6363SMichael Chan 		#define BNX2I_NX2_DEV_5706		0x0
357cf4e6363SMichael Chan 		#define BNX2I_NX2_DEV_5708		0x1
358cf4e6363SMichael Chan 		#define BNX2I_NX2_DEV_5709		0x2
359cf4e6363SMichael Chan 		#define BNX2I_NX2_DEV_57710		0x3
360cf4e6363SMichael Chan 	u32 mail_queue_access;
361cf4e6363SMichael Chan 		#define BNX2I_MQ_KERNEL_MODE		0x0
362cf4e6363SMichael Chan 		#define BNX2I_MQ_KERNEL_BYPASS_MODE	0x1
363cf4e6363SMichael Chan 		#define BNX2I_MQ_BIN_MODE		0x2
364cf4e6363SMichael Chan 	unsigned long  reg_with_cnic;
365cf4e6363SMichael Chan 		#define BNX2I_CNIC_REGISTERED		1
366cf4e6363SMichael Chan 
367cf4e6363SMichael Chan 	unsigned long  adapter_state;
368cf4e6363SMichael Chan 		#define ADAPTER_STATE_UP		0
369cf4e6363SMichael Chan 		#define ADAPTER_STATE_GOING_DOWN	1
370cf4e6363SMichael Chan 		#define ADAPTER_STATE_LINK_DOWN		2
371cf4e6363SMichael Chan 		#define ADAPTER_STATE_INIT_FAILED	31
372cf4e6363SMichael Chan 	unsigned int mtu_supported;
37345188354SEddie Wai 		#define BNX2I_MAX_MTU_SUPPORTED		9000
374cf4e6363SMichael Chan 
375cf4e6363SMichael Chan 	struct Scsi_Host *shost;
376cf4e6363SMichael Chan 
377cf4e6363SMichael Chan 	u32 max_sqes;
378cf4e6363SMichael Chan 	u32 max_rqes;
379cf4e6363SMichael Chan 	u32 max_cqes;
380cf4e6363SMichael Chan 	u32 num_ccell;
381cf4e6363SMichael Chan 
382cf4e6363SMichael Chan 	int ofld_conns_active;
383490475a9SAnil Veerabhadrappa 	wait_queue_head_t eh_wait;
384cf4e6363SMichael Chan 
385cf4e6363SMichael Chan 	int max_active_conns;
386cf4e6363SMichael Chan 	struct iscsi_cid_queue cid_que;
387cf4e6363SMichael Chan 
388cf4e6363SMichael Chan 	rwlock_t ep_rdwr_lock;
389cf4e6363SMichael Chan 	struct list_head ep_ofld_list;
39046012e8bSEddie Wai 	struct list_head ep_active_list;
391cf4e6363SMichael Chan 	struct list_head ep_destroy_list;
392cf4e6363SMichael Chan 
393cf4e6363SMichael Chan 	/*
394cf4e6363SMichael Chan 	 * BD table to be used with MP (Middle Path requests.
395cf4e6363SMichael Chan 	 */
396cf4e6363SMichael Chan 	char *mp_bd_tbl;
397cf4e6363SMichael Chan 	dma_addr_t mp_bd_dma;
398cf4e6363SMichael Chan 	char *dummy_buffer;
399cf4e6363SMichael Chan 	dma_addr_t dummy_buf_dma;
400cf4e6363SMichael Chan 
401cf4e6363SMichael Chan 	spinlock_t lock;	/* protects hba structure access */
402cf4e6363SMichael Chan 	struct mutex net_dev_lock;/* sync net device access */
403cf4e6363SMichael Chan 
404490475a9SAnil Veerabhadrappa 	int hba_shutdown_tmo;
405e37d2c47SEddie Wai 	int conn_teardown_tmo;
406e37d2c47SEddie Wai 	int conn_ctx_destroy_tmo;
407cf4e6363SMichael Chan 	/*
408cf4e6363SMichael Chan 	 * PCI related info.
409cf4e6363SMichael Chan 	 */
410cf4e6363SMichael Chan 	u16 pci_did;
411cf4e6363SMichael Chan 	u16 pci_vid;
412cf4e6363SMichael Chan 	u16 pci_sdid;
413cf4e6363SMichael Chan 	u16 pci_svid;
414cf4e6363SMichael Chan 	u16 pci_func;
415cf4e6363SMichael Chan 	u16 pci_devno;
416cf4e6363SMichael Chan 
417cf4e6363SMichael Chan 	/*
418cf4e6363SMichael Chan 	 * Following are a bunch of statistics useful during development
419cf4e6363SMichael Chan 	 * and later stage for score boarding.
420cf4e6363SMichael Chan 	 */
421cf4e6363SMichael Chan 	u32 num_wqe_sent;
422cf4e6363SMichael Chan 	u32 num_cqe_rcvd;
423cf4e6363SMichael Chan 	u32 num_intr_claimed;
424cf4e6363SMichael Chan 	u32 link_changed_count;
425cf4e6363SMichael Chan 	u32 ipaddr_changed_count;
426cf4e6363SMichael Chan 	u32 num_sess_opened;
427cf4e6363SMichael Chan 	u32 num_conn_opened;
428cf4e6363SMichael Chan 	unsigned int ctx_ccell_tasks;
429cf4e6363SMichael Chan };
430cf4e6363SMichael Chan 
431cf4e6363SMichael Chan 
432cf4e6363SMichael Chan /*******************************************************************************
433cf4e6363SMichael Chan  * 	QP [ SQ / RQ / CQ ] info.
434cf4e6363SMichael Chan  ******************************************************************************/
435cf4e6363SMichael Chan 
436cf4e6363SMichael Chan /*
437cf4e6363SMichael Chan  * SQ/RQ/CQ generic structure definition
438cf4e6363SMichael Chan  */
439cf4e6363SMichael Chan struct 	sqe {
440cf4e6363SMichael Chan 	u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
441cf4e6363SMichael Chan };
442cf4e6363SMichael Chan 
443cf4e6363SMichael Chan struct 	rqe {
444cf4e6363SMichael Chan 	u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
445cf4e6363SMichael Chan };
446cf4e6363SMichael Chan 
447cf4e6363SMichael Chan struct 	cqe {
448cf4e6363SMichael Chan 	u8 cqe_byte[BNX2I_CQE_SIZE];
449cf4e6363SMichael Chan };
450cf4e6363SMichael Chan 
451cf4e6363SMichael Chan 
452cf4e6363SMichael Chan enum {
453cf4e6363SMichael Chan #if defined(__LITTLE_ENDIAN)
454cf4e6363SMichael Chan 	CNIC_EVENT_COAL_INDEX	= 0x0,
455cf4e6363SMichael Chan 	CNIC_SEND_DOORBELL	= 0x4,
456cf4e6363SMichael Chan 	CNIC_EVENT_CQ_ARM	= 0x7,
457cf4e6363SMichael Chan 	CNIC_RECV_DOORBELL	= 0x8
458cf4e6363SMichael Chan #elif defined(__BIG_ENDIAN)
459cf4e6363SMichael Chan 	CNIC_EVENT_COAL_INDEX	= 0x2,
460cf4e6363SMichael Chan 	CNIC_SEND_DOORBELL	= 0x6,
461cf4e6363SMichael Chan 	CNIC_EVENT_CQ_ARM	= 0x4,
462cf4e6363SMichael Chan 	CNIC_RECV_DOORBELL	= 0xa
463cf4e6363SMichael Chan #endif
464cf4e6363SMichael Chan };
465cf4e6363SMichael Chan 
466cf4e6363SMichael Chan 
467cf4e6363SMichael Chan /*
468cf4e6363SMichael Chan  * CQ DB
469cf4e6363SMichael Chan  */
470cf4e6363SMichael Chan struct bnx2x_iscsi_cq_pend_cmpl {
471cf4e6363SMichael Chan 	/* CQ producer, updated by Ustorm */
472cf4e6363SMichael Chan 	u16 ustrom_prod;
473cf4e6363SMichael Chan 	/* CQ pending completion counter */
474cf4e6363SMichael Chan 	u16 pend_cntr;
475cf4e6363SMichael Chan };
476cf4e6363SMichael Chan 
477cf4e6363SMichael Chan 
478cf4e6363SMichael Chan struct bnx2i_5771x_cq_db {
479cf4e6363SMichael Chan 	struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
480cf4e6363SMichael Chan 	/* CQ pending completion ITT array */
481cf4e6363SMichael Chan 	u16 itt[BNX2X_MAX_CQS];
482cf4e6363SMichael Chan 	/* Cstorm CQ sequence to notify array, updated by driver */;
483cf4e6363SMichael Chan 	u16 sqn[BNX2X_MAX_CQS];
484cf4e6363SMichael Chan 	u32 reserved[4] /* 16 byte allignment */;
485cf4e6363SMichael Chan };
486cf4e6363SMichael Chan 
487cf4e6363SMichael Chan 
488cf4e6363SMichael Chan struct bnx2i_5771x_sq_rq_db {
489cf4e6363SMichael Chan 	u16 prod_idx;
490f4b5ad26SMichael Chan 	u8 reserved0[62]; /* Pad structure size to 64 bytes */
491cf4e6363SMichael Chan };
492cf4e6363SMichael Chan 
493cf4e6363SMichael Chan 
494cf4e6363SMichael Chan struct bnx2i_5771x_dbell_hdr {
495cf4e6363SMichael Chan 	u8 header;
496cf4e6363SMichael Chan 	/* 1 for rx doorbell, 0 for tx doorbell */
497cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_RX				(0x1<<0)
498cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_RX_SHIFT			0
499cf4e6363SMichael Chan 	/* 0 for normal doorbell, 1 for advertise wnd doorbell */
500cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DB_TYPE			(0x1<<1)
501cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT		1
502cf4e6363SMichael Chan 	/* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
503cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DPM_SIZE			(0x3<<2)
504cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT		2
505cf4e6363SMichael Chan 	/* connection type */
506cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_CONN_TYPE			(0xF<<4)
507cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT		4
508cf4e6363SMichael Chan };
509cf4e6363SMichael Chan 
510cf4e6363SMichael Chan struct bnx2i_5771x_dbell {
511cf4e6363SMichael Chan 	struct bnx2i_5771x_dbell_hdr dbell;
512cf4e6363SMichael Chan 	u8 pad[3];
513cf4e6363SMichael Chan 
514cf4e6363SMichael Chan };
515cf4e6363SMichael Chan 
516cf4e6363SMichael Chan /**
517cf4e6363SMichael Chan  * struct qp_info - QP (share queue region) atrributes structure
518cf4e6363SMichael Chan  *
519cf4e6363SMichael Chan  * @ctx_base:           ioremapped pci register base to access doorbell register
520cf4e6363SMichael Chan  *                      pertaining to this offloaded connection
521cf4e6363SMichael Chan  * @sq_virt:            virtual address of send queue (SQ) region
522cf4e6363SMichael Chan  * @sq_phys:            DMA address of SQ memory region
523cf4e6363SMichael Chan  * @sq_mem_size:        SQ size
524cf4e6363SMichael Chan  * @sq_prod_qe:         SQ producer entry pointer
525cf4e6363SMichael Chan  * @sq_cons_qe:         SQ consumer entry pointer
526cf4e6363SMichael Chan  * @sq_first_qe:        virtaul address of first entry in SQ
527cf4e6363SMichael Chan  * @sq_last_qe:         virtaul address of last entry in SQ
528cf4e6363SMichael Chan  * @sq_prod_idx:        SQ producer index
529cf4e6363SMichael Chan  * @sq_cons_idx:        SQ consumer index
530cf4e6363SMichael Chan  * @sqe_left:           number sq entry left
531cf4e6363SMichael Chan  * @sq_pgtbl_virt:      page table describing buffer consituting SQ region
532cf4e6363SMichael Chan  * @sq_pgtbl_phys:      dma address of 'sq_pgtbl_virt'
533cf4e6363SMichael Chan  * @sq_pgtbl_size:      SQ page table size
534cf4e6363SMichael Chan  * @cq_virt:            virtual address of completion queue (CQ) region
535cf4e6363SMichael Chan  * @cq_phys:            DMA address of RQ memory region
536cf4e6363SMichael Chan  * @cq_mem_size:        CQ size
537cf4e6363SMichael Chan  * @cq_prod_qe:         CQ producer entry pointer
538cf4e6363SMichael Chan  * @cq_cons_qe:         CQ consumer entry pointer
539cf4e6363SMichael Chan  * @cq_first_qe:        virtaul address of first entry in CQ
540cf4e6363SMichael Chan  * @cq_last_qe:         virtaul address of last entry in CQ
541cf4e6363SMichael Chan  * @cq_prod_idx:        CQ producer index
542cf4e6363SMichael Chan  * @cq_cons_idx:        CQ consumer index
543cf4e6363SMichael Chan  * @cqe_left:           number cq entry left
544cf4e6363SMichael Chan  * @cqe_size:           size of each CQ entry
545cf4e6363SMichael Chan  * @cqe_exp_seq_sn:     next expected CQE sequence number
546cf4e6363SMichael Chan  * @cq_pgtbl_virt:      page table describing buffer consituting CQ region
547cf4e6363SMichael Chan  * @cq_pgtbl_phys:      dma address of 'cq_pgtbl_virt'
548cf4e6363SMichael Chan  * @cq_pgtbl_size:    	CQ page table size
549cf4e6363SMichael Chan  * @rq_virt:            virtual address of receive queue (RQ) region
550cf4e6363SMichael Chan  * @rq_phys:            DMA address of RQ memory region
551cf4e6363SMichael Chan  * @rq_mem_size:        RQ size
552cf4e6363SMichael Chan  * @rq_prod_qe:         RQ producer entry pointer
553cf4e6363SMichael Chan  * @rq_cons_qe:         RQ consumer entry pointer
554cf4e6363SMichael Chan  * @rq_first_qe:        virtaul address of first entry in RQ
555cf4e6363SMichael Chan  * @rq_last_qe:         virtaul address of last entry in RQ
556cf4e6363SMichael Chan  * @rq_prod_idx:        RQ producer index
557cf4e6363SMichael Chan  * @rq_cons_idx:        RQ consumer index
558cf4e6363SMichael Chan  * @rqe_left:           number rq entry left
559cf4e6363SMichael Chan  * @rq_pgtbl_virt:      page table describing buffer consituting RQ region
560cf4e6363SMichael Chan  * @rq_pgtbl_phys:      dma address of 'rq_pgtbl_virt'
561cf4e6363SMichael Chan  * @rq_pgtbl_size:      RQ page table size
562cf4e6363SMichael Chan  *
563cf4e6363SMichael Chan  * queue pair (QP) is a per connection shared data structure which is used
564cf4e6363SMichael Chan  *	to send work requests (SQ), receive completion notifications (CQ)
565cf4e6363SMichael Chan  *	and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
566cf4e6363SMichael Chan  *	below holds queue memory, consumer/producer indexes and page table
567cf4e6363SMichael Chan  *	information
568cf4e6363SMichael Chan  */
569cf4e6363SMichael Chan struct qp_info {
570cf4e6363SMichael Chan 	void __iomem *ctx_base;
571cf4e6363SMichael Chan #define DPM_TRIGER_TYPE			0x40
572cf4e6363SMichael Chan 
573cf4e6363SMichael Chan #define BNX2I_570x_QUE_DB_SIZE		0
574cf4e6363SMichael Chan #define BNX2I_5771x_QUE_DB_SIZE		16
575cf4e6363SMichael Chan 	struct sqe *sq_virt;
576cf4e6363SMichael Chan 	dma_addr_t sq_phys;
577cf4e6363SMichael Chan 	u32 sq_mem_size;
578cf4e6363SMichael Chan 
579cf4e6363SMichael Chan 	struct sqe *sq_prod_qe;
580cf4e6363SMichael Chan 	struct sqe *sq_cons_qe;
581cf4e6363SMichael Chan 	struct sqe *sq_first_qe;
582cf4e6363SMichael Chan 	struct sqe *sq_last_qe;
583cf4e6363SMichael Chan 	u16 sq_prod_idx;
584cf4e6363SMichael Chan 	u16 sq_cons_idx;
585cf4e6363SMichael Chan 	u32 sqe_left;
586cf4e6363SMichael Chan 
587cf4e6363SMichael Chan 	void *sq_pgtbl_virt;
588cf4e6363SMichael Chan 	dma_addr_t sq_pgtbl_phys;
589cf4e6363SMichael Chan 	u32 sq_pgtbl_size;	/* set to PAGE_SIZE for 5708 & 5709 */
590cf4e6363SMichael Chan 
591cf4e6363SMichael Chan 	struct cqe *cq_virt;
592cf4e6363SMichael Chan 	dma_addr_t cq_phys;
593cf4e6363SMichael Chan 	u32 cq_mem_size;
594cf4e6363SMichael Chan 
595cf4e6363SMichael Chan 	struct cqe *cq_prod_qe;
596cf4e6363SMichael Chan 	struct cqe *cq_cons_qe;
597cf4e6363SMichael Chan 	struct cqe *cq_first_qe;
598cf4e6363SMichael Chan 	struct cqe *cq_last_qe;
599cf4e6363SMichael Chan 	u16 cq_prod_idx;
600cf4e6363SMichael Chan 	u16 cq_cons_idx;
601cf4e6363SMichael Chan 	u32 cqe_left;
602cf4e6363SMichael Chan 	u32 cqe_size;
603cf4e6363SMichael Chan 	u32 cqe_exp_seq_sn;
604cf4e6363SMichael Chan 
605cf4e6363SMichael Chan 	void *cq_pgtbl_virt;
606cf4e6363SMichael Chan 	dma_addr_t cq_pgtbl_phys;
607cf4e6363SMichael Chan 	u32 cq_pgtbl_size;	/* set to PAGE_SIZE for 5708 & 5709 */
608cf4e6363SMichael Chan 
609cf4e6363SMichael Chan 	struct rqe *rq_virt;
610cf4e6363SMichael Chan 	dma_addr_t rq_phys;
611cf4e6363SMichael Chan 	u32 rq_mem_size;
612cf4e6363SMichael Chan 
613cf4e6363SMichael Chan 	struct rqe *rq_prod_qe;
614cf4e6363SMichael Chan 	struct rqe *rq_cons_qe;
615cf4e6363SMichael Chan 	struct rqe *rq_first_qe;
616cf4e6363SMichael Chan 	struct rqe *rq_last_qe;
617cf4e6363SMichael Chan 	u16 rq_prod_idx;
618cf4e6363SMichael Chan 	u16 rq_cons_idx;
619cf4e6363SMichael Chan 	u32 rqe_left;
620cf4e6363SMichael Chan 
621cf4e6363SMichael Chan 	void *rq_pgtbl_virt;
622cf4e6363SMichael Chan 	dma_addr_t rq_pgtbl_phys;
623cf4e6363SMichael Chan 	u32 rq_pgtbl_size;	/* set to PAGE_SIZE for 5708 & 5709 */
624cf4e6363SMichael Chan };
625cf4e6363SMichael Chan 
626cf4e6363SMichael Chan 
627cf4e6363SMichael Chan 
628cf4e6363SMichael Chan /*
629cf4e6363SMichael Chan  * CID handles
630cf4e6363SMichael Chan  */
631cf4e6363SMichael Chan struct ep_handles {
632cf4e6363SMichael Chan 	u32 fw_cid;
633cf4e6363SMichael Chan 	u32 drv_iscsi_cid;
634cf4e6363SMichael Chan 	u16 pg_cid;
635cf4e6363SMichael Chan 	u16 rsvd;
636cf4e6363SMichael Chan };
637cf4e6363SMichael Chan 
638cf4e6363SMichael Chan 
639cf4e6363SMichael Chan enum {
640cf4e6363SMichael Chan 	EP_STATE_IDLE                   = 0x0,
641cf4e6363SMichael Chan 	EP_STATE_PG_OFLD_START          = 0x1,
642cf4e6363SMichael Chan 	EP_STATE_PG_OFLD_COMPL          = 0x2,
643cf4e6363SMichael Chan 	EP_STATE_OFLD_START             = 0x4,
644cf4e6363SMichael Chan 	EP_STATE_OFLD_COMPL             = 0x8,
645cf4e6363SMichael Chan 	EP_STATE_CONNECT_START          = 0x10,
646cf4e6363SMichael Chan 	EP_STATE_CONNECT_COMPL          = 0x20,
647cf4e6363SMichael Chan 	EP_STATE_ULP_UPDATE_START       = 0x40,
648cf4e6363SMichael Chan 	EP_STATE_ULP_UPDATE_COMPL       = 0x80,
649cf4e6363SMichael Chan 	EP_STATE_DISCONN_START          = 0x100,
650cf4e6363SMichael Chan 	EP_STATE_DISCONN_COMPL          = 0x200,
651cf4e6363SMichael Chan 	EP_STATE_CLEANUP_START          = 0x400,
652cf4e6363SMichael Chan 	EP_STATE_CLEANUP_CMPL           = 0x800,
653cf4e6363SMichael Chan 	EP_STATE_TCP_FIN_RCVD           = 0x1000,
654cf4e6363SMichael Chan 	EP_STATE_TCP_RST_RCVD           = 0x2000,
6552eefb20dSEddie Wai 	EP_STATE_LOGOUT_SENT            = 0x4000,
6562eefb20dSEddie Wai 	EP_STATE_LOGOUT_RESP_RCVD       = 0x8000,
657cf4e6363SMichael Chan 	EP_STATE_PG_OFLD_FAILED         = 0x1000000,
658cf4e6363SMichael Chan 	EP_STATE_ULP_UPDATE_FAILED      = 0x2000000,
659cf4e6363SMichael Chan 	EP_STATE_CLEANUP_FAILED         = 0x4000000,
660cf4e6363SMichael Chan 	EP_STATE_OFLD_FAILED            = 0x8000000,
661cf4e6363SMichael Chan 	EP_STATE_CONNECT_FAILED         = 0x10000000,
662cf4e6363SMichael Chan 	EP_STATE_DISCONN_TIMEDOUT       = 0x20000000,
663bee34877SEddie Wai 	EP_STATE_OFLD_FAILED_CID_BUSY   = 0x80000000,
664cf4e6363SMichael Chan };
665cf4e6363SMichael Chan 
666cf4e6363SMichael Chan /**
667cf4e6363SMichael Chan  * struct bnx2i_endpoint - representation of tcp connection in NX2 world
668cf4e6363SMichael Chan  *
669cf4e6363SMichael Chan  * @link:               list head to link elements
670cf4e6363SMichael Chan  * @hba:                adapter to which this connection belongs
671cf4e6363SMichael Chan  * @conn:               iscsi connection this EP is linked to
67246012e8bSEddie Wai  * @cls_ep:             associated iSCSI endpoint pointer
673cf4e6363SMichael Chan  * @cm_sk:              cnic sock struct
674cf4e6363SMichael Chan  * @hba_age:            age to detect if 'iscsid' issues ep_disconnect()
675cf4e6363SMichael Chan  *                      after HBA reset is completed by bnx2i/cnic/bnx2
676cf4e6363SMichael Chan  *                      modules
677cf4e6363SMichael Chan  * @state:              tracks offload connection state machine
6789ae58e14SEddie Wai  * @timestamp:          tracks the start time when the ep begins to connect
6799ae58e14SEddie Wai  * @num_active_cmds:    tracks the number of outstanding commands for this ep
6809ae58e14SEddie Wai  * @ec_shift:           the amount of shift as part of the event coal calc
681cf4e6363SMichael Chan  * @qp:                 QP information
682cf4e6363SMichael Chan  * @ids:                contains chip allocated *context id* & driver assigned
683cf4e6363SMichael Chan  *                      *iscsi cid*
684cf4e6363SMichael Chan  * @ofld_timer:         offload timer to detect timeout
685cf4e6363SMichael Chan  * @ofld_wait:          wait queue
686cf4e6363SMichael Chan  *
687cf4e6363SMichael Chan  * Endpoint Structure - equivalent of tcp socket structure
688cf4e6363SMichael Chan  */
689cf4e6363SMichael Chan struct bnx2i_endpoint {
690cf4e6363SMichael Chan 	struct list_head link;
691cf4e6363SMichael Chan 	struct bnx2i_hba *hba;
692cf4e6363SMichael Chan 	struct bnx2i_conn *conn;
69346012e8bSEddie Wai 	struct iscsi_endpoint *cls_ep;
694cf4e6363SMichael Chan 	struct cnic_sock *cm_sk;
695cf4e6363SMichael Chan 	u32 hba_age;
696cf4e6363SMichael Chan 	u32 state;
697cf4e6363SMichael Chan 	unsigned long timestamp;
698b5cf6b63SEddie Wai 	atomic_t num_active_cmds;
6999ae58e14SEddie Wai 	u32 ec_shift;
700cf4e6363SMichael Chan 
701cf4e6363SMichael Chan 	struct qp_info qp;
702cf4e6363SMichael Chan 	struct ep_handles ids;
703cf4e6363SMichael Chan 		#define ep_iscsi_cid	ids.drv_iscsi_cid
704cf4e6363SMichael Chan 		#define ep_cid		ids.fw_cid
705cf4e6363SMichael Chan 		#define ep_pg_cid	ids.pg_cid
706cf4e6363SMichael Chan 	struct timer_list ofld_timer;
707cf4e6363SMichael Chan 	wait_queue_head_t ofld_wait;
708cf4e6363SMichael Chan };
709cf4e6363SMichael Chan 
710cf4e6363SMichael Chan 
711b5cf6b63SEddie Wai struct bnx2i_work {
712b5cf6b63SEddie Wai 	struct list_head list;
713b5cf6b63SEddie Wai 	struct iscsi_session *session;
714b5cf6b63SEddie Wai 	struct bnx2i_conn *bnx2i_conn;
715b5cf6b63SEddie Wai 	struct cqe cqe;
716b5cf6b63SEddie Wai };
717b5cf6b63SEddie Wai 
718b5cf6b63SEddie Wai struct bnx2i_percpu_s {
719b5cf6b63SEddie Wai 	struct task_struct *iothread;
720b5cf6b63SEddie Wai 	struct list_head work_list;
721b5cf6b63SEddie Wai 	spinlock_t p_work_lock;
722b5cf6b63SEddie Wai };
723b5cf6b63SEddie Wai 
724cf4e6363SMichael Chan 
725cf4e6363SMichael Chan /* Global variables */
726cf4e6363SMichael Chan extern unsigned int error_mask1, error_mask2;
727cf4e6363SMichael Chan extern u64 iscsi_error_mask;
728cf4e6363SMichael Chan extern unsigned int en_tcp_dack;
729cf4e6363SMichael Chan extern unsigned int event_coal_div;
7308776193bSAnil Veerabhadrappa extern unsigned int event_coal_min;
731cf4e6363SMichael Chan 
732cf4e6363SMichael Chan extern struct scsi_transport_template *bnx2i_scsi_xport_template;
733cf4e6363SMichael Chan extern struct iscsi_transport bnx2i_iscsi_transport;
734cf4e6363SMichael Chan extern struct cnic_ulp_ops bnx2i_cnic_cb;
735cf4e6363SMichael Chan 
736cf4e6363SMichael Chan extern unsigned int sq_size;
737cf4e6363SMichael Chan extern unsigned int rq_size;
738cf4e6363SMichael Chan 
739cf4e6363SMichael Chan extern struct device_attribute *bnx2i_dev_attributes[];
740cf4e6363SMichael Chan 
741cf4e6363SMichael Chan 
742cf4e6363SMichael Chan 
743cf4e6363SMichael Chan /*
744cf4e6363SMichael Chan  * Function Prototypes
745cf4e6363SMichael Chan  */
746cf4e6363SMichael Chan extern void bnx2i_identify_device(struct bnx2i_hba *hba);
747cf4e6363SMichael Chan 
748cf4e6363SMichael Chan extern void bnx2i_ulp_init(struct cnic_dev *dev);
749cf4e6363SMichael Chan extern void bnx2i_ulp_exit(struct cnic_dev *dev);
750cf4e6363SMichael Chan extern void bnx2i_start(void *handle);
751cf4e6363SMichael Chan extern void bnx2i_stop(void *handle);
752cf4e6363SMichael Chan extern struct bnx2i_hba *get_adapter_list_head(void);
753cf4e6363SMichael Chan 
754cf4e6363SMichael Chan struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
755cf4e6363SMichael Chan 					  u16 iscsi_cid);
756cf4e6363SMichael Chan 
757cf4e6363SMichael Chan int bnx2i_alloc_ep_pool(void);
758cf4e6363SMichael Chan void bnx2i_release_ep_pool(void);
759cf4e6363SMichael Chan struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
760cf4e6363SMichael Chan struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
761cf4e6363SMichael Chan 
762cf4e6363SMichael Chan struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
763cf4e6363SMichael Chan 
764cf4e6363SMichael Chan struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
765cf4e6363SMichael Chan void bnx2i_free_hba(struct bnx2i_hba *hba);
766cf4e6363SMichael Chan 
767cf4e6363SMichael Chan void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
768cf4e6363SMichael Chan void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
769cf4e6363SMichael Chan 
770cf4e6363SMichael Chan void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
771cf4e6363SMichael Chan 
772cf4e6363SMichael Chan void bnx2i_drop_session(struct iscsi_cls_session *session);
773cf4e6363SMichael Chan 
774cf4e6363SMichael Chan extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
775cf4e6363SMichael Chan extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
776cf4e6363SMichael Chan 				  struct iscsi_task *mtask);
777cf4e6363SMichael Chan extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
778cf4e6363SMichael Chan 				  struct iscsi_task *mtask);
77909813ba5SEddie Wai extern int bnx2i_send_iscsi_text(struct bnx2i_conn *conn,
78009813ba5SEddie Wai 				 struct iscsi_task *mtask);
781cf4e6363SMichael Chan extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
782cf4e6363SMichael Chan 				    struct bnx2i_cmd *cmnd);
783cf4e6363SMichael Chan extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
78439304072SEddie Wai 				   struct iscsi_task *mtask,
785cf4e6363SMichael Chan 				   char *datap, int data_len, int unsol);
786cf4e6363SMichael Chan extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
787cf4e6363SMichael Chan 				   struct iscsi_task *mtask);
788cf4e6363SMichael Chan extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
789cf4e6363SMichael Chan 				       struct bnx2i_cmd *cmd);
790bee34877SEddie Wai extern int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
791cf4e6363SMichael Chan 				    struct bnx2i_endpoint *ep);
792cf4e6363SMichael Chan extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
793bee34877SEddie Wai extern int bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
794cf4e6363SMichael Chan 				   struct bnx2i_endpoint *ep);
795cf4e6363SMichael Chan 
796cf4e6363SMichael Chan extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
797cf4e6363SMichael Chan 			       struct bnx2i_endpoint *ep);
798cf4e6363SMichael Chan extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
799cf4e6363SMichael Chan 			       struct bnx2i_endpoint *ep);
800cf4e6363SMichael Chan extern void bnx2i_ep_ofld_timer(unsigned long data);
801cf4e6363SMichael Chan extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
802cf4e6363SMichael Chan 		struct bnx2i_hba *hba, u32 iscsi_cid);
803cf4e6363SMichael Chan extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
804cf4e6363SMichael Chan 		struct bnx2i_hba *hba, u32 iscsi_cid);
805cf4e6363SMichael Chan 
806cf4e6363SMichael Chan extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
807b5cf6b63SEddie Wai extern int bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
808cf4e6363SMichael Chan 
80955e15c97SEddie Wai extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep);
81055e15c97SEddie Wai 
811cf4e6363SMichael Chan /* Debug related function prototypes */
812cf4e6363SMichael Chan extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
813cf4e6363SMichael Chan extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
814cf4e6363SMichael Chan extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
815cf4e6363SMichael Chan extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
816cf4e6363SMichael Chan 
817b5cf6b63SEddie Wai extern int bnx2i_percpu_io_thread(void *arg);
818b5cf6b63SEddie Wai extern int bnx2i_process_scsi_cmd_resp(struct iscsi_session *session,
819b5cf6b63SEddie Wai 				       struct bnx2i_conn *bnx2i_conn,
820b5cf6b63SEddie Wai 				       struct cqe *cqe);
821cf4e6363SMichael Chan #endif
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