1cf4e6363SMichael Chan /* bnx2i.h: Broadcom NetXtreme II iSCSI driver. 2cf4e6363SMichael Chan * 3cf4e6363SMichael Chan * Copyright (c) 2006 - 2009 Broadcom Corporation 4cf4e6363SMichael Chan * Copyright (c) 2007, 2008 Red Hat, Inc. All rights reserved. 5cf4e6363SMichael Chan * Copyright (c) 2007, 2008 Mike Christie 6cf4e6363SMichael Chan * 7cf4e6363SMichael Chan * This program is free software; you can redistribute it and/or modify 8cf4e6363SMichael Chan * it under the terms of the GNU General Public License as published by 9cf4e6363SMichael Chan * the Free Software Foundation. 10cf4e6363SMichael Chan * 11cf4e6363SMichael Chan * Written by: Anil Veerabhadrappa (anilgv@broadcom.com) 12cf4e6363SMichael Chan */ 13cf4e6363SMichael Chan 14cf4e6363SMichael Chan #ifndef _BNX2I_H_ 15cf4e6363SMichael Chan #define _BNX2I_H_ 16cf4e6363SMichael Chan 17cf4e6363SMichael Chan #include <linux/module.h> 18cf4e6363SMichael Chan #include <linux/moduleparam.h> 19cf4e6363SMichael Chan 20cf4e6363SMichael Chan #include <linux/errno.h> 21cf4e6363SMichael Chan #include <linux/pci.h> 22cf4e6363SMichael Chan #include <linux/spinlock.h> 23cf4e6363SMichael Chan #include <linux/interrupt.h> 24cf4e6363SMichael Chan #include <linux/sched.h> 25cf4e6363SMichael Chan #include <linux/in.h> 26cf4e6363SMichael Chan #include <linux/kfifo.h> 27cf4e6363SMichael Chan #include <linux/netdevice.h> 28cf4e6363SMichael Chan #include <linux/completion.h> 29cf4e6363SMichael Chan 30cf4e6363SMichael Chan #include <scsi/scsi_cmnd.h> 31cf4e6363SMichael Chan #include <scsi/scsi_device.h> 32cf4e6363SMichael Chan #include <scsi/scsi_eh.h> 33cf4e6363SMichael Chan #include <scsi/scsi_host.h> 34cf4e6363SMichael Chan #include <scsi/scsi.h> 35cf4e6363SMichael Chan #include <scsi/iscsi_proto.h> 36cf4e6363SMichael Chan #include <scsi/libiscsi.h> 37cf4e6363SMichael Chan #include <scsi/scsi_transport_iscsi.h> 38cf4e6363SMichael Chan 39cf4e6363SMichael Chan #include "../../net/cnic_if.h" 40cf4e6363SMichael Chan #include "57xx_iscsi_hsi.h" 41cf4e6363SMichael Chan #include "57xx_iscsi_constants.h" 42cf4e6363SMichael Chan 43cf4e6363SMichael Chan #define BNX2_ISCSI_DRIVER_NAME "bnx2i" 44cf4e6363SMichael Chan 45cf4e6363SMichael Chan #define BNX2I_MAX_ADAPTERS 8 46cf4e6363SMichael Chan 47cf4e6363SMichael Chan #define ISCSI_MAX_CONNS_PER_HBA 128 48cf4e6363SMichael Chan #define ISCSI_MAX_SESS_PER_HBA ISCSI_MAX_CONNS_PER_HBA 49cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_SESS 128 50cf4e6363SMichael Chan 51cf4e6363SMichael Chan /* Total active commands across all connections supported by devices */ 52cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1)) 53cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1)) 54cf4e6363SMichael Chan #define ISCSI_MAX_CMDS_PER_HBA_57710 (256 * (ISCSI_MAX_CMDS_PER_SESS - 1)) 55cf4e6363SMichael Chan 56cf4e6363SMichael Chan #define ISCSI_MAX_BDS_PER_CMD 32 57cf4e6363SMichael Chan 58cf4e6363SMichael Chan #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8 59cf4e6363SMichael Chan #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4 60cf4e6363SMichael Chan 61cf4e6363SMichael Chan /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */ 62cf4e6363SMichael Chan #define MAX_BD_LENGTH 65535 63cf4e6363SMichael Chan #define BD_SPLIT_SIZE 32768 64cf4e6363SMichael Chan 65cf4e6363SMichael Chan /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */ 66cf4e6363SMichael Chan #define BNX2I_SQ_WQES_MIN 16 67cf4e6363SMichael Chan #define BNX2I_570X_SQ_WQES_MAX 128 68cf4e6363SMichael Chan #define BNX2I_5770X_SQ_WQES_MAX 512 69cf4e6363SMichael Chan #define BNX2I_570X_SQ_WQES_DEFAULT 128 70cf4e6363SMichael Chan #define BNX2I_5770X_SQ_WQES_DEFAULT 256 71cf4e6363SMichael Chan 72cf4e6363SMichael Chan #define BNX2I_570X_CQ_WQES_MAX 128 73cf4e6363SMichael Chan #define BNX2I_5770X_CQ_WQES_MAX 512 74cf4e6363SMichael Chan 75cf4e6363SMichael Chan #define BNX2I_RQ_WQES_MIN 16 76cf4e6363SMichael Chan #define BNX2I_RQ_WQES_MAX 32 77cf4e6363SMichael Chan #define BNX2I_RQ_WQES_DEFAULT 16 78cf4e6363SMichael Chan 79cf4e6363SMichael Chan /* CCELLs per conn */ 80cf4e6363SMichael Chan #define BNX2I_CCELLS_MIN 16 81cf4e6363SMichael Chan #define BNX2I_CCELLS_MAX 96 82cf4e6363SMichael Chan #define BNX2I_CCELLS_DEFAULT 64 83cf4e6363SMichael Chan 84cf4e6363SMichael Chan #define ITT_INVALID_SIGNATURE 0xFFFF 85cf4e6363SMichael Chan 86cf4e6363SMichael Chan #define ISCSI_CMD_CLEANUP_TIMEOUT 100 87cf4e6363SMichael Chan 88cf4e6363SMichael Chan #define BNX2I_CONN_CTX_BUF_SIZE 16384 89cf4e6363SMichael Chan 90cf4e6363SMichael Chan #define BNX2I_SQ_WQE_SIZE 64 91cf4e6363SMichael Chan #define BNX2I_RQ_WQE_SIZE 256 92cf4e6363SMichael Chan #define BNX2I_CQE_SIZE 64 93cf4e6363SMichael Chan 94cf4e6363SMichael Chan #define MB_KERNEL_CTX_SHIFT 8 95cf4e6363SMichael Chan #define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT) 96cf4e6363SMichael Chan 97cf4e6363SMichael Chan #define CTX_SHIFT 7 98cf4e6363SMichael Chan #define GET_CID_NUM(cid_addr) ((cid_addr) >> CTX_SHIFT) 99cf4e6363SMichael Chan 100cf4e6363SMichael Chan #define CTX_OFFSET 0x10000 101cf4e6363SMichael Chan #define MAX_CID_CNT 0x4000 102cf4e6363SMichael Chan 10353203244SAnil Veerabhadrappa #define BNX2I_570X_PAGE_SIZE_DEFAULT 4096 10453203244SAnil Veerabhadrappa 105cf4e6363SMichael Chan /* 5709 context registers */ 106cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2 0x00003d00 107cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2_CONT_SZ (0x7L<<4) 108cf4e6363SMichael Chan #define BNX2_MQ_CONFIG2_FIRST_L4L5 (0x1fL<<8) 109cf4e6363SMichael Chan 110cf4e6363SMichael Chan /* 57710's BAR2 is mapped to doorbell registers */ 111cf4e6363SMichael Chan #define BNX2X_DOORBELL_PCI_BAR 2 112cf4e6363SMichael Chan #define BNX2X_MAX_CQS 8 113cf4e6363SMichael Chan 114cf4e6363SMichael Chan #define CNIC_ARM_CQE 1 115cf4e6363SMichael Chan #define CNIC_DISARM_CQE 0 116cf4e6363SMichael Chan 117cf4e6363SMichael Chan #define REG_RD(__hba, offset) \ 118cf4e6363SMichael Chan readl(__hba->regview + offset) 119cf4e6363SMichael Chan #define REG_WR(__hba, offset, val) \ 120cf4e6363SMichael Chan writel(val, __hba->regview + offset) 121cf4e6363SMichael Chan 122cf4e6363SMichael Chan 123cf4e6363SMichael Chan /** 124cf4e6363SMichael Chan * struct generic_pdu_resc - login pdu resource structure 125cf4e6363SMichael Chan * 126cf4e6363SMichael Chan * @req_buf: driver buffer used to stage payload associated with 127cf4e6363SMichael Chan * the login request 128cf4e6363SMichael Chan * @req_dma_addr: dma address for iscsi login request payload buffer 129cf4e6363SMichael Chan * @req_buf_size: actual login request payload length 130cf4e6363SMichael Chan * @req_wr_ptr: pointer into login request buffer when next data is 131cf4e6363SMichael Chan * to be written 132cf4e6363SMichael Chan * @resp_hdr: iscsi header where iscsi login response header is to 133cf4e6363SMichael Chan * be recreated 134cf4e6363SMichael Chan * @resp_buf: buffer to stage login response payload 135cf4e6363SMichael Chan * @resp_dma_addr: login response payload buffer dma address 136cf4e6363SMichael Chan * @resp_buf_size: login response paylod length 137cf4e6363SMichael Chan * @resp_wr_ptr: pointer into login response buffer when next data is 138cf4e6363SMichael Chan * to be written 139cf4e6363SMichael Chan * @req_bd_tbl: iscsi login request payload BD table 140cf4e6363SMichael Chan * @req_bd_dma: login request BD table dma address 141cf4e6363SMichael Chan * @resp_bd_tbl: iscsi login response payload BD table 142cf4e6363SMichael Chan * @resp_bd_dma: login request BD table dma address 143cf4e6363SMichael Chan * 144cf4e6363SMichael Chan * following structure defines buffer info for generic pdus such as iSCSI Login, 145cf4e6363SMichael Chan * Logout and NOP 146cf4e6363SMichael Chan */ 147cf4e6363SMichael Chan struct generic_pdu_resc { 148cf4e6363SMichael Chan char *req_buf; 149cf4e6363SMichael Chan dma_addr_t req_dma_addr; 150cf4e6363SMichael Chan u32 req_buf_size; 151cf4e6363SMichael Chan char *req_wr_ptr; 152cf4e6363SMichael Chan struct iscsi_hdr resp_hdr; 153cf4e6363SMichael Chan char *resp_buf; 154cf4e6363SMichael Chan dma_addr_t resp_dma_addr; 155cf4e6363SMichael Chan u32 resp_buf_size; 156cf4e6363SMichael Chan char *resp_wr_ptr; 157cf4e6363SMichael Chan char *req_bd_tbl; 158cf4e6363SMichael Chan dma_addr_t req_bd_dma; 159cf4e6363SMichael Chan char *resp_bd_tbl; 160cf4e6363SMichael Chan dma_addr_t resp_bd_dma; 161cf4e6363SMichael Chan }; 162cf4e6363SMichael Chan 163cf4e6363SMichael Chan 164cf4e6363SMichael Chan /** 165cf4e6363SMichael Chan * struct bd_resc_page - tracks DMA'able memory allocated for BD tables 166cf4e6363SMichael Chan * 167cf4e6363SMichael Chan * @link: list head to link elements 168cf4e6363SMichael Chan * @max_ptrs: maximun pointers that can be stored in this page 169cf4e6363SMichael Chan * @num_valid: number of pointer valid in this page 170cf4e6363SMichael Chan * @page: base addess for page pointer array 171cf4e6363SMichael Chan * 172cf4e6363SMichael Chan * structure to track DMA'able memory allocated for command BD tables 173cf4e6363SMichael Chan */ 174cf4e6363SMichael Chan struct bd_resc_page { 175cf4e6363SMichael Chan struct list_head link; 176cf4e6363SMichael Chan u32 max_ptrs; 177cf4e6363SMichael Chan u32 num_valid; 178cf4e6363SMichael Chan void *page[1]; 179cf4e6363SMichael Chan }; 180cf4e6363SMichael Chan 181cf4e6363SMichael Chan 182cf4e6363SMichael Chan /** 183cf4e6363SMichael Chan * struct io_bdt - I/O buffer destricptor table 184cf4e6363SMichael Chan * 185cf4e6363SMichael Chan * @bd_tbl: BD table's virtual address 186cf4e6363SMichael Chan * @bd_tbl_dma: BD table's dma address 187cf4e6363SMichael Chan * @bd_valid: num valid BD entries 188cf4e6363SMichael Chan * 189cf4e6363SMichael Chan * IO BD table 190cf4e6363SMichael Chan */ 191cf4e6363SMichael Chan struct io_bdt { 192cf4e6363SMichael Chan struct iscsi_bd *bd_tbl; 193cf4e6363SMichael Chan dma_addr_t bd_tbl_dma; 194cf4e6363SMichael Chan u16 bd_valid; 195cf4e6363SMichael Chan }; 196cf4e6363SMichael Chan 197cf4e6363SMichael Chan 198cf4e6363SMichael Chan /** 199cf4e6363SMichael Chan * bnx2i_cmd - iscsi command structure 200cf4e6363SMichael Chan * 201cf4e6363SMichael Chan * @scsi_cmd: SCSI-ML task pointer corresponding to this iscsi cmd 202cf4e6363SMichael Chan * @sg: SG list 203cf4e6363SMichael Chan * @io_tbl: buffer descriptor (BD) table 204cf4e6363SMichael Chan * @bd_tbl_dma: buffer descriptor (BD) table's dma address 205cf4e6363SMichael Chan */ 206cf4e6363SMichael Chan struct bnx2i_cmd { 207cf4e6363SMichael Chan struct iscsi_hdr hdr; 208cf4e6363SMichael Chan struct bnx2i_conn *conn; 209cf4e6363SMichael Chan struct scsi_cmnd *scsi_cmd; 210cf4e6363SMichael Chan struct scatterlist *sg; 211cf4e6363SMichael Chan struct io_bdt io_tbl; 212cf4e6363SMichael Chan dma_addr_t bd_tbl_dma; 213cf4e6363SMichael Chan struct bnx2i_cmd_request req; 214cf4e6363SMichael Chan }; 215cf4e6363SMichael Chan 216cf4e6363SMichael Chan 217cf4e6363SMichael Chan /** 218cf4e6363SMichael Chan * struct bnx2i_conn - iscsi connection structure 219cf4e6363SMichael Chan * 220cf4e6363SMichael Chan * @cls_conn: pointer to iscsi cls conn 221cf4e6363SMichael Chan * @hba: adapter structure pointer 222cf4e6363SMichael Chan * @iscsi_conn_cid: iscsi conn id 223cf4e6363SMichael Chan * @fw_cid: firmware iscsi context id 224cf4e6363SMichael Chan * @ep: endpoint structure pointer 225cf4e6363SMichael Chan * @gen_pdu: login/nopout/logout pdu resources 226cf4e6363SMichael Chan * @violation_notified: bit mask used to track iscsi error/warning messages 227cf4e6363SMichael Chan * already printed out 228cf4e6363SMichael Chan * 229cf4e6363SMichael Chan * iSCSI connection structure 230cf4e6363SMichael Chan */ 231cf4e6363SMichael Chan struct bnx2i_conn { 232cf4e6363SMichael Chan struct iscsi_cls_conn *cls_conn; 233cf4e6363SMichael Chan struct bnx2i_hba *hba; 234cf4e6363SMichael Chan struct completion cmd_cleanup_cmpl; 235cf4e6363SMichael Chan 236cf4e6363SMichael Chan u32 iscsi_conn_cid; 237cf4e6363SMichael Chan #define BNX2I_CID_RESERVED 0x5AFF 238cf4e6363SMichael Chan u32 fw_cid; 239cf4e6363SMichael Chan 240cf4e6363SMichael Chan struct timer_list poll_timer; 241cf4e6363SMichael Chan /* 242cf4e6363SMichael Chan * Queue Pair (QP) related structure elements. 243cf4e6363SMichael Chan */ 244cf4e6363SMichael Chan struct bnx2i_endpoint *ep; 245cf4e6363SMichael Chan 246cf4e6363SMichael Chan /* 247cf4e6363SMichael Chan * Buffer for login negotiation process 248cf4e6363SMichael Chan */ 249cf4e6363SMichael Chan struct generic_pdu_resc gen_pdu; 250cf4e6363SMichael Chan u64 violation_notified; 251cf4e6363SMichael Chan }; 252cf4e6363SMichael Chan 253cf4e6363SMichael Chan 254cf4e6363SMichael Chan 255cf4e6363SMichael Chan /** 256cf4e6363SMichael Chan * struct iscsi_cid_queue - Per adapter iscsi cid queue 257cf4e6363SMichael Chan * 258cf4e6363SMichael Chan * @cid_que_base: queue base memory 259cf4e6363SMichael Chan * @cid_que: queue memory pointer 260cf4e6363SMichael Chan * @cid_q_prod_idx: produce index 261cf4e6363SMichael Chan * @cid_q_cons_idx: consumer index 262cf4e6363SMichael Chan * @cid_q_max_idx: max index. used to detect wrap around condition 263cf4e6363SMichael Chan * @cid_free_cnt: queue size 264cf4e6363SMichael Chan * @conn_cid_tbl: iscsi cid to conn structure mapping table 265cf4e6363SMichael Chan * 266cf4e6363SMichael Chan * Per adapter iSCSI CID Queue 267cf4e6363SMichael Chan */ 268cf4e6363SMichael Chan struct iscsi_cid_queue { 269cf4e6363SMichael Chan void *cid_que_base; 270cf4e6363SMichael Chan u32 *cid_que; 271cf4e6363SMichael Chan u32 cid_q_prod_idx; 272cf4e6363SMichael Chan u32 cid_q_cons_idx; 273cf4e6363SMichael Chan u32 cid_q_max_idx; 274cf4e6363SMichael Chan u32 cid_free_cnt; 275cf4e6363SMichael Chan struct bnx2i_conn **conn_cid_tbl; 276cf4e6363SMichael Chan }; 277cf4e6363SMichael Chan 278cf4e6363SMichael Chan /** 279cf4e6363SMichael Chan * struct bnx2i_hba - bnx2i adapter structure 280cf4e6363SMichael Chan * 281cf4e6363SMichael Chan * @link: list head to link elements 282cf4e6363SMichael Chan * @cnic: pointer to cnic device 283cf4e6363SMichael Chan * @pcidev: pointer to pci dev 284cf4e6363SMichael Chan * @netdev: pointer to netdev structure 285cf4e6363SMichael Chan * @regview: mapped PCI register space 286cf4e6363SMichael Chan * @age: age, incremented by every recovery 287cf4e6363SMichael Chan * @cnic_dev_type: cnic device type, 5706/5708/5709/57710 288cf4e6363SMichael Chan * @mail_queue_access: mailbox queue access mode, applicable to 5709 only 289cf4e6363SMichael Chan * @reg_with_cnic: indicates whether the device is register with CNIC 290cf4e6363SMichael Chan * @adapter_state: adapter state, UP, GOING_DOWN, LINK_DOWN 291cf4e6363SMichael Chan * @mtu_supported: Ethernet MTU supported 292cf4e6363SMichael Chan * @shost: scsi host pointer 293cf4e6363SMichael Chan * @max_sqes: SQ size 294cf4e6363SMichael Chan * @max_rqes: RQ size 295cf4e6363SMichael Chan * @max_cqes: CQ size 296cf4e6363SMichael Chan * @num_ccell: number of command cells per connection 297cf4e6363SMichael Chan * @ofld_conns_active: active connection list 29855e15c97SEddie Wai * @eh_wait: wait queue for the endpoint to shutdown 299cf4e6363SMichael Chan * @max_active_conns: max offload connections supported by this device 300cf4e6363SMichael Chan * @cid_que: iscsi cid queue 301cf4e6363SMichael Chan * @ep_rdwr_lock: read / write lock to synchronize various ep lists 302cf4e6363SMichael Chan * @ep_ofld_list: connection list for pending offload completion 30346012e8bSEddie Wai * @ep_active_list: connection list for active offload endpoints 304cf4e6363SMichael Chan * @ep_destroy_list: connection list for pending offload completion 305cf4e6363SMichael Chan * @mp_bd_tbl: BD table to be used with middle path requests 306cf4e6363SMichael Chan * @mp_bd_dma: DMA address of 'mp_bd_tbl' memory buffer 307cf4e6363SMichael Chan * @dummy_buffer: Dummy buffer to be used with zero length scsicmd reqs 308cf4e6363SMichael Chan * @dummy_buf_dma: DMA address of 'dummy_buffer' memory buffer 309cf4e6363SMichael Chan * @lock: lock to synchonize access to hba structure 31055e15c97SEddie Wai * @hba_shutdown_tmo: Timeout value to shutdown each connection 311e37d2c47SEddie Wai * @conn_teardown_tmo: Timeout value to tear down each connection 312e37d2c47SEddie Wai * @conn_ctx_destroy_tmo: Timeout value to destroy context of each connection 313cf4e6363SMichael Chan * @pci_did: PCI device ID 314cf4e6363SMichael Chan * @pci_vid: PCI vendor ID 315cf4e6363SMichael Chan * @pci_sdid: PCI subsystem device ID 316cf4e6363SMichael Chan * @pci_svid: PCI subsystem vendor ID 317cf4e6363SMichael Chan * @pci_func: PCI function number in system pci tree 318cf4e6363SMichael Chan * @pci_devno: PCI device number in system pci tree 319cf4e6363SMichael Chan * @num_wqe_sent: statistic counter, total wqe's sent 320cf4e6363SMichael Chan * @num_cqe_rcvd: statistic counter, total cqe's received 321cf4e6363SMichael Chan * @num_intr_claimed: statistic counter, total interrupts claimed 322cf4e6363SMichael Chan * @link_changed_count: statistic counter, num of link change notifications 323cf4e6363SMichael Chan * received 324cf4e6363SMichael Chan * @ipaddr_changed_count: statistic counter, num times IP address changed while 325cf4e6363SMichael Chan * at least one connection is offloaded 326cf4e6363SMichael Chan * @num_sess_opened: statistic counter, total num sessions opened 327cf4e6363SMichael Chan * @num_conn_opened: statistic counter, total num conns opened on this hba 328cf4e6363SMichael Chan * @ctx_ccell_tasks: captures number of ccells and tasks supported by 329cf4e6363SMichael Chan * currently offloaded connection, used to decode 330cf4e6363SMichael Chan * context memory 331cf4e6363SMichael Chan * 332cf4e6363SMichael Chan * Adapter Data Structure 333cf4e6363SMichael Chan */ 334cf4e6363SMichael Chan struct bnx2i_hba { 335cf4e6363SMichael Chan struct list_head link; 336cf4e6363SMichael Chan struct cnic_dev *cnic; 337cf4e6363SMichael Chan struct pci_dev *pcidev; 338cf4e6363SMichael Chan struct net_device *netdev; 339cf4e6363SMichael Chan void __iomem *regview; 340cf4e6363SMichael Chan 341cf4e6363SMichael Chan u32 age; 342cf4e6363SMichael Chan unsigned long cnic_dev_type; 343cf4e6363SMichael Chan #define BNX2I_NX2_DEV_5706 0x0 344cf4e6363SMichael Chan #define BNX2I_NX2_DEV_5708 0x1 345cf4e6363SMichael Chan #define BNX2I_NX2_DEV_5709 0x2 346cf4e6363SMichael Chan #define BNX2I_NX2_DEV_57710 0x3 347cf4e6363SMichael Chan u32 mail_queue_access; 348cf4e6363SMichael Chan #define BNX2I_MQ_KERNEL_MODE 0x0 349cf4e6363SMichael Chan #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1 350cf4e6363SMichael Chan #define BNX2I_MQ_BIN_MODE 0x2 351cf4e6363SMichael Chan unsigned long reg_with_cnic; 352cf4e6363SMichael Chan #define BNX2I_CNIC_REGISTERED 1 353cf4e6363SMichael Chan 354cf4e6363SMichael Chan unsigned long adapter_state; 355cf4e6363SMichael Chan #define ADAPTER_STATE_UP 0 356cf4e6363SMichael Chan #define ADAPTER_STATE_GOING_DOWN 1 357cf4e6363SMichael Chan #define ADAPTER_STATE_LINK_DOWN 2 358cf4e6363SMichael Chan #define ADAPTER_STATE_INIT_FAILED 31 359cf4e6363SMichael Chan unsigned int mtu_supported; 360cf4e6363SMichael Chan #define BNX2I_MAX_MTU_SUPPORTED 1500 361cf4e6363SMichael Chan 362cf4e6363SMichael Chan struct Scsi_Host *shost; 363cf4e6363SMichael Chan 364cf4e6363SMichael Chan u32 max_sqes; 365cf4e6363SMichael Chan u32 max_rqes; 366cf4e6363SMichael Chan u32 max_cqes; 367cf4e6363SMichael Chan u32 num_ccell; 368cf4e6363SMichael Chan 369cf4e6363SMichael Chan int ofld_conns_active; 370490475a9SAnil Veerabhadrappa wait_queue_head_t eh_wait; 371cf4e6363SMichael Chan 372cf4e6363SMichael Chan int max_active_conns; 373cf4e6363SMichael Chan struct iscsi_cid_queue cid_que; 374cf4e6363SMichael Chan 375cf4e6363SMichael Chan rwlock_t ep_rdwr_lock; 376cf4e6363SMichael Chan struct list_head ep_ofld_list; 37746012e8bSEddie Wai struct list_head ep_active_list; 378cf4e6363SMichael Chan struct list_head ep_destroy_list; 379cf4e6363SMichael Chan 380cf4e6363SMichael Chan /* 381cf4e6363SMichael Chan * BD table to be used with MP (Middle Path requests. 382cf4e6363SMichael Chan */ 383cf4e6363SMichael Chan char *mp_bd_tbl; 384cf4e6363SMichael Chan dma_addr_t mp_bd_dma; 385cf4e6363SMichael Chan char *dummy_buffer; 386cf4e6363SMichael Chan dma_addr_t dummy_buf_dma; 387cf4e6363SMichael Chan 388cf4e6363SMichael Chan spinlock_t lock; /* protects hba structure access */ 389cf4e6363SMichael Chan struct mutex net_dev_lock;/* sync net device access */ 390cf4e6363SMichael Chan 391490475a9SAnil Veerabhadrappa int hba_shutdown_tmo; 392e37d2c47SEddie Wai int conn_teardown_tmo; 393e37d2c47SEddie Wai int conn_ctx_destroy_tmo; 394cf4e6363SMichael Chan /* 395cf4e6363SMichael Chan * PCI related info. 396cf4e6363SMichael Chan */ 397cf4e6363SMichael Chan u16 pci_did; 398cf4e6363SMichael Chan u16 pci_vid; 399cf4e6363SMichael Chan u16 pci_sdid; 400cf4e6363SMichael Chan u16 pci_svid; 401cf4e6363SMichael Chan u16 pci_func; 402cf4e6363SMichael Chan u16 pci_devno; 403cf4e6363SMichael Chan 404cf4e6363SMichael Chan /* 405cf4e6363SMichael Chan * Following are a bunch of statistics useful during development 406cf4e6363SMichael Chan * and later stage for score boarding. 407cf4e6363SMichael Chan */ 408cf4e6363SMichael Chan u32 num_wqe_sent; 409cf4e6363SMichael Chan u32 num_cqe_rcvd; 410cf4e6363SMichael Chan u32 num_intr_claimed; 411cf4e6363SMichael Chan u32 link_changed_count; 412cf4e6363SMichael Chan u32 ipaddr_changed_count; 413cf4e6363SMichael Chan u32 num_sess_opened; 414cf4e6363SMichael Chan u32 num_conn_opened; 415cf4e6363SMichael Chan unsigned int ctx_ccell_tasks; 416cf4e6363SMichael Chan }; 417cf4e6363SMichael Chan 418cf4e6363SMichael Chan 419cf4e6363SMichael Chan /******************************************************************************* 420cf4e6363SMichael Chan * QP [ SQ / RQ / CQ ] info. 421cf4e6363SMichael Chan ******************************************************************************/ 422cf4e6363SMichael Chan 423cf4e6363SMichael Chan /* 424cf4e6363SMichael Chan * SQ/RQ/CQ generic structure definition 425cf4e6363SMichael Chan */ 426cf4e6363SMichael Chan struct sqe { 427cf4e6363SMichael Chan u8 sqe_byte[BNX2I_SQ_WQE_SIZE]; 428cf4e6363SMichael Chan }; 429cf4e6363SMichael Chan 430cf4e6363SMichael Chan struct rqe { 431cf4e6363SMichael Chan u8 rqe_byte[BNX2I_RQ_WQE_SIZE]; 432cf4e6363SMichael Chan }; 433cf4e6363SMichael Chan 434cf4e6363SMichael Chan struct cqe { 435cf4e6363SMichael Chan u8 cqe_byte[BNX2I_CQE_SIZE]; 436cf4e6363SMichael Chan }; 437cf4e6363SMichael Chan 438cf4e6363SMichael Chan 439cf4e6363SMichael Chan enum { 440cf4e6363SMichael Chan #if defined(__LITTLE_ENDIAN) 441cf4e6363SMichael Chan CNIC_EVENT_COAL_INDEX = 0x0, 442cf4e6363SMichael Chan CNIC_SEND_DOORBELL = 0x4, 443cf4e6363SMichael Chan CNIC_EVENT_CQ_ARM = 0x7, 444cf4e6363SMichael Chan CNIC_RECV_DOORBELL = 0x8 445cf4e6363SMichael Chan #elif defined(__BIG_ENDIAN) 446cf4e6363SMichael Chan CNIC_EVENT_COAL_INDEX = 0x2, 447cf4e6363SMichael Chan CNIC_SEND_DOORBELL = 0x6, 448cf4e6363SMichael Chan CNIC_EVENT_CQ_ARM = 0x4, 449cf4e6363SMichael Chan CNIC_RECV_DOORBELL = 0xa 450cf4e6363SMichael Chan #endif 451cf4e6363SMichael Chan }; 452cf4e6363SMichael Chan 453cf4e6363SMichael Chan 454cf4e6363SMichael Chan /* 455cf4e6363SMichael Chan * CQ DB 456cf4e6363SMichael Chan */ 457cf4e6363SMichael Chan struct bnx2x_iscsi_cq_pend_cmpl { 458cf4e6363SMichael Chan /* CQ producer, updated by Ustorm */ 459cf4e6363SMichael Chan u16 ustrom_prod; 460cf4e6363SMichael Chan /* CQ pending completion counter */ 461cf4e6363SMichael Chan u16 pend_cntr; 462cf4e6363SMichael Chan }; 463cf4e6363SMichael Chan 464cf4e6363SMichael Chan 465cf4e6363SMichael Chan struct bnx2i_5771x_cq_db { 466cf4e6363SMichael Chan struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS]; 467cf4e6363SMichael Chan /* CQ pending completion ITT array */ 468cf4e6363SMichael Chan u16 itt[BNX2X_MAX_CQS]; 469cf4e6363SMichael Chan /* Cstorm CQ sequence to notify array, updated by driver */; 470cf4e6363SMichael Chan u16 sqn[BNX2X_MAX_CQS]; 471cf4e6363SMichael Chan u32 reserved[4] /* 16 byte allignment */; 472cf4e6363SMichael Chan }; 473cf4e6363SMichael Chan 474cf4e6363SMichael Chan 475cf4e6363SMichael Chan struct bnx2i_5771x_sq_rq_db { 476cf4e6363SMichael Chan u16 prod_idx; 477cf4e6363SMichael Chan u8 reserved0[14]; /* Pad structure size to 16 bytes */ 478cf4e6363SMichael Chan }; 479cf4e6363SMichael Chan 480cf4e6363SMichael Chan 481cf4e6363SMichael Chan struct bnx2i_5771x_dbell_hdr { 482cf4e6363SMichael Chan u8 header; 483cf4e6363SMichael Chan /* 1 for rx doorbell, 0 for tx doorbell */ 484cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_RX (0x1<<0) 485cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_RX_SHIFT 0 486cf4e6363SMichael Chan /* 0 for normal doorbell, 1 for advertise wnd doorbell */ 487cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1) 488cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1 489cf4e6363SMichael Chan /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */ 490cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2) 491cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2 492cf4e6363SMichael Chan /* connection type */ 493cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4) 494cf4e6363SMichael Chan #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4 495cf4e6363SMichael Chan }; 496cf4e6363SMichael Chan 497cf4e6363SMichael Chan struct bnx2i_5771x_dbell { 498cf4e6363SMichael Chan struct bnx2i_5771x_dbell_hdr dbell; 499cf4e6363SMichael Chan u8 pad[3]; 500cf4e6363SMichael Chan 501cf4e6363SMichael Chan }; 502cf4e6363SMichael Chan 503cf4e6363SMichael Chan /** 504cf4e6363SMichael Chan * struct qp_info - QP (share queue region) atrributes structure 505cf4e6363SMichael Chan * 506cf4e6363SMichael Chan * @ctx_base: ioremapped pci register base to access doorbell register 507cf4e6363SMichael Chan * pertaining to this offloaded connection 508cf4e6363SMichael Chan * @sq_virt: virtual address of send queue (SQ) region 509cf4e6363SMichael Chan * @sq_phys: DMA address of SQ memory region 510cf4e6363SMichael Chan * @sq_mem_size: SQ size 511cf4e6363SMichael Chan * @sq_prod_qe: SQ producer entry pointer 512cf4e6363SMichael Chan * @sq_cons_qe: SQ consumer entry pointer 513cf4e6363SMichael Chan * @sq_first_qe: virtaul address of first entry in SQ 514cf4e6363SMichael Chan * @sq_last_qe: virtaul address of last entry in SQ 515cf4e6363SMichael Chan * @sq_prod_idx: SQ producer index 516cf4e6363SMichael Chan * @sq_cons_idx: SQ consumer index 517cf4e6363SMichael Chan * @sqe_left: number sq entry left 518cf4e6363SMichael Chan * @sq_pgtbl_virt: page table describing buffer consituting SQ region 519cf4e6363SMichael Chan * @sq_pgtbl_phys: dma address of 'sq_pgtbl_virt' 520cf4e6363SMichael Chan * @sq_pgtbl_size: SQ page table size 521cf4e6363SMichael Chan * @cq_virt: virtual address of completion queue (CQ) region 522cf4e6363SMichael Chan * @cq_phys: DMA address of RQ memory region 523cf4e6363SMichael Chan * @cq_mem_size: CQ size 524cf4e6363SMichael Chan * @cq_prod_qe: CQ producer entry pointer 525cf4e6363SMichael Chan * @cq_cons_qe: CQ consumer entry pointer 526cf4e6363SMichael Chan * @cq_first_qe: virtaul address of first entry in CQ 527cf4e6363SMichael Chan * @cq_last_qe: virtaul address of last entry in CQ 528cf4e6363SMichael Chan * @cq_prod_idx: CQ producer index 529cf4e6363SMichael Chan * @cq_cons_idx: CQ consumer index 530cf4e6363SMichael Chan * @cqe_left: number cq entry left 531cf4e6363SMichael Chan * @cqe_size: size of each CQ entry 532cf4e6363SMichael Chan * @cqe_exp_seq_sn: next expected CQE sequence number 533cf4e6363SMichael Chan * @cq_pgtbl_virt: page table describing buffer consituting CQ region 534cf4e6363SMichael Chan * @cq_pgtbl_phys: dma address of 'cq_pgtbl_virt' 535cf4e6363SMichael Chan * @cq_pgtbl_size: CQ page table size 536cf4e6363SMichael Chan * @rq_virt: virtual address of receive queue (RQ) region 537cf4e6363SMichael Chan * @rq_phys: DMA address of RQ memory region 538cf4e6363SMichael Chan * @rq_mem_size: RQ size 539cf4e6363SMichael Chan * @rq_prod_qe: RQ producer entry pointer 540cf4e6363SMichael Chan * @rq_cons_qe: RQ consumer entry pointer 541cf4e6363SMichael Chan * @rq_first_qe: virtaul address of first entry in RQ 542cf4e6363SMichael Chan * @rq_last_qe: virtaul address of last entry in RQ 543cf4e6363SMichael Chan * @rq_prod_idx: RQ producer index 544cf4e6363SMichael Chan * @rq_cons_idx: RQ consumer index 545cf4e6363SMichael Chan * @rqe_left: number rq entry left 546cf4e6363SMichael Chan * @rq_pgtbl_virt: page table describing buffer consituting RQ region 547cf4e6363SMichael Chan * @rq_pgtbl_phys: dma address of 'rq_pgtbl_virt' 548cf4e6363SMichael Chan * @rq_pgtbl_size: RQ page table size 549cf4e6363SMichael Chan * 550cf4e6363SMichael Chan * queue pair (QP) is a per connection shared data structure which is used 551cf4e6363SMichael Chan * to send work requests (SQ), receive completion notifications (CQ) 552cf4e6363SMichael Chan * and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure 553cf4e6363SMichael Chan * below holds queue memory, consumer/producer indexes and page table 554cf4e6363SMichael Chan * information 555cf4e6363SMichael Chan */ 556cf4e6363SMichael Chan struct qp_info { 557cf4e6363SMichael Chan void __iomem *ctx_base; 558cf4e6363SMichael Chan #define DPM_TRIGER_TYPE 0x40 559cf4e6363SMichael Chan 560cf4e6363SMichael Chan #define BNX2I_570x_QUE_DB_SIZE 0 561cf4e6363SMichael Chan #define BNX2I_5771x_QUE_DB_SIZE 16 562cf4e6363SMichael Chan struct sqe *sq_virt; 563cf4e6363SMichael Chan dma_addr_t sq_phys; 564cf4e6363SMichael Chan u32 sq_mem_size; 565cf4e6363SMichael Chan 566cf4e6363SMichael Chan struct sqe *sq_prod_qe; 567cf4e6363SMichael Chan struct sqe *sq_cons_qe; 568cf4e6363SMichael Chan struct sqe *sq_first_qe; 569cf4e6363SMichael Chan struct sqe *sq_last_qe; 570cf4e6363SMichael Chan u16 sq_prod_idx; 571cf4e6363SMichael Chan u16 sq_cons_idx; 572cf4e6363SMichael Chan u32 sqe_left; 573cf4e6363SMichael Chan 574cf4e6363SMichael Chan void *sq_pgtbl_virt; 575cf4e6363SMichael Chan dma_addr_t sq_pgtbl_phys; 576cf4e6363SMichael Chan u32 sq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ 577cf4e6363SMichael Chan 578cf4e6363SMichael Chan struct cqe *cq_virt; 579cf4e6363SMichael Chan dma_addr_t cq_phys; 580cf4e6363SMichael Chan u32 cq_mem_size; 581cf4e6363SMichael Chan 582cf4e6363SMichael Chan struct cqe *cq_prod_qe; 583cf4e6363SMichael Chan struct cqe *cq_cons_qe; 584cf4e6363SMichael Chan struct cqe *cq_first_qe; 585cf4e6363SMichael Chan struct cqe *cq_last_qe; 586cf4e6363SMichael Chan u16 cq_prod_idx; 587cf4e6363SMichael Chan u16 cq_cons_idx; 588cf4e6363SMichael Chan u32 cqe_left; 589cf4e6363SMichael Chan u32 cqe_size; 590cf4e6363SMichael Chan u32 cqe_exp_seq_sn; 591cf4e6363SMichael Chan 592cf4e6363SMichael Chan void *cq_pgtbl_virt; 593cf4e6363SMichael Chan dma_addr_t cq_pgtbl_phys; 594cf4e6363SMichael Chan u32 cq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ 595cf4e6363SMichael Chan 596cf4e6363SMichael Chan struct rqe *rq_virt; 597cf4e6363SMichael Chan dma_addr_t rq_phys; 598cf4e6363SMichael Chan u32 rq_mem_size; 599cf4e6363SMichael Chan 600cf4e6363SMichael Chan struct rqe *rq_prod_qe; 601cf4e6363SMichael Chan struct rqe *rq_cons_qe; 602cf4e6363SMichael Chan struct rqe *rq_first_qe; 603cf4e6363SMichael Chan struct rqe *rq_last_qe; 604cf4e6363SMichael Chan u16 rq_prod_idx; 605cf4e6363SMichael Chan u16 rq_cons_idx; 606cf4e6363SMichael Chan u32 rqe_left; 607cf4e6363SMichael Chan 608cf4e6363SMichael Chan void *rq_pgtbl_virt; 609cf4e6363SMichael Chan dma_addr_t rq_pgtbl_phys; 610cf4e6363SMichael Chan u32 rq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ 611cf4e6363SMichael Chan }; 612cf4e6363SMichael Chan 613cf4e6363SMichael Chan 614cf4e6363SMichael Chan 615cf4e6363SMichael Chan /* 616cf4e6363SMichael Chan * CID handles 617cf4e6363SMichael Chan */ 618cf4e6363SMichael Chan struct ep_handles { 619cf4e6363SMichael Chan u32 fw_cid; 620cf4e6363SMichael Chan u32 drv_iscsi_cid; 621cf4e6363SMichael Chan u16 pg_cid; 622cf4e6363SMichael Chan u16 rsvd; 623cf4e6363SMichael Chan }; 624cf4e6363SMichael Chan 625cf4e6363SMichael Chan 626cf4e6363SMichael Chan enum { 627cf4e6363SMichael Chan EP_STATE_IDLE = 0x0, 628cf4e6363SMichael Chan EP_STATE_PG_OFLD_START = 0x1, 629cf4e6363SMichael Chan EP_STATE_PG_OFLD_COMPL = 0x2, 630cf4e6363SMichael Chan EP_STATE_OFLD_START = 0x4, 631cf4e6363SMichael Chan EP_STATE_OFLD_COMPL = 0x8, 632cf4e6363SMichael Chan EP_STATE_CONNECT_START = 0x10, 633cf4e6363SMichael Chan EP_STATE_CONNECT_COMPL = 0x20, 634cf4e6363SMichael Chan EP_STATE_ULP_UPDATE_START = 0x40, 635cf4e6363SMichael Chan EP_STATE_ULP_UPDATE_COMPL = 0x80, 636cf4e6363SMichael Chan EP_STATE_DISCONN_START = 0x100, 637cf4e6363SMichael Chan EP_STATE_DISCONN_COMPL = 0x200, 638cf4e6363SMichael Chan EP_STATE_CLEANUP_START = 0x400, 639cf4e6363SMichael Chan EP_STATE_CLEANUP_CMPL = 0x800, 640cf4e6363SMichael Chan EP_STATE_TCP_FIN_RCVD = 0x1000, 641cf4e6363SMichael Chan EP_STATE_TCP_RST_RCVD = 0x2000, 642*2eefb20dSEddie Wai EP_STATE_LOGOUT_SENT = 0x4000, 643*2eefb20dSEddie Wai EP_STATE_LOGOUT_RESP_RCVD = 0x8000, 644cf4e6363SMichael Chan EP_STATE_PG_OFLD_FAILED = 0x1000000, 645cf4e6363SMichael Chan EP_STATE_ULP_UPDATE_FAILED = 0x2000000, 646cf4e6363SMichael Chan EP_STATE_CLEANUP_FAILED = 0x4000000, 647cf4e6363SMichael Chan EP_STATE_OFLD_FAILED = 0x8000000, 648cf4e6363SMichael Chan EP_STATE_CONNECT_FAILED = 0x10000000, 649cf4e6363SMichael Chan EP_STATE_DISCONN_TIMEDOUT = 0x20000000, 650cf4e6363SMichael Chan }; 651cf4e6363SMichael Chan 652cf4e6363SMichael Chan /** 653cf4e6363SMichael Chan * struct bnx2i_endpoint - representation of tcp connection in NX2 world 654cf4e6363SMichael Chan * 655cf4e6363SMichael Chan * @link: list head to link elements 656cf4e6363SMichael Chan * @hba: adapter to which this connection belongs 657cf4e6363SMichael Chan * @conn: iscsi connection this EP is linked to 65846012e8bSEddie Wai * @cls_ep: associated iSCSI endpoint pointer 659cf4e6363SMichael Chan * @sess: iscsi session this EP is linked to 660cf4e6363SMichael Chan * @cm_sk: cnic sock struct 661cf4e6363SMichael Chan * @hba_age: age to detect if 'iscsid' issues ep_disconnect() 662cf4e6363SMichael Chan * after HBA reset is completed by bnx2i/cnic/bnx2 663cf4e6363SMichael Chan * modules 664cf4e6363SMichael Chan * @state: tracks offload connection state machine 665cf4e6363SMichael Chan * @teardown_mode: indicates if conn teardown is abortive or orderly 666cf4e6363SMichael Chan * @qp: QP information 667cf4e6363SMichael Chan * @ids: contains chip allocated *context id* & driver assigned 668cf4e6363SMichael Chan * *iscsi cid* 669cf4e6363SMichael Chan * @ofld_timer: offload timer to detect timeout 670cf4e6363SMichael Chan * @ofld_wait: wait queue 671cf4e6363SMichael Chan * 672cf4e6363SMichael Chan * Endpoint Structure - equivalent of tcp socket structure 673cf4e6363SMichael Chan */ 674cf4e6363SMichael Chan struct bnx2i_endpoint { 675cf4e6363SMichael Chan struct list_head link; 676cf4e6363SMichael Chan struct bnx2i_hba *hba; 677cf4e6363SMichael Chan struct bnx2i_conn *conn; 67846012e8bSEddie Wai struct iscsi_endpoint *cls_ep; 679cf4e6363SMichael Chan struct cnic_sock *cm_sk; 680cf4e6363SMichael Chan u32 hba_age; 681cf4e6363SMichael Chan u32 state; 682cf4e6363SMichael Chan unsigned long timestamp; 683cf4e6363SMichael Chan int num_active_cmds; 684cf4e6363SMichael Chan 685cf4e6363SMichael Chan struct qp_info qp; 686cf4e6363SMichael Chan struct ep_handles ids; 687cf4e6363SMichael Chan #define ep_iscsi_cid ids.drv_iscsi_cid 688cf4e6363SMichael Chan #define ep_cid ids.fw_cid 689cf4e6363SMichael Chan #define ep_pg_cid ids.pg_cid 690cf4e6363SMichael Chan struct timer_list ofld_timer; 691cf4e6363SMichael Chan wait_queue_head_t ofld_wait; 692cf4e6363SMichael Chan }; 693cf4e6363SMichael Chan 694cf4e6363SMichael Chan 695cf4e6363SMichael Chan 696cf4e6363SMichael Chan /* Global variables */ 697cf4e6363SMichael Chan extern unsigned int error_mask1, error_mask2; 698cf4e6363SMichael Chan extern u64 iscsi_error_mask; 699cf4e6363SMichael Chan extern unsigned int en_tcp_dack; 700cf4e6363SMichael Chan extern unsigned int event_coal_div; 7018776193bSAnil Veerabhadrappa extern unsigned int event_coal_min; 702cf4e6363SMichael Chan 703cf4e6363SMichael Chan extern struct scsi_transport_template *bnx2i_scsi_xport_template; 704cf4e6363SMichael Chan extern struct iscsi_transport bnx2i_iscsi_transport; 705cf4e6363SMichael Chan extern struct cnic_ulp_ops bnx2i_cnic_cb; 706cf4e6363SMichael Chan 707cf4e6363SMichael Chan extern unsigned int sq_size; 708cf4e6363SMichael Chan extern unsigned int rq_size; 709cf4e6363SMichael Chan 710cf4e6363SMichael Chan extern struct device_attribute *bnx2i_dev_attributes[]; 711cf4e6363SMichael Chan 712cf4e6363SMichael Chan 713cf4e6363SMichael Chan 714cf4e6363SMichael Chan /* 715cf4e6363SMichael Chan * Function Prototypes 716cf4e6363SMichael Chan */ 717cf4e6363SMichael Chan extern void bnx2i_identify_device(struct bnx2i_hba *hba); 718cf4e6363SMichael Chan extern void bnx2i_register_device(struct bnx2i_hba *hba); 719cf4e6363SMichael Chan 720cf4e6363SMichael Chan extern void bnx2i_ulp_init(struct cnic_dev *dev); 721cf4e6363SMichael Chan extern void bnx2i_ulp_exit(struct cnic_dev *dev); 722cf4e6363SMichael Chan extern void bnx2i_start(void *handle); 723cf4e6363SMichael Chan extern void bnx2i_stop(void *handle); 724cf4e6363SMichael Chan extern void bnx2i_reg_dev_all(void); 725cf4e6363SMichael Chan extern void bnx2i_unreg_dev_all(void); 726cf4e6363SMichael Chan extern struct bnx2i_hba *get_adapter_list_head(void); 727cf4e6363SMichael Chan 728cf4e6363SMichael Chan struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba, 729cf4e6363SMichael Chan u16 iscsi_cid); 730cf4e6363SMichael Chan 731cf4e6363SMichael Chan int bnx2i_alloc_ep_pool(void); 732cf4e6363SMichael Chan void bnx2i_release_ep_pool(void); 733cf4e6363SMichael Chan struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba); 734cf4e6363SMichael Chan struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba); 735cf4e6363SMichael Chan 736cf4e6363SMichael Chan struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic); 737cf4e6363SMichael Chan 738cf4e6363SMichael Chan struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic); 739cf4e6363SMichael Chan void bnx2i_free_hba(struct bnx2i_hba *hba); 740cf4e6363SMichael Chan 741cf4e6363SMichael Chan void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len); 742cf4e6363SMichael Chan void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count); 743cf4e6363SMichael Chan 744cf4e6363SMichael Chan void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd); 745cf4e6363SMichael Chan 746cf4e6363SMichael Chan void bnx2i_drop_session(struct iscsi_cls_session *session); 747cf4e6363SMichael Chan 748cf4e6363SMichael Chan extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba); 749cf4e6363SMichael Chan extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn, 750cf4e6363SMichael Chan struct iscsi_task *mtask); 751cf4e6363SMichael Chan extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn, 752cf4e6363SMichael Chan struct iscsi_task *mtask); 753cf4e6363SMichael Chan extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn, 754cf4e6363SMichael Chan struct bnx2i_cmd *cmnd); 755cf4e6363SMichael Chan extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn, 756cf4e6363SMichael Chan struct iscsi_task *mtask, u32 ttt, 757cf4e6363SMichael Chan char *datap, int data_len, int unsol); 758cf4e6363SMichael Chan extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn, 759cf4e6363SMichael Chan struct iscsi_task *mtask); 760cf4e6363SMichael Chan extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba, 761cf4e6363SMichael Chan struct bnx2i_cmd *cmd); 762cf4e6363SMichael Chan extern void bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba, 763cf4e6363SMichael Chan struct bnx2i_endpoint *ep); 764cf4e6363SMichael Chan extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn); 765cf4e6363SMichael Chan extern void bnx2i_send_conn_destroy(struct bnx2i_hba *hba, 766cf4e6363SMichael Chan struct bnx2i_endpoint *ep); 767cf4e6363SMichael Chan 768cf4e6363SMichael Chan extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, 769cf4e6363SMichael Chan struct bnx2i_endpoint *ep); 770cf4e6363SMichael Chan extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba, 771cf4e6363SMichael Chan struct bnx2i_endpoint *ep); 772cf4e6363SMichael Chan extern void bnx2i_ep_ofld_timer(unsigned long data); 773cf4e6363SMichael Chan extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list( 774cf4e6363SMichael Chan struct bnx2i_hba *hba, u32 iscsi_cid); 775cf4e6363SMichael Chan extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list( 776cf4e6363SMichael Chan struct bnx2i_hba *hba, u32 iscsi_cid); 777cf4e6363SMichael Chan 778cf4e6363SMichael Chan extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep); 779cf4e6363SMichael Chan extern void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action); 780cf4e6363SMichael Chan 78155e15c97SEddie Wai extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep); 78255e15c97SEddie Wai 783cf4e6363SMichael Chan /* Debug related function prototypes */ 784cf4e6363SMichael Chan extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn); 785cf4e6363SMichael Chan extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn); 786cf4e6363SMichael Chan extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn); 787cf4e6363SMichael Chan extern void bnx2i_print_recv_state(struct bnx2i_conn *conn); 788cf4e6363SMichael Chan 789cf4e6363SMichael Chan #endif 790