1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for PCA9685 16-channel 12-bit PWM LED controller 4 * 5 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> 6 * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com> 7 * 8 * based on the pwm-twl-led.c driver 9 */ 10 11 #include <linux/gpio/driver.h> 12 #include <linux/i2c.h> 13 #include <linux/module.h> 14 #include <linux/mutex.h> 15 #include <linux/platform_device.h> 16 #include <linux/property.h> 17 #include <linux/pwm.h> 18 #include <linux/regmap.h> 19 #include <linux/slab.h> 20 #include <linux/delay.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/bitmap.h> 23 24 /* 25 * Because the PCA9685 has only one prescaler per chip, only the first channel 26 * that is enabled is allowed to change the prescale register. 27 * PWM channels requested afterwards must use a period that results in the same 28 * prescale setting as the one set by the first requested channel. 29 * GPIOs do not count as enabled PWMs as they are not using the prescaler. 30 */ 31 32 #define PCA9685_MODE1 0x00 33 #define PCA9685_MODE2 0x01 34 #define PCA9685_SUBADDR1 0x02 35 #define PCA9685_SUBADDR2 0x03 36 #define PCA9685_SUBADDR3 0x04 37 #define PCA9685_ALLCALLADDR 0x05 38 #define PCA9685_LEDX_ON_L 0x06 39 #define PCA9685_LEDX_ON_H 0x07 40 #define PCA9685_LEDX_OFF_L 0x08 41 #define PCA9685_LEDX_OFF_H 0x09 42 43 #define PCA9685_ALL_LED_ON_L 0xFA 44 #define PCA9685_ALL_LED_ON_H 0xFB 45 #define PCA9685_ALL_LED_OFF_L 0xFC 46 #define PCA9685_ALL_LED_OFF_H 0xFD 47 #define PCA9685_PRESCALE 0xFE 48 49 #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */ 50 #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */ 51 52 #define PCA9685_COUNTER_RANGE 4096 53 #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */ 54 55 #define PCA9685_NUMREGS 0xFF 56 #define PCA9685_MAXCHAN 0x10 57 58 #define LED_FULL BIT(4) 59 #define MODE1_ALLCALL BIT(0) 60 #define MODE1_SUB3 BIT(1) 61 #define MODE1_SUB2 BIT(2) 62 #define MODE1_SUB1 BIT(3) 63 #define MODE1_SLEEP BIT(4) 64 #define MODE2_INVRT BIT(4) 65 #define MODE2_OUTDRV BIT(2) 66 67 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) 68 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) 69 #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N))) 70 #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N))) 71 72 #define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C))) 73 #define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C))) 74 #define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C))) 75 #define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C))) 76 77 struct pca9685 { 78 struct regmap *regmap; 79 struct mutex lock; 80 DECLARE_BITMAP(pwms_enabled, PCA9685_MAXCHAN + 1); 81 #if IS_ENABLED(CONFIG_GPIOLIB) 82 struct gpio_chip gpio; 83 DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1); 84 #endif 85 }; 86 87 static inline struct pca9685 *to_pca(struct pwm_chip *chip) 88 { 89 return pwmchip_get_drvdata(chip); 90 } 91 92 /* This function is supposed to be called with the lock mutex held */ 93 static bool pca9685_prescaler_can_change(struct pca9685 *pca, int channel) 94 { 95 /* No PWM enabled: Change allowed */ 96 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1)) 97 return true; 98 /* More than one PWM enabled: Change not allowed */ 99 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1) 100 return false; 101 /* 102 * Only one PWM enabled: Change allowed if the PWM about to 103 * be changed is the one that is already enabled 104 */ 105 return test_bit(channel, pca->pwms_enabled); 106 } 107 108 static int pca9685_read_reg(struct pwm_chip *chip, unsigned int reg, unsigned int *val) 109 { 110 struct pca9685 *pca = to_pca(chip); 111 struct device *dev = pwmchip_parent(chip); 112 int err; 113 114 err = regmap_read(pca->regmap, reg, val); 115 if (err) 116 dev_err(dev, "regmap_read of register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 117 118 return err; 119 } 120 121 static int pca9685_write_reg(struct pwm_chip *chip, unsigned int reg, unsigned int val) 122 { 123 struct pca9685 *pca = to_pca(chip); 124 struct device *dev = pwmchip_parent(chip); 125 int err; 126 127 err = regmap_write(pca->regmap, reg, val); 128 if (err) 129 dev_err(dev, "regmap_write to register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 130 131 return err; 132 } 133 134 /* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */ 135 static void pca9685_pwm_set_duty(struct pwm_chip *chip, int channel, unsigned int duty) 136 { 137 struct pwm_device *pwm = &chip->pwms[channel]; 138 unsigned int on, off; 139 140 if (duty == 0) { 141 /* Set the full OFF bit, which has the highest precedence */ 142 pca9685_write_reg(chip, REG_OFF_H(channel), LED_FULL); 143 return; 144 } else if (duty >= PCA9685_COUNTER_RANGE) { 145 /* Set the full ON bit and clear the full OFF bit */ 146 pca9685_write_reg(chip, REG_ON_H(channel), LED_FULL); 147 pca9685_write_reg(chip, REG_OFF_H(channel), 0); 148 return; 149 } 150 151 152 if (pwm->state.usage_power && channel < PCA9685_MAXCHAN) { 153 /* 154 * If usage_power is set, the pca9685 driver will phase shift 155 * the individual channels relative to their channel number. 156 * This improves EMI because the enabled channels no longer 157 * turn on at the same time, while still maintaining the 158 * configured duty cycle / power output. 159 */ 160 on = channel * PCA9685_COUNTER_RANGE / PCA9685_MAXCHAN; 161 } else 162 on = 0; 163 164 off = (on + duty) % PCA9685_COUNTER_RANGE; 165 166 /* Set ON time (clears full ON bit) */ 167 pca9685_write_reg(chip, REG_ON_L(channel), on & 0xff); 168 pca9685_write_reg(chip, REG_ON_H(channel), (on >> 8) & 0xf); 169 /* Set OFF time (clears full OFF bit) */ 170 pca9685_write_reg(chip, REG_OFF_L(channel), off & 0xff); 171 pca9685_write_reg(chip, REG_OFF_H(channel), (off >> 8) & 0xf); 172 } 173 174 static unsigned int pca9685_pwm_get_duty(struct pwm_chip *chip, int channel) 175 { 176 struct pwm_device *pwm = &chip->pwms[channel]; 177 unsigned int off = 0, on = 0, val = 0; 178 179 if (WARN_ON(channel >= PCA9685_MAXCHAN)) { 180 /* HW does not support reading state of "all LEDs" channel */ 181 return 0; 182 } 183 184 pca9685_read_reg(chip, LED_N_OFF_H(channel), &off); 185 if (off & LED_FULL) { 186 /* Full OFF bit is set */ 187 return 0; 188 } 189 190 pca9685_read_reg(chip, LED_N_ON_H(channel), &on); 191 if (on & LED_FULL) { 192 /* Full ON bit is set */ 193 return PCA9685_COUNTER_RANGE; 194 } 195 196 pca9685_read_reg(chip, LED_N_OFF_L(channel), &val); 197 off = ((off & 0xf) << 8) | (val & 0xff); 198 if (!pwm->state.usage_power) 199 return off; 200 201 /* Read ON register to calculate duty cycle of staggered output */ 202 if (pca9685_read_reg(chip, LED_N_ON_L(channel), &val)) { 203 /* Reset val to 0 in case reading LED_N_ON_L failed */ 204 val = 0; 205 } 206 on = ((on & 0xf) << 8) | (val & 0xff); 207 return (off - on) & (PCA9685_COUNTER_RANGE - 1); 208 } 209 210 #if IS_ENABLED(CONFIG_GPIOLIB) 211 static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx) 212 { 213 bool is_inuse; 214 215 mutex_lock(&pca->lock); 216 if (pwm_idx >= PCA9685_MAXCHAN) { 217 /* 218 * "All LEDs" channel: 219 * pretend already in use if any of the PWMs are requested 220 */ 221 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) { 222 is_inuse = true; 223 goto out; 224 } 225 } else { 226 /* 227 * Regular channel: 228 * pretend already in use if the "all LEDs" channel is requested 229 */ 230 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) { 231 is_inuse = true; 232 goto out; 233 } 234 } 235 is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse); 236 out: 237 mutex_unlock(&pca->lock); 238 return is_inuse; 239 } 240 241 static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 242 { 243 mutex_lock(&pca->lock); 244 clear_bit(pwm_idx, pca->pwms_inuse); 245 mutex_unlock(&pca->lock); 246 } 247 248 static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset) 249 { 250 struct pwm_chip *chip = gpiochip_get_data(gpio); 251 struct pca9685 *pca = to_pca(chip); 252 253 if (pca9685_pwm_test_and_set_inuse(pca, offset)) 254 return -EBUSY; 255 pm_runtime_get_sync(pwmchip_parent(chip)); 256 return 0; 257 } 258 259 static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset) 260 { 261 struct pwm_chip *chip = gpiochip_get_data(gpio); 262 263 return pca9685_pwm_get_duty(chip, offset) != 0; 264 } 265 266 static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset, 267 int value) 268 { 269 struct pwm_chip *chip = gpiochip_get_data(gpio); 270 271 pca9685_pwm_set_duty(chip, offset, value ? PCA9685_COUNTER_RANGE : 0); 272 } 273 274 static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset) 275 { 276 struct pwm_chip *chip = gpiochip_get_data(gpio); 277 struct pca9685 *pca = to_pca(chip); 278 279 pca9685_pwm_set_duty(chip, offset, 0); 280 pm_runtime_put(pwmchip_parent(chip)); 281 pca9685_pwm_clear_inuse(pca, offset); 282 } 283 284 static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip, 285 unsigned int offset) 286 { 287 /* Always out */ 288 return GPIO_LINE_DIRECTION_OUT; 289 } 290 291 static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio, 292 unsigned int offset) 293 { 294 return -EINVAL; 295 } 296 297 static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio, 298 unsigned int offset, int value) 299 { 300 pca9685_pwm_gpio_set(gpio, offset, value); 301 302 return 0; 303 } 304 305 /* 306 * The PCA9685 has a bit for turning the PWM output full off or on. Some 307 * boards like Intel Galileo actually uses these as normal GPIOs so we 308 * expose a GPIO chip here which can exclusively take over the underlying 309 * PWM channel. 310 */ 311 static int pca9685_pwm_gpio_probe(struct pwm_chip *chip) 312 { 313 struct pca9685 *pca = to_pca(chip); 314 struct device *dev = pwmchip_parent(chip); 315 316 pca->gpio.label = dev_name(dev); 317 pca->gpio.parent = dev; 318 pca->gpio.request = pca9685_pwm_gpio_request; 319 pca->gpio.free = pca9685_pwm_gpio_free; 320 pca->gpio.get_direction = pca9685_pwm_gpio_get_direction; 321 pca->gpio.direction_input = pca9685_pwm_gpio_direction_input; 322 pca->gpio.direction_output = pca9685_pwm_gpio_direction_output; 323 pca->gpio.get = pca9685_pwm_gpio_get; 324 pca->gpio.set = pca9685_pwm_gpio_set; 325 pca->gpio.base = -1; 326 pca->gpio.ngpio = PCA9685_MAXCHAN; 327 pca->gpio.can_sleep = true; 328 329 return devm_gpiochip_add_data(dev, &pca->gpio, chip); 330 } 331 #else 332 static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, 333 int pwm_idx) 334 { 335 return false; 336 } 337 338 static inline void 339 pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 340 { 341 } 342 343 static inline int pca9685_pwm_gpio_probe(struct pwm_chip *chip) 344 { 345 return 0; 346 } 347 #endif 348 349 static void pca9685_set_sleep_mode(struct pwm_chip *chip, bool enable) 350 { 351 struct device *dev = pwmchip_parent(chip); 352 struct pca9685 *pca = to_pca(chip); 353 int err = regmap_update_bits(pca->regmap, PCA9685_MODE1, 354 MODE1_SLEEP, enable ? MODE1_SLEEP : 0); 355 if (err) { 356 dev_err(dev, "regmap_update_bits of register 0x%x failed: %pe\n", 357 PCA9685_MODE1, ERR_PTR(err)); 358 return; 359 } 360 361 if (!enable) { 362 /* Wait 500us for the oscillator to be back up */ 363 udelay(500); 364 } 365 } 366 367 static int __pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 368 const struct pwm_state *state) 369 { 370 struct pca9685 *pca = to_pca(chip); 371 unsigned long long duty, prescale; 372 unsigned int val = 0; 373 374 if (state->polarity != PWM_POLARITY_NORMAL) 375 return -EINVAL; 376 377 prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period, 378 PCA9685_COUNTER_RANGE * 1000) - 1; 379 if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) { 380 dev_err(pwmchip_parent(chip), "pwm not changed: period out of bounds!\n"); 381 return -EINVAL; 382 } 383 384 if (!state->enabled) { 385 pca9685_pwm_set_duty(chip, pwm->hwpwm, 0); 386 return 0; 387 } 388 389 pca9685_read_reg(chip, PCA9685_PRESCALE, &val); 390 if (prescale != val) { 391 if (!pca9685_prescaler_can_change(pca, pwm->hwpwm)) { 392 dev_err(pwmchip_parent(chip), 393 "pwm not changed: periods of enabled pwms must match!\n"); 394 return -EBUSY; 395 } 396 397 /* 398 * Putting the chip briefly into SLEEP mode 399 * at this point won't interfere with the 400 * pm_runtime framework, because the pm_runtime 401 * state is guaranteed active here. 402 */ 403 /* Put chip into sleep mode */ 404 pca9685_set_sleep_mode(chip, true); 405 406 /* Change the chip-wide output frequency */ 407 pca9685_write_reg(chip, PCA9685_PRESCALE, prescale); 408 409 /* Wake the chip up */ 410 pca9685_set_sleep_mode(chip, false); 411 } 412 413 duty = PCA9685_COUNTER_RANGE * state->duty_cycle; 414 duty = DIV_ROUND_UP_ULL(duty, state->period); 415 pca9685_pwm_set_duty(chip, pwm->hwpwm, duty); 416 return 0; 417 } 418 419 static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 420 const struct pwm_state *state) 421 { 422 struct pca9685 *pca = to_pca(chip); 423 int ret; 424 425 mutex_lock(&pca->lock); 426 ret = __pca9685_pwm_apply(chip, pwm, state); 427 if (ret == 0) { 428 if (state->enabled) 429 set_bit(pwm->hwpwm, pca->pwms_enabled); 430 else 431 clear_bit(pwm->hwpwm, pca->pwms_enabled); 432 } 433 mutex_unlock(&pca->lock); 434 435 return ret; 436 } 437 438 static int pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 439 struct pwm_state *state) 440 { 441 unsigned long long duty; 442 unsigned int val = 0; 443 444 /* Calculate (chip-wide) period from prescale value */ 445 pca9685_read_reg(chip, PCA9685_PRESCALE, &val); 446 /* 447 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000. 448 * The following calculation is therefore only a multiplication 449 * and we are not losing precision. 450 */ 451 state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) * 452 (val + 1); 453 454 /* The (per-channel) polarity is fixed */ 455 state->polarity = PWM_POLARITY_NORMAL; 456 457 if (pwm->hwpwm >= PCA9685_MAXCHAN) { 458 /* 459 * The "all LEDs" channel does not support HW readout 460 * Return 0 and disabled for backwards compatibility 461 */ 462 state->duty_cycle = 0; 463 state->enabled = false; 464 return 0; 465 } 466 467 state->enabled = true; 468 duty = pca9685_pwm_get_duty(chip, pwm->hwpwm); 469 state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE); 470 471 return 0; 472 } 473 474 static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 475 { 476 struct pca9685 *pca = to_pca(chip); 477 478 if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm)) 479 return -EBUSY; 480 481 if (pwm->hwpwm < PCA9685_MAXCHAN) { 482 /* PWMs - except the "all LEDs" channel - default to enabled */ 483 mutex_lock(&pca->lock); 484 set_bit(pwm->hwpwm, pca->pwms_enabled); 485 mutex_unlock(&pca->lock); 486 } 487 488 pm_runtime_get_sync(pwmchip_parent(chip)); 489 490 return 0; 491 } 492 493 static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 494 { 495 struct pca9685 *pca = to_pca(chip); 496 497 mutex_lock(&pca->lock); 498 pca9685_pwm_set_duty(chip, pwm->hwpwm, 0); 499 clear_bit(pwm->hwpwm, pca->pwms_enabled); 500 mutex_unlock(&pca->lock); 501 502 pm_runtime_put(pwmchip_parent(chip)); 503 pca9685_pwm_clear_inuse(pca, pwm->hwpwm); 504 } 505 506 static const struct pwm_ops pca9685_pwm_ops = { 507 .apply = pca9685_pwm_apply, 508 .get_state = pca9685_pwm_get_state, 509 .request = pca9685_pwm_request, 510 .free = pca9685_pwm_free, 511 }; 512 513 static const struct regmap_config pca9685_regmap_i2c_config = { 514 .reg_bits = 8, 515 .val_bits = 8, 516 .max_register = PCA9685_NUMREGS, 517 .cache_type = REGCACHE_NONE, 518 }; 519 520 static int pca9685_pwm_probe(struct i2c_client *client) 521 { 522 struct pwm_chip *chip; 523 struct pca9685 *pca; 524 unsigned int reg; 525 int ret; 526 527 /* Add an extra channel for ALL_LED */ 528 chip = devm_pwmchip_alloc(&client->dev, PCA9685_MAXCHAN + 1, sizeof(*pca)); 529 if (IS_ERR(chip)) 530 return PTR_ERR(chip); 531 pca = to_pca(chip); 532 533 pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config); 534 if (IS_ERR(pca->regmap)) { 535 ret = PTR_ERR(pca->regmap); 536 dev_err(&client->dev, "Failed to initialize register map: %d\n", 537 ret); 538 return ret; 539 } 540 541 i2c_set_clientdata(client, chip); 542 543 mutex_init(&pca->lock); 544 545 ret = pca9685_read_reg(chip, PCA9685_MODE2, ®); 546 if (ret) 547 return ret; 548 549 if (device_property_read_bool(&client->dev, "invert")) 550 reg |= MODE2_INVRT; 551 else 552 reg &= ~MODE2_INVRT; 553 554 if (device_property_read_bool(&client->dev, "open-drain")) 555 reg &= ~MODE2_OUTDRV; 556 else 557 reg |= MODE2_OUTDRV; 558 559 ret = pca9685_write_reg(chip, PCA9685_MODE2, reg); 560 if (ret) 561 return ret; 562 563 /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */ 564 pca9685_read_reg(chip, PCA9685_MODE1, ®); 565 reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); 566 pca9685_write_reg(chip, PCA9685_MODE1, reg); 567 568 /* Reset OFF/ON registers to POR default */ 569 pca9685_write_reg(chip, PCA9685_ALL_LED_OFF_L, 0); 570 pca9685_write_reg(chip, PCA9685_ALL_LED_OFF_H, LED_FULL); 571 pca9685_write_reg(chip, PCA9685_ALL_LED_ON_L, 0); 572 pca9685_write_reg(chip, PCA9685_ALL_LED_ON_H, LED_FULL); 573 574 chip->ops = &pca9685_pwm_ops; 575 576 ret = pwmchip_add(chip); 577 if (ret < 0) 578 return ret; 579 580 ret = pca9685_pwm_gpio_probe(chip); 581 if (ret < 0) { 582 pwmchip_remove(chip); 583 return ret; 584 } 585 586 pm_runtime_enable(&client->dev); 587 588 if (pm_runtime_enabled(&client->dev)) { 589 /* 590 * Although the chip comes out of power-up in the sleep state, 591 * we force it to sleep in case it was woken up before 592 */ 593 pca9685_set_sleep_mode(chip, true); 594 pm_runtime_set_suspended(&client->dev); 595 } else { 596 /* Wake the chip up if runtime PM is disabled */ 597 pca9685_set_sleep_mode(chip, false); 598 } 599 600 return 0; 601 } 602 603 static void pca9685_pwm_remove(struct i2c_client *client) 604 { 605 struct pwm_chip *chip = i2c_get_clientdata(client); 606 607 pwmchip_remove(chip); 608 609 if (!pm_runtime_enabled(&client->dev)) { 610 /* Put chip in sleep state if runtime PM is disabled */ 611 pca9685_set_sleep_mode(chip, true); 612 } 613 614 pm_runtime_disable(&client->dev); 615 } 616 617 static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev) 618 { 619 struct i2c_client *client = to_i2c_client(dev); 620 struct pwm_chip *chip = i2c_get_clientdata(client); 621 622 pca9685_set_sleep_mode(chip, true); 623 return 0; 624 } 625 626 static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev) 627 { 628 struct i2c_client *client = to_i2c_client(dev); 629 struct pwm_chip *chip = i2c_get_clientdata(client); 630 631 pca9685_set_sleep_mode(chip, false); 632 return 0; 633 } 634 635 static const struct i2c_device_id pca9685_id[] = { 636 { "pca9685" }, 637 { /* sentinel */ } 638 }; 639 MODULE_DEVICE_TABLE(i2c, pca9685_id); 640 641 static const struct acpi_device_id pca9685_acpi_ids[] = { 642 { "INT3492", 0 }, 643 { /* sentinel */ }, 644 }; 645 MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids); 646 647 static const struct of_device_id pca9685_dt_ids[] = { 648 { .compatible = "nxp,pca9685-pwm", }, 649 { /* sentinel */ } 650 }; 651 MODULE_DEVICE_TABLE(of, pca9685_dt_ids); 652 653 static const struct dev_pm_ops pca9685_pwm_pm = { 654 SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend, 655 pca9685_pwm_runtime_resume, NULL) 656 }; 657 658 static struct i2c_driver pca9685_i2c_driver = { 659 .driver = { 660 .name = "pca9685-pwm", 661 .acpi_match_table = pca9685_acpi_ids, 662 .of_match_table = pca9685_dt_ids, 663 .pm = &pca9685_pwm_pm, 664 }, 665 .probe = pca9685_pwm_probe, 666 .remove = pca9685_pwm_remove, 667 .id_table = pca9685_id, 668 }; 669 670 module_i2c_driver(pca9685_i2c_driver); 671 672 MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>"); 673 MODULE_DESCRIPTION("PWM driver for PCA9685"); 674 MODULE_LICENSE("GPL"); 675