1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AXP20x pinctrl and GPIO driver 4 * 5 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 6 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/device.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/axp20x.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/platform_device.h> 19 #include <linux/regmap.h> 20 #include <linux/slab.h> 21 22 #include <linux/pinctrl/consumer.h> 23 #include <linux/pinctrl/pinconf-generic.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 27 #define AXP20X_GPIO_FUNCTIONS 0x7 28 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 29 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 30 #define AXP20X_GPIO_FUNCTION_INPUT 2 31 32 #define AXP20X_GPIO3_FUNCTIONS GENMASK(2, 1) 33 #define AXP20X_GPIO3_FUNCTION_OUT_LOW 0 34 #define AXP20X_GPIO3_FUNCTION_OUT_HIGH 2 35 #define AXP20X_GPIO3_FUNCTION_INPUT 4 36 37 #define AXP20X_FUNC_GPIO_OUT 0 38 #define AXP20X_FUNC_GPIO_IN 1 39 #define AXP20X_FUNC_LDO 2 40 #define AXP20X_FUNC_ADC 3 41 #define AXP20X_FUNCS_NB 4 42 43 #define AXP20X_MUX_GPIO_OUT 0 44 #define AXP20X_MUX_GPIO_IN BIT(1) 45 #define AXP20X_MUX_ADC BIT(2) 46 47 #define AXP813_MUX_ADC (BIT(2) | BIT(0)) 48 49 struct axp20x_pctrl_desc { 50 const struct pinctrl_pin_desc *pins; 51 unsigned int npins; 52 /* Stores the pins supporting LDO function. Bit offset is pin number. */ 53 u8 ldo_mask; 54 /* Stores the pins supporting ADC function. Bit offset is pin number. */ 55 u8 adc_mask; 56 u8 gpio_status_offset; 57 u8 adc_mux; 58 }; 59 60 struct axp20x_pinctrl_function { 61 const char *name; 62 unsigned int muxval; 63 const char **groups; 64 unsigned int ngroups; 65 }; 66 67 struct axp20x_pctl { 68 struct gpio_chip chip; 69 struct regmap *regmap; 70 struct pinctrl_dev *pctl_dev; 71 struct device *dev; 72 const struct axp20x_pctrl_desc *desc; 73 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; 74 }; 75 76 static const struct pinctrl_pin_desc axp209_pins[] = { 77 PINCTRL_PIN(0, "GPIO0"), 78 PINCTRL_PIN(1, "GPIO1"), 79 PINCTRL_PIN(2, "GPIO2"), 80 PINCTRL_PIN(3, "GPIO3"), 81 }; 82 83 static const struct pinctrl_pin_desc axp22x_pins[] = { 84 PINCTRL_PIN(0, "GPIO0"), 85 PINCTRL_PIN(1, "GPIO1"), 86 }; 87 88 static const struct axp20x_pctrl_desc axp20x_data = { 89 .pins = axp209_pins, 90 .npins = ARRAY_SIZE(axp209_pins), 91 .ldo_mask = BIT(0) | BIT(1), 92 .adc_mask = BIT(0) | BIT(1), 93 .gpio_status_offset = 4, 94 .adc_mux = AXP20X_MUX_ADC, 95 }; 96 97 static const struct axp20x_pctrl_desc axp22x_data = { 98 .pins = axp22x_pins, 99 .npins = ARRAY_SIZE(axp22x_pins), 100 .ldo_mask = BIT(0) | BIT(1), 101 .gpio_status_offset = 0, 102 }; 103 104 static const struct axp20x_pctrl_desc axp813_data = { 105 .pins = axp22x_pins, 106 .npins = ARRAY_SIZE(axp22x_pins), 107 .ldo_mask = BIT(0) | BIT(1), 108 .adc_mask = BIT(0), 109 .gpio_status_offset = 0, 110 .adc_mux = AXP813_MUX_ADC, 111 }; 112 113 static int axp20x_gpio_get_reg(unsigned int offset) 114 { 115 switch (offset) { 116 case 0: 117 return AXP20X_GPIO0_CTRL; 118 case 1: 119 return AXP20X_GPIO1_CTRL; 120 case 2: 121 return AXP20X_GPIO2_CTRL; 122 } 123 124 return -EINVAL; 125 } 126 127 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) 128 { 129 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 130 unsigned int val; 131 int ret; 132 133 /* AXP209 has GPIO3 status sharing the settings register */ 134 if (offset == 3) { 135 ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val); 136 if (ret) 137 return ret; 138 return !!(val & BIT(0)); 139 } 140 141 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); 142 if (ret) 143 return ret; 144 145 return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); 146 } 147 148 static int axp20x_gpio_get_direction(struct gpio_chip *chip, 149 unsigned int offset) 150 { 151 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 152 unsigned int val; 153 int reg, ret; 154 155 /* AXP209 GPIO3 settings have a different layout */ 156 if (offset == 3) { 157 ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val); 158 if (ret) 159 return ret; 160 if (val & AXP20X_GPIO3_FUNCTION_INPUT) 161 return GPIO_LINE_DIRECTION_IN; 162 163 return GPIO_LINE_DIRECTION_OUT; 164 } 165 166 reg = axp20x_gpio_get_reg(offset); 167 if (reg < 0) 168 return reg; 169 170 ret = regmap_read(pctl->regmap, reg, &val); 171 if (ret) 172 return ret; 173 174 /* 175 * This shouldn't really happen if the pin is in use already, 176 * or if it's not in use yet, it doesn't matter since we're 177 * going to change the value soon anyway. Default to output. 178 */ 179 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 180 return GPIO_LINE_DIRECTION_OUT; 181 182 /* 183 * The GPIO directions are the three lowest values. 184 * 2 is input, 0 and 1 are output 185 */ 186 if (val & 2) 187 return GPIO_LINE_DIRECTION_IN; 188 189 return GPIO_LINE_DIRECTION_OUT; 190 } 191 192 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, 193 int value) 194 { 195 return chip->set_rv(chip, offset, value); 196 } 197 198 static int axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, 199 int value) 200 { 201 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 202 int reg; 203 204 /* AXP209 has GPIO3 status sharing the settings register */ 205 if (offset == 3) 206 return regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL, 207 AXP20X_GPIO3_FUNCTIONS, 208 value ? 209 AXP20X_GPIO3_FUNCTION_OUT_HIGH : 210 AXP20X_GPIO3_FUNCTION_OUT_LOW); 211 212 reg = axp20x_gpio_get_reg(offset); 213 if (reg < 0) 214 return reg; 215 216 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 217 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : 218 AXP20X_GPIO_FUNCTION_OUT_LOW); 219 } 220 221 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, 222 u8 config) 223 { 224 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 225 int reg; 226 227 /* AXP209 GPIO3 settings have a different layout */ 228 if (offset == 3) 229 return regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL, 230 AXP20X_GPIO3_FUNCTIONS, 231 config == AXP20X_MUX_GPIO_OUT ? AXP20X_GPIO3_FUNCTION_OUT_LOW : 232 AXP20X_GPIO3_FUNCTION_INPUT); 233 234 reg = axp20x_gpio_get_reg(offset); 235 if (reg < 0) 236 return reg; 237 238 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 239 config); 240 } 241 242 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) 243 { 244 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 245 246 return ARRAY_SIZE(pctl->funcs); 247 } 248 249 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, 250 unsigned int selector) 251 { 252 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 253 254 return pctl->funcs[selector].name; 255 } 256 257 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, 258 unsigned int selector, 259 const char * const **groups, 260 unsigned int *num_groups) 261 { 262 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 263 264 *groups = pctl->funcs[selector].groups; 265 *num_groups = pctl->funcs[selector].ngroups; 266 267 return 0; 268 } 269 270 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, 271 unsigned int function, unsigned int group) 272 { 273 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 274 unsigned int mask; 275 276 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 277 if (function <= AXP20X_FUNC_GPIO_IN) 278 return axp20x_pmx_set(pctldev, group, 279 pctl->funcs[function].muxval); 280 281 if (function == AXP20X_FUNC_LDO) 282 mask = pctl->desc->ldo_mask; 283 else 284 mask = pctl->desc->adc_mask; 285 286 if (!(BIT(group) & mask)) 287 return -EINVAL; 288 289 /* 290 * We let the regulator framework handle the LDO muxing as muxing bits 291 * are basically also regulators on/off bits. It's better not to enforce 292 * any state of the regulator when selecting LDO mux so that we don't 293 * interfere with the regulator driver. 294 */ 295 if (function == AXP20X_FUNC_LDO) 296 return 0; 297 298 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); 299 } 300 301 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 302 struct pinctrl_gpio_range *range, 303 unsigned int offset, bool input) 304 { 305 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 306 307 if (input) 308 return axp20x_pmx_set(pctldev, offset, 309 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); 310 311 return axp20x_pmx_set(pctldev, offset, 312 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); 313 } 314 315 static const struct pinmux_ops axp20x_pmx_ops = { 316 .get_functions_count = axp20x_pmx_func_cnt, 317 .get_function_name = axp20x_pmx_func_name, 318 .get_function_groups = axp20x_pmx_func_groups, 319 .set_mux = axp20x_pmx_set_mux, 320 .gpio_set_direction = axp20x_pmx_gpio_set_direction, 321 .strict = true, 322 }; 323 324 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) 325 { 326 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 327 328 return pctl->desc->npins; 329 } 330 331 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, 332 const unsigned int **pins, unsigned int *num_pins) 333 { 334 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 335 336 *pins = (unsigned int *)&pctl->desc->pins[selector]; 337 *num_pins = 1; 338 339 return 0; 340 } 341 342 static const char *axp20x_group_name(struct pinctrl_dev *pctldev, 343 unsigned int selector) 344 { 345 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 346 347 return pctl->desc->pins[selector].name; 348 } 349 350 static const struct pinctrl_ops axp20x_pctrl_ops = { 351 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 352 .dt_free_map = pinconf_generic_dt_free_map, 353 .get_groups_count = axp20x_groups_cnt, 354 .get_group_name = axp20x_group_name, 355 .get_group_pins = axp20x_group_pins, 356 }; 357 358 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, 359 unsigned int mask_len, 360 struct axp20x_pinctrl_function *func, 361 const struct pinctrl_pin_desc *pins) 362 { 363 unsigned long int mask_cpy = mask; 364 const char **group; 365 unsigned int ngroups = hweight8(mask); 366 int bit; 367 368 func->ngroups = ngroups; 369 if (func->ngroups > 0) { 370 func->groups = devm_kcalloc(dev, 371 ngroups, sizeof(const char *), 372 GFP_KERNEL); 373 if (!func->groups) 374 return -ENOMEM; 375 group = func->groups; 376 for_each_set_bit(bit, &mask_cpy, mask_len) { 377 *group = pins[bit].name; 378 group++; 379 } 380 } 381 382 return 0; 383 } 384 385 static int axp20x_build_funcs_groups(struct platform_device *pdev) 386 { 387 struct axp20x_pctl *pctl = platform_get_drvdata(pdev); 388 int i, ret, pin, npins = pctl->desc->npins; 389 390 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; 391 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; 392 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; 393 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; 394 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; 395 /* 396 * Muxval for LDO is useless as we won't use it. 397 * See comment in axp20x_pmx_set_mux. 398 */ 399 pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; 400 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; 401 402 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 403 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { 404 pctl->funcs[i].ngroups = npins; 405 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, 406 npins, sizeof(char *), 407 GFP_KERNEL); 408 if (!pctl->funcs[i].groups) 409 return -ENOMEM; 410 for (pin = 0; pin < npins; pin++) 411 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; 412 } 413 414 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, 415 npins, &pctl->funcs[AXP20X_FUNC_LDO], 416 pctl->desc->pins); 417 if (ret) 418 return ret; 419 420 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, 421 npins, &pctl->funcs[AXP20X_FUNC_ADC], 422 pctl->desc->pins); 423 if (ret) 424 return ret; 425 426 return 0; 427 } 428 429 static const struct of_device_id axp20x_pctl_match[] = { 430 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, 431 { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, }, 432 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, 433 { } 434 }; 435 MODULE_DEVICE_TABLE(of, axp20x_pctl_match); 436 437 static int axp20x_pctl_probe(struct platform_device *pdev) 438 { 439 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); 440 struct axp20x_pctl *pctl; 441 struct device *dev = &pdev->dev; 442 struct pinctrl_desc *pctrl_desc; 443 int ret; 444 445 if (!of_device_is_available(pdev->dev.of_node)) 446 return -ENODEV; 447 448 if (!axp20x) { 449 dev_err(&pdev->dev, "Parent drvdata not set\n"); 450 return -EINVAL; 451 } 452 453 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); 454 if (!pctl) 455 return -ENOMEM; 456 457 pctl->chip.base = -1; 458 pctl->chip.can_sleep = true; 459 pctl->chip.request = gpiochip_generic_request; 460 pctl->chip.free = gpiochip_generic_free; 461 pctl->chip.parent = &pdev->dev; 462 pctl->chip.label = dev_name(&pdev->dev); 463 pctl->chip.owner = THIS_MODULE; 464 pctl->chip.get = axp20x_gpio_get; 465 pctl->chip.get_direction = axp20x_gpio_get_direction; 466 pctl->chip.set_rv = axp20x_gpio_set; 467 pctl->chip.direction_input = pinctrl_gpio_direction_input; 468 pctl->chip.direction_output = axp20x_gpio_output; 469 470 pctl->desc = of_device_get_match_data(dev); 471 472 pctl->chip.ngpio = pctl->desc->npins; 473 474 pctl->regmap = axp20x->regmap; 475 pctl->dev = &pdev->dev; 476 477 platform_set_drvdata(pdev, pctl); 478 479 ret = axp20x_build_funcs_groups(pdev); 480 if (ret) { 481 dev_err(&pdev->dev, "failed to build groups\n"); 482 return ret; 483 } 484 485 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); 486 if (!pctrl_desc) 487 return -ENOMEM; 488 489 pctrl_desc->name = dev_name(&pdev->dev); 490 pctrl_desc->owner = THIS_MODULE; 491 pctrl_desc->pins = pctl->desc->pins; 492 pctrl_desc->npins = pctl->desc->npins; 493 pctrl_desc->pctlops = &axp20x_pctrl_ops; 494 pctrl_desc->pmxops = &axp20x_pmx_ops; 495 496 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); 497 if (IS_ERR(pctl->pctl_dev)) { 498 dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); 499 return PTR_ERR(pctl->pctl_dev); 500 } 501 502 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); 503 if (ret) { 504 dev_err(&pdev->dev, "Failed to register GPIO chip\n"); 505 return ret; 506 } 507 508 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), 509 pctl->desc->pins->number, 510 pctl->desc->pins->number, 511 pctl->desc->npins); 512 if (ret) { 513 dev_err(&pdev->dev, "failed to add pin range\n"); 514 return ret; 515 } 516 517 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n"); 518 519 return 0; 520 } 521 522 static struct platform_driver axp20x_pctl_driver = { 523 .probe = axp20x_pctl_probe, 524 .driver = { 525 .name = "axp20x-gpio", 526 .of_match_table = axp20x_pctl_match, 527 }, 528 }; 529 530 module_platform_driver(axp20x_pctl_driver); 531 532 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 533 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 534 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); 535 MODULE_LICENSE("GPL"); 536