1*0770f718SLarry Finger /* SPDX-License-Identifier: GPL-2.0 */ 2*0770f718SLarry Finger /* Copyright(c) 2009-2012 Realtek Corporation.*/ 30c817338SLarry Finger 40c817338SLarry Finger #ifndef __RTL92C_DEF_H__ 50c817338SLarry Finger #define __RTL92C_DEF_H__ 60c817338SLarry Finger 70c817338SLarry Finger #define PHY_RSSI_SLID_WIN_MAX 100 80c817338SLarry Finger #define PHY_LINKQUALITY_SLID_WIN_MAX 20 90c817338SLarry Finger #define PHY_BEACON_RSSI_SLID_WIN_MAX 10 100c817338SLarry Finger 110c817338SLarry Finger #define RX_SMOOTH_FACTOR 20 120c817338SLarry Finger 130c817338SLarry Finger #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 140c817338SLarry Finger #define HAL_PRIME_CHNL_OFFSET_LOWER 1 150c817338SLarry Finger #define HAL_PRIME_CHNL_OFFSET_UPPER 2 160c817338SLarry Finger 170c817338SLarry Finger #define RX_MPDU_QUEUE 0 180c817338SLarry Finger #define RX_CMD_QUEUE 1 190c817338SLarry Finger 200c817338SLarry Finger #define CHIP_VER_B BIT(4) 210bd899e7SLarry Finger #define CHIP_BONDING_IDENTIFIER(_value) (((_value) >> 22) & 0x3) 220bd899e7SLarry Finger #define CHIP_BONDING_92C_1T2R 0x1 230bd899e7SLarry Finger #define RF_TYPE_1T2R BIT(1) 240c817338SLarry Finger #define CHIP_92C_BITMASK BIT(0) 25022e1d06SLarry Finger #define CHIP_UNKNOWN BIT(7) 260c817338SLarry Finger #define CHIP_92C_1T2R 0x03 270c817338SLarry Finger #define CHIP_92C 0x01 280c817338SLarry Finger #define CHIP_88C 0x00 290c817338SLarry Finger 300c817338SLarry Finger enum version_8192c { 310c817338SLarry Finger VERSION_A_CHIP_92C = 0x01, 320c817338SLarry Finger VERSION_A_CHIP_88C = 0x00, 330c817338SLarry Finger VERSION_B_CHIP_92C = 0x11, 340c817338SLarry Finger VERSION_B_CHIP_88C = 0x10, 350e80b9d1SLarry Finger VERSION_TEST_CHIP_88C = 0x00, 360e80b9d1SLarry Finger VERSION_TEST_CHIP_92C = 0x01, 370e80b9d1SLarry Finger VERSION_NORMAL_TSMC_CHIP_88C = 0x10, 380e80b9d1SLarry Finger VERSION_NORMAL_TSMC_CHIP_92C = 0x11, 390e80b9d1SLarry Finger VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x13, 400e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x30, 410e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x31, 420e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x33, 430e80b9d1SLarry Finger VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT = 0x34, 440e80b9d1SLarry Finger VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT = 0x3c, 450e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x70, 460e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x71, 470e80b9d1SLarry Finger VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x73, 480c817338SLarry Finger VERSION_UNKNOWN = 0x88, 490c817338SLarry Finger }; 500c817338SLarry Finger 510c817338SLarry Finger enum rtl819x_loopback_e { 520c817338SLarry Finger RTL819X_NO_LOOPBACK = 0, 530c817338SLarry Finger RTL819X_MAC_LOOPBACK = 1, 540c817338SLarry Finger RTL819X_DMA_LOOPBACK = 2, 550c817338SLarry Finger RTL819X_CCK_LOOPBACK = 3, 560c817338SLarry Finger }; 570c817338SLarry Finger 580c817338SLarry Finger enum rf_optype { 590c817338SLarry Finger RF_OP_BY_SW_3WIRE = 0, 600c817338SLarry Finger RF_OP_BY_FW, 610c817338SLarry Finger RF_OP_MAX 620c817338SLarry Finger }; 630c817338SLarry Finger 640c817338SLarry Finger enum rf_power_state { 650c817338SLarry Finger RF_ON, 660c817338SLarry Finger RF_OFF, 670c817338SLarry Finger RF_SLEEP, 680c817338SLarry Finger RF_SHUT_DOWN, 690c817338SLarry Finger }; 700c817338SLarry Finger 710c817338SLarry Finger enum power_save_mode { 720c817338SLarry Finger POWER_SAVE_MODE_ACTIVE, 730c817338SLarry Finger POWER_SAVE_MODE_SAVE, 740c817338SLarry Finger }; 750c817338SLarry Finger 760c817338SLarry Finger enum power_polocy_config { 770c817338SLarry Finger POWERCFG_MAX_POWER_SAVINGS, 780c817338SLarry Finger POWERCFG_GLOBAL_POWER_SAVINGS, 790c817338SLarry Finger POWERCFG_LOCAL_POWER_SAVINGS, 800c817338SLarry Finger POWERCFG_LENOVO, 810c817338SLarry Finger }; 820c817338SLarry Finger 830c817338SLarry Finger enum interface_select_pci { 840c817338SLarry Finger INTF_SEL1_MINICARD = 0, 850c817338SLarry Finger INTF_SEL0_PCIE = 1, 860c817338SLarry Finger INTF_SEL2_RSV = 2, 870c817338SLarry Finger INTF_SEL3_RSV = 3, 880c817338SLarry Finger }; 890c817338SLarry Finger 900c817338SLarry Finger enum rtl_desc_qsel { 910c817338SLarry Finger QSLT_BK = 0x2, 920c817338SLarry Finger QSLT_BE = 0x0, 930c817338SLarry Finger QSLT_VI = 0x5, 940c817338SLarry Finger QSLT_VO = 0x7, 950c817338SLarry Finger QSLT_BEACON = 0x10, 960c817338SLarry Finger QSLT_HIGH = 0x11, 970c817338SLarry Finger QSLT_MGNT = 0x12, 980c817338SLarry Finger QSLT_CMD = 0x13, 990c817338SLarry Finger }; 1000c817338SLarry Finger 1010c817338SLarry Finger struct phy_sts_cck_8192s_t { 1020c817338SLarry Finger u8 adc_pwdb_X[4]; 1030c817338SLarry Finger u8 sq_rpt; 1040c817338SLarry Finger u8 cck_agc_rpt; 1050c817338SLarry Finger }; 1060c817338SLarry Finger 1070c817338SLarry Finger struct h2c_cmd_8192c { 1080c817338SLarry Finger u8 element_id; 1090c817338SLarry Finger u32 cmd_len; 1100c817338SLarry Finger u8 *p_cmdbuffer; 1110c817338SLarry Finger }; 1120c817338SLarry Finger 1130c817338SLarry Finger #endif 114