198686cd2SShayne Chen /* SPDX-License-Identifier: ISC */ 298686cd2SShayne Chen /* 398686cd2SShayne Chen * Copyright (C) 2022 MediaTek Inc. 498686cd2SShayne Chen */ 598686cd2SShayne Chen 698686cd2SShayne Chen #ifndef __MT7996_MCU_H 798686cd2SShayne Chen #define __MT7996_MCU_H 898686cd2SShayne Chen 998686cd2SShayne Chen #include "../mt76_connac_mcu.h" 1098686cd2SShayne Chen 1198686cd2SShayne Chen struct mt7996_mcu_rxd { 1298686cd2SShayne Chen __le32 rxd[8]; 1398686cd2SShayne Chen 1498686cd2SShayne Chen __le16 len; 1598686cd2SShayne Chen __le16 pkt_type_id; 1698686cd2SShayne Chen 1798686cd2SShayne Chen u8 eid; 1898686cd2SShayne Chen u8 seq; 1998686cd2SShayne Chen u8 option; 2098686cd2SShayne Chen u8 __rsv; 2198686cd2SShayne Chen 2298686cd2SShayne Chen u8 ext_eid; 2398686cd2SShayne Chen u8 __rsv1[2]; 2498686cd2SShayne Chen u8 s2d_index; 2598686cd2SShayne Chen }; 2698686cd2SShayne Chen 2798686cd2SShayne Chen struct mt7996_mcu_uni_event { 2898686cd2SShayne Chen u8 cid; 2998686cd2SShayne Chen u8 __rsv[3]; 3098686cd2SShayne Chen __le32 status; /* 0: success, others: fail */ 3198686cd2SShayne Chen } __packed; 3298686cd2SShayne Chen 3321f29088SHoward Hsu struct mt7996_mcu_thermal_ctrl { 3421f29088SHoward Hsu u8 ctrl_id; 3521f29088SHoward Hsu u8 band_idx; 3621f29088SHoward Hsu union { 3721f29088SHoward Hsu struct { 3821f29088SHoward Hsu u8 protect_type; /* 1: duty admit, 2: radio off */ 3921f29088SHoward Hsu u8 trigger_type; /* 0: low, 1: high */ 4021f29088SHoward Hsu } __packed type; 4121f29088SHoward Hsu struct { 4221f29088SHoward Hsu u8 duty_level; /* level 0~3 */ 4321f29088SHoward Hsu u8 duty_cycle; 4421f29088SHoward Hsu } __packed duty; 4521f29088SHoward Hsu }; 4621f29088SHoward Hsu } __packed; 4721f29088SHoward Hsu 4821f29088SHoward Hsu struct mt7996_mcu_thermal_enable { 4921f29088SHoward Hsu __le32 trigger_temp; 5021f29088SHoward Hsu __le32 restore_temp; 5121f29088SHoward Hsu __le16 sustain_time; 5221f29088SHoward Hsu u8 rsv[2]; 5321f29088SHoward Hsu } __packed; 5421f29088SHoward Hsu 5598686cd2SShayne Chen struct mt7996_mcu_csa_notify { 5698686cd2SShayne Chen struct mt7996_mcu_rxd rxd; 5798686cd2SShayne Chen 5898686cd2SShayne Chen u8 omac_idx; 5998686cd2SShayne Chen u8 csa_count; 6098686cd2SShayne Chen u8 band_idx; 6198686cd2SShayne Chen u8 rsv; 6298686cd2SShayne Chen } __packed; 6398686cd2SShayne Chen 6498686cd2SShayne Chen struct mt7996_mcu_rdd_report { 6598686cd2SShayne Chen struct mt7996_mcu_rxd rxd; 6698686cd2SShayne Chen 6798686cd2SShayne Chen u8 __rsv1[4]; 6898686cd2SShayne Chen 6998686cd2SShayne Chen __le16 tag; 7098686cd2SShayne Chen __le16 len; 7198686cd2SShayne Chen 721529e335SStanleyYP Wang u8 rdd_idx; 7398686cd2SShayne Chen u8 long_detected; 7498686cd2SShayne Chen u8 constant_prf_detected; 7598686cd2SShayne Chen u8 staggered_prf_detected; 7698686cd2SShayne Chen u8 radar_type_idx; 7798686cd2SShayne Chen u8 periodic_pulse_num; 7898686cd2SShayne Chen u8 long_pulse_num; 7998686cd2SShayne Chen u8 hw_pulse_num; 8098686cd2SShayne Chen 8198686cd2SShayne Chen u8 out_lpn; 8298686cd2SShayne Chen u8 out_spn; 8398686cd2SShayne Chen u8 out_crpn; 8498686cd2SShayne Chen u8 out_crpw; 8598686cd2SShayne Chen u8 out_crbn; 8698686cd2SShayne Chen u8 out_stgpn; 8798686cd2SShayne Chen u8 out_stgpw; 8898686cd2SShayne Chen 8998686cd2SShayne Chen u8 __rsv2; 9098686cd2SShayne Chen 9198686cd2SShayne Chen __le32 out_pri_const; 9298686cd2SShayne Chen __le32 out_pri_stg[3]; 9398686cd2SShayne Chen __le32 out_pri_stg_dmin; 9498686cd2SShayne Chen 9598686cd2SShayne Chen struct { 9698686cd2SShayne Chen __le32 start; 9798686cd2SShayne Chen __le16 pulse_width; 9898686cd2SShayne Chen __le16 pulse_power; 9998686cd2SShayne Chen u8 mdrdy_flag; 10098686cd2SShayne Chen u8 rsv[3]; 10198686cd2SShayne Chen } long_pulse[32]; 10298686cd2SShayne Chen 10398686cd2SShayne Chen struct { 10498686cd2SShayne Chen __le32 start; 10598686cd2SShayne Chen __le16 pulse_width; 10698686cd2SShayne Chen __le16 pulse_power; 10798686cd2SShayne Chen u8 mdrdy_flag; 10898686cd2SShayne Chen u8 rsv[3]; 10998686cd2SShayne Chen } periodic_pulse[32]; 11098686cd2SShayne Chen 11198686cd2SShayne Chen struct { 11298686cd2SShayne Chen __le32 start; 11398686cd2SShayne Chen __le16 pulse_width; 11498686cd2SShayne Chen __le16 pulse_power; 11598686cd2SShayne Chen u8 sc_pass; 11698686cd2SShayne Chen u8 sw_reset; 11798686cd2SShayne Chen u8 mdrdy_flag; 11898686cd2SShayne Chen u8 tx_active; 11998686cd2SShayne Chen } hw_pulse[32]; 12098686cd2SShayne Chen } __packed; 12198686cd2SShayne Chen 12298686cd2SShayne Chen struct mt7996_mcu_background_chain_ctrl { 12398686cd2SShayne Chen u8 _rsv[4]; 12498686cd2SShayne Chen 12598686cd2SShayne Chen __le16 tag; 12698686cd2SShayne Chen __le16 len; 12798686cd2SShayne Chen 12898686cd2SShayne Chen u8 chan; /* primary channel */ 12998686cd2SShayne Chen u8 central_chan; /* central channel */ 13098686cd2SShayne Chen u8 bw; 13198686cd2SShayne Chen u8 tx_stream; 13298686cd2SShayne Chen u8 rx_stream; 13398686cd2SShayne Chen 13498686cd2SShayne Chen u8 monitor_chan; /* monitor channel */ 13598686cd2SShayne Chen u8 monitor_central_chan;/* monitor central channel */ 13698686cd2SShayne Chen u8 monitor_bw; 13798686cd2SShayne Chen u8 monitor_tx_stream; 13898686cd2SShayne Chen u8 monitor_rx_stream; 13998686cd2SShayne Chen 14098686cd2SShayne Chen u8 scan_mode; /* 0: ScanStop 14198686cd2SShayne Chen * 1: ScanStart 14298686cd2SShayne Chen * 2: ScanRunning 14398686cd2SShayne Chen */ 14498686cd2SShayne Chen u8 band_idx; /* DBDC */ 14598686cd2SShayne Chen u8 monitor_scan_type; 14698686cd2SShayne Chen u8 band; /* 0: 2.4GHz, 1: 5GHz */ 14798686cd2SShayne Chen u8 rsv[2]; 14898686cd2SShayne Chen } __packed; 14998686cd2SShayne Chen 15098686cd2SShayne Chen struct mt7996_mcu_eeprom { 15198686cd2SShayne Chen u8 _rsv[4]; 15298686cd2SShayne Chen 15398686cd2SShayne Chen __le16 tag; 15498686cd2SShayne Chen __le16 len; 15598686cd2SShayne Chen u8 buffer_mode; 15698686cd2SShayne Chen u8 format; 15798686cd2SShayne Chen __le16 buf_len; 15898686cd2SShayne Chen } __packed; 15998686cd2SShayne Chen 16098686cd2SShayne Chen struct mt7996_mcu_phy_rx_info { 16198686cd2SShayne Chen u8 category; 16298686cd2SShayne Chen u8 rate; 16398686cd2SShayne Chen u8 mode; 16498686cd2SShayne Chen u8 nsts; 16598686cd2SShayne Chen u8 gi; 16698686cd2SShayne Chen u8 coding; 16798686cd2SShayne Chen u8 stbc; 16898686cd2SShayne Chen u8 bw; 16998686cd2SShayne Chen }; 17098686cd2SShayne Chen 17198686cd2SShayne Chen struct mt7996_mcu_mib { 17298686cd2SShayne Chen __le16 tag; 17398686cd2SShayne Chen __le16 len; 17498686cd2SShayne Chen __le32 offs; 17598686cd2SShayne Chen __le64 data; 17698686cd2SShayne Chen } __packed; 17798686cd2SShayne Chen 178d57e1b25SBenjamin Lin struct all_sta_trx_rate { 179d57e1b25SBenjamin Lin __le16 wlan_idx; 180d57e1b25SBenjamin Lin u8 __rsv1[2]; 181d57e1b25SBenjamin Lin u8 tx_mode; 182d57e1b25SBenjamin Lin u8 flags; 183d57e1b25SBenjamin Lin u8 tx_stbc; 184d57e1b25SBenjamin Lin u8 tx_gi; 185d57e1b25SBenjamin Lin u8 tx_bw; 186d57e1b25SBenjamin Lin u8 tx_ldpc; 187d57e1b25SBenjamin Lin u8 tx_mcs; 188d57e1b25SBenjamin Lin u8 tx_nss; 189d57e1b25SBenjamin Lin u8 rx_rate; 190d57e1b25SBenjamin Lin u8 rx_mode; 191d57e1b25SBenjamin Lin u8 rx_nsts; 192d57e1b25SBenjamin Lin u8 rx_gi; 193d57e1b25SBenjamin Lin u8 rx_coding; 194d57e1b25SBenjamin Lin u8 rx_stbc; 195d57e1b25SBenjamin Lin u8 rx_bw; 196d57e1b25SBenjamin Lin u8 __rsv2; 197d57e1b25SBenjamin Lin } __packed; 198d57e1b25SBenjamin Lin 199adde3eedSYi-Chia Hsieh struct mt7996_mcu_all_sta_info_event { 200adde3eedSYi-Chia Hsieh u8 rsv[4]; 201adde3eedSYi-Chia Hsieh __le16 tag; 202adde3eedSYi-Chia Hsieh __le16 len; 203adde3eedSYi-Chia Hsieh u8 more; 204adde3eedSYi-Chia Hsieh u8 rsv2; 205adde3eedSYi-Chia Hsieh __le16 sta_num; 206d58a9778SStanleyYP Wang u8 rsv3[4]; 207adde3eedSYi-Chia Hsieh 208adde3eedSYi-Chia Hsieh union { 20940d51f70SGustavo A. R. Silva DECLARE_FLEX_ARRAY(struct all_sta_trx_rate, rate); 21040d51f70SGustavo A. R. Silva DECLARE_FLEX_ARRAY(struct { 211adde3eedSYi-Chia Hsieh __le16 wlan_idx; 212adde3eedSYi-Chia Hsieh u8 rsv[2]; 213adde3eedSYi-Chia Hsieh __le32 tx_bytes[IEEE80211_NUM_ACS]; 214adde3eedSYi-Chia Hsieh __le32 rx_bytes[IEEE80211_NUM_ACS]; 21540d51f70SGustavo A. R. Silva } __packed, adm_stat); 216adde3eedSYi-Chia Hsieh 21740d51f70SGustavo A. R. Silva DECLARE_FLEX_ARRAY(struct { 218adde3eedSYi-Chia Hsieh __le16 wlan_idx; 219adde3eedSYi-Chia Hsieh u8 rsv[2]; 220adde3eedSYi-Chia Hsieh __le32 tx_msdu_cnt; 221adde3eedSYi-Chia Hsieh __le32 rx_msdu_cnt; 22240d51f70SGustavo A. R. Silva } __packed, msdu_cnt); 2232ee1c40dSArnd Bergmann } __packed; 224adde3eedSYi-Chia Hsieh } __packed; 225adde3eedSYi-Chia Hsieh 226a5d028d6SLorenzo Bianconi struct mt7996_mcu_wed_rro_event { 227a5d028d6SLorenzo Bianconi struct mt7996_mcu_rxd rxd; 228a5d028d6SLorenzo Bianconi 229a5d028d6SLorenzo Bianconi u8 __rsv1[4]; 230a5d028d6SLorenzo Bianconi 231a5d028d6SLorenzo Bianconi __le16 tag; 232a5d028d6SLorenzo Bianconi __le16 len; 233a5d028d6SLorenzo Bianconi } __packed; 234a5d028d6SLorenzo Bianconi 235a5d028d6SLorenzo Bianconi struct mt7996_mcu_wed_rro_ba_event { 236a5d028d6SLorenzo Bianconi __le16 tag; 237a5d028d6SLorenzo Bianconi __le16 len; 238a5d028d6SLorenzo Bianconi 239a5d028d6SLorenzo Bianconi __le16 wlan_id; 240a5d028d6SLorenzo Bianconi u8 tid; 241a5d028d6SLorenzo Bianconi u8 __rsv1; 242a5d028d6SLorenzo Bianconi __le32 status; 243a5d028d6SLorenzo Bianconi __le16 id; 244a5d028d6SLorenzo Bianconi u8 __rsv2[2]; 245a5d028d6SLorenzo Bianconi } __packed; 246a5d028d6SLorenzo Bianconi 247a5d028d6SLorenzo Bianconi struct mt7996_mcu_wed_rro_ba_delete_event { 248a5d028d6SLorenzo Bianconi __le16 tag; 249a5d028d6SLorenzo Bianconi __le16 len; 250a5d028d6SLorenzo Bianconi 251a5d028d6SLorenzo Bianconi __le16 session_id; 252a5d028d6SLorenzo Bianconi u8 __rsv2[2]; 253a5d028d6SLorenzo Bianconi } __packed; 254a5d028d6SLorenzo Bianconi 255a5d028d6SLorenzo Bianconi enum { 256a5d028d6SLorenzo Bianconi UNI_WED_RRO_BA_SESSION_STATUS, 257a5d028d6SLorenzo Bianconi UNI_WED_RRO_BA_SESSION_TBL, 258a5d028d6SLorenzo Bianconi UNI_WED_RRO_BA_SESSION_DELETE, 259a5d028d6SLorenzo Bianconi }; 260a5d028d6SLorenzo Bianconi 26121f29088SHoward Hsu struct mt7996_mcu_thermal_notify { 26221f29088SHoward Hsu struct mt7996_mcu_rxd rxd; 26321f29088SHoward Hsu 26421f29088SHoward Hsu u8 __rsv1[4]; 26521f29088SHoward Hsu 26621f29088SHoward Hsu __le16 tag; 26721f29088SHoward Hsu __le16 len; 26821f29088SHoward Hsu 26921f29088SHoward Hsu u8 event_id; 27021f29088SHoward Hsu u8 band_idx; 27121f29088SHoward Hsu u8 level_idx; 27221f29088SHoward Hsu u8 duty_percent; 27321f29088SHoward Hsu __le32 restore_temp; 27421f29088SHoward Hsu u8 __rsv2[4]; 27521f29088SHoward Hsu } __packed; 27621f29088SHoward Hsu 27798686cd2SShayne Chen enum mt7996_chan_mib_offs { 27898686cd2SShayne Chen UNI_MIB_OBSS_AIRTIME = 26, 27998686cd2SShayne Chen UNI_MIB_NON_WIFI_TIME = 27, 28098686cd2SShayne Chen UNI_MIB_TX_TIME = 28, 28198686cd2SShayne Chen UNI_MIB_RX_TIME = 29 28298686cd2SShayne Chen }; 28398686cd2SShayne Chen 28498686cd2SShayne Chen struct edca { 28598686cd2SShayne Chen __le16 tag; 28698686cd2SShayne Chen __le16 len; 28798686cd2SShayne Chen 28898686cd2SShayne Chen u8 queue; 28998686cd2SShayne Chen u8 set; 29098686cd2SShayne Chen u8 cw_min; 29198686cd2SShayne Chen u8 cw_max; 29298686cd2SShayne Chen __le16 txop; 29398686cd2SShayne Chen u8 aifs; 29498686cd2SShayne Chen u8 __rsv; 29598686cd2SShayne Chen }; 29698686cd2SShayne Chen 29798686cd2SShayne Chen #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 29898686cd2SShayne Chen #define MCU_PKT_ID 0xa0 29998686cd2SShayne Chen 30098686cd2SShayne Chen enum { 30198686cd2SShayne Chen MCU_FW_LOG_WM, 30298686cd2SShayne Chen MCU_FW_LOG_WA, 30398686cd2SShayne Chen MCU_FW_LOG_TO_HOST, 30498686cd2SShayne Chen MCU_FW_LOG_RELAY = 16 30598686cd2SShayne Chen }; 30698686cd2SShayne Chen 30798686cd2SShayne Chen enum { 30898686cd2SShayne Chen MCU_TWT_AGRT_ADD, 30998686cd2SShayne Chen MCU_TWT_AGRT_MODIFY, 31098686cd2SShayne Chen MCU_TWT_AGRT_DELETE, 31198686cd2SShayne Chen MCU_TWT_AGRT_TEARDOWN, 31298686cd2SShayne Chen MCU_TWT_AGRT_GET_TSF, 31398686cd2SShayne Chen }; 31498686cd2SShayne Chen 31598686cd2SShayne Chen enum { 31698686cd2SShayne Chen MCU_WA_PARAM_CMD_QUERY, 31798686cd2SShayne Chen MCU_WA_PARAM_CMD_SET, 31898686cd2SShayne Chen MCU_WA_PARAM_CMD_CAPABILITY, 31998686cd2SShayne Chen MCU_WA_PARAM_CMD_DEBUG, 32098686cd2SShayne Chen }; 32198686cd2SShayne Chen 32298686cd2SShayne Chen enum { 32398686cd2SShayne Chen MCU_WA_PARAM_PDMA_RX = 0x04, 32498686cd2SShayne Chen MCU_WA_PARAM_CPU_UTIL = 0x0b, 32598686cd2SShayne Chen MCU_WA_PARAM_RED = 0x0e, 32698686cd2SShayne Chen MCU_WA_PARAM_HW_PATH_HIF_VER = 0x2f, 32798686cd2SShayne Chen }; 32898686cd2SShayne Chen 32998686cd2SShayne Chen enum mcu_mmps_mode { 33098686cd2SShayne Chen MCU_MMPS_STATIC, 33198686cd2SShayne Chen MCU_MMPS_DYNAMIC, 33298686cd2SShayne Chen MCU_MMPS_RSV, 33398686cd2SShayne Chen MCU_MMPS_DISABLE, 33498686cd2SShayne Chen }; 33598686cd2SShayne Chen 33698686cd2SShayne Chen struct bss_rate_tlv { 33798686cd2SShayne Chen __le16 tag; 33898686cd2SShayne Chen __le16 len; 33998686cd2SShayne Chen u8 __rsv1[4]; 34098686cd2SShayne Chen __le16 bc_trans; 34198686cd2SShayne Chen __le16 mc_trans; 34298686cd2SShayne Chen u8 short_preamble; 34398686cd2SShayne Chen u8 bc_fixed_rate; 34498686cd2SShayne Chen u8 mc_fixed_rate; 3454aa99926SSujuan Chen u8 __rsv2[9]; 34698686cd2SShayne Chen } __packed; 34798686cd2SShayne Chen 348eb80e02bSAllen Ye enum { 349eb80e02bSAllen Ye BP_DISABLE, 350eb80e02bSAllen Ye BP_SW_MODE, 351eb80e02bSAllen Ye BP_HW_MODE, 352eb80e02bSAllen Ye }; 353eb80e02bSAllen Ye 354eb80e02bSAllen Ye struct mt7996_mcu_bcn_prot_tlv { 355eb80e02bSAllen Ye __le16 tag; 356eb80e02bSAllen Ye __le16 len; 357eb80e02bSAllen Ye u8 pn[6]; 358eb80e02bSAllen Ye u8 enable; 359eb80e02bSAllen Ye u8 cipher_id; 360eb80e02bSAllen Ye u8 key[WLAN_MAX_KEY_LEN]; 361eb80e02bSAllen Ye u8 key_id; 362eb80e02bSAllen Ye u8 __rsv[3]; 363eb80e02bSAllen Ye } __packed; 364eb80e02bSAllen Ye 36598686cd2SShayne Chen struct bss_ra_tlv { 36698686cd2SShayne Chen __le16 tag; 36798686cd2SShayne Chen __le16 len; 36898686cd2SShayne Chen u8 short_preamble; 36998686cd2SShayne Chen u8 force_sgi; 37098686cd2SShayne Chen u8 force_gf; 37198686cd2SShayne Chen u8 ht_mode; 37298686cd2SShayne Chen u8 se_off; 37398686cd2SShayne Chen u8 antenna_idx; 37498686cd2SShayne Chen __le16 max_phyrate; 37598686cd2SShayne Chen u8 force_tx_streams; 37698686cd2SShayne Chen u8 __rsv[3]; 37798686cd2SShayne Chen } __packed; 37898686cd2SShayne Chen 37998686cd2SShayne Chen struct bss_rlm_tlv { 38098686cd2SShayne Chen __le16 tag; 38198686cd2SShayne Chen __le16 len; 38298686cd2SShayne Chen u8 control_channel; 38398686cd2SShayne Chen u8 center_chan; 38498686cd2SShayne Chen u8 center_chan2; 38598686cd2SShayne Chen u8 bw; 38698686cd2SShayne Chen u8 tx_streams; 38798686cd2SShayne Chen u8 rx_streams; 38898686cd2SShayne Chen u8 ht_op_info; 38998686cd2SShayne Chen u8 sco; 39098686cd2SShayne Chen u8 band; 39198686cd2SShayne Chen u8 __rsv[3]; 39298686cd2SShayne Chen } __packed; 39398686cd2SShayne Chen 39498686cd2SShayne Chen struct bss_color_tlv { 39598686cd2SShayne Chen __le16 tag; 39698686cd2SShayne Chen __le16 len; 39798686cd2SShayne Chen u8 enable; 39898686cd2SShayne Chen u8 color; 39998686cd2SShayne Chen u8 rsv[2]; 40098686cd2SShayne Chen } __packed; 40198686cd2SShayne Chen 40298686cd2SShayne Chen struct bss_inband_discovery_tlv { 40398686cd2SShayne Chen __le16 tag; 40498686cd2SShayne Chen __le16 len; 40598686cd2SShayne Chen u8 tx_type; 40698686cd2SShayne Chen u8 tx_mode; 40798686cd2SShayne Chen u8 tx_interval; 40898686cd2SShayne Chen u8 enable; 40998686cd2SShayne Chen __le16 wcid; 41098686cd2SShayne Chen __le16 prob_rsp_len; 41198686cd2SShayne Chen } __packed; 41298686cd2SShayne Chen 41398686cd2SShayne Chen struct bss_bcn_content_tlv { 41498686cd2SShayne Chen __le16 tag; 41598686cd2SShayne Chen __le16 len; 41698686cd2SShayne Chen __le16 tim_ie_pos; 41798686cd2SShayne Chen __le16 csa_ie_pos; 41898686cd2SShayne Chen __le16 bcc_ie_pos; 41998686cd2SShayne Chen u8 enable; 42098686cd2SShayne Chen u8 type; 42198686cd2SShayne Chen __le16 pkt_len; 42298686cd2SShayne Chen } __packed; 42398686cd2SShayne Chen 42498686cd2SShayne Chen struct bss_bcn_cntdwn_tlv { 42598686cd2SShayne Chen __le16 tag; 42698686cd2SShayne Chen __le16 len; 42798686cd2SShayne Chen u8 cnt; 42898686cd2SShayne Chen u8 rsv[3]; 42998686cd2SShayne Chen } __packed; 43098686cd2SShayne Chen 43198686cd2SShayne Chen struct bss_bcn_mbss_tlv { 43298686cd2SShayne Chen __le16 tag; 43398686cd2SShayne Chen __le16 len; 43498686cd2SShayne Chen __le32 bitmap; 43598686cd2SShayne Chen #define MAX_BEACON_NUM 32 43698686cd2SShayne Chen __le16 offset[MAX_BEACON_NUM]; 43798686cd2SShayne Chen } __packed __aligned(4); 43898686cd2SShayne Chen 43998686cd2SShayne Chen struct bss_txcmd_tlv { 44098686cd2SShayne Chen __le16 tag; 44198686cd2SShayne Chen __le16 len; 44298686cd2SShayne Chen u8 txcmd_mode; 44398686cd2SShayne Chen u8 __rsv[3]; 44498686cd2SShayne Chen } __packed; 44598686cd2SShayne Chen 44698686cd2SShayne Chen struct bss_sec_tlv { 44798686cd2SShayne Chen __le16 tag; 44898686cd2SShayne Chen __le16 len; 44998686cd2SShayne Chen u8 __rsv1[2]; 45098686cd2SShayne Chen u8 cipher; 45198686cd2SShayne Chen u8 __rsv2[1]; 45298686cd2SShayne Chen } __packed; 45398686cd2SShayne Chen 45483a10ae2SPeter Chiu struct bss_ifs_time_tlv { 45583a10ae2SPeter Chiu __le16 tag; 45683a10ae2SPeter Chiu __le16 len; 45783a10ae2SPeter Chiu u8 slot_valid; 45883a10ae2SPeter Chiu u8 sifs_valid; 45983a10ae2SPeter Chiu u8 rifs_valid; 46083a10ae2SPeter Chiu u8 eifs_valid; 46183a10ae2SPeter Chiu __le16 slot_time; 46283a10ae2SPeter Chiu __le16 sifs_time; 46383a10ae2SPeter Chiu __le16 rifs_time; 46483a10ae2SPeter Chiu __le16 eifs_time; 46583a10ae2SPeter Chiu u8 eifs_cck_valid; 46683a10ae2SPeter Chiu u8 rsv; 46783a10ae2SPeter Chiu __le16 eifs_cck_time; 46883a10ae2SPeter Chiu } __packed; 46983a10ae2SPeter Chiu 47098686cd2SShayne Chen struct bss_power_save { 47198686cd2SShayne Chen __le16 tag; 47298686cd2SShayne Chen __le16 len; 47398686cd2SShayne Chen u8 profile; 47498686cd2SShayne Chen u8 _rsv[3]; 47598686cd2SShayne Chen } __packed; 47698686cd2SShayne Chen 47798686cd2SShayne Chen struct bss_mld_tlv { 47898686cd2SShayne Chen __le16 tag; 47998686cd2SShayne Chen __le16 len; 48098686cd2SShayne Chen u8 group_mld_id; 48198686cd2SShayne Chen u8 own_mld_id; 48298686cd2SShayne Chen u8 mac_addr[ETH_ALEN]; 48398686cd2SShayne Chen u8 remap_idx; 48498686cd2SShayne Chen u8 __rsv[3]; 48598686cd2SShayne Chen } __packed; 48698686cd2SShayne Chen 487b769f7d8SPeter Chiu struct sta_rec_ht_uni { 488b769f7d8SPeter Chiu __le16 tag; 489b769f7d8SPeter Chiu __le16 len; 490b769f7d8SPeter Chiu __le16 ht_cap; 491b769f7d8SPeter Chiu __le16 ht_cap_ext; 492b769f7d8SPeter Chiu u8 ampdu_param; 493b769f7d8SPeter Chiu u8 _rsv[3]; 494b769f7d8SPeter Chiu } __packed; 495b769f7d8SPeter Chiu 49698686cd2SShayne Chen struct sta_rec_ba_uni { 49798686cd2SShayne Chen __le16 tag; 49898686cd2SShayne Chen __le16 len; 49998686cd2SShayne Chen u8 tid; 50098686cd2SShayne Chen u8 ba_type; 50198686cd2SShayne Chen u8 amsdu; 50298686cd2SShayne Chen u8 ba_en; 50398686cd2SShayne Chen __le16 ssn; 50498686cd2SShayne Chen __le16 winsize; 50598686cd2SShayne Chen u8 ba_rdd_rro; 50698686cd2SShayne Chen u8 __rsv[3]; 50798686cd2SShayne Chen } __packed; 50898686cd2SShayne Chen 50992aa2da9SShayne Chen struct sta_rec_eht { 51092aa2da9SShayne Chen __le16 tag; 51192aa2da9SShayne Chen __le16 len; 51292aa2da9SShayne Chen u8 tid_bitmap; 51392aa2da9SShayne Chen u8 _rsv; 51492aa2da9SShayne Chen __le16 mac_cap; 51592aa2da9SShayne Chen __le64 phy_cap; 51692aa2da9SShayne Chen __le64 phy_cap_ext; 51792aa2da9SShayne Chen u8 mcs_map_bw20[4]; 51892aa2da9SShayne Chen u8 mcs_map_bw80[3]; 51992aa2da9SShayne Chen u8 mcs_map_bw160[3]; 52092aa2da9SShayne Chen u8 mcs_map_bw320[3]; 52192aa2da9SShayne Chen u8 _rsv2[3]; 52292aa2da9SShayne Chen } __packed; 52392aa2da9SShayne Chen 52498686cd2SShayne Chen struct sec_key_uni { 52598686cd2SShayne Chen __le16 wlan_idx; 52698686cd2SShayne Chen u8 mgmt_prot; 52798686cd2SShayne Chen u8 cipher_id; 52898686cd2SShayne Chen u8 cipher_len; 52998686cd2SShayne Chen u8 key_id; 53098686cd2SShayne Chen u8 key_len; 53198686cd2SShayne Chen u8 need_resp; 53298686cd2SShayne Chen u8 key[32]; 53398686cd2SShayne Chen } __packed; 53498686cd2SShayne Chen 53598686cd2SShayne Chen struct sta_rec_sec_uni { 53698686cd2SShayne Chen __le16 tag; 53798686cd2SShayne Chen __le16 len; 53898686cd2SShayne Chen u8 add; 53998686cd2SShayne Chen u8 n_cipher; 54098686cd2SShayne Chen u8 rsv[2]; 54198686cd2SShayne Chen 54298686cd2SShayne Chen struct sec_key_uni key[2]; 54398686cd2SShayne Chen } __packed; 54498686cd2SShayne Chen 54522f5dc78SPeter Chiu struct sta_phy_uni { 54622f5dc78SPeter Chiu u8 type; 54722f5dc78SPeter Chiu u8 flag; 54822f5dc78SPeter Chiu u8 stbc; 54922f5dc78SPeter Chiu u8 sgi; 55022f5dc78SPeter Chiu u8 bw; 55122f5dc78SPeter Chiu u8 ldpc; 55222f5dc78SPeter Chiu u8 mcs; 55322f5dc78SPeter Chiu u8 nss; 55422f5dc78SPeter Chiu u8 he_ltf; 55522f5dc78SPeter Chiu u8 rsv[3]; 55622f5dc78SPeter Chiu }; 55722f5dc78SPeter Chiu 55822f5dc78SPeter Chiu struct sta_rec_ra_uni { 55922f5dc78SPeter Chiu __le16 tag; 56022f5dc78SPeter Chiu __le16 len; 56122f5dc78SPeter Chiu 56222f5dc78SPeter Chiu u8 valid; 56322f5dc78SPeter Chiu u8 auto_rate; 56422f5dc78SPeter Chiu u8 phy_mode; 56522f5dc78SPeter Chiu u8 channel; 56622f5dc78SPeter Chiu u8 bw; 56722f5dc78SPeter Chiu u8 disable_cck; 56822f5dc78SPeter Chiu u8 ht_mcs32; 56922f5dc78SPeter Chiu u8 ht_gf; 57022f5dc78SPeter Chiu u8 ht_mcs[4]; 57122f5dc78SPeter Chiu u8 mmps_mode; 57222f5dc78SPeter Chiu u8 gband_256; 57322f5dc78SPeter Chiu u8 af; 57422f5dc78SPeter Chiu u8 auth_wapi_mode; 57522f5dc78SPeter Chiu u8 rate_len; 57622f5dc78SPeter Chiu 57722f5dc78SPeter Chiu u8 supp_mode; 57822f5dc78SPeter Chiu u8 supp_cck_rate; 57922f5dc78SPeter Chiu u8 supp_ofdm_rate; 58022f5dc78SPeter Chiu __le32 supp_ht_mcs; 58122f5dc78SPeter Chiu __le16 supp_vht_mcs[4]; 58222f5dc78SPeter Chiu 58322f5dc78SPeter Chiu u8 op_mode; 58422f5dc78SPeter Chiu u8 op_vht_chan_width; 58522f5dc78SPeter Chiu u8 op_vht_rx_nss; 58622f5dc78SPeter Chiu u8 op_vht_rx_nss_type; 58722f5dc78SPeter Chiu 58822f5dc78SPeter Chiu __le32 sta_cap; 58922f5dc78SPeter Chiu 59022f5dc78SPeter Chiu struct sta_phy_uni phy; 59122f5dc78SPeter Chiu u8 rx_rcpi[4]; 59222f5dc78SPeter Chiu } __packed; 59322f5dc78SPeter Chiu 59422f5dc78SPeter Chiu struct sta_rec_ra_fixed_uni { 59522f5dc78SPeter Chiu __le16 tag; 59622f5dc78SPeter Chiu __le16 len; 59722f5dc78SPeter Chiu 59822f5dc78SPeter Chiu __le32 field; 59922f5dc78SPeter Chiu u8 op_mode; 60022f5dc78SPeter Chiu u8 op_vht_chan_width; 60122f5dc78SPeter Chiu u8 op_vht_rx_nss; 60222f5dc78SPeter Chiu u8 op_vht_rx_nss_type; 60322f5dc78SPeter Chiu 60422f5dc78SPeter Chiu struct sta_phy_uni phy; 60522f5dc78SPeter Chiu 60622f5dc78SPeter Chiu u8 spe_idx; 60722f5dc78SPeter Chiu u8 short_preamble; 60822f5dc78SPeter Chiu u8 is_5g; 60922f5dc78SPeter Chiu u8 mmps_mode; 61022f5dc78SPeter Chiu } __packed; 61122f5dc78SPeter Chiu 61298686cd2SShayne Chen struct sta_rec_hdrt { 61398686cd2SShayne Chen __le16 tag; 61498686cd2SShayne Chen __le16 len; 61598686cd2SShayne Chen u8 hdrt_mode; 61698686cd2SShayne Chen u8 rsv[3]; 61798686cd2SShayne Chen } __packed; 61898686cd2SShayne Chen 61998686cd2SShayne Chen struct sta_rec_hdr_trans { 62098686cd2SShayne Chen __le16 tag; 62198686cd2SShayne Chen __le16 len; 62298686cd2SShayne Chen u8 from_ds; 62398686cd2SShayne Chen u8 to_ds; 62498686cd2SShayne Chen u8 dis_rx_hdr_tran; 62527db47abSRyder Lee u8 mesh; 62698686cd2SShayne Chen } __packed; 62798686cd2SShayne Chen 62800cef41dSShayne Chen struct sta_rec_mld_setup { 62900cef41dSShayne Chen __le16 tag; 63000cef41dSShayne Chen __le16 len; 63100cef41dSShayne Chen u8 mld_addr[ETH_ALEN]; 63200cef41dSShayne Chen __le16 primary_id; 63300cef41dSShayne Chen __le16 seconed_id; 63400cef41dSShayne Chen __le16 setup_wcid; 63500cef41dSShayne Chen u8 link_num; 63600cef41dSShayne Chen u8 info; 63700cef41dSShayne Chen u8 __rsv[2]; 63800cef41dSShayne Chen u8 link_info[]; 63900cef41dSShayne Chen } __packed; 64000cef41dSShayne Chen 64100cef41dSShayne Chen struct sta_rec_eht_mld { 64200cef41dSShayne Chen __le16 tag; 64300cef41dSShayne Chen __le16 len; 64400cef41dSShayne Chen u8 nsep; 64500cef41dSShayne Chen u8 __rsv1[2]; 64600cef41dSShayne Chen u8 str_cap[__MT_MAX_BAND]; 64700cef41dSShayne Chen __le16 eml_cap; 64800cef41dSShayne Chen u8 __rsv2[4]; 64900cef41dSShayne Chen } __packed; 65000cef41dSShayne Chen 65100cef41dSShayne Chen struct mld_setup_link { 65200cef41dSShayne Chen __le16 wcid; 65300cef41dSShayne Chen u8 bss_idx; 65400cef41dSShayne Chen u8 __rsv; 65500cef41dSShayne Chen } __packed; 65600cef41dSShayne Chen 65798686cd2SShayne Chen struct hdr_trans_en { 65898686cd2SShayne Chen __le16 tag; 65998686cd2SShayne Chen __le16 len; 66098686cd2SShayne Chen u8 enable; 66198686cd2SShayne Chen u8 check_bssid; 66298686cd2SShayne Chen u8 mode; 66398686cd2SShayne Chen u8 __rsv; 66498686cd2SShayne Chen } __packed; 66598686cd2SShayne Chen 66698686cd2SShayne Chen struct hdr_trans_vlan { 66798686cd2SShayne Chen __le16 tag; 66898686cd2SShayne Chen __le16 len; 66998686cd2SShayne Chen u8 insert_vlan; 67098686cd2SShayne Chen u8 remove_vlan; 67198686cd2SShayne Chen u8 tid; 67298686cd2SShayne Chen u8 __rsv; 67398686cd2SShayne Chen } __packed; 67498686cd2SShayne Chen 67598686cd2SShayne Chen struct hdr_trans_blacklist { 67698686cd2SShayne Chen __le16 tag; 67798686cd2SShayne Chen __le16 len; 67898686cd2SShayne Chen u8 idx; 67998686cd2SShayne Chen u8 enable; 68098686cd2SShayne Chen __le16 type; 68198686cd2SShayne Chen } __packed; 68298686cd2SShayne Chen 68398686cd2SShayne Chen struct uni_header { 68498686cd2SShayne Chen u8 __rsv[4]; 68598686cd2SShayne Chen } __packed; 68698686cd2SShayne Chen 68798686cd2SShayne Chen struct vow_rx_airtime { 68898686cd2SShayne Chen __le16 tag; 68998686cd2SShayne Chen __le16 len; 69098686cd2SShayne Chen 69198686cd2SShayne Chen u8 enable; 69298686cd2SShayne Chen u8 band; 69398686cd2SShayne Chen u8 __rsv[2]; 69498686cd2SShayne Chen } __packed; 69598686cd2SShayne Chen 69698686cd2SShayne Chen struct bf_sounding_on { 69798686cd2SShayne Chen __le16 tag; 69898686cd2SShayne Chen __le16 len; 69998686cd2SShayne Chen 70098686cd2SShayne Chen u8 snd_mode; 70198686cd2SShayne Chen u8 sta_num; 70298686cd2SShayne Chen u8 __rsv[2]; 70398686cd2SShayne Chen __le16 wlan_id[4]; 70498686cd2SShayne Chen __le32 snd_period; 70598686cd2SShayne Chen } __packed; 70698686cd2SShayne Chen 70798686cd2SShayne Chen struct bf_hw_en_status_update { 70898686cd2SShayne Chen __le16 tag; 70998686cd2SShayne Chen __le16 len; 71098686cd2SShayne Chen 71198686cd2SShayne Chen bool ebf; 71298686cd2SShayne Chen bool ibf; 71398686cd2SShayne Chen u8 __rsv[2]; 71498686cd2SShayne Chen } __packed; 71598686cd2SShayne Chen 71698686cd2SShayne Chen struct bf_mod_en_ctrl { 71798686cd2SShayne Chen __le16 tag; 71898686cd2SShayne Chen __le16 len; 71998686cd2SShayne Chen 72098686cd2SShayne Chen u8 bf_num; 72198686cd2SShayne Chen u8 bf_bitmap; 72298686cd2SShayne Chen u8 bf_sel[8]; 72398686cd2SShayne Chen u8 __rsv[2]; 72498686cd2SShayne Chen } __packed; 72598686cd2SShayne Chen 72698686cd2SShayne Chen union bf_tag_tlv { 72798686cd2SShayne Chen struct bf_sounding_on bf_snd; 72898686cd2SShayne Chen struct bf_hw_en_status_update bf_hw_en; 72998686cd2SShayne Chen struct bf_mod_en_ctrl bf_mod_en; 73098686cd2SShayne Chen }; 73198686cd2SShayne Chen 73298686cd2SShayne Chen struct ra_rate { 73398686cd2SShayne Chen __le16 wlan_idx; 73498686cd2SShayne Chen u8 mode; 73598686cd2SShayne Chen u8 stbc; 73698686cd2SShayne Chen __le16 gi; 73798686cd2SShayne Chen u8 bw; 73898686cd2SShayne Chen u8 ldpc; 73998686cd2SShayne Chen u8 mcs; 74098686cd2SShayne Chen u8 nss; 74198686cd2SShayne Chen __le16 ltf; 74298686cd2SShayne Chen u8 spe; 74398686cd2SShayne Chen u8 preamble; 74498686cd2SShayne Chen u8 __rsv[2]; 74598686cd2SShayne Chen } __packed; 74698686cd2SShayne Chen 74798686cd2SShayne Chen struct ra_fixed_rate { 74898686cd2SShayne Chen __le16 tag; 74998686cd2SShayne Chen __le16 len; 75098686cd2SShayne Chen 75198686cd2SShayne Chen __le16 version; 75298686cd2SShayne Chen struct ra_rate rate; 75398686cd2SShayne Chen } __packed; 75498686cd2SShayne Chen 75598686cd2SShayne Chen enum { 75698686cd2SShayne Chen UNI_RA_FIXED_RATE = 0xf, 75798686cd2SShayne Chen }; 75898686cd2SShayne Chen 75998686cd2SShayne Chen #define MT7996_HDR_TRANS_MAX_SIZE (sizeof(struct hdr_trans_en) + \ 76098686cd2SShayne Chen sizeof(struct hdr_trans_vlan) + \ 76198686cd2SShayne Chen sizeof(struct hdr_trans_blacklist)) 76298686cd2SShayne Chen 76398686cd2SShayne Chen enum { 76498686cd2SShayne Chen UNI_HDR_TRANS_EN, 76598686cd2SShayne Chen UNI_HDR_TRANS_VLAN, 76698686cd2SShayne Chen UNI_HDR_TRANS_BLACKLIST, 76798686cd2SShayne Chen }; 76898686cd2SShayne Chen 76998686cd2SShayne Chen enum { 77098686cd2SShayne Chen RATE_PARAM_FIXED = 3, 77198686cd2SShayne Chen RATE_PARAM_MMPS_UPDATE = 5, 77298686cd2SShayne Chen RATE_PARAM_FIXED_HE_LTF = 7, 77398686cd2SShayne Chen RATE_PARAM_FIXED_MCS, 77498686cd2SShayne Chen RATE_PARAM_FIXED_GI = 11, 77598686cd2SShayne Chen RATE_PARAM_AUTO = 20, 77698686cd2SShayne Chen }; 77798686cd2SShayne Chen 77898686cd2SShayne Chen enum { 77998686cd2SShayne Chen BF_SOUNDING_ON = 1, 78098686cd2SShayne Chen BF_HW_EN_UPDATE = 17, 78198686cd2SShayne Chen BF_MOD_EN_CTRL = 20, 78298686cd2SShayne Chen }; 78398686cd2SShayne Chen 78498686cd2SShayne Chen enum { 78598686cd2SShayne Chen CMD_BAND_NONE, 78698686cd2SShayne Chen CMD_BAND_24G, 78798686cd2SShayne Chen CMD_BAND_5G, 78898686cd2SShayne Chen CMD_BAND_6G, 78998686cd2SShayne Chen }; 79098686cd2SShayne Chen 79198686cd2SShayne Chen struct bss_req_hdr { 79298686cd2SShayne Chen u8 bss_idx; 79398686cd2SShayne Chen u8 __rsv[3]; 79498686cd2SShayne Chen } __packed; 79598686cd2SShayne Chen 79698686cd2SShayne Chen enum { 79798686cd2SShayne Chen UNI_CHANNEL_SWITCH, 79898686cd2SShayne Chen UNI_CHANNEL_RX_PATH, 79998686cd2SShayne Chen }; 80098686cd2SShayne Chen 80198686cd2SShayne Chen #define MT7996_BSS_UPDATE_MAX_SIZE (sizeof(struct bss_req_hdr) + \ 80298686cd2SShayne Chen sizeof(struct mt76_connac_bss_basic_tlv) + \ 80398686cd2SShayne Chen sizeof(struct bss_rlm_tlv) + \ 80498686cd2SShayne Chen sizeof(struct bss_ra_tlv) + \ 80598686cd2SShayne Chen sizeof(struct bss_info_uni_he) + \ 80698686cd2SShayne Chen sizeof(struct bss_rate_tlv) + \ 80798686cd2SShayne Chen sizeof(struct bss_txcmd_tlv) + \ 80898686cd2SShayne Chen sizeof(struct bss_power_save) + \ 80998686cd2SShayne Chen sizeof(struct bss_sec_tlv) + \ 81083a10ae2SPeter Chiu sizeof(struct bss_ifs_time_tlv) + \ 81198686cd2SShayne Chen sizeof(struct bss_mld_tlv)) 81298686cd2SShayne Chen 81398686cd2SShayne Chen #define MT7996_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 81498686cd2SShayne Chen sizeof(struct sta_rec_basic) + \ 81598686cd2SShayne Chen sizeof(struct sta_rec_bf) + \ 816b769f7d8SPeter Chiu sizeof(struct sta_rec_ht_uni) + \ 81798686cd2SShayne Chen sizeof(struct sta_rec_he_v2) + \ 81898686cd2SShayne Chen sizeof(struct sta_rec_ba_uni) + \ 81998686cd2SShayne Chen sizeof(struct sta_rec_vht) + \ 82098686cd2SShayne Chen sizeof(struct sta_rec_uapsd) + \ 82198686cd2SShayne Chen sizeof(struct sta_rec_amsdu) + \ 82298686cd2SShayne Chen sizeof(struct sta_rec_bfee) + \ 82322f5dc78SPeter Chiu sizeof(struct sta_rec_ra_uni) + \ 82498686cd2SShayne Chen sizeof(struct sta_rec_sec) + \ 82522f5dc78SPeter Chiu sizeof(struct sta_rec_ra_fixed_uni) + \ 82698686cd2SShayne Chen sizeof(struct sta_rec_he_6g_capa) + \ 82792aa2da9SShayne Chen sizeof(struct sta_rec_eht) + \ 82898686cd2SShayne Chen sizeof(struct sta_rec_hdrt) + \ 82998686cd2SShayne Chen sizeof(struct sta_rec_hdr_trans) + \ 83000cef41dSShayne Chen sizeof(struct sta_rec_mld_setup) + \ 83100cef41dSShayne Chen sizeof(struct mld_setup_link) * 3 + \ 83200cef41dSShayne Chen sizeof(struct sta_rec_eht_mld) + \ 83398686cd2SShayne Chen sizeof(struct tlv)) 83498686cd2SShayne Chen 83598686cd2SShayne Chen #define MT7996_BEACON_UPDATE_SIZE (sizeof(struct bss_req_hdr) + \ 83698686cd2SShayne Chen sizeof(struct bss_bcn_content_tlv) + \ 8375d197d37SBenjamin Lin 4 + MT_TXD_SIZE + \ 83898686cd2SShayne Chen sizeof(struct bss_bcn_cntdwn_tlv) + \ 83998686cd2SShayne Chen sizeof(struct bss_bcn_mbss_tlv)) 840*79e788fcSPeter Chiu #define MT7996_MAX_BSS_OFFLOAD_SIZE 2048 841*79e788fcSPeter Chiu #define MT7996_MAX_BEACON_SIZE (MT7996_MAX_BSS_OFFLOAD_SIZE - \ 842de869f81SMeiChia Chiu MT7996_BEACON_UPDATE_SIZE) 84398686cd2SShayne Chen 84498686cd2SShayne Chen enum { 84598686cd2SShayne Chen UNI_BAND_CONFIG_RADIO_ENABLE, 84698686cd2SShayne Chen UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08, 84798686cd2SShayne Chen }; 84898686cd2SShayne Chen 84998686cd2SShayne Chen enum { 85098686cd2SShayne Chen UNI_WSYS_CONFIG_FW_LOG_CTRL, 85198686cd2SShayne Chen UNI_WSYS_CONFIG_FW_DBG_CTRL, 85298686cd2SShayne Chen }; 85398686cd2SShayne Chen 85498686cd2SShayne Chen enum { 85598686cd2SShayne Chen UNI_RDD_CTRL_PARM, 85698686cd2SShayne Chen UNI_RDD_CTRL_SET_TH = 0x3, 85798686cd2SShayne Chen }; 85898686cd2SShayne Chen 85998686cd2SShayne Chen enum { 86098686cd2SShayne Chen UNI_EFUSE_ACCESS = 1, 86198686cd2SShayne Chen UNI_EFUSE_BUFFER_MODE, 86298686cd2SShayne Chen UNI_EFUSE_FREE_BLOCK, 86398686cd2SShayne Chen UNI_EFUSE_BUFFER_RD, 86498686cd2SShayne Chen }; 86598686cd2SShayne Chen 86698686cd2SShayne Chen enum { 86798686cd2SShayne Chen UNI_VOW_DRR_CTRL, 86898686cd2SShayne Chen UNI_VOW_RX_AT_AIRTIME_EN = 0x0b, 86998686cd2SShayne Chen UNI_VOW_RX_AT_AIRTIME_CLR_EN = 0x0e, 87098686cd2SShayne Chen }; 87198686cd2SShayne Chen 87298686cd2SShayne Chen enum { 87398686cd2SShayne Chen UNI_CMD_MIB_DATA, 87498686cd2SShayne Chen }; 87598686cd2SShayne Chen 87698686cd2SShayne Chen enum { 87798686cd2SShayne Chen UNI_POWER_OFF, 87898686cd2SShayne Chen }; 87998686cd2SShayne Chen 88098686cd2SShayne Chen enum { 88198686cd2SShayne Chen UNI_CMD_TWT_ARGT_UPDATE = 0x0, 88298686cd2SShayne Chen UNI_CMD_TWT_MGMT_OFFLOAD, 88398686cd2SShayne Chen }; 88498686cd2SShayne Chen 88598686cd2SShayne Chen enum { 88698686cd2SShayne Chen UNI_RRO_DEL_ENTRY = 0x1, 88798686cd2SShayne Chen UNI_RRO_SET_PLATFORM_TYPE, 88898686cd2SShayne Chen UNI_RRO_GET_BA_SESSION_TABLE, 88998686cd2SShayne Chen UNI_RRO_SET_BYPASS_MODE, 89098686cd2SShayne Chen UNI_RRO_SET_TXFREE_PATH, 891950d0abbSBo Jiao UNI_RRO_DEL_BA_SESSION, 892950d0abbSBo Jiao UNI_RRO_SET_FLUSH_TIMEOUT 89398686cd2SShayne Chen }; 89498686cd2SShayne Chen 89598686cd2SShayne Chen enum{ 89698686cd2SShayne Chen UNI_CMD_SR_ENABLE = 0x1, 897cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_SD, 898cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_MODE, 899cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_DPD = 0x12, 900cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_TX, 901cf6dc2dbSRyder Lee UNI_CMD_SR_SET_SRG_BITMAP = 0x80, 902cf6dc2dbSRyder Lee UNI_CMD_SR_SET_PARAM = 0xc1, 903cf6dc2dbSRyder Lee UNI_CMD_SR_SET_SIGA = 0xd0, 90498686cd2SShayne Chen }; 90598686cd2SShayne Chen 90698686cd2SShayne Chen enum { 90721f29088SHoward Hsu UNI_CMD_THERMAL_PROTECT_ENABLE = 0x6, 90821f29088SHoward Hsu UNI_CMD_THERMAL_PROTECT_DISABLE, 90921f29088SHoward Hsu UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG, 91021f29088SHoward Hsu }; 91121f29088SHoward Hsu 91221f29088SHoward Hsu enum { 913f75e4779SShayne Chen UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL = 4, 914f75e4779SShayne Chen }; 915f75e4779SShayne Chen 916f75e4779SShayne Chen enum { 91798686cd2SShayne Chen UNI_CMD_ACCESS_REG_BASIC = 0x0, 91898686cd2SShayne Chen UNI_CMD_ACCESS_RF_REG_BASIC, 91998686cd2SShayne Chen }; 92098686cd2SShayne Chen 92198686cd2SShayne Chen enum { 922672662f0SRyder Lee UNI_CMD_SER_QUERY, 92398686cd2SShayne Chen /* recovery */ 924672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L1, 925672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L2, 926672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_RX_ABORT, 927672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_TX_ABORT, 928672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_TX_DISABLE, 929672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_BF, 930672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L4_MDP, 9318d38abdfSRex Lu UNI_CMD_SER_SET_RECOVER_FROM_ETH, 9328d38abdfSRex Lu UNI_CMD_SER_SET_RECOVER_FULL = 8, 933672662f0SRyder Lee UNI_CMD_SER_SET_SYSTEM_ASSERT, 93498686cd2SShayne Chen /* action */ 935672662f0SRyder Lee UNI_CMD_SER_ENABLE = 1, 936672662f0SRyder Lee UNI_CMD_SER_SET, 937672662f0SRyder Lee UNI_CMD_SER_TRIGGER 93898686cd2SShayne Chen }; 93998686cd2SShayne Chen 94098686cd2SShayne Chen enum { 94176d13debSPeter Chiu UNI_CMD_SDO_SET = 1, 94276d13debSPeter Chiu UNI_CMD_SDO_QUERY, 94376d13debSPeter Chiu UNI_CMD_SDO_CP_MODE = 6, 94476d13debSPeter Chiu }; 94576d13debSPeter Chiu 94676d13debSPeter Chiu enum { 94798686cd2SShayne Chen MT7996_SEC_MODE_PLAIN, 94898686cd2SShayne Chen MT7996_SEC_MODE_AES, 94998686cd2SShayne Chen MT7996_SEC_MODE_SCRAMBLE, 95098686cd2SShayne Chen MT7996_SEC_MODE_MAX, 95198686cd2SShayne Chen }; 95298686cd2SShayne Chen 95398686cd2SShayne Chen #define MT7996_PATCH_SEC GENMASK(31, 24) 95498686cd2SShayne Chen #define MT7996_PATCH_SCRAMBLE_KEY GENMASK(15, 8) 95598686cd2SShayne Chen #define MT7996_PATCH_AES_KEY GENMASK(7, 0) 95698686cd2SShayne Chen 95798686cd2SShayne Chen #define MT7996_SEC_ENCRYPT BIT(0) 95898686cd2SShayne Chen #define MT7996_SEC_KEY_IDX GENMASK(2, 1) 95998686cd2SShayne Chen #define MT7996_SEC_IV BIT(3) 96098686cd2SShayne Chen 961254ab81fSStanleyYP Wang struct fixed_rate_table_ctrl { 962254ab81fSStanleyYP Wang u8 _rsv[4]; 963254ab81fSStanleyYP Wang 964254ab81fSStanleyYP Wang __le16 tag; 965254ab81fSStanleyYP Wang __le16 len; 966254ab81fSStanleyYP Wang 967254ab81fSStanleyYP Wang u8 table_idx; 968254ab81fSStanleyYP Wang u8 antenna_idx; 969254ab81fSStanleyYP Wang __le16 rate_idx; 970254ab81fSStanleyYP Wang u8 spe_idx_sel; 971254ab81fSStanleyYP Wang u8 spe_idx; 972254ab81fSStanleyYP Wang u8 gi; 973254ab81fSStanleyYP Wang u8 he_ltf; 974254ab81fSStanleyYP Wang bool ldpc; 975254ab81fSStanleyYP Wang bool txbf; 976254ab81fSStanleyYP Wang bool dynamic_bw; 977254ab81fSStanleyYP Wang 978254ab81fSStanleyYP Wang u8 _rsv2; 979254ab81fSStanleyYP Wang } __packed; 980254ab81fSStanleyYP Wang 98198686cd2SShayne Chen #endif 982