xref: /linux/drivers/net/wireless/intel/iwlwifi/cfg/22000.c (revision e78f70bad29c5ae1e1076698b690b15794e9b81e)
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2015-2017 Intel Deutschland GmbH
4  * Copyright (C) 2018-2025 Intel Corporation
5  */
6 #include <linux/module.h>
7 #include <linux/stringify.h>
8 #include "iwl-config.h"
9 #include "iwl-prph.h"
10 #include "fw/api/txq.h"
11 
12 /* Highest firmware API version supported */
13 #define IWL_22000_UCODE_API_MAX	77
14 
15 /* Lowest firmware API version supported */
16 #define IWL_22000_UCODE_API_MIN	77
17 
18 /* Memory offsets and lengths */
19 #define IWL_22000_SMEM_OFFSET		0x400000
20 #define IWL_22000_SMEM_LEN		0xD0000
21 
22 #define IWL_QU_B_HR_B_FW_PRE		"iwlwifi-Qu-b0-hr-b0"
23 #define IWL_QU_C_HR_B_FW_PRE		"iwlwifi-Qu-c0-hr-b0"
24 #define IWL_QU_B_JF_B_FW_PRE		"iwlwifi-Qu-b0-jf-b0"
25 #define IWL_QU_C_JF_B_FW_PRE		"iwlwifi-Qu-c0-jf-b0"
26 #define IWL_QUZ_A_HR_B_FW_PRE		"iwlwifi-QuZ-a0-hr-b0"
27 #define IWL_QUZ_A_JF_B_FW_PRE		"iwlwifi-QuZ-a0-jf-b0"
28 #define IWL_CC_A_FW_PRE			"iwlwifi-cc-a0"
29 
30 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \
31 	IWL_QU_B_HR_B_FW_PRE "-" __stringify(api) ".ucode"
32 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \
33 	IWL_QUZ_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
34 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \
35 	IWL_QUZ_A_JF_B_FW_PRE "-" __stringify(api) ".ucode"
36 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \
37 	IWL_QU_C_HR_B_FW_PRE "-" __stringify(api) ".ucode"
38 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \
39 	IWL_QU_B_JF_B_FW_PRE "-" __stringify(api) ".ucode"
40 #define IWL_QU_C_JF_B_MODULE_FIRMWARE(api) \
41 	IWL_QU_C_JF_B_FW_PRE "-" __stringify(api) ".ucode"
42 #define IWL_CC_A_MODULE_FIRMWARE(api)			\
43 	IWL_CC_A_FW_PRE "-" __stringify(api) ".ucode"
44 
45 static const struct iwl_family_base_params iwl_22000_base = {
46 	.num_of_queues = 512,
47 	.max_tfd_queue_size = 256,
48 	.shadow_ram_support = true,
49 	.led_compensation = 57,
50 	.wd_timeout = IWL_LONG_WD_TIMEOUT,
51 	.max_event_log_size = 512,
52 	.shadow_reg_enable = true,
53 	.pcie_l1_allowed = true,
54 	.smem_offset = IWL_22000_SMEM_OFFSET,
55 	.smem_len = IWL_22000_SMEM_LEN,
56 	.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
57 	.apmg_not_supported = true,
58 	.mac_addr_from_csr = 0x380,
59 	.min_umac_error_event_table = 0x400000,
60 	.d3_debug_data_base_addr = 0x401000,
61 	.d3_debug_data_length = 60 * 1024,
62 	.mon_smem_regs = {
63 		.write_ptr = {
64 			.addr = LDBG_M2S_BUF_WPTR,
65 			.mask = LDBG_M2S_BUF_WPTR_VAL_MSK,
66 	},
67 		.cycle_cnt = {
68 			.addr = LDBG_M2S_BUF_WRAP_CNT,
69 			.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,
70 		},
71 	},
72 	.gp2_reg_addr = 0xa02c68,
73 	.mon_dram_regs = {
74 		.write_ptr = {
75 			.addr = MON_BUFF_WRPTR_VER2,
76 			.mask = 0xffffffff,
77 		},
78 		.cycle_cnt = {
79 			.addr = MON_BUFF_CYCLE_CNT_VER2,
80 			.mask = 0xffffffff,
81 		},
82 	},
83 	.ucode_api_min = IWL_22000_UCODE_API_MIN,
84 	.ucode_api_max = IWL_22000_UCODE_API_MAX,
85 };
86 
87 const struct iwl_mac_cfg iwl_qu_mac_cfg = {
88 	.mq_rx_supported = true,
89 	.gen2 = true,
90 	.device_family = IWL_DEVICE_FAMILY_22000,
91 	.base = &iwl_22000_base,
92 	.integrated = true,
93 	.xtal_latency = 500,
94 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
95 };
96 
97 const struct iwl_mac_cfg iwl_qu_medium_latency_mac_cfg = {
98 	.mq_rx_supported = true,
99 	.gen2 = true,
100 	.device_family = IWL_DEVICE_FAMILY_22000,
101 	.base = &iwl_22000_base,
102 	.integrated = true,
103 	.xtal_latency = 1820,
104 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US,
105 };
106 
107 const struct iwl_mac_cfg iwl_qu_long_latency_mac_cfg = {
108 	.mq_rx_supported = true,
109 	.gen2 = true,
110 	.device_family = IWL_DEVICE_FAMILY_22000,
111 	.base = &iwl_22000_base,
112 	.integrated = true,
113 	.xtal_latency = 12000,
114 	.low_latency_xtal = true,
115 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
116 };
117 
118 const struct iwl_mac_cfg iwl_ax200_mac_cfg = {
119 	.device_family = IWL_DEVICE_FAMILY_22000,
120 	.base = &iwl_22000_base,
121 	.mq_rx_supported = true,
122 	.gen2 = true,
123 	.bisr_workaround = 1,
124 };
125 
126 const char iwl_ax200_killer_1650w_name[] =
127 	"Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)";
128 const char iwl_ax200_killer_1650x_name[] =
129 	"Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)";
130 const char iwl_ax201_killer_1650s_name[] =
131 	"Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)";
132 const char iwl_ax201_killer_1650i_name[] =
133 	"Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)";
134 
135 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
136 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
137 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
138 MODULE_FIRMWARE(IWL_QU_C_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
139 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
140 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
141 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
142